diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 13624b519a..e216290c95 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -5,9 +5,9 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2023.10 +PKG_VERSION:=2024.01-rc1 PKG_RELEASE:=1 -PKG_HASH:=e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900 +PKG_HASH:=c2adf08e91c4bc3f6b7070029c4c6aefd9b04ea77d5260c6844d2a7e8cc49ae2 PKG_MAINTAINER:=Tobias Maedel diff --git a/package/boot/uboot-rockchip/patches/101-spl-support-adc-drivers-in-spl.patch b/package/boot/uboot-rockchip/patches/101-spl-support-adc-drivers-in-spl.patch index 29f6bf252d..3d53827b23 100644 --- a/package/boot/uboot-rockchip/patches/101-spl-support-adc-drivers-in-spl.patch +++ b/package/boot/uboot-rockchip/patches/101-spl-support-adc-drivers-in-spl.patch @@ -17,7 +17,7 @@ Signed-off-by: Peter Geis --- a/common/spl/Kconfig +++ b/common/spl/Kconfig -@@ -564,6 +564,11 @@ config SPL_FIT_IMAGE_TINY +@@ -579,6 +579,11 @@ config SPL_FIT_IMAGE_TINY ensure this information is available to the next image invoked). diff --git a/package/boot/uboot-rockchip/patches/102-rockchip-handle-bootrom-recovery-mode-in-spl.patch b/package/boot/uboot-rockchip/patches/102-rockchip-handle-bootrom-recovery-mode-in-spl.patch index 84c8f5b077..082c745ace 100644 --- a/package/boot/uboot-rockchip/patches/102-rockchip-handle-bootrom-recovery-mode-in-spl.patch +++ b/package/boot/uboot-rockchip/patches/102-rockchip-handle-bootrom-recovery-mode-in-spl.patch @@ -39,7 +39,7 @@ Signed-off-by: Peter Geis endif --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c -@@ -51,7 +51,7 @@ __weak int rockchip_dnl_key_pressed(void +@@ -52,7 +52,7 @@ __weak int rockchip_dnl_key_pressed(void ret = -ENODEV; uclass_foreach_dev(dev, uc) { if (!strncmp(dev->name, "saradc", 6)) { @@ -48,7 +48,7 @@ Signed-off-by: Peter Geis break; } } -@@ -89,6 +89,7 @@ int setup_boot_mode(void) +@@ -90,6 +90,7 @@ int setup_boot_mode(void) boot_mode = readl(reg); debug("%s: boot mode 0x%08x\n", __func__, boot_mode); @@ -56,7 +56,7 @@ Signed-off-by: Peter Geis /* Clear boot mode */ writel(BOOT_NORMAL, reg); -@@ -102,6 +103,7 @@ int setup_boot_mode(void) +@@ -103,6 +104,7 @@ int setup_boot_mode(void) env_set("preboot", "setenv preboot; ums mmc 0"); break; } diff --git a/package/boot/uboot-rockchip/patches/103-rockchip-move-dwc3-config-to-chip-specific-handler.patch b/package/boot/uboot-rockchip/patches/103-rockchip-move-dwc3-config-to-chip-specific-handler.patch index b2c260c486..fd91ca6a20 100644 --- a/package/boot/uboot-rockchip/patches/103-rockchip-move-dwc3-config-to-chip-specific-handler.patch +++ b/package/boot/uboot-rockchip/patches/103-rockchip-move-dwc3-config-to-chip-specific-handler.patch @@ -35,9 +35,9 @@ Signed-off-by: Peter Geis - .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW, -}; - --int usb_gadget_handle_interrupts(int index) +-int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ -- dwc3_uboot_handle_interrupt(0); +- dwc3_uboot_handle_interrupt(dev); - return 0; -} - @@ -52,7 +52,7 @@ Signed-off-by: Peter Geis #if IS_ENABLED(CONFIG_FASTBOOT) --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c -@@ -282,3 +282,32 @@ void spl_board_init(void) +@@ -283,3 +283,32 @@ void spl_board_init(void) } } #endif @@ -72,9 +72,9 @@ Signed-off-by: Peter Geis + .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW, +}; + -+int usb_gadget_handle_interrupts(int index) ++int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ -+ dwc3_uboot_handle_interrupt(0); ++ dwc3_uboot_handle_interrupt(dev); + return 0; +} + diff --git a/package/boot/uboot-rockchip/patches/104-rockchip-rk3568-add-dwc3-otg-support.patch b/package/boot/uboot-rockchip/patches/104-rockchip-rk3568-add-dwc3-otg-support.patch index 52d12c17fa..025c82e68b 100644 --- a/package/boot/uboot-rockchip/patches/104-rockchip-rk3568-add-dwc3-otg-support.patch +++ b/package/boot/uboot-rockchip/patches/104-rockchip-rk3568-add-dwc3-otg-support.patch @@ -38,9 +38,9 @@ Signed-off-by: Peter Geis + .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW, +}; + -+int usb_gadget_handle_interrupts(int index) ++int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ -+ dwc3_uboot_handle_interrupt(0); ++ dwc3_uboot_handle_interrupt(dev); + return 0; +} + diff --git a/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch b/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch index 449b58e3cc..d552483bb4 100644 --- a/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch +++ b/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch @@ -1,6 +1,6 @@ --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -125,6 +125,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ +@@ -126,6 +126,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ dtb-$(CONFIG_ROCKCHIP_RK3328) += \ rk3328-evb.dtb \ rk3328-nanopi-r2c.dtb \ @@ -8,7 +8,7 @@ rk3328-nanopi-r2s.dtb \ rk3328-orangepi-r1-plus.dtb \ rk3328-orangepi-r1-plus-lts.dtb \ -@@ -145,6 +146,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ +@@ -146,6 +147,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-firefly.dtb \ rk3399-gru-bob.dtb \ rk3399-gru-kevin.dtb \ @@ -16,7 +16,7 @@ rk3399-khadas-edge.dtb \ rk3399-khadas-edge-captain.dtb \ rk3399-khadas-edge-v.dtb \ -@@ -155,6 +157,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ +@@ -156,6 +158,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-nanopi-m4b.dtb \ rk3399-nanopi-neo4.dtb \ rk3399-nanopi-r4s.dtb \ @@ -25,9 +25,9 @@ rk3399-orangepi.dtb \ rk3399-pinebook-pro.dtb \ rk3399-pinephone-pro.dtb \ -@@ -178,19 +182,26 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ - rk3566-soquartz-cm4.dtb \ +@@ -180,19 +184,26 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3566-soquartz-model-a.dtb \ + rk3568-bpi-r2-pro.dtb \ rk3568-evb.dtb \ + rk3568-fastrhino-r66s.dtb \ + rk3568-fastrhino-r68s.dtb \ diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi index fd1a92576d..6ce824c95c 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi @@ -9,8 +9,26 @@ }; }; +&pcie3x1 { + /delete-property/ vpcie3v3-supply; +}; + +&pcie3x2 { + /delete-property/ vpcie3v3-supply; +}; + &uart2 { clock-frequency = <24000000>; bootph-all; status = "okay"; }; + +&vcc5v0_usb_host { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; + +&vcc5v0_usb_otg { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s-u-boot.dtsi index f4769d12bd..656dc73451 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s-u-boot.dtsi +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s-u-boot.dtsi @@ -1,21 +1,18 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT -#include "rk356x-u-boot.dtsi" +#include "rk3568-fastrhino-r66s-u-boot.dtsi" / { chosen { - stdout-path = &uart2; u-boot,spl-boot-order = "same-as-spl", &sdhci; }; }; &sdhci { cap-mmc-highspeed; + mmc-ddr-1_8v; mmc-hs200-1_8v; -}; - -&uart2 { - clock-frequency = <24000000>; - bootph-all; - status = "okay"; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; }; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-mrkaio-m68s-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-mrkaio-m68s-u-boot.dtsi index 816274db9b..feb00c312e 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-mrkaio-m68s-u-boot.dtsi +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-mrkaio-m68s-u-boot.dtsi @@ -5,13 +5,16 @@ / { chosen { stdout-path = &uart2; - u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; }; }; &sdhci { cap-mmc-highspeed; + mmc-ddr-1_8v; mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; }; &uart2 { @@ -19,3 +22,13 @@ bootph-all; status = "okay"; }; + +&vcc5v0_usb_host { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; + +&vcc5v0_usb_otg { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc-u-boot.dtsi index c26372ea93..7506a3cc5b 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc-u-boot.dtsi +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc-u-boot.dtsi @@ -5,7 +5,6 @@ / { chosen { stdout-path = &uart2; - u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; }; }; @@ -23,3 +22,7 @@ bootph-all; status = "okay"; }; + +&vcc5v0_host { + /delete-property/ regulator-always-on; +}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 2c9af5e1f0..bbd4f59650 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -6,13 +6,7 @@ #include "rk3588-u-boot.dtsi" / { - aliases { - mmc0 = &sdmmc; - mmc1 = &sdhci; - }; - chosen { - stdout-path = &uart2; u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; }; }; @@ -25,6 +19,4 @@ cap-mmc-highspeed; mmc-ddr-1_8v; mmc-hs200-1_8v; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_data_strobe &emmc_rstnout>; }; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6.dts index 2d99daf926..019a56f891 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6.dts +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-nanopc-t6.dts @@ -26,6 +26,29 @@ serial2 = &uart2; }; + chosen { + stdout-path = "serial2:1500000n8"; + }; + + analog-sound { + compatible = "audio-graph-card"; + label = "realtek,rt5616-codec"; + + + widgets = "Headphone", "Headphones", + "Microphone", "Mic Jack"; + + routing = "Headphones", "HPOL", + "Headphones", "HPOR", + "MIC1", "Mic Jack", + "Mic Jack", "MICBIAS1"; + + dais = <&i2s0_8ch_p0>; + hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_detect>; + }; + gpio-leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -42,10 +65,6 @@ }; }; - chosen { - stdout-path = "serial2:1500000n8"; - }; - vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -161,6 +180,18 @@ }; }; +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + &cpu_l0 { cpu-supply = <&vdd_cpu_lit_s0>; mem-supply = <&vdd_cpu_lit_mem_s0>; @@ -292,6 +323,7 @@ }; &i2c6 { + clock-frequency = <200000>; status = "okay"; hym8563: rtc@51 { @@ -349,6 +381,12 @@ }; }; + sound { + hp_detect: hp-detect { + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + usb { usbc0_int: usbc0-int { rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; @@ -365,6 +403,11 @@ }; }; +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + &sdhci { bus-width = <8>; cap-mmc-highspeed; @@ -778,7 +821,43 @@ }; }; +&tsadc { + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi index 631f471581..c30129b23a 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi @@ -6,13 +6,7 @@ #include "rk3588s-u-boot.dtsi" / { - aliases { - mmc0 = &sdmmc; - mmc1 = &sdhci; - }; - chosen { - stdout-path = &uart2; u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; }; }; @@ -25,6 +19,4 @@ cap-mmc-highspeed; mmc-ddr-1_8v; mmc-hs200-1_8v; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_data_strobe &emmc_rstnout>; }; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts index fcbcdb643a..6a43e48344 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts @@ -27,6 +27,10 @@ serial2 = &uart2; }; + chosen { + stdout-path = "serial2:1500000n8"; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -66,10 +70,6 @@ }; }; - chosen { - stdout-path = "serial2:1500000n8"; - }; - vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -148,6 +148,14 @@ }; }; +&combphy0_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + &cpu_l0 { cpu-supply = <&vdd_cpu_lit_s0>; mem-supply = <&vdd_cpu_lit_mem_s0>; @@ -294,6 +302,11 @@ }; }; +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + &sdhci { bus-width = <8>; cap-mmc-highspeed; @@ -707,7 +720,32 @@ }; }; +&tsadc { + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host_20>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; diff --git a/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig index 905ef77211..cad4f3baa6 100644 --- a/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a00000 @@ -13,15 +14,17 @@ CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_TARGET_EVB_RK3568=y CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-fastrhino-r66s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -38,14 +41,16 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_WARN=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -53,19 +58,20 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -CONFIG_POWER_DOMAIN=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y @@ -73,13 +79,12 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y -CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig index 90c2a7d48d..89e2082204 100644 --- a/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a00000 @@ -13,15 +14,17 @@ CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_TARGET_EVB_RK3568=y CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-fastrhino-r68s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,16 +42,18 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_WARN=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -57,23 +62,23 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_DM_ETH=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y -CONFIG_POWER_DOMAIN=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_SPL_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y @@ -81,7 +86,6 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y -CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y @@ -91,16 +95,13 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Rockchip" -CONFIG_USB_GADGET_VENDOR_NUM=0x2207 -CONFIG_USB_GADGET_PRODUCT_NUM=0x350a -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_FUNCTION_ROCKUSB=y -CONFIG_ROCKCHIP_USB2_PHY=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_LAN75XX=y CONFIG_USB_ETHER_LAN78XX=y CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_PRODUCT_NUM=0x350a +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig index c833d5a650..10831d2563 100644 --- a/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a00000 @@ -13,15 +14,17 @@ CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_TARGET_EVB_RK3568=y CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-mrkaio-m68s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -38,14 +41,16 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_WARN=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -53,19 +58,23 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -CONFIG_POWER_DOMAIN=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y @@ -73,13 +82,12 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y -CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/nanopc-t6-rk3588_defconfig b/package/boot/uboot-rockchip/src/configs/nanopc-t6-rk3588_defconfig index e8b46cf744..087ecd96fe 100644 --- a/package/boot/uboot-rockchip/src/configs/nanopc-t6-rk3588_defconfig +++ b/package/boot/uboot-rockchip/src/configs/nanopc-t6-rk3588_defconfig @@ -21,7 +21,9 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -56,8 +58,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig b/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig index e1eb197166..500f6c82a8 100644 --- a/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig +++ b/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -CONFIG_DEFAULT_DEVICE_TREE="rk3588s-nanopi-r6c" +CONFIG_DEFAULT_DEVICE_TREE="rk3588-rk3588s-nanopi-r6c" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y @@ -21,9 +21,11 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rk3588s-nanopi-r6c.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 @@ -56,8 +58,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig b/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig index 1e38954075..45f4d8b3c4 100644 --- a/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig +++ b/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -CONFIG_DEFAULT_DEVICE_TREE="rk3588s-nanopi-r6s" +CONFIG_DEFAULT_DEVICE_TREE="rk3588-rk3588s-nanopi-r6s" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y @@ -21,9 +21,11 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rk3588s-nanopi-r6s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 @@ -56,8 +58,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig index 5f2a5ebb1f..8034d67186 100644 --- a/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a00000 @@ -13,15 +14,17 @@ CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_TARGET_EVB_RK3568=y CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-roc-pc.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -38,14 +41,16 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_WARN=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -53,19 +58,23 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -CONFIG_POWER_DOMAIN=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y @@ -73,13 +82,12 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y -CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y