From 496280ef4e0ce1d272e669eca4b63582229b65e4 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Tue, 30 May 2023 15:05:06 +0800 Subject: [PATCH 01/17] ath79: add missing symbols by refreshing kernel configs Some symbols are outdated or missing due to daily kernel bumps. It's better to re-add them. All configs are automatically refreshed by 'make kernel_oldconfig CONFIG_TARGET=taget' and 'make kernel_oldconfig CONFIG_TARGET=subtarget' Signed-off-by: Shiji Yang --- target/linux/ath79/config-5.15 | 3 +-- target/linux/ath79/generic/config-default | 2 ++ target/linux/ath79/mikrotik/config-default | 19 ++++++++++++++----- target/linux/ath79/nand/config-default | 8 ++++++-- target/linux/ath79/tiny/config-default | 2 +- 5 files changed, 24 insertions(+), 10 deletions(-) diff --git a/target/linux/ath79/config-5.15 b/target/linux/ath79/config-5.15 index 21fd091a2e..5b1b0d5add 100644 --- a/target/linux/ath79/config-5.15 +++ b/target/linux/ath79/config-5.15 @@ -41,6 +41,7 @@ CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y CONFIG_DTC=y CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y CONFIG_FIXED_PHY=y CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y @@ -80,7 +81,6 @@ CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HZ_PERIODIC=y -CONFIG_IMAGE_CMDLINE_HACK=y CONFIG_INITRAMFS_SOURCE="" CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y @@ -158,7 +158,6 @@ CONFIG_PHYLIB=y # CONFIG_PHY_AR7200_USB is not set # CONFIG_PHY_ATH79_USB is not set CONFIG_PINCTRL=y -# CONFIG_PINCTRL_PISTACHIO is not set CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_RATIONAL=y CONFIG_REGMAP=y diff --git a/target/linux/ath79/generic/config-default b/target/linux/ath79/generic/config-default index 06f264b626..d8c674cba7 100644 --- a/target/linux/ath79/generic/config-default +++ b/target/linux/ath79/generic/config-default @@ -6,6 +6,7 @@ CONFIG_GPIO_WATCHDOG=y CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_GPIO=y CONFIG_INTEL_XWAY_PHY=y @@ -20,6 +21,7 @@ CONFIG_NVMEM_U_BOOT_ENV=y CONFIG_PHY_AR7100_USB=y CONFIG_PHY_AR7200_USB=y CONFIG_REALTEK_PHY=y +CONFIG_REGMAP_I2C=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_VITESSE_PHY=y CONFIG_WATCHDOG_CORE=y diff --git a/target/linux/ath79/mikrotik/config-default b/target/linux/ath79/mikrotik/config-default index 67d4ca6edc..2ff08cec2b 100644 --- a/target/linux/ath79/mikrotik/config-default +++ b/target/linux/ath79/mikrotik/config-default @@ -1,17 +1,21 @@ CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y CONFIG_GPIO_LATCH=y -CONFIG_GPIO_RB91X_KEY=y CONFIG_GPIO_RB4XX=y +CONFIG_GPIO_RB91X_KEY=y CONFIG_GPIO_WATCHDOG=y CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y +CONFIG_GRO_CELLS=y CONFIG_LEDS_RESET=y +CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_GPIO=y +CONFIG_MFD_CORE=y CONFIG_MFD_RB4XX_CPLD=y CONFIG_MIKROTIK=y CONFIG_MIKROTIK_RB_SYSFS=y -CONFIG_MTD_NAND=y CONFIG_MTD_NAND_AR934X=y CONFIG_MTD_NAND_CORE=y CONFIG_MTD_NAND_ECC=y @@ -24,17 +28,22 @@ CONFIG_MTD_SPI_NAND=y CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y CONFIG_MTD_SPLIT_MINOR_FW=y CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_SWITCHDEV=y -CONFIG_PCI_AR71XX=y +CONFIG_PHYLINK=y CONFIG_PHY_AR7100_USB=y CONFIG_PHY_AR7200_USB=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_SGL_ALLOC=y CONFIG_SPI_RB4XX=y CONFIG_UBIFS_FS=y CONFIG_WATCHDOG_CORE=y +CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ath79/nand/config-default b/target/linux/ath79/nand/config-default index 3072feea2f..730d38e1df 100644 --- a/target/linux/ath79/nand/config-default +++ b/target/linux/ath79/nand/config-default @@ -1,13 +1,14 @@ +CONFIG_BCH=y CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MTD_NAND=y CONFIG_MTD_NAND_AR934X=y CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_ECC_SW_BCH=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_SPI_NAND=y @@ -21,5 +22,8 @@ CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_SGL_ALLOC=y CONFIG_UBIFS_FS=y +CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ath79/tiny/config-default b/target/linux/ath79/tiny/config-default index fbf08eb066..df7e662827 100644 --- a/target/linux/ath79/tiny/config-default +++ b/target/linux/ath79/tiny/config-default @@ -1,9 +1,9 @@ +CONFIG_GRO_CELLS=y CONFIG_LEDS_RESET=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y CONFIG_NET_DSA_MV88E6060=y -# CONFIG_NET_DSA_TAG_QCA is not set CONFIG_NET_DSA_TAG_TRAILER=y CONFIG_NET_SWITCHDEV=y CONFIG_PHYLINK=y From c60dd7bef97772bfb7c23691986d71c17233553d Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 31 May 2023 10:50:04 +0800 Subject: [PATCH 02/17] ath79: rename and sort patches by OpenWrt naming rules The patches in the ath79 target have not been sorted for a long time and they are very chaotic now. This patch sorts them again according to the OpenWrt naming rules[1], so that we can better manage them. [1] https://openwrt.org/docs/guide-developer/toolchain/use-patches-with-buildsystem#naming_patches Signed-off-by: Shiji Yang --- ...> 010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch} | 0 ...ize.patch => 011-v5.17-spi-ar934x-fix-transfer-size.patch} | 0 ...020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch} | 0 ... => 030-v5.18-ath79-add-support-for-booting-QCN550x.patch} | 2 +- ...rqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch} | 0 ...ch => 301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch} | 0 ...=> 310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch} | 0 ...rt-to-OF.patch => 311-MIPS-pci-ar71xx-convert-to-OF.patch} | 0 ...=> 312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch} | 0 ...rt-to-OF.patch => 313-MIPS-pci-ar724x-convert-to-OF.patch} | 0 ...ci.patch => 314-MIPS-ath79-remove-irq-code-from-pci.patch} | 0 ...h => 315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch} | 4 ++-- ...ch => 316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch} | 0 ...37-missing-registers.patch => 330-missing-registers.patch} | 2 +- ...> 331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch} | 4 ++-- ...-ath79-sgmii-config.patch => 332-ath79-sgmii-config.patch} | 2 +- ...r_earlier.patch => 340-register_gpio_driver_earlier.patch} | 0 ...ath9k-exports.patch => 350-MIPS-ath79-ath9k-exports.patch} | 0 ...mmon-exports.patch => 351-MIPS-ath79-common-exports.patch} | 0 ...atch => 360-MIPS-ath79-export-UART1-reference-clock.patch} | 0 ...ze-symbols.patch => 370-MIPS-ath79-sanitize-symbols.patch} | 0 ...ch => 400-mtd-nor-support-mtd-name-from-device-tree.patch} | 0 ...tan-trx-parser.patch => 410-mtd-cybertan-trx-parser.patch} | 0 ...before-mtd.patch => 420-drivers-link-spi-before-mtd.patch} | 0 ...34x-nand-driver.patch => 430-mtd-ar934x-nand-driver.patch} | 0 ...-ath79-usb-phys.patch => 700-phy-add-ath79-usb-phys.patch} | 0 ...rties.patch => 701-usb-add-more-OF-quirk-properties.patch} | 0 ...tream-ag71xx.patch => 710-net-use-downstream-ag71xx.patch} | 0 ..._ta_value.patch => 720-mdio_bitbang_ignore_ta_value.patch} | 0 ...hy-mdio-bitbang-prevent-rescheduling-during-command.patch} | 0 ...s-atomic.patch => 730-ar8216-make-reg-access-atomic.patch} | 0 ...patch => 800-leds-add-reset-controller-based-driver.patch} | 0 ...ed_access_hacks.patch => 900-unaligned_access_hacks.patch} | 0 .../{920-mikrotik-rb4xx.patch => 910-mikrotik-rb4xx.patch} | 0 .../{939-mikrotik-rb91x.patch => 911-mikrotik-rb91x.patch} | 0 35 files changed, 7 insertions(+), 7 deletions(-) rename target/linux/ath79/patches-5.15/{402-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch => 010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch} (100%) rename target/linux/ath79/patches-5.15/{403-v5.17-spi-ar934x-fix-transfer-size.patch => 011-v5.17-spi-ar934x-fix-transfer-size.patch} (100%) rename target/linux/ath79/patches-5.15/{410-spi-ath79-Implement-the-spi_mem-interface.patch => 020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch} (100%) rename target/linux/ath79/patches-5.15/{940-ath79-add-support-for-booting-QCN550x.patch => 030-v5.18-ath79-add-support-for-booting-QCN550x.patch} (98%) rename target/linux/ath79/patches-5.15/{0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch => 300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch} (100%) rename target/linux/ath79/patches-5.15/{0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch => 301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch} (100%) rename target/linux/ath79/patches-5.15/{0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch => 310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch} (100%) rename target/linux/ath79/patches-5.15/{0018-MIPS-pci-ar71xx-convert-to-OF.patch => 311-MIPS-pci-ar71xx-convert-to-OF.patch} (100%) rename target/linux/ath79/patches-5.15/{0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch => 312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch} (100%) rename target/linux/ath79/patches-5.15/{0020-MIPS-pci-ar724x-convert-to-OF.patch => 313-MIPS-pci-ar724x-convert-to-OF.patch} (100%) rename target/linux/ath79/patches-5.15/{0036-MIPS-ath79-remove-irq-code-from-pci.patch => 314-MIPS-ath79-remove-irq-code-from-pci.patch} (100%) rename target/linux/ath79/patches-5.15/{0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch => 315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch} (99%) rename target/linux/ath79/patches-5.15/{470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch => 316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch} (100%) rename target/linux/ath79/patches-5.15/{0037-missing-registers.patch => 330-missing-registers.patch} (96%) rename target/linux/ath79/patches-5.15/{0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch => 331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch} (98%) rename target/linux/ath79/patches-5.15/{0040-ath79-sgmii-config.patch => 332-ath79-sgmii-config.patch} (98%) rename target/linux/ath79/patches-5.15/{004-register_gpio_driver_earlier.patch => 340-register_gpio_driver_earlier.patch} (100%) rename target/linux/ath79/patches-5.15/{0034-MIPS-ath79-ath9k-exports.patch => 350-MIPS-ath79-ath9k-exports.patch} (100%) rename target/linux/ath79/patches-5.15/{0041-MIPS-ath79-common-exports.patch => 351-MIPS-ath79-common-exports.patch} (100%) rename target/linux/ath79/patches-5.15/{0039-MIPS-ath79-export-UART1-reference-clock.patch => 360-MIPS-ath79-export-UART1-reference-clock.patch} (100%) rename target/linux/ath79/patches-5.15/{0032-MIPS-ath79-sanitize-symbols.patch => 370-MIPS-ath79-sanitize-symbols.patch} (100%) rename target/linux/ath79/patches-5.15/{401-mtd-nor-support-mtd-name-from-device-tree.patch => 400-mtd-nor-support-mtd-name-from-device-tree.patch} (100%) rename target/linux/ath79/patches-5.15/{404-mtd-cybertan-trx-parser.patch => 410-mtd-cybertan-trx-parser.patch} (100%) rename target/linux/ath79/patches-5.15/{430-drivers-link-spi-before-mtd.patch => 420-drivers-link-spi-before-mtd.patch} (100%) rename target/linux/ath79/patches-5.15/{440-mtd-ar934x-nand-driver.patch => 430-mtd-ar934x-nand-driver.patch} (100%) rename target/linux/ath79/patches-5.15/{0004-phy-add-ath79-usb-phys.patch => 700-phy-add-ath79-usb-phys.patch} (100%) rename target/linux/ath79/patches-5.15/{0005-usb-add-more-OF-quirk-properties.patch => 701-usb-add-more-OF-quirk-properties.patch} (100%) rename target/linux/ath79/patches-5.15/{420-net-use-downstream-ag71xx.patch => 710-net-use-downstream-ag71xx.patch} (100%) rename target/linux/ath79/patches-5.15/{900-mdio_bitbang_ignore_ta_value.patch => 720-mdio_bitbang_ignore_ta_value.patch} (100%) rename target/linux/ath79/patches-5.15/{901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch => 721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch} (100%) rename target/linux/ath79/patches-5.15/{930-ar8216-make-reg-access-atomic.patch => 730-ar8216-make-reg-access-atomic.patch} (100%) rename target/linux/ath79/patches-5.15/{0003-leds-add-reset-controller-based-driver.patch => 800-leds-add-reset-controller-based-driver.patch} (100%) rename target/linux/ath79/patches-5.15/{910-unaligned_access_hacks.patch => 900-unaligned_access_hacks.patch} (100%) rename target/linux/ath79/patches-5.15/{920-mikrotik-rb4xx.patch => 910-mikrotik-rb4xx.patch} (100%) rename target/linux/ath79/patches-5.15/{939-mikrotik-rb91x.patch => 911-mikrotik-rb91x.patch} (100%) diff --git a/target/linux/ath79/patches-5.15/402-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch b/target/linux/ath79/patches-5.15/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch similarity index 100% rename from target/linux/ath79/patches-5.15/402-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch rename to target/linux/ath79/patches-5.15/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch diff --git a/target/linux/ath79/patches-5.15/403-v5.17-spi-ar934x-fix-transfer-size.patch b/target/linux/ath79/patches-5.15/011-v5.17-spi-ar934x-fix-transfer-size.patch similarity index 100% rename from target/linux/ath79/patches-5.15/403-v5.17-spi-ar934x-fix-transfer-size.patch rename to target/linux/ath79/patches-5.15/011-v5.17-spi-ar934x-fix-transfer-size.patch diff --git a/target/linux/ath79/patches-5.15/410-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-5.15/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch similarity index 100% rename from target/linux/ath79/patches-5.15/410-spi-ath79-Implement-the-spi_mem-interface.patch rename to target/linux/ath79/patches-5.15/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch diff --git a/target/linux/ath79/patches-5.15/940-ath79-add-support-for-booting-QCN550x.patch b/target/linux/ath79/patches-5.15/030-v5.18-ath79-add-support-for-booting-QCN550x.patch similarity index 98% rename from target/linux/ath79/patches-5.15/940-ath79-add-support-for-booting-QCN550x.patch rename to target/linux/ath79/patches-5.15/030-v5.18-ath79-add-support-for-booting-QCN550x.patch index cf77433634..41ea5d2ef0 100644 --- a/target/linux/ath79/patches-5.15/940-ath79-add-support-for-booting-QCN550x.patch +++ b/target/linux/ath79/patches-5.15/030-v5.18-ath79-add-support-for-booting-QCN550x.patch @@ -38,7 +38,7 @@ Signed-off-by: Wenli Looi chip = "9343"; --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -867,6 +867,7 @@ +@@ -862,6 +862,7 @@ #define REV_ID_MAJOR_QCA9558 0x1130 #define REV_ID_MAJOR_TP9343 0x0150 #define REV_ID_MAJOR_QCA956X 0x1150 diff --git a/target/linux/ath79/patches-5.15/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/target/linux/ath79/patches-5.15/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch rename to target/linux/ath79/patches-5.15/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch diff --git a/target/linux/ath79/patches-5.15/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/target/linux/ath79/patches-5.15/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch rename to target/linux/ath79/patches-5.15/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch diff --git a/target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-5.15/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch rename to target/linux/ath79/patches-5.15/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch diff --git a/target/linux/ath79/patches-5.15/0018-MIPS-pci-ar71xx-convert-to-OF.patch b/target/linux/ath79/patches-5.15/311-MIPS-pci-ar71xx-convert-to-OF.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0018-MIPS-pci-ar71xx-convert-to-OF.patch rename to target/linux/ath79/patches-5.15/311-MIPS-pci-ar71xx-convert-to-OF.patch diff --git a/target/linux/ath79/patches-5.15/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/target/linux/ath79/patches-5.15/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch rename to target/linux/ath79/patches-5.15/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch diff --git a/target/linux/ath79/patches-5.15/0020-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-5.15/313-MIPS-pci-ar724x-convert-to-OF.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0020-MIPS-pci-ar724x-convert-to-OF.patch rename to target/linux/ath79/patches-5.15/313-MIPS-pci-ar724x-convert-to-OF.patch diff --git a/target/linux/ath79/patches-5.15/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-5.15/314-MIPS-ath79-remove-irq-code-from-pci.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0036-MIPS-ath79-remove-irq-code-from-pci.patch rename to target/linux/ath79/patches-5.15/314-MIPS-ath79-remove-irq-code-from-pci.patch diff --git a/target/linux/ath79/patches-5.15/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/target/linux/ath79/patches-5.15/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch similarity index 99% rename from target/linux/ath79/patches-5.15/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch rename to target/linux/ath79/patches-5.15/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch index 1949a9f886..375dec8ba2 100644 --- a/target/linux/ath79/patches-5.15/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch +++ b/target/linux/ath79/patches-5.15/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch @@ -16,7 +16,7 @@ Signed-off-by: David Bauer --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -391,6 +391,7 @@ +@@ -390,6 +390,7 @@ #define QCA955X_PLL_CPU_CONFIG_REG 0x00 #define QCA955X_PLL_DDR_CONFIG_REG 0x04 #define QCA955X_PLL_CLK_CTRL_REG 0x08 @@ -24,7 +24,7 @@ Signed-off-by: David Bauer #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 #define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c -@@ -476,6 +477,9 @@ +@@ -475,6 +476,9 @@ #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) diff --git a/target/linux/ath79/patches-5.15/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-5.15/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch similarity index 100% rename from target/linux/ath79/patches-5.15/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch rename to target/linux/ath79/patches-5.15/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch diff --git a/target/linux/ath79/patches-5.15/0037-missing-registers.patch b/target/linux/ath79/patches-5.15/330-missing-registers.patch similarity index 96% rename from target/linux/ath79/patches-5.15/0037-missing-registers.patch rename to target/linux/ath79/patches-5.15/330-missing-registers.patch index 0e6ac52ade..74789437ec 100644 --- a/target/linux/ath79/patches-5.15/0037-missing-registers.patch +++ b/target/linux/ath79/patches-5.15/330-missing-registers.patch @@ -7,7 +7,7 @@ Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1226,6 +1226,10 @@ +@@ -1231,6 +1231,10 @@ #define AR934X_ETH_CFG_RDV_DELAY BIT(16) #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 diff --git a/target/linux/ath79/patches-5.15/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/target/linux/ath79/patches-5.15/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch similarity index 98% rename from target/linux/ath79/patches-5.15/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch rename to target/linux/ath79/patches-5.15/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch index bc09062dc5..c2f228dfe1 100644 --- a/target/linux/ath79/patches-5.15/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch +++ b/target/linux/ath79/patches-5.15/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch @@ -16,7 +16,7 @@ Signed-off-by: David Bauer --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1246,7 +1246,12 @@ +@@ -1251,7 +1251,12 @@ */ #define QCA955X_GMAC_REG_ETH_CFG 0x00 @@ -29,7 +29,7 @@ Signed-off-by: David Bauer #define QCA955X_ETH_CFG_RGMII_EN BIT(0) #define QCA955X_ETH_CFG_MII_GE0 BIT(1) -@@ -1268,9 +1273,58 @@ +@@ -1273,9 +1278,58 @@ #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 diff --git a/target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch b/target/linux/ath79/patches-5.15/332-ath79-sgmii-config.patch similarity index 98% rename from target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch rename to target/linux/ath79/patches-5.15/332-ath79-sgmii-config.patch index 4c2b94899a..a6a50e4a8a 100644 --- a/target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch +++ b/target/linux/ath79/patches-5.15/332-ath79-sgmii-config.patch @@ -21,7 +21,7 @@ Submitted-by: David Bauer --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1376,5 +1376,6 @@ +@@ -1380,5 +1380,6 @@ #define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 #define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 diff --git a/target/linux/ath79/patches-5.15/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-5.15/340-register_gpio_driver_earlier.patch similarity index 100% rename from target/linux/ath79/patches-5.15/004-register_gpio_driver_earlier.patch rename to target/linux/ath79/patches-5.15/340-register_gpio_driver_earlier.patch diff --git a/target/linux/ath79/patches-5.15/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-5.15/350-MIPS-ath79-ath9k-exports.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0034-MIPS-ath79-ath9k-exports.patch rename to target/linux/ath79/patches-5.15/350-MIPS-ath79-ath9k-exports.patch diff --git a/target/linux/ath79/patches-5.15/0041-MIPS-ath79-common-exports.patch b/target/linux/ath79/patches-5.15/351-MIPS-ath79-common-exports.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0041-MIPS-ath79-common-exports.patch rename to target/linux/ath79/patches-5.15/351-MIPS-ath79-common-exports.patch diff --git a/target/linux/ath79/patches-5.15/0039-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-5.15/360-MIPS-ath79-export-UART1-reference-clock.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0039-MIPS-ath79-export-UART1-reference-clock.patch rename to target/linux/ath79/patches-5.15/360-MIPS-ath79-export-UART1-reference-clock.patch diff --git a/target/linux/ath79/patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-5.15/370-MIPS-ath79-sanitize-symbols.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch rename to target/linux/ath79/patches-5.15/370-MIPS-ath79-sanitize-symbols.patch diff --git a/target/linux/ath79/patches-5.15/401-mtd-nor-support-mtd-name-from-device-tree.patch b/target/linux/ath79/patches-5.15/400-mtd-nor-support-mtd-name-from-device-tree.patch similarity index 100% rename from target/linux/ath79/patches-5.15/401-mtd-nor-support-mtd-name-from-device-tree.patch rename to target/linux/ath79/patches-5.15/400-mtd-nor-support-mtd-name-from-device-tree.patch diff --git a/target/linux/ath79/patches-5.15/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-5.15/410-mtd-cybertan-trx-parser.patch similarity index 100% rename from target/linux/ath79/patches-5.15/404-mtd-cybertan-trx-parser.patch rename to target/linux/ath79/patches-5.15/410-mtd-cybertan-trx-parser.patch diff --git a/target/linux/ath79/patches-5.15/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-5.15/420-drivers-link-spi-before-mtd.patch similarity index 100% rename from target/linux/ath79/patches-5.15/430-drivers-link-spi-before-mtd.patch rename to target/linux/ath79/patches-5.15/420-drivers-link-spi-before-mtd.patch diff --git a/target/linux/ath79/patches-5.15/440-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-5.15/430-mtd-ar934x-nand-driver.patch similarity index 100% rename from target/linux/ath79/patches-5.15/440-mtd-ar934x-nand-driver.patch rename to target/linux/ath79/patches-5.15/430-mtd-ar934x-nand-driver.patch diff --git a/target/linux/ath79/patches-5.15/0004-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-5.15/700-phy-add-ath79-usb-phys.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0004-phy-add-ath79-usb-phys.patch rename to target/linux/ath79/patches-5.15/700-phy-add-ath79-usb-phys.patch diff --git a/target/linux/ath79/patches-5.15/0005-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-5.15/701-usb-add-more-OF-quirk-properties.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0005-usb-add-more-OF-quirk-properties.patch rename to target/linux/ath79/patches-5.15/701-usb-add-more-OF-quirk-properties.patch diff --git a/target/linux/ath79/patches-5.15/420-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-5.15/710-net-use-downstream-ag71xx.patch similarity index 100% rename from target/linux/ath79/patches-5.15/420-net-use-downstream-ag71xx.patch rename to target/linux/ath79/patches-5.15/710-net-use-downstream-ag71xx.patch diff --git a/target/linux/ath79/patches-5.15/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-5.15/720-mdio_bitbang_ignore_ta_value.patch similarity index 100% rename from target/linux/ath79/patches-5.15/900-mdio_bitbang_ignore_ta_value.patch rename to target/linux/ath79/patches-5.15/720-mdio_bitbang_ignore_ta_value.patch diff --git a/target/linux/ath79/patches-5.15/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ath79/patches-5.15/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch similarity index 100% rename from target/linux/ath79/patches-5.15/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch rename to target/linux/ath79/patches-5.15/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch diff --git a/target/linux/ath79/patches-5.15/930-ar8216-make-reg-access-atomic.patch b/target/linux/ath79/patches-5.15/730-ar8216-make-reg-access-atomic.patch similarity index 100% rename from target/linux/ath79/patches-5.15/930-ar8216-make-reg-access-atomic.patch rename to target/linux/ath79/patches-5.15/730-ar8216-make-reg-access-atomic.patch diff --git a/target/linux/ath79/patches-5.15/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-5.15/800-leds-add-reset-controller-based-driver.patch similarity index 100% rename from target/linux/ath79/patches-5.15/0003-leds-add-reset-controller-based-driver.patch rename to target/linux/ath79/patches-5.15/800-leds-add-reset-controller-based-driver.patch diff --git a/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.15/900-unaligned_access_hacks.patch similarity index 100% rename from target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch rename to target/linux/ath79/patches-5.15/900-unaligned_access_hacks.patch diff --git a/target/linux/ath79/patches-5.15/920-mikrotik-rb4xx.patch b/target/linux/ath79/patches-5.15/910-mikrotik-rb4xx.patch similarity index 100% rename from target/linux/ath79/patches-5.15/920-mikrotik-rb4xx.patch rename to target/linux/ath79/patches-5.15/910-mikrotik-rb4xx.patch diff --git a/target/linux/ath79/patches-5.15/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.15/911-mikrotik-rb91x.patch similarity index 100% rename from target/linux/ath79/patches-5.15/939-mikrotik-rb91x.patch rename to target/linux/ath79/patches-5.15/911-mikrotik-rb91x.patch From d9a9caf3525899a74755bc4ea6ef3f7d4b049941 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 24 May 2023 11:26:37 +0000 Subject: [PATCH 03/17] ath79: copy patches and kernel config from 5.15 to 6.1 This is preparation for kernel 6.1 support. Signed-off-by: Shiji Yang --- target/linux/ath79/config-6.1 | 200 ++++ ...-ar934x-fix-transfer-and-word-delays.patch | 27 + ...1-v5.17-spi-ar934x-fix-transfer-size.patch | 62 ++ ...th79-Implement-the-spi_mem-interface.patch | 68 ++ ...th79-add-support-for-booting-QCN550x.patch | 48 + ...9-intc-add-irq-cascade-driver-for-QC.patch | 168 ++++ ...ip-irq-ath79-cpu-drop-OF-init-helper.patch | 23 + ...ngs-PCI-qcom-ar7100-adds-binding-doc.patch | 57 ++ .../311-MIPS-pci-ar71xx-convert-to-OF.patch | 206 ++++ ...ngs-PCI-qcom-ar7240-adds-binding-doc.patch | 61 ++ .../313-MIPS-pci-ar724x-convert-to-OF.patch | 213 +++++ ...-MIPS-ath79-remove-irq-code-from-pci.patch | 149 +++ ...ci-ar724x-add-QCA9550-reset-sequence.patch | 130 +++ ...ath79-swizzle-pci-address-for-ar71xx.patch | 109 +++ .../patches-6.1/330-missing-registers.patch | 20 + ...9-add-missing-QCA955x-GMAC-registers.patch | 90 ++ .../patches-6.1/332-ath79-sgmii-config.patch | 30 + .../340-register_gpio_driver_earlier.patch | 26 + .../350-MIPS-ath79-ath9k-exports.patch | 36 + .../351-MIPS-ath79-common-exports.patch | 26 + ...S-ath79-export-UART1-reference-clock.patch | 67 ++ .../370-MIPS-ath79-sanitize-symbols.patch | 93 ++ ...or-support-mtd-name-from-device-tree.patch | 54 ++ .../410-mtd-cybertan-trx-parser.patch | 45 + .../420-drivers-link-spi-before-mtd.patch | 20 + .../430-mtd-ar934x-nand-driver.patch | 34 + .../700-phy-add-ath79-usb-phys.patch | 333 +++++++ ...701-usb-add-more-OF-quirk-properties.patch | 24 + .../710-net-use-downstream-ag71xx.patch | 42 + .../720-mdio_bitbang_ignore_ta_value.patch | 44 + ...-prevent-rescheduling-during-command.patch | 61 ++ .../730-ar8216-make-reg-access-atomic.patch | 59 ++ ...ds-add-reset-controller-based-driver.patch | 186 ++++ .../900-unaligned_access_hacks.patch | 899 ++++++++++++++++++ .../patches-6.1/910-mikrotik-rb4xx.patch | 121 +++ .../patches-6.1/911-mikrotik-rb91x.patch | 97 ++ 36 files changed, 3928 insertions(+) create mode 100644 target/linux/ath79/config-6.1 create mode 100644 target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch create mode 100644 target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch create mode 100644 target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch create mode 100644 target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch create mode 100644 target/linux/ath79/patches-6.1/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch create mode 100644 target/linux/ath79/patches-6.1/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch create mode 100644 target/linux/ath79/patches-6.1/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch create mode 100644 target/linux/ath79/patches-6.1/311-MIPS-pci-ar71xx-convert-to-OF.patch create mode 100644 target/linux/ath79/patches-6.1/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch create mode 100644 target/linux/ath79/patches-6.1/313-MIPS-pci-ar724x-convert-to-OF.patch create mode 100644 target/linux/ath79/patches-6.1/314-MIPS-ath79-remove-irq-code-from-pci.patch create mode 100644 target/linux/ath79/patches-6.1/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch create mode 100644 target/linux/ath79/patches-6.1/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch create mode 100644 target/linux/ath79/patches-6.1/330-missing-registers.patch create mode 100644 target/linux/ath79/patches-6.1/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch create mode 100644 target/linux/ath79/patches-6.1/332-ath79-sgmii-config.patch create mode 100644 target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch create mode 100644 target/linux/ath79/patches-6.1/350-MIPS-ath79-ath9k-exports.patch create mode 100644 target/linux/ath79/patches-6.1/351-MIPS-ath79-common-exports.patch create mode 100644 target/linux/ath79/patches-6.1/360-MIPS-ath79-export-UART1-reference-clock.patch create mode 100644 target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch create mode 100644 target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch create mode 100644 target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch create mode 100644 target/linux/ath79/patches-6.1/420-drivers-link-spi-before-mtd.patch create mode 100644 target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch create mode 100644 target/linux/ath79/patches-6.1/700-phy-add-ath79-usb-phys.patch create mode 100644 target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch create mode 100644 target/linux/ath79/patches-6.1/710-net-use-downstream-ag71xx.patch create mode 100644 target/linux/ath79/patches-6.1/720-mdio_bitbang_ignore_ta_value.patch create mode 100644 target/linux/ath79/patches-6.1/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch create mode 100644 target/linux/ath79/patches-6.1/730-ar8216-make-reg-access-atomic.patch create mode 100644 target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch create mode 100644 target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch create mode 100644 target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch create mode 100644 target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch diff --git a/target/linux/ath79/config-6.1 b/target/linux/ath79/config-6.1 new file mode 100644 index 0000000000..5b1b0d5add --- /dev/null +++ b/target/linux/ath79/config-6.1 @@ -0,0 +1,200 @@ +CONFIG_AG71XX=y +# CONFIG_AG71XX_DEBUG is not set +CONFIG_AG71XX_DEBUG_FS=y +CONFIG_AR8216_PHY=y +CONFIG_AR8216_PHY_LEDS=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_AT803X_PHY=y +CONFIG_ATH79=y +CONFIG_ATH79_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_RNG2=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y +CONFIG_GPIO_ATH79=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +# CONFIG_GPIO_LATCH is not set +# CONFIG_GPIO_RB91X_KEY is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_RESET is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_GPIO=y +CONFIG_MEMFD_CREATE=y +# CONFIG_MFD_RB4XX_CPLD is not set +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +CONFIG_MTD_PARSER_CYBERTAN=y +# CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_ELF_FW=y +CONFIG_MTD_SPLIT_LZMA_FW=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_SPLIT_WRGG_FW=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_SELFTESTS=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PCI=y +CONFIG_PCI_AR71XX=y +CONFIG_PCI_AR724X=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_PHY_AR7100_USB is not set +# CONFIG_PHY_AR7200_USB is not set +# CONFIG_PHY_ATH79_USB is not set +CONFIG_PINCTRL=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_RESET_ATH79=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +CONFIG_SERIAL_AR933X=y +CONFIG_SERIAL_AR933X_CONSOLE=y +CONFIG_SERIAL_AR933X_NR_UARTS=2 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SPI=y +CONFIG_SPI_AR934X=y +CONFIG_SPI_ATH79=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_RB4XX is not set +CONFIG_SRCU=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y diff --git a/target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch b/target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch new file mode 100644 index 0000000000..7ce6df6d7b --- /dev/null +++ b/target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch @@ -0,0 +1,27 @@ +From c70282457c380db7deb57c81a6894debc8f88efa Mon Sep 17 00:00:00 2001 +From: Oskari Lemmela +Date: Wed, 22 Dec 2021 07:59:58 +0200 +Subject: [PATCH] spi: ar934x: fix transfer and word delays + +Add missing delay between transferred messages and words. + +Signed-off-by: Oskari Lemmela +Link: https://lore.kernel.org/r/20211222055958.1383233-3-oskari@lemmela.net +Signed-off-by: Mark Brown +--- + drivers/spi/spi-ar934x.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/spi/spi-ar934x.c ++++ b/drivers/spi/spi-ar934x.c +@@ -137,8 +137,10 @@ static int ar934x_spi_transfer_one_messa + reg >>= 8; + } + } ++ spi_delay_exec(&t->word_delay, t); + } + m->actual_length += t->len; ++ spi_transfer_delay_exec(t); + } + + msg_done: diff --git a/target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch b/target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch new file mode 100644 index 0000000000..87f5da2c60 --- /dev/null +++ b/target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch @@ -0,0 +1,62 @@ +From ebe33e5a98dcf14a9630845f3f10c193584ac054 Mon Sep 17 00:00:00 2001 +From: Oskari Lemmela +Date: Wed, 22 Dec 2021 07:59:57 +0200 +Subject: [PATCH] spi: ar934x: fix transfer size + +If bits_per_word is configured, transfer only word amount +of data per iteration. + +Signed-off-by: Oskari Lemmela +Link: https://lore.kernel.org/r/20211222055958.1383233-2-oskari@lemmela.net +Signed-off-by: Mark Brown +--- + drivers/spi/spi-ar934x.c | 16 +++++++++++----- + 1 file changed, 11 insertions(+), 5 deletions(-) + +--- a/drivers/spi/spi-ar934x.c ++++ b/drivers/spi/spi-ar934x.c +@@ -82,7 +82,7 @@ static int ar934x_spi_transfer_one_messa + struct spi_device *spi = m->spi; + unsigned long trx_done, trx_cur; + int stat = 0; +- u8 term = 0; ++ u8 bpw, term = 0; + int div, i; + u32 reg; + const u8 *tx_buf; +@@ -90,6 +90,11 @@ static int ar934x_spi_transfer_one_messa + + m->actual_length = 0; + list_for_each_entry(t, &m->transfers, transfer_list) { ++ if (t->bits_per_word >= 8 && t->bits_per_word < 32) ++ bpw = t->bits_per_word >> 3; ++ else ++ bpw = 4; ++ + if (t->speed_hz) + div = ar934x_spi_clk_div(sp, t->speed_hz); + else +@@ -105,10 +110,10 @@ static int ar934x_spi_transfer_one_messa + iowrite32(reg, sp->base + AR934X_SPI_REG_CTRL); + iowrite32(0, sp->base + AR934X_SPI_DATAOUT); + +- for (trx_done = 0; trx_done < t->len; trx_done += 4) { ++ for (trx_done = 0; trx_done < t->len; trx_done += bpw) { + trx_cur = t->len - trx_done; +- if (trx_cur > 4) +- trx_cur = 4; ++ if (trx_cur > bpw) ++ trx_cur = bpw; + else if (list_is_last(&t->transfer_list, &m->transfers)) + term = 1; + +@@ -193,7 +198,8 @@ static int ar934x_spi_probe(struct platf + ctlr->mode_bits = SPI_LSB_FIRST; + ctlr->setup = ar934x_spi_setup; + ctlr->transfer_one_message = ar934x_spi_transfer_one_message; +- ctlr->bits_per_word_mask = SPI_BPW_MASK(8); ++ ctlr->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(24) | ++ SPI_BPW_MASK(16) | SPI_BPW_MASK(8); + ctlr->dev.of_node = pdev->dev.of_node; + ctlr->num_chipselect = 3; + diff --git a/target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch new file mode 100644 index 0000000000..5746a889e8 --- /dev/null +++ b/target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch @@ -0,0 +1,68 @@ +From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 +From: Luiz Angelo Daros de Luca +Date: Mon, 10 Feb 2020 16:11:27 -0300 +Subject: [PATCH] spi: ath79: Implement the spi_mem interface + +Signed-off-by: Luiz Angelo Daros de Luca +--- + drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s + return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); + } + ++static int ath79_exec_mem_op(struct spi_mem *mem, ++ const struct spi_mem_op *op) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); ++ ++ /* Ensures that reading is performed on device connected ++ to hardware cs0 */ ++ if (mem->spi->chip_select || mem->spi->cs_gpiod) ++ return -ENOTSUPP; ++ ++ /* Only use for fast-read op. */ ++ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || ++ op->addr.nbytes != 3 || op->dummy.nbytes != 1) ++ return -ENOTSUPP; ++ ++ /* disable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); ++ ++ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); ++ ++ /* enable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); ++ ++ /* restore IOC register */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); ++ ++ return 0; ++} ++ ++static const struct spi_controller_mem_ops ath79_mem_ops = { ++ .exec_op = ath79_exec_mem_op, ++}; ++ + static int ath79_spi_probe(struct platform_device *pdev) + { + struct spi_master *master; +@@ -165,6 +199,7 @@ static int ath79_spi_probe(struct platfo + ret = PTR_ERR(sp->base); + goto err_put_master; + } ++ master->mem_ops = &ath79_mem_ops; + + sp->clk = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(sp->clk)) { diff --git a/target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch b/target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch new file mode 100644 index 0000000000..41ea5d2ef0 --- /dev/null +++ b/target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch @@ -0,0 +1,48 @@ +From: Wenli Looi +Date: Sun, 20 Jun 2021 23:32:28 -0700 +Subject: [PATCH] ath79: add support for booting QCN550x + +Based on wikidevi, QCN550x is a "Dragonfly" like QCA9561 and QCA9563. +Treating it as QCA956x seems to work. +Tested on Netgear EX7300v2 which boots successfully with +the same CPU clock as the stock firmware. + +Link: https://wikidevi.wi-cat.ru/Qualcomm#bgn +Link: https://wikidevi.wi-cat.ru/Qualcomm_Atheros#.28a.29bgn_2 +Signed-off-by: Wenli Looi + +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -121,6 +121,7 @@ static void prom_putchar_init(void) + case REV_ID_MAJOR_QCA9558: + case REV_ID_MAJOR_TP9343: + case REV_ID_MAJOR_QCA956X: ++ case REV_ID_MAJOR_QCN550X: + _prom_putchar = prom_putchar_ar71xx; + break; + +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -168,6 +168,12 @@ static void __init ath79_detect_sys_type + rev = id & QCA956X_REV_ID_REVISION_MASK; + break; + ++ case REV_ID_MAJOR_QCN550X: ++ ath79_soc = ATH79_SOC_QCA956X; ++ chip = "550X"; ++ rev = id & QCA956X_REV_ID_REVISION_MASK; ++ break; ++ + case REV_ID_MAJOR_TP9343: + ath79_soc = ATH79_SOC_TP9343; + chip = "9343"; +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -862,6 +862,7 @@ + #define REV_ID_MAJOR_QCA9558 0x1130 + #define REV_ID_MAJOR_TP9343 0x0150 + #define REV_ID_MAJOR_QCA956X 0x1150 ++#define REV_ID_MAJOR_QCN550X 0x2170 + + #define AR71XX_REV_ID_MINOR_MASK 0x3 + #define AR71XX_REV_ID_MINOR_AR7130 0x0 diff --git a/target/linux/ath79/patches-6.1/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/target/linux/ath79/patches-6.1/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch new file mode 100644 index 0000000000..ceda511c21 --- /dev/null +++ b/target/linux/ath79/patches-6.1/300-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch @@ -0,0 +1,168 @@ +From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 09:55:13 +0100 +Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for + QCA9556 SoCs + +Signed-off-by: John Crispin +--- + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++ + 2 files changed, 143 insertions(+) + create mode 100644 drivers/irqchip/irq-ath79-intc.c + +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -4,6 +4,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o + obj-$(CONFIG_AL_FIC) += irq-al-fic.o + obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o + obj-$(CONFIG_ATH79) += irq-ath79-cpu.o ++obj-$(CONFIG_ATH79) += irq-ath79-intc.o + obj-$(CONFIG_ATH79) += irq-ath79-misc.o + obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o + obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o +--- /dev/null ++++ b/drivers/irqchip/irq-ath79-intc.c +@@ -0,0 +1,142 @@ ++/* ++ * Atheros AR71xx/AR724x/AR913x specific interrupt handling ++ * ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define ATH79_MAX_INTC_CASCADE 3 ++ ++struct ath79_intc { ++ struct irq_chip chip; ++ u32 irq; ++ u32 pending_mask; ++ u32 int_status; ++ u32 irq_mask[ATH79_MAX_INTC_CASCADE]; ++ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE]; ++}; ++ ++static void ath79_intc_irq_handler(struct irq_desc *desc) ++{ ++ struct irq_domain *domain = irq_desc_get_handler_data(desc); ++ struct ath79_intc *intc = domain->host_data; ++ u32 pending; ++ ++ pending = ath79_reset_rr(intc->int_status); ++ pending &= intc->pending_mask; ++ ++ if (pending) { ++ int i; ++ ++ for (i = 0; i < domain->hwirq_max; i++) ++ if (pending & intc->irq_mask[i]) { ++ if (intc->irq_wb_chan[i] != 0xffffffff) ++ ath79_ddr_wb_flush(intc->irq_wb_chan[i]); ++ generic_handle_irq(irq_find_mapping(domain, i)); ++ } ++ } else { ++ spurious_interrupt(); ++ } ++} ++ ++static void ath79_intc_irq_enable(struct irq_data *d) ++{ ++ struct ath79_intc *intc = d->domain->host_data; ++ enable_irq(intc->irq); ++} ++ ++static void ath79_intc_irq_disable(struct irq_data *d) ++{ ++ struct ath79_intc *intc = d->domain->host_data; ++ disable_irq(intc->irq); ++} ++ ++static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ath79_intc *intc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ath79_irq_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ath79_intc_map, ++}; ++ ++static int __init ath79_intc_of_init( ++ struct device_node *node, struct device_node *parent) ++{ ++ struct irq_domain *domain; ++ struct ath79_intc *intc; ++ int cnt, cntwb, i, err; ++ ++ cnt = of_property_count_u32_elems(node, "qca,pending-bits"); ++ if (cnt > ATH79_MAX_INTC_CASCADE) ++ panic("Too many INTC pending bits\n"); ++ ++ intc = kzalloc(sizeof(*intc), GFP_KERNEL); ++ if (!intc) ++ panic("Failed to allocate INTC memory\n"); ++ intc->chip = dummy_irq_chip; ++ intc->chip.name = "INTC"; ++ intc->chip.irq_disable = ath79_intc_irq_disable; ++ intc->chip.irq_enable = ath79_intc_irq_enable; ++ ++ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) { ++ panic("Missing address of interrupt status register\n"); ++ } ++ ++ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt); ++ for (i = 0; i < cnt; i++) { ++ intc->pending_mask |= intc->irq_mask[i]; ++ intc->irq_wb_chan[i] = 0xffffffff; ++ } ++ ++ cntwb = of_count_phandle_with_args( ++ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); ++ ++ for (i = 0; i < cntwb; i++) { ++ struct of_phandle_args args; ++ u32 irq = i; ++ ++ of_property_read_u32_index( ++ node, "qca,ddr-wb-channel-interrupts", i, &irq); ++ if (irq >= ATH79_MAX_INTC_CASCADE) ++ continue; ++ ++ err = of_parse_phandle_with_args( ++ node, "qca,ddr-wb-channels", ++ "#qca,ddr-wb-channel-cells", ++ i, &args); ++ if (err) ++ return err; ++ ++ intc->irq_wb_chan[irq] = args.args[0]; ++ } ++ ++ intc->irq = irq_of_parse_and_map(node, 0); ++ if (!intc->irq) ++ panic("Failed to get INTC IRQ"); ++ ++ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc); ++ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain); ++ ++ return 0; ++} ++IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc", ++ ath79_intc_of_init); diff --git a/target/linux/ath79/patches-6.1/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/target/linux/ath79/patches-6.1/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch new file mode 100644 index 0000000000..13117d9a8e --- /dev/null +++ b/target/linux/ath79/patches-6.1/301-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch @@ -0,0 +1,23 @@ +From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 09:58:19 +0100 +Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper + +Signed-off-by: John Crispin +--- + drivers/irqchip/irq-ath79-cpu.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/drivers/irqchip/irq-ath79-cpu.c ++++ b/drivers/irqchip/irq-ath79-cpu.c +@@ -85,10 +85,3 @@ static int __init ar79_cpu_intc_of_init( + } + IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc", + ar79_cpu_intc_of_init); +- +-void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3) +-{ +- irq_wb_chan[2] = irq_wb_chan2; +- irq_wb_chan[3] = irq_wb_chan3; +- mips_cpu_irq_init(); +-} diff --git a/target/linux/ath79/patches-6.1/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-6.1/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch new file mode 100644 index 0000000000..bf7eb691a5 --- /dev/null +++ b/target/linux/ath79/patches-6.1/310-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch @@ -0,0 +1,57 @@ +From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:10 +0200 +Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin +--- + .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt +@@ -0,0 +1,38 @@ ++* Qualcomm Atheros AR7100 PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7100-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++Optional properties: ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++* Example for ar7100 ++ pcie-controller@180c0000 { ++ compatible = "qca,ar7100-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x17010000 0x100>; ++ reg-names = "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&cpuintc>; ++ interrupts = <2>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; diff --git a/target/linux/ath79/patches-6.1/311-MIPS-pci-ar71xx-convert-to-OF.patch b/target/linux/ath79/patches-6.1/311-MIPS-pci-ar71xx-convert-to-OF.patch new file mode 100644 index 0000000000..9a315aed0b --- /dev/null +++ b/target/linux/ath79/patches-6.1/311-MIPS-pci-ar71xx-convert-to-OF.patch @@ -0,0 +1,206 @@ +From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:07:23 +0200 +Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF + +With the ath79 target getting converted to pure OF, we can drop all the +platform data code and add the missing OF bits to the driver. We also add +a irq domain for the PCI/e controllers cascade, thus making it usable from +dts files. + +Signed-off-by: John Crispin +--- + arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++----------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -15,8 +15,11 @@ + #include + #include + #include ++#include + #include + #include ++#include ++#include + + #include + #include +@@ -46,12 +49,13 @@ + #define AR71XX_PCI_IRQ_COUNT 5 + + struct ar71xx_pci_controller { ++ struct device_node *np; + void __iomem *cfg_base; + int irq; +- int irq_base; + struct pci_controller pci_ctrl; + struct resource io_res; + struct resource mem_res; ++ struct irq_domain *domain; + }; + + /* Byte lane enable bits */ +@@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = { + + static void ar71xx_pci_irq_handler(struct irq_desc *desc) + { +- struct ar71xx_pci_controller *apc; + void __iomem *base = ath79_reset_base; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); + u32 pending; + +- apc = irq_desc_get_handler_data(desc); +- ++ chained_irq_enter(chip, desc); + pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & + __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + + if (pending & AR71XX_PCI_INT_DEV0) +- generic_handle_irq(apc->irq_base + 0); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); + + else if (pending & AR71XX_PCI_INT_DEV1) +- generic_handle_irq(apc->irq_base + 1); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 2)); + + else if (pending & AR71XX_PCI_INT_DEV2) +- generic_handle_irq(apc->irq_base + 2); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 3)); + + else if (pending & AR71XX_PCI_INT_CORE) +- generic_handle_irq(apc->irq_base + 4); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 4)); + + else + spurious_interrupt(); ++ chained_irq_exit(chip, desc); + } + + static void ar71xx_pci_irq_unmask(struct irq_data *d) +@@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct + u32 t; + + apc = irq_data_get_irq_chip_data(d); +- irq = d->irq - apc->irq_base; ++ irq = irq_linear_revmap(apc->domain, d->irq); + + t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +@@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i + u32 t; + + apc = irq_data_get_irq_chip_data(d); +- irq = d->irq - apc->irq_base; ++ irq = irq_linear_revmap(apc->domain, d->irq); + + t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +@@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch + .irq_mask_ack = ar71xx_pci_irq_mask, + }; + ++static int ar71xx_pci_irq_map(struct irq_domain *d, ++ unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ar71xx_pci_controller *apc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, apc); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ar71xx_pci_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ar71xx_pci_irq_map, ++}; ++ + static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) + { + void __iomem *base = ath79_reset_base; +- int i; + + __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); + +- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); +- +- apc->irq_base = ATH79_PCI_IRQ_BASE; +- for (i = apc->irq_base; +- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { +- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, +- handle_level_irq); +- irq_set_chip_data(i, apc); +- } +- ++ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, ++ &ar71xx_pci_domain_ops, apc); + irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, + apc); + } +@@ -325,10 +337,14 @@ static void ar71xx_pci_reset(void) + mdelay(100); + } + ++static const struct of_device_id ar71xx_pci_ids[] = { ++ { .compatible = "qca,ar7100-pci" }, ++ {}, ++}; ++ + static int ar71xx_pci_probe(struct platform_device *pdev) + { + struct ar71xx_pci_controller *apc; +- struct resource *res; + u32 t; + + apc = devm_kzalloc(&pdev->dev, sizeof(struct ar71xx_pci_controller), +@@ -345,26 +361,6 @@ static int ar71xx_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + +- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); +- if (!res) +- return -EINVAL; +- +- apc->io_res.parent = res; +- apc->io_res.name = "PCI IO space"; +- apc->io_res.start = res->start; +- apc->io_res.end = res->end; +- apc->io_res.flags = IORESOURCE_IO; +- +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); +- if (!res) +- return -EINVAL; +- +- apc->mem_res.parent = res; +- apc->mem_res.name = "PCI memory space"; +- apc->mem_res.start = res->start; +- apc->mem_res.end = res->end; +- apc->mem_res.flags = IORESOURCE_MEM; +- + ar71xx_pci_reset(); + + /* setup COMMAND register */ +@@ -377,9 +373,11 @@ static int ar71xx_pci_probe(struct platf + + ar71xx_pci_irq_init(apc); + ++ apc->np = pdev->dev.of_node; + apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; + apc->pci_ctrl.mem_resource = &apc->mem_res; + apc->pci_ctrl.io_resource = &apc->io_res; ++ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node); + + register_pci_controller(&apc->pci_ctrl); + +@@ -390,6 +388,7 @@ static struct platform_driver ar71xx_pci + .probe = ar71xx_pci_probe, + .driver = { + .name = "ar71xx-pci", ++ .of_match_table = of_match_ptr(ar71xx_pci_ids), + }, + }; + diff --git a/target/linux/ath79/patches-6.1/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/target/linux/ath79/patches-6.1/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch new file mode 100644 index 0000000000..a0af79cb4d --- /dev/null +++ b/target/linux/ath79/patches-6.1/312-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch @@ -0,0 +1,61 @@ +From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:02 +0200 +Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin +--- + .../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++ + 1 file changed, 42 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt +@@ -0,0 +1,42 @@ ++* Qualcomm Atheros AR724X PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7240-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "crp_base" Configuration registers ++ - "ctrl_base" Control registers ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++Optional properties: ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++* Example for qca9557 ++ pcie-controller@180c0000 { ++ compatible = "qcom,ar7240-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x180c0000 0x1000>, ++ <0x180f0000 0x100>, ++ <0x14000000 0x1000>; ++ reg-names = "crp_base", "ctrl_base", "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&intc2>; ++ interrupts = <1>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; diff --git a/target/linux/ath79/patches-6.1/313-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-6.1/313-MIPS-pci-ar724x-convert-to-OF.patch new file mode 100644 index 0000000000..7927c1cbf5 --- /dev/null +++ b/target/linux/ath79/patches-6.1/313-MIPS-pci-ar724x-convert-to-OF.patch @@ -0,0 +1,213 @@ +From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:07:37 +0200 +Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF + +With the ath79 target getting converted to pure OF, we can drop all the +platform data code and add the missing OF bits to the driver. We also add +a irq domain for the PCI/e controllers cascade, thus making it usable from +dts files. + +Signed-off-by: John Crispin +--- + arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------ + 1 file changed, 42 insertions(+), 46 deletions(-) + +--- a/arch/mips/pci/pci-ar724x.c ++++ b/arch/mips/pci/pci-ar724x.c +@@ -11,8 +11,11 @@ + #include + #include + #include ++#include + #include + #include ++#include ++#include + + #define AR724X_PCI_REG_APP 0x00 + #define AR724X_PCI_REG_RESET 0x18 +@@ -42,17 +45,20 @@ struct ar724x_pci_controller { + void __iomem *crp_base; + + int irq; +- int irq_base; + + bool link_up; + bool bar0_is_cached; + u32 bar0_value; + ++ struct device_node *np; + struct pci_controller pci_controller; ++ struct irq_domain *domain; + struct resource io_res; + struct resource mem_res; + }; + ++static struct irq_chip ar724x_pci_irq_chip; ++ + static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) + { + u32 reset; +@@ -228,35 +234,31 @@ static struct pci_ops ar724x_pci_ops = { + + static void ar724x_pci_irq_handler(struct irq_desc *desc) + { +- struct ar724x_pci_controller *apc; +- void __iomem *base; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc); + u32 pending; + +- apc = irq_desc_get_handler_data(desc); +- base = apc->ctrl_base; +- +- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & +- __raw_readl(base + AR724X_PCI_REG_INT_MASK); ++ chained_irq_enter(chip, desc); ++ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) & ++ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK); + + if (pending & AR724X_PCI_INT_DEV0) +- generic_handle_irq(apc->irq_base + 0); +- ++ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); + else + spurious_interrupt(); ++ chained_irq_exit(chip, desc); + } + + static void ar724x_pci_irq_unmask(struct irq_data *d) + { + struct ar724x_pci_controller *apc; + void __iomem *base; +- int offset; + u32 t; + + apc = irq_data_get_irq_chip_data(d); + base = apc->ctrl_base; +- offset = apc->irq_base - d->irq; + +- switch (offset) { ++ switch (irq_linear_revmap(apc->domain, d->irq)) { + case 0: + t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); + __raw_writel(t | AR724X_PCI_INT_DEV0, +@@ -270,14 +272,12 @@ static void ar724x_pci_irq_mask(struct i + { + struct ar724x_pci_controller *apc; + void __iomem *base; +- int offset; + u32 t; + + apc = irq_data_get_irq_chip_data(d); + base = apc->ctrl_base; +- offset = apc->irq_base - d->irq; + +- switch (offset) { ++ switch (irq_linear_revmap(apc->domain, d->irq)) { + case 0: + t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); + __raw_writel(t & ~AR724X_PCI_INT_DEV0, +@@ -302,26 +302,34 @@ static struct irq_chip ar724x_pci_irq_ch + .irq_mask_ack = ar724x_pci_irq_mask, + }; + ++static int ar724x_pci_irq_map(struct irq_domain *d, ++ unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ar724x_pci_controller *apc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, apc); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ar724x_pci_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ar724x_pci_irq_map, ++}; ++ + static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc, + int id) + { + void __iomem *base; +- int i; + + base = apc->ctrl_base; + + __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); + __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); + +- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); +- +- for (i = apc->irq_base; +- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { +- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, +- handle_level_irq); +- irq_set_chip_data(i, apc); +- } +- ++ apc->domain = irq_domain_add_linear(apc->np, 2, ++ &ar724x_pci_domain_ops, apc); + irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler, + apc); + } +@@ -360,7 +368,6 @@ static void ar724x_pci_hw_init(struct ar + static int ar724x_pci_probe(struct platform_device *pdev) + { + struct ar724x_pci_controller *apc; +- struct resource *res; + int id; + + id = pdev->id; +@@ -388,29 +395,11 @@ static int ar724x_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + +- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); +- if (!res) +- return -EINVAL; +- +- apc->io_res.parent = res; +- apc->io_res.name = "PCI IO space"; +- apc->io_res.start = res->start; +- apc->io_res.end = res->end; +- apc->io_res.flags = IORESOURCE_IO; +- +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); +- if (!res) +- return -EINVAL; +- +- apc->mem_res.parent = res; +- apc->mem_res.name = "PCI memory space"; +- apc->mem_res.start = res->start; +- apc->mem_res.end = res->end; +- apc->mem_res.flags = IORESOURCE_MEM; +- ++ apc->np = pdev->dev.of_node; + apc->pci_controller.pci_ops = &ar724x_pci_ops; + apc->pci_controller.io_resource = &apc->io_res; + apc->pci_controller.mem_resource = &apc->mem_res; ++ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node); + + /* + * Do the full PCIE Root Complex Initialization Sequence if the PCIe +@@ -432,10 +421,16 @@ static int ar724x_pci_probe(struct platf + return 0; + } + ++static const struct of_device_id ar724x_pci_ids[] = { ++ { .compatible = "qcom,ar7240-pci" }, ++ {}, ++}; ++ + static struct platform_driver ar724x_pci_driver = { + .probe = ar724x_pci_probe, + .driver = { + .name = "ar724x-pci", ++ .of_match_table = of_match_ptr(ar724x_pci_ids), + }, + }; + diff --git a/target/linux/ath79/patches-6.1/314-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-6.1/314-MIPS-ath79-remove-irq-code-from-pci.patch new file mode 100644 index 0000000000..01549eec68 --- /dev/null +++ b/target/linux/ath79/patches-6.1/314-MIPS-ath79-remove-irq-code-from-pci.patch @@ -0,0 +1,149 @@ +From: John Crispin +Subject: ath79: fix remove irq code from pci driver patch + +This patch got mangled in the void while rebasing it. + +Submitted-by: John Crispin +--- + arch/mips/pci/pci-ar71xx.c | 107 ------------------ + 1 file changed, 141 deletions(-) + +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -51,11 +51,9 @@ + struct ar71xx_pci_controller { + struct device_node *np; + void __iomem *cfg_base; +- int irq; + struct pci_controller pci_ctrl; + struct resource io_res; + struct resource mem_res; +- struct irq_domain *domain; + }; + + /* Byte lane enable bits */ +@@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = { + .write = ar71xx_pci_write_config, + }; + +-static void ar71xx_pci_irq_handler(struct irq_desc *desc) +-{ +- void __iomem *base = ath79_reset_base; +- struct irq_chip *chip = irq_desc_get_chip(desc); +- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); +- u32 pending; +- +- chained_irq_enter(chip, desc); +- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- if (pending & AR71XX_PCI_INT_DEV0) +- generic_handle_irq(irq_linear_revmap(apc->domain, 1)); +- +- else if (pending & AR71XX_PCI_INT_DEV1) +- generic_handle_irq(irq_linear_revmap(apc->domain, 2)); +- +- else if (pending & AR71XX_PCI_INT_DEV2) +- generic_handle_irq(irq_linear_revmap(apc->domain, 3)); +- +- else if (pending & AR71XX_PCI_INT_CORE) +- generic_handle_irq(irq_linear_revmap(apc->domain, 4)); +- +- else +- spurious_interrupt(); +- chained_irq_exit(chip, desc); +-} +- +-static void ar71xx_pci_irq_unmask(struct irq_data *d) +-{ +- struct ar71xx_pci_controller *apc; +- unsigned int irq; +- void __iomem *base = ath79_reset_base; +- u32 t; +- +- apc = irq_data_get_irq_chip_data(d); +- irq = irq_linear_revmap(apc->domain, d->irq); +- +- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- /* flush write */ +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +-} +- +-static void ar71xx_pci_irq_mask(struct irq_data *d) +-{ +- struct ar71xx_pci_controller *apc; +- unsigned int irq; +- void __iomem *base = ath79_reset_base; +- u32 t; +- +- apc = irq_data_get_irq_chip_data(d); +- irq = irq_linear_revmap(apc->domain, d->irq); +- +- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- /* flush write */ +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +-} +- +-static struct irq_chip ar71xx_pci_irq_chip = { +- .name = "AR71XX PCI", +- .irq_mask = ar71xx_pci_irq_mask, +- .irq_unmask = ar71xx_pci_irq_unmask, +- .irq_mask_ack = ar71xx_pci_irq_mask, +-}; +- +-static int ar71xx_pci_irq_map(struct irq_domain *d, +- unsigned int irq, irq_hw_number_t hw) +-{ +- struct ar71xx_pci_controller *apc = d->host_data; +- +- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); +- irq_set_chip_data(irq, apc); +- +- return 0; +-} +- +-static const struct irq_domain_ops ar71xx_pci_domain_ops = { +- .xlate = irq_domain_xlate_onecell, +- .map = ar71xx_pci_irq_map, +-}; +- +-static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) +-{ +- void __iomem *base = ath79_reset_base; +- +- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); +- +- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, +- &ar71xx_pci_domain_ops, apc); +- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, +- apc); +-} +- + static void ar71xx_pci_reset(void) + { + ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); +@@ -357,10 +257,6 @@ static int ar71xx_pci_probe(struct platf + if (IS_ERR(apc->cfg_base)) + return PTR_ERR(apc->cfg_base); + +- apc->irq = platform_get_irq(pdev, 0); +- if (apc->irq < 0) +- return -EINVAL; +- + ar71xx_pci_reset(); + + /* setup COMMAND register */ +@@ -371,8 +267,6 @@ static int ar71xx_pci_probe(struct platf + /* clear bus errors */ + ar71xx_pci_check_error(apc, 1); + +- ar71xx_pci_irq_init(apc); +- + apc->np = pdev->dev.of_node; + apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; + apc->pci_ctrl.mem_resource = &apc->mem_res; diff --git a/target/linux/ath79/patches-6.1/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/target/linux/ath79/patches-6.1/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch new file mode 100644 index 0000000000..375dec8ba2 --- /dev/null +++ b/target/linux/ath79/patches-6.1/315-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch @@ -0,0 +1,130 @@ +From: David Bauer +Date: Sat, 11 Apr 2020 14:03:12 +0200 +Subject: MIPS: pci-ar724x: add QCA9550 reset sequence + +The QCA9550 family of SoCs have a slightly different reset +sequence compared to older chips. + +Normally the bootloader performs this sequence, however +some bootloader implementation expect the operating system +to clear the reset. + +Also get the resets from OF to support handling of the second +PCIe root-complex on the QCA9558. + +Signed-off-by: David Bauer + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -390,6 +390,7 @@ + #define QCA955X_PLL_CPU_CONFIG_REG 0x00 + #define QCA955X_PLL_DDR_CONFIG_REG 0x04 + #define QCA955X_PLL_CLK_CTRL_REG 0x08 ++#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c + #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 + #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 + #define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c +@@ -475,6 +476,9 @@ + #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) + #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30) ++#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16) ++ + #define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5) + #define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6) + #define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7) +--- a/arch/mips/pci/pci-ar724x.c ++++ b/arch/mips/pci/pci-ar724x.c +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -55,6 +56,9 @@ struct ar724x_pci_controller { + struct irq_domain *domain; + struct resource io_res; + struct resource mem_res; ++ ++ struct reset_control *hc_reset; ++ struct reset_control *phy_reset; + }; + + static struct irq_chip ar724x_pci_irq_chip; +@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar + int wait = 0; + + /* deassert PCIe host controller and PCIe PHY reset */ +- ath79_device_reset_clear(AR724X_RESET_PCIE); +- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); ++ reset_control_deassert(apc->hc_reset); ++ reset_control_deassert(apc->phy_reset); + +- /* remove the reset of the PCIE PLL */ +- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); +- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; +- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); +- +- /* deassert bypass for the PCIE PLL */ +- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); +- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; +- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) { ++ /* remove the reset of the PCIE PLL */ ++ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); ++ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD; ++ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); ++ ++ /* deassert bypass for the PCIE PLL */ ++ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); ++ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS; ++ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); ++ } else { ++ /* remove the reset of the PCIE PLL */ ++ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); ++ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; ++ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ ++ /* deassert bypass for the PCIE PLL */ ++ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); ++ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; ++ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); ++ } + + /* set PCIE Application Control to ready */ + app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); +@@ -395,6 +411,14 @@ static int ar724x_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + ++ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc"); ++ if (IS_ERR(apc->hc_reset)) ++ return PTR_ERR(apc->hc_reset); ++ ++ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy"); ++ if (IS_ERR(apc->phy_reset)) ++ return PTR_ERR(apc->phy_reset); ++ + apc->np = pdev->dev.of_node; + apc->pci_controller.pci_ops = &ar724x_pci_ops; + apc->pci_controller.io_resource = &apc->io_res; +@@ -405,7 +429,7 @@ static int ar724x_pci_probe(struct platf + * Do the full PCIE Root Complex Initialization Sequence if the PCIe + * host controller is in reset. + */ +- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) ++ if (reset_control_status(apc->hc_reset)) + ar724x_pci_hw_init(apc); + + apc->link_up = ar724x_pci_check_link(apc); +@@ -423,6 +447,7 @@ static int ar724x_pci_probe(struct platf + + static const struct of_device_id ar724x_pci_ids[] = { + { .compatible = "qcom,ar7240-pci" }, ++ { .compatible = "qcom,qca9550-pci" }, + {}, + }; + diff --git a/target/linux/ath79/patches-6.1/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-6.1/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch new file mode 100644 index 0000000000..1e2715b84c --- /dev/null +++ b/target/linux/ath79/patches-6.1/316-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch @@ -0,0 +1,109 @@ +From: Gabor Juhos +Subject: [PATCH] ar71xx: swizzle address for PCI byte/word access on AR71xx + +Closes #11683. + +SVN-Revision: 32639 +--- + .../mips/include/asm/mach-ath79/mangle-port.h | 111 ++++++++++++++++++ + 1 file changed, 111 insertions(+) + create mode 100644 arch/mips/include/asm/mach-ath79/mangle-port.h + +--- /dev/null ++++ b/arch/mips/include/asm/mach-ath79/mangle-port.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H ++#define __ASM_MACH_ATH79_MANGLE_PORT_H ++ ++#ifdef CONFIG_PCI_AR71XX ++extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); ++extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); ++#else ++#define ath79_pci_swizzle_b(port) (port) ++#define ath79_pci_swizzle_w(port) (port) ++#endif ++ ++#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) ++#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) ++#define __swizzle_addr_l(port) (port) ++#define __swizzle_addr_q(port) (port) ++ ++# define ioswabb(a, x) (x) ++# define __mem_ioswabb(a, x) (x) ++# define ioswabw(a, x) (x) ++# define __mem_ioswabw(a, x) cpu_to_le16(x) ++# define ioswabl(a, x) (x) ++# define __mem_ioswabl(a, x) cpu_to_le32(x) ++# define ioswabq(a, x) (x) ++# define __mem_ioswabq(a, x) cpu_to_le64(x) ++ ++#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -68,6 +68,45 @@ static const u32 ar71xx_pci_read_mask[8] + 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 + }; + ++static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); ++static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); ++ ++static inline bool ar71xx_is_pci_addr(unsigned long port) ++{ ++ unsigned long phys = CPHYSADDR(port); ++ ++ return (phys >= AR71XX_PCI_MEM_BASE && ++ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); ++} ++ ++static unsigned long ar71xx_pci_swizzle_b(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; ++} ++ ++static unsigned long ar71xx_pci_swizzle_w(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; ++} ++ ++unsigned long ath79_pci_swizzle_b(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_b) ++ return __ath79_pci_swizzle_b(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_b); ++ ++unsigned long ath79_pci_swizzle_w(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_w) ++ return __ath79_pci_swizzle_w(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_w); ++ + static inline u32 ar71xx_pci_get_ble(int where, int size, int local) + { + u32 t; +@@ -275,6 +314,9 @@ static int ar71xx_pci_probe(struct platf + + register_pci_controller(&apc->pci_ctrl); + ++ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; ++ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; ++ + return 0; + } + diff --git a/target/linux/ath79/patches-6.1/330-missing-registers.patch b/target/linux/ath79/patches-6.1/330-missing-registers.patch new file mode 100644 index 0000000000..74789437ec --- /dev/null +++ b/target/linux/ath79/patches-6.1/330-missing-registers.patch @@ -0,0 +1,20 @@ +From: Christian Lamparter +Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for + + ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 + + Signed-off-by: Christian Lamparter + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1231,6 +1231,10 @@ + #define AR934X_ETH_CFG_RDV_DELAY BIT(16) + #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 + #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 ++#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18 ++#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20 + + /* + * QCA953X GMAC Interface diff --git a/target/linux/ath79/patches-6.1/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/target/linux/ath79/patches-6.1/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch new file mode 100644 index 0000000000..c2f228dfe1 --- /dev/null +++ b/target/linux/ath79/patches-6.1/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch @@ -0,0 +1,90 @@ +From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Mon, 18 Mar 2019 00:54:06 +0100 +Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers + +This adds missing GMAC register definitions for the Qualcomm Atheros +QCA955X series MIPS SoCs. + +They originate from the platforms U-Boot code and the AVM FRITZ!WLAN +Repeater 450E's GPL tarball. + +Signed-off-by: David Bauer +--- + .../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++ + 1 file changed, 54 insertions(+) + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1251,7 +1251,12 @@ + */ + + #define QCA955X_GMAC_REG_ETH_CFG 0x00 ++#define QCA955X_GMAC_REG_SGMII_RESET 0x14 + #define QCA955X_GMAC_REG_SGMII_SERDES 0x18 ++#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c ++#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20 ++#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 ++#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58 + + #define QCA955X_ETH_CFG_RGMII_EN BIT(0) + #define QCA955X_ETH_CFG_MII_GE0 BIT(1) +@@ -1273,9 +1278,58 @@ + #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 + #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 + ++#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0 ++#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0) ++#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1) ++#define QCA955X_SGMII_RESET_RX_125M_N BIT(2) ++#define QCA955X_SGMII_RESET_TX_125M_N BIT(3) ++#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4) ++ + #define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) + #define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 + #define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf ++ ++#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6) ++#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8) ++#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9) ++#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11) ++#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12) ++#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13) ++#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14) ++#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15) ++ ++#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0) ++#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2) ++#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3) ++#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4) ++#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5) ++#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6) ++#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7) ++ ++#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 ++#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 ++#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3) ++#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4) ++#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5) ++#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6 ++#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0 ++#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8) ++#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9) ++#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10) ++#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11) ++#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12) ++#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13) ++#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14) ++ ++#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff ++#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0 ++#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00 ++#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8 ++#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000 ++#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16 ++#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000 ++#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24 ++ + /* + * QCA956X GMAC Interface + */ diff --git a/target/linux/ath79/patches-6.1/332-ath79-sgmii-config.patch b/target/linux/ath79/patches-6.1/332-ath79-sgmii-config.patch new file mode 100644 index 0000000000..a6a50e4a8a --- /dev/null +++ b/target/linux/ath79/patches-6.1/332-ath79-sgmii-config.patch @@ -0,0 +1,30 @@ +From: David Bauer +Subject: [PATCH] ath79: force SGMII SerDes mode to MAC operation + +The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default. +This only allows for 1000 Mbit/s links, however when used with an SGMII +PHY in 100 Mbit/s link mode, the link remains dead. + +This strictly has nothing to do with the SerDes calibration, however it +is done at the same point in the QCA reference U-Boot which is the +blueprint for everything happening here. As the current state is more or +less a hack, this should be fine. + +This fixes the issues outlined above on a TP-Link EAP-225 Outdoor. + +Reported-by: Tom Herbers +Tested-by: Tom Herbers +Submitted-by: David Bauer +--- + arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + + 1 files changed, 1 insertion(+) + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1380,5 +1380,6 @@ + + #define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 + #define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 ++#define QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC 0x2 + + #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch new file mode 100644 index 0000000000..a8680ceac4 --- /dev/null +++ b/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch @@ -0,0 +1,26 @@ +From: John Crispin +Subject: ath79: Register GPIO driver earlier + +HACK: register the GPIO driver earlier to ensure that gpio_request calls +from mach files succeed. + +Submitted-by: John Crispin +--- + drivers/gpio/gpio-ath79.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/gpio/gpio-ath79.c ++++ b/drivers/gpio/gpio-ath79.c +@@ -297,7 +297,11 @@ static struct platform_driver ath79_gpio + .probe = ath79_gpio_probe, + }; + +-module_platform_driver(ath79_gpio_driver); ++static int __init ath79_gpio_init(void) ++{ ++ return platform_driver_register(&ath79_gpio_driver); ++} ++postcore_initcall(ath79_gpio_init); + + MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); + MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ath79/patches-6.1/350-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-6.1/350-MIPS-ath79-ath9k-exports.patch new file mode 100644 index 0000000000..e460fe58f3 --- /dev/null +++ b/target/linux/ath79/patches-6.1/350-MIPS-ath79-ath9k-exports.patch @@ -0,0 +1,36 @@ +From: John Crispin +Subject: [PATCH] ath79: make ahb wifi work + +Submitted-by: John Crispin +--- + arch/mips/ath79/common.c | 3 +++ + mips/include/asm/mach-ath79/ath79.h | 1+ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); + + enum ath79_soc_type ath79_soc; + unsigned int ath79_soc_rev; ++EXPORT_SYMBOL_GPL(ath79_soc_rev); + + void __iomem *ath79_pll_base; + void __iomem *ath79_reset_base; + EXPORT_SYMBOL_GPL(ath79_reset_base); +-static void __iomem *ath79_ddr_base; ++void __iomem *ath79_ddr_base; ++EXPORT_SYMBOL_GPL(ath79_ddr_base); + static void __iomem *ath79_ddr_wb_flush_base; + static void __iomem *ath79_ddr_pci_win_base; + +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg + void ath79_ddr_set_pci_windows(void); + + extern void __iomem *ath79_pll_base; ++extern void __iomem *ath79_ddr_base; + extern void __iomem *ath79_reset_base; + + static inline void ath79_pll_wr(unsigned reg, u32 val) diff --git a/target/linux/ath79/patches-6.1/351-MIPS-ath79-common-exports.patch b/target/linux/ath79/patches-6.1/351-MIPS-ath79-common-exports.patch new file mode 100644 index 0000000000..befcf2d50f --- /dev/null +++ b/target/linux/ath79/patches-6.1/351-MIPS-ath79-common-exports.patch @@ -0,0 +1,26 @@ +From: Luiz Angelo Daros de Luca +Subject: [PATCH] ath79: export ath79_pll_base + +This symbol is declared as extern but nobody exported it. +Any module including arch/mips/include/asm/mach-ath79/ath79.h +will not build. Without this export, ag71xx.ko will not build +as a module and the build will fail like this: + +ERROR: modpost: "ath79_pll_base" [drivers/net/ethernet/atheros/ag71xx/ag71xx.ko] undefined! + +The ath79_pll_base symbol is accessed in the ath79_pll_wr() inline function. + +--- + arch/mips/ath79/common.c | 1 + + 1 file changed, 1 insertions(+) + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -34,6 +34,7 @@ unsigned int ath79_soc_rev; + EXPORT_SYMBOL_GPL(ath79_soc_rev); + + void __iomem *ath79_pll_base; ++EXPORT_SYMBOL_GPL(ath79_pll_base); + void __iomem *ath79_reset_base; + EXPORT_SYMBOL_GPL(ath79_reset_base); + void __iomem *ath79_ddr_base; diff --git a/target/linux/ath79/patches-6.1/360-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-6.1/360-MIPS-ath79-export-UART1-reference-clock.patch new file mode 100644 index 0000000000..b24ff21692 --- /dev/null +++ b/target/linux/ath79/patches-6.1/360-MIPS-ath79-export-UART1-reference-clock.patch @@ -0,0 +1,67 @@ +From: Daniel Golle +Subject: [PATCH] ath79: add support for Atheros AR934x HS UART + +AR934x chips also got the 'old' qca,ar9330-uart in addition to the +'new' ns16550a compatible one. Add support for UART1 clock selector as +well as device-tree bindings in ar934x.dtsi to make use of that uart. + +Reported-by: Piotr Dymacz +Submitted-by: Daniel Golle +--- + arch/mips/ath79/clock.c | 7 +++++++ + .../mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + + include/dt-bindings/clock/ath79-clk.h | 3 ++- + 3 files changed, 10 insertions(+), 1 deletion(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -40,6 +40,7 @@ static const char * const clk_names[ATH7 + [ATH79_CLK_AHB] = "ahb", + [ATH79_CLK_REF] = "ref", + [ATH79_CLK_MDIO] = "mdio", ++ [ATH79_CLK_UART1] = "uart1", + }; + + static const char * __init ath79_clk_name(int type) +@@ -344,6 +345,9 @@ static void __init ar934x_clocks_init(vo + if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) + ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); + ++ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL) ++ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000); ++ + iounmap(dpll_base); + } + +@@ -649,6 +653,9 @@ static void __init ath79_clocks_init_dt( + if (!clks[ATH79_CLK_MDIO]) + clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; + ++ if (!clks[ATH79_CLK_UART1]) ++ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF]; ++ + if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { + pr_err("%pOF: could not register clk provider\n", np); + goto err_iounmap; +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -348,6 +348,7 @@ + #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + + #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) ++#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7) + + #define QCA953X_PLL_CPU_CONFIG_REG 0x00 + #define QCA953X_PLL_DDR_CONFIG_REG 0x04 +--- a/include/dt-bindings/clock/ath79-clk.h ++++ b/include/dt-bindings/clock/ath79-clk.h +@@ -11,7 +11,8 @@ + #define ATH79_CLK_AHB 2 + #define ATH79_CLK_REF 3 + #define ATH79_CLK_MDIO 4 ++#define ATH79_CLK_UART1 5 + +-#define ATH79_CLK_END 5 ++#define ATH79_CLK_END 6 + + #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch new file mode 100644 index 0000000000..5eb23ba6c6 --- /dev/null +++ b/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch @@ -0,0 +1,93 @@ +From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:16:55 +0200 +Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols + +We no longer need to select which SoCs are supported as the whole arch +code is always built. So lets drop all the SoC symbols + +Signed-off-by: John Crispin +--- + arch/mips/Kconfig | 2 ++ + arch/mips/ath79/Kconfig | 44 +++++--------------------------------------- + arch/mips/pci/Makefile | 2 +- + 3 files changed, 8 insertions(+), 40 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -258,6 +258,8 @@ config ATH79 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART_PROM ++ select HAVE_PCI ++ select USB_ARCH_HAS_EHCI + select USE_OF + select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM + help +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -1,48 +1,14 @@ + # SPDX-License-Identifier: GPL-2.0 + if ATH79 + +-config SOC_AR71XX +- select HAVE_PCI +- def_bool n +- +-config SOC_AR724X +- select HAVE_PCI +- select PCI_AR724X if PCI +- def_bool n +- +-config SOC_AR913X +- def_bool n +- +-config SOC_AR933X +- def_bool n +- +-config SOC_AR934X +- select HAVE_PCI +- select PCI_AR724X if PCI +- def_bool n +- +-config SOC_QCA955X +- select HAVE_PCI +- select PCI_AR724X if PCI ++config PCI_AR71XX ++ bool "PCI support for AR7100 type SoCs" ++ depends on PCI + def_bool n + + config PCI_AR724X +- def_bool n +- +-config ATH79_DEV_GPIO_BUTTONS +- def_bool n +- +-config ATH79_DEV_LEDS_GPIO +- def_bool n +- +-config ATH79_DEV_SPI +- def_bool n +- +-config ATH79_DEV_USB +- def_bool n +- +-config ATH79_DEV_WMAC +- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) ++ bool "PCI support for AR724x type SoCs" ++ depends on PCI + def_bool n + + endif +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -21,7 +21,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o + ops-bcm63xx.o + obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o + obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o +-obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o ++obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o + obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o + obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o + # diff --git a/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch b/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch new file mode 100644 index 0000000000..163bafdb2e --- /dev/null +++ b/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch @@ -0,0 +1,54 @@ +From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001 +From: Abhimanyu Vishwakarma +Date: Sat, 25 Feb 2017 16:42:50 +0000 +Subject: mtd: nor: support mtd name from device tree + +Signed-off-by: Abhimanyu Vishwakarma +--- + drivers/mtd/spi-nor/spi-nor.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/mtd/spi-nor/core.c ++++ b/drivers/mtd/spi-nor/core.c +@@ -3107,6 +3107,7 @@ int spi_nor_scan(struct spi_nor *nor, co + struct device *dev = nor->dev; + struct mtd_info *mtd = &nor->mtd; + struct device_node *np = spi_nor_get_flash_node(nor); ++ const char __maybe_unused *of_mtd_name = NULL; + int ret; + int i; + +@@ -3161,7 +3162,12 @@ int spi_nor_scan(struct spi_nor *nor, co + if (ret) + return ret; + +- if (!mtd->name) ++#ifdef CONFIG_MTD_OF_PARTS ++ of_property_read_string(np, "linux,mtd-name", &of_mtd_name); ++#endif ++ if (of_mtd_name) ++ mtd->name = of_mtd_name; ++ else if (!mtd->name) + mtd->name = dev_name(dev); + mtd->priv = nor; + mtd->type = MTD_NORFLASH; +--- a/drivers/mtd/mtdcore.c ++++ b/drivers/mtd/mtdcore.c +@@ -847,6 +847,17 @@ out_error: + */ + static void mtd_set_dev_defaults(struct mtd_info *mtd) + { ++#ifdef CONFIG_MTD_OF_PARTS ++ const char __maybe_unused *of_mtd_name = NULL; ++ struct device_node *np; ++ ++ np = mtd_get_of_node(mtd); ++ if (np && !mtd->name) { ++ of_property_read_string(np, "linux,mtd-name", &of_mtd_name); ++ if (of_mtd_name) ++ mtd->name = of_mtd_name; ++ } else ++#endif + if (mtd->dev.parent) { + if (!mtd->owner && mtd->dev.parent->driver) + mtd->owner = mtd->dev.parent->driver->owner; diff --git a/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch new file mode 100644 index 0000000000..4e8e536e29 --- /dev/null +++ b/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch @@ -0,0 +1,45 @@ +From: Christian Lamparter +Subject: [PATCH] ath79: port cybertan_part from ar71xx + +This patch ports the cybertan_part code from ar71xx and converts the +driver to a DT-supported mtd parser. As a result, it will no longer +add the u-boot, nvram and art partitions, which were never part of +the special Cybertan header. + +Instead these partitions have to be specified in the DT, which has the +upside of making it possible to add properties (i.e.: read-only), labels +and references to these important partitions. + +Submitted-by: Christian Lamparter +--- + drivers/mtd/parsers/Makefile | 1 + + drivers/mtd/parsers/Kconfig | 8 ++++++++ + 2 files changed, 9 insertions(+) + +--- a/drivers/mtd/parsers/Makefile ++++ b/drivers/mtd/parsers/Makefile +@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o + ofpart-y += ofpart_core.o + ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o + ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o ++obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o + obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o + obj-$(CONFIG_MTD_AFS_PARTS) += afs.o + obj-$(CONFIG_MTD_PARSER_TPLINK_SAFELOADER) += tplink_safeloader.o +--- a/drivers/mtd/parsers/Kconfig ++++ b/drivers/mtd/parsers/Kconfig +@@ -102,6 +102,14 @@ config MTD_OF_PARTS_LINKSYS_NS + two "firmware" partitions. Currently used firmware has to be detected + using CFE environment variable. + ++config MTD_PARSER_CYBERTAN ++ tristate "Parser for Cybertan format partitions" ++ depends on MTD && (ATH79 || COMPILE_TEST) ++ help ++ Cybertan has a proprietory header than encompasses a Broadcom trx ++ header. This driver will parse the header and take care of the ++ special offsets that result in the extra headers. ++ + config MTD_PARSER_IMAGETAG + tristate "Parser for BCM963XX Image Tag format partitions" + depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST diff --git a/target/linux/ath79/patches-6.1/420-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-6.1/420-drivers-link-spi-before-mtd.patch new file mode 100644 index 0000000000..0cd96909eb --- /dev/null +++ b/target/linux/ath79/patches-6.1/420-drivers-link-spi-before-mtd.patch @@ -0,0 +1,20 @@ +From: Gabor Juhos +Subject: [PATCH] ar71xx: Link SPI before MTD + +SVN-Revision: 22863 +--- + drivers/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -80,8 +80,8 @@ obj-y += scsi/ + obj-y += nvme/ + obj-$(CONFIG_ATA) += ata/ + obj-$(CONFIG_TARGET_CORE) += target/ +-obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPI) += spi/ ++obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPMI) += spmi/ + obj-$(CONFIG_HSI) += hsi/ + obj-$(CONFIG_SLIMBUS) += slimbus/ diff --git a/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch new file mode 100644 index 0000000000..63bc98e14c --- /dev/null +++ b/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch @@ -0,0 +1,34 @@ +From: Gabor Juhos +Subject: ar71xx: ar934x_nfc: experimental NAND Flash Controller driver for AR934x + +SVN-Revision: 33385 +--- + drivers/mtd/nand/raw/Kconfig | 8 ++++++++ + drivers/mtd/nand/raw/Makefile | 1 + + 2 files changed, 9 insertions(+) + +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -555,4 +555,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE + load time (assuming you build diskonchip as a module) with the module + parameter "inftl_bbt_write=1". + ++config MTD_NAND_AR934X ++ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs" ++ depends on ATH79 || COMPILE_TEST ++ depends on HAS_IOMEM ++ help ++ Enables support for NAND controller on Qualcomm Atheros SoCs. ++ This controller is found on AR934x and QCA955x SoCs. ++ + endif # MTD_RAW_NAND +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_ARASAN) += arasan + obj-$(CONFIG_MTD_NAND_INTEL_LGM) += intel-nand-controller.o + obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o + obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o ++obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o + + nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o + nand-objs += nand_onfi.o diff --git a/target/linux/ath79/patches-6.1/700-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-6.1/700-phy-add-ath79-usb-phys.patch new file mode 100644 index 0000000000..21b655a109 --- /dev/null +++ b/target/linux/ath79/patches-6.1/700-phy-add-ath79-usb-phys.patch @@ -0,0 +1,333 @@ +From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:04:05 +0100 +Subject: [PATCH 04/27] phy: add ath79 usb phys + +Signed-off-by: John Crispin +--- + drivers/phy/Kconfig | 16 ++++++ + drivers/phy/Makefile | 2 + + drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++ + drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++ + 4 files changed, 250 insertions(+) + create mode 100644 drivers/phy/phy-ar7100-usb.c + create mode 100644 drivers/phy/phy-ar7200-usb.c + +--- a/drivers/phy/Kconfig ++++ b/drivers/phy/Kconfig +@@ -24,6 +24,22 @@ config GENERIC_PHY_MIPI_DPHY + Provides a number of helpers a core functions for MIPI D-PHY + drivers to us. + ++config PHY_AR7100_USB ++ tristate "Atheros AR7100 USB PHY driver" ++ depends on ATH79 || COMPILE_TEST ++ default y if USB_EHCI_HCD_PLATFORM ++ select GENERIC_PHY ++ help ++ Enable this to support the USB PHY on Atheros AR7100 SoCs. ++ ++config PHY_AR7200_USB ++ tristate "Atheros AR7200 USB PHY driver" ++ depends on ATH79 || COMPILE_TEST ++ default y if USB_EHCI_HCD_PLATFORM ++ select GENERIC_PHY ++ help ++ Enable this to support the USB PHY on Atheros AR7200 SoCs. ++ + config PHY_LPC18XX_USB_OTG + tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" + depends on OF && (ARCH_LPC18XX || COMPILE_TEST) +--- a/drivers/phy/Makefile ++++ b/drivers/phy/Makefile +@@ -4,6 +4,8 @@ + # + + obj-$(CONFIG_GENERIC_PHY) += phy-core.o ++obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o ++obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o + obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o + obj-$(CONFIG_PHY_CAN_TRANSCEIVER) += phy-can-transceiver.o + obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o +--- /dev/null ++++ b/drivers/phy/phy-ar7100-usb.c +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct ar7100_usb_phy { ++ struct reset_control *rst_phy; ++ struct reset_control *rst_host; ++ struct reset_control *rst_ohci_dll; ++ void __iomem *io_base; ++ struct phy *phy; ++ int gpio; ++}; ++ ++static int ar7100_usb_phy_power_off(struct phy *phy) ++{ ++ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ err |= reset_control_assert(priv->rst_host); ++ err |= reset_control_assert(priv->rst_phy); ++ err |= reset_control_assert(priv->rst_ohci_dll); ++ ++ return err; ++} ++ ++static int ar7100_usb_phy_power_on(struct phy *phy) ++{ ++ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ err |= ar7100_usb_phy_power_off(phy); ++ mdelay(100); ++ err |= reset_control_deassert(priv->rst_ohci_dll); ++ err |= reset_control_deassert(priv->rst_phy); ++ err |= reset_control_deassert(priv->rst_host); ++ mdelay(500); ++ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG); ++ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ); ++ ++ return err; ++} ++ ++static const struct phy_ops ar7100_usb_phy_ops = { ++ .power_on = ar7100_usb_phy_power_on, ++ .power_off = ar7100_usb_phy_power_off, ++ .owner = THIS_MODULE, ++}; ++ ++static int ar7100_usb_phy_probe(struct platform_device *pdev) ++{ ++ struct phy_provider *phy_provider; ++ struct resource *res; ++ struct ar7100_usb_phy *priv; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ priv->io_base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->io_base)) ++ return PTR_ERR(priv->io_base); ++ ++ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); ++ if (IS_ERR(priv->rst_phy)) { ++ dev_err(&pdev->dev, "phy reset is missing\n"); ++ return PTR_ERR(priv->rst_phy); ++ } ++ ++ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host"); ++ if (IS_ERR(priv->rst_host)) { ++ dev_err(&pdev->dev, "host reset is missing\n"); ++ return PTR_ERR(priv->rst_host); ++ } ++ ++ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll"); ++ if (IS_ERR(priv->rst_ohci_dll)) { ++ dev_err(&pdev->dev, "ohci-dll reset is missing\n"); ++ return PTR_ERR(priv->rst_host); ++ } ++ ++ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops); ++ if (IS_ERR(priv->phy)) { ++ dev_err(&pdev->dev, "failed to create PHY\n"); ++ return PTR_ERR(priv->phy); ++ } ++ ++ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); ++ if (priv->gpio >= 0) { ++ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio\n"); ++ return ret; ++ } ++ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); ++ gpio_set_value(priv->gpio, 1); ++ } ++ ++ phy_set_drvdata(priv->phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); ++ ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id ar7100_usb_phy_of_match[] = { ++ { .compatible = "qca,ar7100-usb-phy" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match); ++ ++static struct platform_driver ar7100_usb_phy_driver = { ++ .probe = ar7100_usb_phy_probe, ++ .driver = { ++ .of_match_table = ar7100_usb_phy_of_match, ++ .name = "ar7100-usb-phy", ++ } ++}; ++module_platform_driver(ar7100_usb_phy_driver); ++ ++MODULE_DESCRIPTION("ATH79 USB PHY driver"); ++MODULE_AUTHOR("Alban Bedel "); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/drivers/phy/phy-ar7200-usb.c +@@ -0,0 +1,136 @@ ++/* ++ * Copyright (C) 2015 Alban Bedel ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++struct ar7200_usb_phy { ++ struct reset_control *rst_phy; ++ struct reset_control *rst_phy_analog; ++ struct reset_control *suspend_override; ++ struct phy *phy; ++ int gpio; ++}; ++ ++static int ar7200_usb_phy_power_on(struct phy *phy) ++{ ++ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ if (priv->suspend_override) ++ err = reset_control_assert(priv->suspend_override); ++ if (priv->rst_phy) ++ err |= reset_control_deassert(priv->rst_phy); ++ if (priv->rst_phy_analog) ++ err |= reset_control_deassert(priv->rst_phy_analog); ++ ++ return err; ++} ++ ++static int ar7200_usb_phy_power_off(struct phy *phy) ++{ ++ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ if (priv->suspend_override) ++ err = reset_control_deassert(priv->suspend_override); ++ if (priv->rst_phy) ++ err |= reset_control_assert(priv->rst_phy); ++ if (priv->rst_phy_analog) ++ err |= reset_control_assert(priv->rst_phy_analog); ++ ++ return err; ++} ++ ++static const struct phy_ops ar7200_usb_phy_ops = { ++ .power_on = ar7200_usb_phy_power_on, ++ .power_off = ar7200_usb_phy_power_off, ++ .owner = THIS_MODULE, ++}; ++ ++static int ar7200_usb_phy_probe(struct platform_device *pdev) ++{ ++ struct phy_provider *phy_provider; ++ struct ar7200_usb_phy *priv; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); ++ if (IS_ERR(priv->rst_phy)) { ++ if (PTR_ERR(priv->rst_phy) != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "phy reset is missing\n"); ++ return PTR_ERR(priv->rst_phy); ++ } ++ ++ priv->rst_phy_analog = devm_reset_control_get_optional( ++ &pdev->dev, "usb-phy-analog"); ++ if (IS_ERR(priv->rst_phy_analog)) { ++ if (PTR_ERR(priv->rst_phy_analog) == -ENOENT) ++ priv->rst_phy_analog = NULL; ++ else ++ return PTR_ERR(priv->rst_phy_analog); ++ } ++ ++ priv->suspend_override = devm_reset_control_get_optional( ++ &pdev->dev, "usb-suspend-override"); ++ if (IS_ERR(priv->suspend_override)) { ++ if (PTR_ERR(priv->suspend_override) == -ENOENT) ++ priv->suspend_override = NULL; ++ else ++ return PTR_ERR(priv->suspend_override); ++ } ++ ++ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops); ++ if (IS_ERR(priv->phy)) { ++ dev_err(&pdev->dev, "failed to create PHY\n"); ++ return PTR_ERR(priv->phy); ++ } ++ ++ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); ++ if (priv->gpio >= 0) { ++ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio\n"); ++ return ret; ++ } ++ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); ++ gpio_set_value(priv->gpio, 1); ++ } ++ ++ phy_set_drvdata(priv->phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id ar7200_usb_phy_of_match[] = { ++ { .compatible = "qca,ar7200-usb-phy" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match); ++ ++static struct platform_driver ar7200_usb_phy_driver = { ++ .probe = ar7200_usb_phy_probe, ++ .driver = { ++ .of_match_table = ar7200_usb_phy_of_match, ++ .name = "ar7200-usb-phy", ++ } ++}; ++module_platform_driver(ar7200_usb_phy_driver); ++ ++MODULE_DESCRIPTION("ATH79 USB PHY driver"); ++MODULE_AUTHOR("Alban Bedel "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch new file mode 100644 index 0000000000..d6d8cb6952 --- /dev/null +++ b/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch @@ -0,0 +1,24 @@ +From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:01:43 +0100 +Subject: [PATCH 05/27] usb: add more OF/quirk properties + +Signed-off-by: John Crispin +--- + drivers/usb/host/ehci-platform.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -277,6 +277,11 @@ static int ehci_platform_probe(struct pl + ehci = hcd_to_ehci(hcd); + + if (pdata == &ehci_platform_defaults && dev->dev.of_node) { ++ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset); ++ ++ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug")) ++ pdata->has_synopsys_hc_bug = 1; ++ + if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) + ehci->big_endian_mmio = 1; + diff --git a/target/linux/ath79/patches-6.1/710-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-6.1/710-net-use-downstream-ag71xx.patch new file mode 100644 index 0000000000..54e64fb11c --- /dev/null +++ b/target/linux/ath79/patches-6.1/710-net-use-downstream-ag71xx.patch @@ -0,0 +1,42 @@ +From: John Crispin +Subject: [PATCH] ath79: add new OF only target for QCA MIPS silicon + +This target aims to replace ar71xx mid-term. The big part that is still +missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik +subtargets will follow. + +Submitted-by: John Crispin +--- + drivers/net/ethernet/atheros/Kconfig | 8 +------- + drivers/net/ethernet/atheros/Makefile | 2 +- + 2 files changed, 2 insertions(+), 8 deletions(-) + +--- a/drivers/net/ethernet/atheros/Kconfig ++++ b/drivers/net/ethernet/atheros/Kconfig +@@ -17,14 +17,7 @@ config NET_VENDOR_ATHEROS + + if NET_VENDOR_ATHEROS + +-config AG71XX +- tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" +- depends on ATH79 +- select PHYLINK +- imply NET_SELFTESTS +- help +- If you wish to compile a kernel for AR7XXX/91XXX and enable +- ethernet support, then you should always answer Y to this. ++source "drivers/net/ethernet/atheros/ag71xx/Kconfig" + + config ATL2 + tristate "Atheros L2 Fast Ethernet support" +--- a/drivers/net/ethernet/atheros/Makefile ++++ b/drivers/net/ethernet/atheros/Makefile +@@ -3,7 +3,7 @@ + # Makefile for the Atheros network device drivers. + # + +-obj-$(CONFIG_AG71XX) += ag71xx.o ++obj-$(CONFIG_AG71XX) += ag71xx/ + obj-$(CONFIG_ATL1) += atlx/ + obj-$(CONFIG_ATL2) += atlx/ + obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ath79/patches-6.1/720-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-6.1/720-mdio_bitbang_ignore_ta_value.patch new file mode 100644 index 0000000000..5363bb37b0 --- /dev/null +++ b/target/linux/ath79/patches-6.1/720-mdio_bitbang_ignore_ta_value.patch @@ -0,0 +1,44 @@ +From: Jonas Gorski +Subject: ar71xx: add a workaround for ar8316 not always driving the TA bit to low + +AR8316 behind a GPIO bitbanged MDIO bus fails to drive the turnaround bit +to low despite returning a valid value. Ignore it and just use the +returned value anyway. + +SVN-Revision: 28422 +--- + drivers/net/mdio/mdio-bitbang.c | 16 ++----------------- + 1 file changed, 2 insertions(+), 14 deletions(-) + +--- a/drivers/net/mdio/mdio-bitbang.c ++++ b/drivers/net/mdio/mdio-bitbang.c +@@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb + int mdiobb_read(struct mii_bus *bus, int phy, int reg) + { + struct mdiobb_ctrl *ctrl = bus->priv; +- int ret, i; ++ int ret; + + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); +@@ -162,19 +162,7 @@ int mdiobb_read(struct mii_bus *bus, int + + ctrl->ops->set_mdio_dir(ctrl, 0); + +- /* check the turnaround bit: the PHY should be driving it to zero, if this +- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that +- */ +- if (mdiobb_get_bit(ctrl) != 0 && +- !(bus->phy_ignore_ta_mask & (1 << phy))) { +- /* PHY didn't drive TA low -- flush any bits it +- * may be trying to send. +- */ +- for (i = 0; i < 32; i++) +- mdiobb_get_bit(ctrl); +- +- return 0xffff; +- } ++ mdiobb_get_bit(ctrl); + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); diff --git a/target/linux/ath79/patches-6.1/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ath79/patches-6.1/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch new file mode 100644 index 0000000000..e37d9a1f63 --- /dev/null +++ b/target/linux/ath79/patches-6.1/721-phy-mdio-bitbang-prevent-rescheduling-during-command.patch @@ -0,0 +1,61 @@ +From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 16 Jun 2015 13:15:08 +0200 +Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command + +It seems some phys have some maximum timings for accessing the MDIO line, +resulting in bit errors under cpu stress. Prevent this from happening by +disabling interrupts when sending commands. + +Signed-off-by: Jonas Gorski +--- + drivers/net/mdio/mdio-bitbang.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/net/mdio/mdio-bitbang.c ++++ b/drivers/net/mdio/mdio-bitbang.c +@@ -14,6 +14,7 @@ + * Vitaly Bordug + */ + ++#include + #include + #include + #include +@@ -153,7 +154,9 @@ int mdiobb_read(struct mii_bus *bus, int + { + struct mdiobb_ctrl *ctrl = bus->priv; + int ret; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); +@@ -166,6 +169,7 @@ int mdiobb_read(struct mii_bus *bus, int + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); + return ret; + } + EXPORT_SYMBOL(mdiobb_read); +@@ -173,7 +177,9 @@ EXPORT_SYMBOL(mdiobb_read); + int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) + { + struct mdiobb_ctrl *ctrl = bus->priv; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); +@@ -188,6 +194,8 @@ int mdiobb_write(struct mii_bus *bus, in + + ctrl->ops->set_mdio_dir(ctrl, 0); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return 0; + } + EXPORT_SYMBOL(mdiobb_write); diff --git a/target/linux/ath79/patches-6.1/730-ar8216-make-reg-access-atomic.patch b/target/linux/ath79/patches-6.1/730-ar8216-make-reg-access-atomic.patch new file mode 100644 index 0000000000..02f763534e --- /dev/null +++ b/target/linux/ath79/patches-6.1/730-ar8216-make-reg-access-atomic.patch @@ -0,0 +1,59 @@ +From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001 +From: Chuanhong Guo +Date: Sun, 20 Sep 2020 01:00:45 +0800 +Subject: [PATCH] ath79: ar8216: make switch register access atomic + +due to some unknown reason these register accesses sometimes fail +on the integrated switch without this patch. + +THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS! +The mdio bus on ath79 works in polling mode and doesn't rely on +any interrupt. This patch breaks the driver on any mdio master +with interrupts used. + +--- +--- a/drivers/net/phy/ar8216.c ++++ b/drivers/net/phy/ar8216.c +@@ -252,6 +252,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p + u32 + ar8xxx_read(struct ar8xxx_priv *priv, int reg) + { ++ unsigned long flags; + struct mii_bus *bus = priv->mii_bus; + u16 r1, r2, page; + u32 val; +@@ -259,11 +260,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in + split_addr((u32) reg, &r1, &r2, &page); + + mutex_lock(&bus->mdio_lock); ++ local_irq_save(flags); + + bus->write(bus, 0x18, 0, page); + wait_for_page_switch(); + val = ar8xxx_mii_read32(priv, 0x10 | r2, r1); + ++ local_irq_restore(flags); + mutex_unlock(&bus->mdio_lock); + + return val; +@@ -272,17 +275,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in + void + ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val) + { ++ unsigned long flags; + struct mii_bus *bus = priv->mii_bus; + u16 r1, r2, page; + + split_addr((u32) reg, &r1, &r2, &page); + + mutex_lock(&bus->mdio_lock); ++ local_irq_save(flags); + + bus->write(bus, 0x18, 0, page); + wait_for_page_switch(); + ar8xxx_mii_write32(priv, 0x10 | r2, r1, val); + ++ local_irq_restore(flags); + mutex_unlock(&bus->mdio_lock); + } + diff --git a/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch new file mode 100644 index 0000000000..7122756c52 --- /dev/null +++ b/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch @@ -0,0 +1,186 @@ +From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:03:03 +0100 +Subject: [PATCH 03/27] leds: add reset-controller based driver + +Signed-off-by: John Crispin +--- + drivers/leds/Kconfig | 11 ++++ + drivers/leds/Makefile | 1 + + drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 149 insertions(+) + create mode 100644 drivers/leds/leds-reset.c + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -876,6 +876,17 @@ source "drivers/leds/blink/Kconfig" + comment "Flash and Torch LED drivers" + source "drivers/leds/flash/Kconfig" + ++config LEDS_RESET ++ tristate "LED support for reset-controller API" ++ depends on LEDS_CLASS ++ depends on RESET_CONTROLLER ++ help ++ This option enables support for LEDs connected to pins driven by reset ++ controllers. Yes, DNI actual built HW like that. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called leds-reset. ++ + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + +--- /dev/null ++++ b/drivers/leds/leds-reset.c +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct reset_led_data { ++ struct led_classdev cdev; ++ struct reset_control *rst; ++}; ++ ++static inline struct reset_led_data * ++ cdev_to_reset_led_data(struct led_classdev *led_cdev) ++{ ++ return container_of(led_cdev, struct reset_led_data, cdev); ++} ++ ++static void reset_led_set(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev); ++ ++ if (value == LED_OFF) ++ reset_control_assert(led_dat->rst); ++ else ++ reset_control_deassert(led_dat->rst); ++} ++ ++struct reset_leds_priv { ++ int num_leds; ++ struct reset_led_data leds[]; ++}; ++ ++static inline int sizeof_reset_leds_priv(int num_leds) ++{ ++ return sizeof(struct reset_leds_priv) + ++ (sizeof(struct reset_led_data) * num_leds); ++} ++ ++static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fwnode_handle *child; ++ struct reset_leds_priv *priv; ++ int count, ret; ++ ++ count = device_get_child_node_count(dev); ++ if (!count) ++ return ERR_PTR(-ENODEV); ++ ++ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL); ++ if (!priv) ++ return ERR_PTR(-ENOMEM); ++ ++ device_for_each_child_node(dev, child) { ++ struct reset_led_data *led = &priv->leds[priv->num_leds]; ++ struct device_node *np = to_of_node(child); ++ ++ ret = fwnode_property_read_string(child, "label", &led->cdev.name); ++ if (!led->cdev.name) { ++ fwnode_handle_put(child); ++ return ERR_PTR(-EINVAL); ++ } ++ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0, true); ++ if (IS_ERR(led->rst)) ++ return ERR_PTR(-EINVAL); ++ ++ fwnode_property_read_string(child, "linux,default-trigger", ++ &led->cdev.default_trigger); ++ ++ led->cdev.brightness_set = reset_led_set; ++ ret = devm_led_classdev_register(&pdev->dev, &led->cdev); ++ if (ret < 0) ++ return ERR_PTR(ret); ++ led->cdev.dev->of_node = np; ++ priv->num_leds++; ++ } ++ ++ return priv; ++} ++ ++static const struct of_device_id of_reset_leds_match[] = { ++ { .compatible = "reset-leds", }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, of_reset_leds_match); ++ ++static int reset_led_probe(struct platform_device *pdev) ++{ ++ struct reset_leds_priv *priv; ++ ++ priv = reset_leds_create(pdev); ++ if (IS_ERR(priv)) ++ return PTR_ERR(priv); ++ ++ platform_set_drvdata(pdev, priv); ++ ++ return 0; ++} ++ ++static void reset_led_shutdown(struct platform_device *pdev) ++{ ++ struct reset_leds_priv *priv = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < priv->num_leds; i++) { ++ struct reset_led_data *led = &priv->leds[i]; ++ ++ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN)) ++ reset_led_set(&led->cdev, LED_OFF); ++ } ++} ++ ++static struct platform_driver reset_led_driver = { ++ .probe = reset_led_probe, ++ .shutdown = reset_led_shutdown, ++ .driver = { ++ .name = "leds-reset", ++ .of_match_table = of_reset_leds_match, ++ }, ++}; ++ ++module_platform_driver(reset_led_driver); ++ ++MODULE_AUTHOR("John Crispin "); ++MODULE_DESCRIPTION("reset controller LED driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:leds-reset"); +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -87,6 +87,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds + obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o + obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o + obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o ++obj-$(CONFIG_LEDS_RESET) += leds-reset.o + + # LED SPI Drivers + obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff --git a/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch b/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch new file mode 100644 index 0000000000..1971b9cd01 --- /dev/null +++ b/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch @@ -0,0 +1,899 @@ +From: Felix Fietkau +Subject: [PATCH] ar71xx: fix unaligned access in a few more places + +SVN-Revision: 35130 +--- + arch/mips/include/asm/checksum.h | 83 +++--------------- + include/uapi/linux/ip.h | 2 +- + include/uapi/linux/ipv6.h | 2 +- + include/uapi/linux/tcp.h | 4 ++-- + include/uapi/linux/udp.h | 2 +- + net/netfilter/nf_conntrack_core.c | 4 ++-- + include/uapi/linux/icmp.h | 2 +- + include/uapi/linux/in6.h | 2 +- + net/ipv6/tcp_ipv6.c | 9 +++-- + net/ipv6/datagram.c | 6 ++-- + net/ipv6/exthdrs.c | 2 +- + include/linux/types.h | 5 +++ + net/ipv4/af_inet.c | 4 ++-- + net/ipv4/tcp_output.c | 69 +++++++++-------- + include/uapi/linux/igmp.h | 8 +++--- + net/core/flow_dissector.c | 2 +- + include/uapi/linux/icmpv6.h | 2 +- + include/net/ndisc.h | 10 ++++---- + net/sched/cls_u32.c | 6 +++--- + net/ipv6/ip6_offload.c | 2 +- + include/net/addrconf.h | 2 +- + include/net/inet_ecn.h | 4 ++-- + include/net/ipv6.h | 23 +++++---- + include/net/secure_seq.h | 1 + + include/uapi/linux/in.h | 2 +- + net/ipv6/ip6_fib.h | 2 +- + net/netfilter/nf_conntrack_proto_tcp.c | 2 +- + net/xfrm/xfrm_input.c | 4 ++-- + net/ipv4/tcp_input.c | 12 ++++--- + include/uapi/linux/if_pppox.h | 1 + + net/ipv6/netfilter/nf_log_ipv6.c | 4 ++-- + include/net/neighbour.h | 6 +++-- + include/uapi/linux/netfilter_arp/arp_tables.h | 2 +- + net/core/utils.c | 10 +++++-- + include/linux/etherdevice.h | 11 ++++--- + net/ipv4/tcp_offload.c | 6 +++--- + net/ipv6/netfilter/ip6table_mangle.c | 4 ++-- + 37 file changed, 171 insertions(+), 141 deletions(-) + +--- a/arch/mips/include/asm/checksum.h ++++ b/arch/mips/include/asm/checksum.h +@@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const + const unsigned int *stop = word + ihl; + unsigned int csum; + int carry; ++ unsigned int w; + +- csum = word[0]; +- csum += word[1]; +- carry = (csum < word[1]); ++ csum = net_hdr_word(word++); ++ ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[2]; +- carry = (csum < word[2]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[3]; +- carry = (csum < word[3]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- word += 4; + do { +- csum += *word; +- carry = (csum < *word); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; +- word++; + } while (word != stop); + + return csum_fold(csum); +@@ -182,73 +186,6 @@ static inline __sum16 ip_compute_csum(co + return csum_fold(csum_partial(buff, len, 0)); + } + +-#define _HAVE_ARCH_IPV6_CSUM +-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, +- const struct in6_addr *daddr, +- __u32 len, __u8 proto, +- __wsum sum) +-{ +- __wsum tmp; +- +- __asm__( +- " .set push # csum_ipv6_magic\n" +- " .set noreorder \n" +- " .set noat \n" +- " addu %0, %5 # proto (long in network byte order)\n" +- " sltu $1, %0, %5 \n" +- " addu %0, $1 \n" +- +- " addu %0, %6 # csum\n" +- " sltu $1, %0, %6 \n" +- " lw %1, 0(%2) # four words source address\n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 0(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " addu %0, $1 # Add final carry\n" +- " .set pop" +- : "=&r" (sum), "=&r" (tmp) +- : "r" (saddr), "r" (daddr), +- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); +- +- return csum_fold(sum); +-} +- + #include + #endif /* CONFIG_GENERIC_CSUM */ + +--- a/include/uapi/linux/ip.h ++++ b/include/uapi/linux/ip.h +@@ -106,7 +106,7 @@ struct iphdr { + __be32 daddr; + ); + /*The options start here. */ +-}; ++} __attribute__((packed, aligned(2))); + + + struct ip_auth_hdr { +--- a/include/uapi/linux/ipv6.h ++++ b/include/uapi/linux/ipv6.h +@@ -135,7 +135,7 @@ struct ipv6hdr { + struct in6_addr saddr; + struct in6_addr daddr; + ); +-}; ++} __attribute__((packed, aligned(2))); + + + /* index values for the variables in ipv6_devconf */ +--- a/include/uapi/linux/tcp.h ++++ b/include/uapi/linux/tcp.h +@@ -55,7 +55,7 @@ struct tcphdr { + __be16 window; + __sum16 check; + __be16 urg_ptr; +-}; ++} __attribute__((packed, aligned(2))); + + /* + * The union cast uses a gcc extension to avoid aliasing problems +@@ -65,7 +65,7 @@ struct tcphdr { + union tcp_word_hdr { + struct tcphdr hdr; + __be32 words[5]; +-}; ++} __attribute__((packed, aligned(2))); + + #define tcp_flag_word(tp) (((union tcp_word_hdr *)(tp))->words[3]) + +--- a/include/uapi/linux/udp.h ++++ b/include/uapi/linux/udp.h +@@ -25,7 +25,7 @@ struct udphdr { + __be16 dest; + __be16 len; + __sum16 check; +-}; ++} __attribute__((packed, aligned(2))); + + /* UDP socket options */ + #define UDP_CORK 1 /* Never send partially complete segments */ +--- a/net/netfilter/nf_conntrack_core.c ++++ b/net/netfilter/nf_conntrack_core.c +@@ -308,8 +308,8 @@ nf_ct_get_tuple(const struct sk_buff *sk + + switch (l3num) { + case NFPROTO_IPV4: +- tuple->src.u3.ip = ap[0]; +- tuple->dst.u3.ip = ap[1]; ++ tuple->src.u3.ip = net_hdr_word(ap++); ++ tuple->dst.u3.ip = net_hdr_word(ap); + break; + case NFPROTO_IPV6: + memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6)); +--- a/include/uapi/linux/icmp.h ++++ b/include/uapi/linux/icmp.h +@@ -102,7 +102,7 @@ struct icmphdr { + } frag; + __u8 reserved[4]; + } un; +-}; ++} __attribute__((packed, aligned(2))); + + + /* +--- a/include/uapi/linux/in6.h ++++ b/include/uapi/linux/in6.h +@@ -43,7 +43,7 @@ struct in6_addr { + #define s6_addr16 in6_u.u6_addr16 + #define s6_addr32 in6_u.u6_addr32 + #endif +-}; ++} __attribute__((packed, aligned(2))); + #endif /* __UAPI_DEF_IN6_ADDR */ + + #if __UAPI_DEF_SOCKADDR_IN6 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -35,6 +35,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -944,10 +945,10 @@ static void tcp_v6_send_response(const s + topt = (__be32 *)(t1 + 1); + + if (tsecr) { +- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); +- *topt++ = htonl(tsval); +- *topt++ = htonl(tsecr); ++ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); ++ put_unaligned_be32(tsval, topt++); ++ put_unaligned_be32(tsecr, topt++); + } + + if (mrst) +--- a/include/linux/ipv6.h ++++ b/include/linux/ipv6.h +@@ -6,6 +6,7 @@ + + #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) + #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) ++ + /* + * This structure contains configuration options per IPv6 link. + */ +--- a/net/ipv6/datagram.c ++++ b/net/ipv6/datagram.c +@@ -492,7 +492,7 @@ int ipv6_recv_error(struct sock *sk, str + ipv6_iface_scope_id(&sin->sin6_addr, + IP6CB(skb)->iif); + } else { +- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), ++ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), + &sin->sin6_addr); + sin->sin6_scope_id = 0; + } +@@ -846,12 +846,12 @@ int ip6_datagram_send_ctl(struct net *ne + } + + if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { +- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { ++ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { + err = -EINVAL; + goto exit_f; + } + } +- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); ++ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); + break; + + case IPV6_2292HOPOPTS: +--- a/net/ipv6/exthdrs.c ++++ b/net/ipv6/exthdrs.c +@@ -1002,7 +1002,7 @@ static bool ipv6_hop_jumbo(struct sk_buf + goto drop; + } + +- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); ++ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); + if (pkt_len <= IPV6_MAXPLEN) { + __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); + icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); +--- a/include/linux/types.h ++++ b/include/linux/types.h +@@ -231,5 +231,11 @@ typedef void (*swap_func_t)(void *a, voi + typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv); + typedef int (*cmp_func_t)(const void *a, const void *b); + ++struct net_hdr_word { ++ u32 words[1]; ++} __attribute__((packed, aligned(2))); ++ ++#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) ++ + #endif /* __ASSEMBLY__ */ + #endif /* _LINUX_TYPES_H */ +--- a/net/ipv4/af_inet.c ++++ b/net/ipv4/af_inet.c +@@ -1477,8 +1477,8 @@ struct sk_buff *inet_gro_receive(struct + if (unlikely(ip_fast_csum((u8 *)iph, 5))) + goto out_unlock; + +- id = ntohl(*(__be32 *)&iph->id); +- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); ++ id = ntohl(net_hdr_word(&iph->id)); ++ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); + id >>= 16; + + list_for_each_entry(p, head, list) { +--- a/net/ipv4/tcp_output.c ++++ b/net/ipv4/tcp_output.c +@@ -610,48 +610,53 @@ static void tcp_options_write(__be32 *pt + u16 options = opts->options; /* mungable copy */ + + if (unlikely(OPTION_MD5 & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); + /* overload cookie hash location */ + opts->hash_location = (__u8 *)ptr; + ptr += 4; + } + + if (unlikely(opts->mss)) { +- *ptr++ = htonl((TCPOPT_MSS << 24) | +- (TCPOLEN_MSS << 16) | +- opts->mss); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | ++ opts->mss); + } + + if (likely(OPTION_TS & options)) { + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | +- (TCPOLEN_SACK_PERM << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_SACK_PERM << 24) | ++ (TCPOLEN_SACK_PERM << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + options &= ~OPTION_SACK_ADVERTISE; + } else { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + } +- *ptr++ = htonl(opts->tsval); +- *ptr++ = htonl(opts->tsecr); ++ net_hdr_word(ptr++) = htonl(opts->tsval); ++ net_hdr_word(ptr++) = htonl(opts->tsecr); + } + + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK_PERM << 8) | +- TCPOLEN_SACK_PERM); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK_PERM << 8) | ++ TCPOLEN_SACK_PERM); + } + + if (unlikely(OPTION_WSCALE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_WINDOW << 16) | +- (TCPOLEN_WINDOW << 8) | +- opts->ws); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_WINDOW << 16) | ++ (TCPOLEN_WINDOW << 8) | ++ opts->ws); + } + + if (unlikely(opts->num_sack_blocks)) { +@@ -659,16 +664,17 @@ static void tcp_options_write(__be32 *pt + tp->duplicate_sack : tp->selective_acks; + int this_sack; + +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK << 8) | +- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK << 8) | ++ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * + TCPOLEN_SACK_PERBLOCK))); + + for (this_sack = 0; this_sack < opts->num_sack_blocks; + ++this_sack) { +- *ptr++ = htonl(sp[this_sack].start_seq); +- *ptr++ = htonl(sp[this_sack].end_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); + } + + tp->rx_opt.dsack = 0; +@@ -681,13 +687,14 @@ static void tcp_options_write(__be32 *pt + + if (foc->exp) { + len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; +- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | ++ net_hdr_word(ptr) = ++ htonl((TCPOPT_EXP << 24) | (len << 16) | + TCPOPT_FASTOPEN_MAGIC); + p += TCPOLEN_EXP_FASTOPEN_BASE; + } else { + len = TCPOLEN_FASTOPEN_BASE + foc->len; +- *p++ = TCPOPT_FASTOPEN; +- *p++ = len; ++ net_hdr_word(p++) = TCPOPT_FASTOPEN; ++ net_hdr_word(p++) = len; + } + + memcpy(p, foc->val, foc->len); +--- a/include/uapi/linux/igmp.h ++++ b/include/uapi/linux/igmp.h +@@ -33,7 +33,7 @@ struct igmphdr { + __u8 code; /* For newer IGMP */ + __sum16 csum; + __be32 group; +-}; ++} __attribute__((packed, aligned(2))); + + /* V3 group record types [grec_type] */ + #define IGMPV3_MODE_IS_INCLUDE 1 +@@ -49,7 +49,7 @@ struct igmpv3_grec { + __be16 grec_nsrcs; + __be32 grec_mca; + __be32 grec_src[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_report { + __u8 type; +@@ -58,7 +58,7 @@ struct igmpv3_report { + __be16 resv2; + __be16 ngrec; + struct igmpv3_grec grec[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_query { + __u8 type; +@@ -79,7 +79,7 @@ struct igmpv3_query { + __u8 qqic; + __be16 nsrcs; + __be32 srcs[0]; +-}; ++} __attribute__((packed, aligned(2))); + + #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ + #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ +--- a/net/core/flow_dissector.c ++++ b/net/core/flow_dissector.c +@@ -129,7 +129,7 @@ __be32 __skb_flow_get_ports(const struct + ports = __skb_header_pointer(skb, thoff + poff, + sizeof(_ports), data, hlen, &_ports); + if (ports) +- return *ports; ++ return (__be32)net_hdr_word(ports); + } + + return 0; +--- a/include/uapi/linux/icmpv6.h ++++ b/include/uapi/linux/icmpv6.h +@@ -78,7 +78,7 @@ struct icmp6hdr { + #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other + #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime + #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref +-}; ++} __attribute__((packed, aligned(2))); + + + #define ICMPV6_ROUTER_PREF_LOW 0x3 +--- a/include/net/ndisc.h ++++ b/include/net/ndisc.h +@@ -93,7 +93,7 @@ struct ra_msg { + struct icmp6hdr icmph; + __be32 reachable_time; + __be32 retrans_timer; +-}; ++} __attribute__((packed, aligned(2))); + + struct rd_msg { + struct icmp6hdr icmph; +@@ -372,10 +372,10 @@ static inline u32 ndisc_hashfn(const voi + { + const u32 *p32 = pkey; + +- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + +- (p32[1] * hash_rnd[1]) + +- (p32[2] * hash_rnd[2]) + +- (p32[3] * hash_rnd[3])); ++ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + ++ (net_hdr_word(&p32[1]) * hash_rnd[1]) + ++ (net_hdr_word(&p32[2]) * hash_rnd[2]) + ++ (net_hdr_word(&p32[3]) * hash_rnd[3])); + } + + static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) +--- a/net/sched/cls_u32.c ++++ b/net/sched/cls_u32.c +@@ -155,7 +155,7 @@ next_knode: + data = skb_header_pointer(skb, toff, 4, &hdata); + if (!data) + goto out; +- if ((*data ^ key->val) & key->mask) { ++ if ((net_hdr_word(data) ^ key->val) & key->mask) { + n = rcu_dereference_bh(n->next); + goto next_knode; + } +@@ -206,8 +206,8 @@ check_terminal: + &hdata); + if (!data) + goto out; +- sel = ht->divisor & u32_hash_fold(*data, &n->sel, +- n->fshift); ++ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), ++ &n->sel, n->fshift); + } + if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) + goto next_ht; +--- a/net/ipv6/ip6_offload.c ++++ b/net/ipv6/ip6_offload.c +@@ -241,7 +241,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * + continue; + + iph2 = (struct ipv6hdr *)(p->data + off); +- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; ++ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); + + /* All fields must match except length and Traffic Class. + * XXX skbs on the gro_list have all been parsed and pulled +--- a/include/net/addrconf.h ++++ b/include/net/addrconf.h +@@ -47,7 +47,7 @@ struct prefix_info { + __be32 reserved2; + + struct in6_addr prefix; +-}; ++} __attribute__((packed, aligned(2))); + + #include + #include +--- a/include/net/inet_ecn.h ++++ b/include/net/inet_ecn.h +@@ -138,9 +138,9 @@ static inline int IP6_ECN_set_ce(struct + if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) + return 0; + +- from = *(__be32 *)iph; ++ from = net_hdr_word(iph); + to = from | htonl(INET_ECN_CE << 20); +- *(__be32 *)iph = to; ++ net_hdr_word(iph) = to; + if (skb->ip_summed == CHECKSUM_COMPLETE) + skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), + (__force __wsum)to); +--- a/include/net/ipv6.h ++++ b/include/net/ipv6.h +@@ -147,7 +147,7 @@ struct frag_hdr { + __u8 reserved; + __be16 frag_off; + __be32 identification; +-}; ++} __attribute__((packed, aligned(2))); + + #define IP6_MF 0x0001 + #define IP6_OFFSET 0xFFF8 +@@ -561,8 +561,8 @@ static inline void __ipv6_addr_set_half( + } + #endif + #endif +- addr[0] = wh; +- addr[1] = wl; ++ net_hdr_word(&addr[0]) = wh; ++ net_hdr_word(&addr[1]) = wl; + } + + static inline void ipv6_addr_set(struct in6_addr *addr, +@@ -621,6 +621,8 @@ static inline bool ipv6_prefix_equal(con + const __be32 *a1 = addr1->s6_addr32; + const __be32 *a2 = addr2->s6_addr32; + unsigned int pdw, pbi; ++ /* Used for last <32-bit fraction of prefix */ ++ u32 pbia1, pbia2; + + /* check complete u32 in prefix */ + pdw = prefixlen >> 5; +@@ -629,7 +631,9 @@ static inline bool ipv6_prefix_equal(con + + /* check incomplete u32 in prefix */ + pbi = prefixlen & 0x1f; +- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) ++ pbia1 = net_hdr_word(&a1[pdw]); ++ pbia2 = net_hdr_word(&a2[pdw]); ++ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) + return false; + + return true; +@@ -746,13 +750,13 @@ static inline void ipv6_addr_set_v4mappe + */ + static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) + { +- const __be32 *a1 = token1, *a2 = token2; ++ const struct in6_addr *a1 = token1, *a2 = token2; + int i; + + addrlen >>= 2; + + for (i = 0; i < addrlen; i++) { +- __be32 xb = a1[i] ^ a2[i]; ++ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; + if (xb) + return i * 32 + 31 - __fls(ntohl(xb)); + } +@@ -946,17 +950,18 @@ static inline u32 ip6_multipath_hash_fie + static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, + __be32 flowlabel) + { +- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; ++ net_hdr_word((__be32 *)hdr) = ++ htonl(0x60000000 | (tclass << 20)) | flowlabel; + } + + static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; + } + + static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; + } + + static inline u8 ip6_tclass(__be32 flowinfo) +--- a/include/net/secure_seq.h ++++ b/include/net/secure_seq.h +@@ -3,6 +3,7 @@ + #define _NET_SECURE_SEQ + + #include ++#include + + u64 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); + u64 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, +--- a/include/uapi/linux/in.h ++++ b/include/uapi/linux/in.h +@@ -88,7 +88,7 @@ enum { + /* Internet address. */ + struct in_addr { + __be32 s_addr; +-}; ++} __attribute__((packed, aligned(2))); + #endif + + #define IP_TOS 1 +--- a/net/ipv6/ip6_fib.c ++++ b/net/ipv6/ip6_fib.c +@@ -141,7 +141,7 @@ static __be32 addr_bit_set(const void *t + * See include/asm-generic/bitops/le.h. + */ + return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & +- addr[fn_bit >> 5]; ++ net_hdr_word(&addr[fn_bit >> 5]); + } + + struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh) +--- a/net/netfilter/nf_conntrack_proto_tcp.c ++++ b/net/netfilter/nf_conntrack_proto_tcp.c +@@ -400,7 +400,7 @@ static void tcp_sack(const struct sk_buf + + /* Fast path for timestamp-only option */ + if (length == TCPOLEN_TSTAMP_ALIGNED +- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) ++ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) + | (TCPOPT_NOP << 16) + | (TCPOPT_TIMESTAMP << 8) + | TCPOLEN_TIMESTAMP)) +--- a/net/xfrm/xfrm_input.c ++++ b/net/xfrm/xfrm_input.c +@@ -167,8 +167,8 @@ int xfrm_parse_spi(struct sk_buff *skb, + if (!pskb_may_pull(skb, hlen)) + return -EINVAL; + +- *spi = *(__be32 *)(skb_transport_header(skb) + offset); +- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); ++ *spi = net_hdr_word(skb_transport_header(skb) + offset); ++ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); + return 0; + } + EXPORT_SYMBOL(xfrm_parse_spi); +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -4158,14 +4158,16 @@ static bool tcp_parse_aligned_timestamp( + { + const __be32 *ptr = (const __be32 *)(th + 1); + +- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) +- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { ++ if (net_hdr_word(ptr) == ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { + tp->rx_opt.saw_tstamp = 1; + ++ptr; +- tp->rx_opt.rcv_tsval = ntohl(*ptr); ++ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); + ++ptr; +- if (*ptr) +- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ if (net_hdr_word(ptr)) ++ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - ++ tp->tsoffset; + else + tp->rx_opt.rcv_tsecr = 0; + return true; +--- a/include/uapi/linux/if_pppox.h ++++ b/include/uapi/linux/if_pppox.h +@@ -51,6 +51,7 @@ struct pppoe_addr { + */ + struct pptp_addr { + __u16 call_id; ++ __u16 pad; + struct in_addr sin_addr; + }; + +--- a/include/net/neighbour.h ++++ b/include/net/neighbour.h +@@ -270,8 +270,10 @@ static inline bool neigh_key_eq128(const + const u32 *n32 = (const u32 *)n->primary_key; + const u32 *p32 = pkey; + +- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | +- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; ++ return ((n32[0] ^ net_hdr_word(&p32[0])) | ++ (n32[1] ^ net_hdr_word(&p32[1])) | ++ (n32[2] ^ net_hdr_word(&p32[2])) | ++ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; + } + + static inline struct neighbour *___neigh_lookup_noref( +--- a/include/uapi/linux/netfilter_arp/arp_tables.h ++++ b/include/uapi/linux/netfilter_arp/arp_tables.h +@@ -70,7 +70,7 @@ struct arpt_arp { + __u8 flags; + /* Inverse flags */ + __u16 invflags; +-}; ++} __attribute__((aligned(4))); + + /* Values for "flag" field in struct arpt_ip (general arp structure). + * No flags defined yet. +--- a/net/core/utils.c ++++ b/net/core/utils.c +@@ -460,8 +460,14 @@ void inet_proto_csum_replace16(__sum16 * + bool pseudohdr) + { + __be32 diff[] = { +- ~from[0], ~from[1], ~from[2], ~from[3], +- to[0], to[1], to[2], to[3], ++ ~net_hdr_word(&from[0]), ++ ~net_hdr_word(&from[1]), ++ ~net_hdr_word(&from[2]), ++ ~net_hdr_word(&from[3]), ++ net_hdr_word(&to[0]), ++ net_hdr_word(&to[1]), ++ net_hdr_word(&to[2]), ++ net_hdr_word(&to[3]), + }; + if (skb->ip_summed != CHECKSUM_PARTIAL) { + *sum = csum_fold(csum_partial(diff, sizeof(diff), +--- a/include/linux/etherdevice.h ++++ b/include/linux/etherdevice.h +@@ -525,7 +525,7 @@ static inline bool is_etherdev_addr(cons + * @b: Pointer to Ethernet header + * + * Compare two Ethernet headers, returns 0 if equal. +- * This assumes that the network header (i.e., IP header) is 4-byte ++ * This assumes that the network header (i.e., IP header) is 2-byte + * aligned OR the platform can handle unaligned access. This is the + * case for all packets coming into netif_receive_skb or similar + * entry points. +@@ -548,11 +548,12 @@ static inline unsigned long compare_ethe + fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); + return fold; + #else +- u32 *a32 = (u32 *)((u8 *)a + 2); +- u32 *b32 = (u32 *)((u8 *)b + 2); ++ const u16 *a16 = a; ++ const u16 *b16 = b; + +- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | +- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); ++ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | ++ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | ++ (a16[6] ^ b16[6]); + #endif + } + +--- a/net/ipv4/tcp_offload.c ++++ b/net/ipv4/tcp_offload.c +@@ -223,7 +223,7 @@ struct sk_buff *tcp_gro_receive(struct l + + th2 = tcp_hdr(p); + +- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { ++ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { + NAPI_GRO_CB(p)->same_flow = 0; + continue; + } +@@ -241,8 +241,8 @@ found: + ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); + flush |= (__force int)(th->ack_seq ^ th2->ack_seq); + for (i = sizeof(*th); i < thlen; i += 4) +- flush |= *(u32 *)((u8 *)th + i) ^ +- *(u32 *)((u8 *)th2 + i); ++ flush |= net_hdr_word((u8 *)th + i) ^ ++ net_hdr_word((u8 *)th2 + i); + + /* When we receive our second frame we can made a decision on if we + * continue this flow as an atomic flow with a fixed ID or if we use +--- a/net/ipv6/netfilter/ip6table_mangle.c ++++ b/net/ipv6/netfilter/ip6table_mangle.c +@@ -44,7 +44,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + hop_limit = ipv6_hdr(skb)->hop_limit; + + /* flowlabel and prio (includes version, which shouldn't change either */ +- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); ++ flowlabel = net_hdr_word(ipv6_hdr(skb)); + + ret = ip6t_do_table(skb, state, priv); + +@@ -53,7 +53,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || + skb->mark != mark || + ipv6_hdr(skb)->hop_limit != hop_limit || +- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { ++ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { + err = ip6_route_me_harder(state->net, state->sk, skb); + if (err < 0) + ret = NF_DROP_ERR(err); diff --git a/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch b/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch new file mode 100644 index 0000000000..4743ad46e2 --- /dev/null +++ b/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch @@ -0,0 +1,121 @@ +From: Christopher Hill +Subject: [PATCH] ath79: add Mikrotik rb4xx series drivers + +This adds 3 Mikrotik rb4xx series drivers as follows: + +rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device +that interfaces between the SoC SPI bus and its two children below. +rb4xx-gpio: This is the GPIO expander. +rb4xx-nand: This is the NAND driver. + +The history of this code comes in three phases. + +1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx +drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/. + +Module-author: Gabor Juhos +Module-author: Imre Kaloz +Module-author: Bert Vermeulen + +2. Next several ar71xx patches were applied bringing the code current. + +commit 7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c +Submitted-by: Hauke Mehrtens + +commit af79fdbe4af32a287798b579141204bda056b8aa +commit 889272d92db689fd9c910243635e44c9d8323095 +commit e21cb649a235180563363b8af5ba8296b9ac0baa +commit 7c09fa4a7492ca436f2c94bd9a465b7c5bbeed6f +Submitted-by: Felix Fietkau + +3. Finally a heavy refactor to split the driver into the three new +subsystems, and updated to work with the device tree configuration, plus +updates and review feedback incorporated + +Reviewed-by: Thibaut VARÈNE +Submitted-by: Christopher Hill +--- + drivers/mfd/Kconfig | 8 ++++++++ + drivers/mfd/Makefile | 1 + + drivers/gpio/Kconfig | 6 ++++++ + drivers/gpio/Makefile | 1 + + drivers/mtd/nand/raw/Kconfig | 7 +++++++ + drivers/mtd/nand/raw/Makefile | 1 + + 6 files changed, 24 insertions(+) + +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -2176,6 +2176,14 @@ config RAVE_SP_CORE + Select this to get support for the Supervisory Processor + device found on several devices in RAVE line of hardware. + ++config MFD_RB4XX_CPLD ++ tristate "CPLD driver for Mikrotik RB4xx series boards" ++ select MFD_CORE ++ depends on ATH79 || COMPILE_TEST ++ help ++ Enables support for the CPLD chip (NAND & GPIO) on Mikrotik ++ Routerboard RB4xx series. ++ + config SGI_MFD_IOC3 + bool "SGI IOC3 core driver" + depends on PCI && MIPS && 64BIT +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -267,6 +267,7 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas- + obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o + obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o + ++obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o + obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o + obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o + obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -1574,6 +1574,12 @@ config GPIO_SODAVILLE + help + Say Y here to support Intel Sodaville GPIO. + ++config GPIO_RB4XX ++ tristate "GPIO expander for Mikrotik RB4xx series boards" ++ depends on MFD_RB4XX_CPLD ++ help ++ GPIO driver for Mikrotik Routerboard RB4xx series. ++ + endmenu + + menu "SPI GPIO expanders" +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -122,6 +122,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061. + obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o + obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o + obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o ++obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o + obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o + obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o + obj-$(CONFIG_GPIO_RDA) += gpio-rda.o +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -563,4 +563,11 @@ config MTD_NAND_AR934X + Enables support for NAND controller on Qualcomm Atheros SoCs. + This controller is found on AR934x and QCA955x SoCs. + ++config MTD_NAND_RB4XX ++ tristate "Support for NAND driver for Mikrotik RB4xx series boards" ++ depends on MFD_RB4XX_CPLD ++ help ++ Enables support for the NAND flash chip on Mikrotik Routerboard ++ RB4xx series. ++ + endif # MTD_RAW_NAND +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_INTEL_LGM) += inte + obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o + obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o + obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o ++obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o + + nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o + nand-objs += nand_onfi.o diff --git a/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch b/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch new file mode 100644 index 0000000000..94967bf674 --- /dev/null +++ b/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch @@ -0,0 +1,97 @@ +From: Denis Kalashnikov +Subject: [PATCH] ath79: add support for reset key on MikroTik RB912UAG-2HPnD + +On MikroTik RB91x board series a reset key shares SoC gpio +line #15 with NAND ALE and NAND IO7. So we need a custom +gpio driver to manage this non-trivial connection schema. +Also rb91x-nand needs to have an ability to disable a polling +of the key while it works with NAND. + +While we've been integrating rb91x-key into a firmware, we've +figured out that: +* In the gpio-latch driver we need to add a "cansleep" suffix to +several gpiolib calls, +* When gpio-latch and rb91x-nand fail to get a gpio and an error +is -EPROBE_DEFER, they shouldn't report about this, since this +actually is not an error and occurs when the gpio-latch probe +function is called before the rb91x-key probe. +We fix these related things here too. + +Submitted-by: Denis Kalashnikov +Reviewed-by: Sergey Ryazanov +Tested-by: Koen Vandeputte +--- + drivers/gpio/Kconfig | 11 +++++++++++ + drivers/gpio/Makefile | 2 ++ + drivers/mtd/nand/raw/Kconfig | 6 ++++++ + drivers/mtd/nand/raw/Makefile | 1 + + 7 files changed, 20 insertions(+) + +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -353,6 +353,13 @@ config GPIO_IXP4XX + IXP4xx series of chips. + + If unsure, say N. ++ ++config GPIO_LATCH ++ tristate "MikroTik RouterBOARD GPIO latch support" ++ depends on ATH79 ++ help ++ GPIO driver for latch on some MikroTik RouterBOARDs. ++ + config GPIO_LOGICVC + tristate "Xylon LogiCVC GPIO support" + depends on MFD_SYSCON && OF +@@ -529,6 +536,10 @@ config GPIO_ROCKCHIP + help + Say yes here to support GPIO on Rockchip SoCs. + ++config GPIO_RB91X_KEY ++ tristate "MikroTik RB91x board series reset key support" ++ depends on ATH79 ++ + config GPIO_SAMA5D2_PIOBU + tristate "SAMA5D2 PIOBU GPIO support" + depends on MFD_SYSCON +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -75,6 +75,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o + obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o + obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o + obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o ++obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o + obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o + obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o + obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o +@@ -123,6 +124,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio + obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o + obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o + obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o ++obj-$(CONFIG_GPIO_RB91X_KEY) += gpio-rb91x-key.o + obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o + obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o + obj-$(CONFIG_GPIO_RDA) += gpio-rda.o +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -570,4 +570,10 @@ config MTD_NAND_RB4XX + Enables support for the NAND flash chip on Mikrotik Routerboard + RB4xx series. + ++config MTD_NAND_RB91X ++ tristate "MikroTik RB91x NAND driver support" ++ depends on ATH79 && MTD_RAW_NAND ++ help ++ Enables support for the NAND flash chip on MikroTik RB91x series. ++ + endif # MTD_RAW_NAND +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rock + obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o + obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o + obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o ++obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o + + nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o + nand-objs += nand_onfi.o From 5f59d28bc3434d5b582310579096fa839f86e1df Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 31 May 2023 11:14:04 +0800 Subject: [PATCH 04/17] ath79: refresh patches and configs to introduce kernel 6.1 support All kernel configs are refreshed by 'make kernel_oldconfig CONFIG_TARGET=target' and 'make kernel_oldconfig CONFIG_TARGET=subtarget'. upstreamed patches: 010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch 011-v5.17-spi-ar934x-fix-transfer-size.patch 020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch 030-v5.18-ath79-add-support-for-booting-QCN550x.patch build and run tested on: ath79/generic/ar7241 ath79/generic/qca9563 ath79/nand/ar9344 Signed-off-by: Shiji Yang --- target/linux/ath79/Makefile | 1 + target/linux/ath79/config-6.1 | 19 ++++- target/linux/ath79/mikrotik/config-default | 1 + target/linux/ath79/nand/config-default | 1 + ...-ar934x-fix-transfer-and-word-delays.patch | 27 ------ ...1-v5.17-spi-ar934x-fix-transfer-size.patch | 62 -------------- ...th79-Implement-the-spi_mem-interface.patch | 68 --------------- ...th79-add-support-for-booting-QCN550x.patch | 48 ----------- .../340-register_gpio_driver_earlier.patch | 2 +- .../370-MIPS-ath79-sanitize-symbols.patch | 2 +- ...or-support-mtd-name-from-device-tree.patch | 19 ++--- .../410-mtd-cybertan-trx-parser.patch | 4 +- .../430-mtd-ar934x-nand-driver.patch | 6 +- ...701-usb-add-more-OF-quirk-properties.patch | 2 +- ...ds-add-reset-controller-based-driver.patch | 8 +- .../900-unaligned_access_hacks.patch | 82 +++++++++---------- .../patches-6.1/910-mikrotik-rb4xx.patch | 14 ++-- .../patches-6.1/911-mikrotik-rb91x.patch | 17 ++-- 18 files changed, 95 insertions(+), 288 deletions(-) delete mode 100644 target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch delete mode 100644 target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch delete mode 100644 target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch delete mode 100644 target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch diff --git a/target/linux/ath79/Makefile b/target/linux/ath79/Makefile index d6ba3b0ead..f7bb31c4ad 100644 --- a/target/linux/ath79/Makefile +++ b/target/linux/ath79/Makefile @@ -9,6 +9,7 @@ SUBTARGETS:=generic mikrotik nand tiny FEATURES:=ramdisk squashfs usbgadget KERNEL_PATCHVER:=5.15 +KERNEL_TESTING_PATCHVER:=6.1 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ath79/config-6.1 b/target/linux/ath79/config-6.1 index 5b1b0d5add..e3119f99a1 100644 --- a/target/linux/ath79/config-6.1 +++ b/target/linux/ath79/config-6.1 @@ -13,12 +13,15 @@ CONFIG_AT803X_PHY=y CONFIG_ATH79=y CONFIG_ATH79_WDT=y CONFIG_BLK_MQ_PCI=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_CEVT_R4K=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMDLINE="rootfstype=squashfs,jffs2" CONFIG_CMDLINE_BOOL=y # CONFIG_CMDLINE_OVERRIDE is not set CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 CONFIG_COMPAT_32BIT_TIME=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_CPU_GENERIC_DUMP_TLB=y @@ -36,24 +39,28 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_RNG2=y CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y CONFIG_DMA_NONCOHERENT=y CONFIG_DTC=y CONFIG_EARLY_PRINTK=y CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_LIB_ASHLDI3=y CONFIG_GENERIC_LIB_ASHRDI3=y @@ -75,7 +82,6 @@ CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y # CONFIG_GPIO_LATCH is not set # CONFIG_GPIO_RB91X_KEY is not set -CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y @@ -107,7 +113,6 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set CONFIG_MIPS_CMDLINE_FROM_DTB=y -CONFIG_MIPS_EBPF_JIT=y CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_NO_APPENDED_DTB is not set @@ -145,6 +150,9 @@ CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PCI=y CONFIG_PCI_AR71XX=y CONFIG_PCI_AR724X=y @@ -158,7 +166,9 @@ CONFIG_PHYLIB=y # CONFIG_PHY_AR7200_USB is not set # CONFIG_PHY_ATH79_USB is not set CONFIG_PINCTRL=y +CONFIG_PREEMPT_NONE_BUILD=y CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RANDSTRUCT_NONE=y CONFIG_RATIONAL=y CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y @@ -198,3 +208,4 @@ CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_TINY_SRCU=y CONFIG_USB_SUPPORT=y CONFIG_USE_OF=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x0 diff --git a/target/linux/ath79/mikrotik/config-default b/target/linux/ath79/mikrotik/config-default index 2ff08cec2b..a231188c83 100644 --- a/target/linux/ath79/mikrotik/config-default +++ b/target/linux/ath79/mikrotik/config-default @@ -45,5 +45,6 @@ CONFIG_WATCHDOG_CORE=y CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ath79/nand/config-default b/target/linux/ath79/nand/config-default index 730d38e1df..ab01a28b01 100644 --- a/target/linux/ath79/nand/config-default +++ b/target/linux/ath79/nand/config-default @@ -25,5 +25,6 @@ CONFIG_UBIFS_FS=y CONFIG_XXHASH=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch b/target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch deleted file mode 100644 index 7ce6df6d7b..0000000000 --- a/target/linux/ath79/patches-6.1/010-v5.17-spi-ar934x-fix-transfer-and-word-delays.patch +++ /dev/null @@ -1,27 +0,0 @@ -From c70282457c380db7deb57c81a6894debc8f88efa Mon Sep 17 00:00:00 2001 -From: Oskari Lemmela -Date: Wed, 22 Dec 2021 07:59:58 +0200 -Subject: [PATCH] spi: ar934x: fix transfer and word delays - -Add missing delay between transferred messages and words. - -Signed-off-by: Oskari Lemmela -Link: https://lore.kernel.org/r/20211222055958.1383233-3-oskari@lemmela.net -Signed-off-by: Mark Brown ---- - drivers/spi/spi-ar934x.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/spi/spi-ar934x.c -+++ b/drivers/spi/spi-ar934x.c -@@ -137,8 +137,10 @@ static int ar934x_spi_transfer_one_messa - reg >>= 8; - } - } -+ spi_delay_exec(&t->word_delay, t); - } - m->actual_length += t->len; -+ spi_transfer_delay_exec(t); - } - - msg_done: diff --git a/target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch b/target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch deleted file mode 100644 index 87f5da2c60..0000000000 --- a/target/linux/ath79/patches-6.1/011-v5.17-spi-ar934x-fix-transfer-size.patch +++ /dev/null @@ -1,62 +0,0 @@ -From ebe33e5a98dcf14a9630845f3f10c193584ac054 Mon Sep 17 00:00:00 2001 -From: Oskari Lemmela -Date: Wed, 22 Dec 2021 07:59:57 +0200 -Subject: [PATCH] spi: ar934x: fix transfer size - -If bits_per_word is configured, transfer only word amount -of data per iteration. - -Signed-off-by: Oskari Lemmela -Link: https://lore.kernel.org/r/20211222055958.1383233-2-oskari@lemmela.net -Signed-off-by: Mark Brown ---- - drivers/spi/spi-ar934x.c | 16 +++++++++++----- - 1 file changed, 11 insertions(+), 5 deletions(-) - ---- a/drivers/spi/spi-ar934x.c -+++ b/drivers/spi/spi-ar934x.c -@@ -82,7 +82,7 @@ static int ar934x_spi_transfer_one_messa - struct spi_device *spi = m->spi; - unsigned long trx_done, trx_cur; - int stat = 0; -- u8 term = 0; -+ u8 bpw, term = 0; - int div, i; - u32 reg; - const u8 *tx_buf; -@@ -90,6 +90,11 @@ static int ar934x_spi_transfer_one_messa - - m->actual_length = 0; - list_for_each_entry(t, &m->transfers, transfer_list) { -+ if (t->bits_per_word >= 8 && t->bits_per_word < 32) -+ bpw = t->bits_per_word >> 3; -+ else -+ bpw = 4; -+ - if (t->speed_hz) - div = ar934x_spi_clk_div(sp, t->speed_hz); - else -@@ -105,10 +110,10 @@ static int ar934x_spi_transfer_one_messa - iowrite32(reg, sp->base + AR934X_SPI_REG_CTRL); - iowrite32(0, sp->base + AR934X_SPI_DATAOUT); - -- for (trx_done = 0; trx_done < t->len; trx_done += 4) { -+ for (trx_done = 0; trx_done < t->len; trx_done += bpw) { - trx_cur = t->len - trx_done; -- if (trx_cur > 4) -- trx_cur = 4; -+ if (trx_cur > bpw) -+ trx_cur = bpw; - else if (list_is_last(&t->transfer_list, &m->transfers)) - term = 1; - -@@ -193,7 +198,8 @@ static int ar934x_spi_probe(struct platf - ctlr->mode_bits = SPI_LSB_FIRST; - ctlr->setup = ar934x_spi_setup; - ctlr->transfer_one_message = ar934x_spi_transfer_one_message; -- ctlr->bits_per_word_mask = SPI_BPW_MASK(8); -+ ctlr->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(24) | -+ SPI_BPW_MASK(16) | SPI_BPW_MASK(8); - ctlr->dev.of_node = pdev->dev.of_node; - ctlr->num_chipselect = 3; - diff --git a/target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch deleted file mode 100644 index 5746a889e8..0000000000 --- a/target/linux/ath79/patches-6.1/020-v5.18-spi-ath79-Implement-the-spi_mem-interface.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 -From: Luiz Angelo Daros de Luca -Date: Mon, 10 Feb 2020 16:11:27 -0300 -Subject: [PATCH] spi: ath79: Implement the spi_mem interface - -Signed-off-by: Luiz Angelo Daros de Luca ---- - drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_exec_mem_op(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); -+ -+ /* Ensures that reading is performed on device connected -+ to hardware cs0 */ -+ if (mem->spi->chip_select || mem->spi->cs_gpiod) -+ return -ENOTSUPP; -+ -+ /* Only use for fast-read op. */ -+ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || -+ op->addr.nbytes != 3 || op->dummy.nbytes != 1) -+ return -ENOTSUPP; -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return 0; -+} -+ -+static const struct spi_controller_mem_ops ath79_mem_ops = { -+ .exec_op = ath79_exec_mem_op, -+}; -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -165,6 +199,7 @@ static int ath79_spi_probe(struct platfo - ret = PTR_ERR(sp->base); - goto err_put_master; - } -+ master->mem_ops = &ath79_mem_ops; - - sp->clk = devm_clk_get(&pdev->dev, "ahb"); - if (IS_ERR(sp->clk)) { diff --git a/target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch b/target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch deleted file mode 100644 index 41ea5d2ef0..0000000000 --- a/target/linux/ath79/patches-6.1/030-v5.18-ath79-add-support-for-booting-QCN550x.patch +++ /dev/null @@ -1,48 +0,0 @@ -From: Wenli Looi -Date: Sun, 20 Jun 2021 23:32:28 -0700 -Subject: [PATCH] ath79: add support for booting QCN550x - -Based on wikidevi, QCN550x is a "Dragonfly" like QCA9561 and QCA9563. -Treating it as QCA956x seems to work. -Tested on Netgear EX7300v2 which boots successfully with -the same CPU clock as the stock firmware. - -Link: https://wikidevi.wi-cat.ru/Qualcomm#bgn -Link: https://wikidevi.wi-cat.ru/Qualcomm_Atheros#.28a.29bgn_2 -Signed-off-by: Wenli Looi - ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -121,6 +121,7 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_QCA9558: - case REV_ID_MAJOR_TP9343: - case REV_ID_MAJOR_QCA956X: -+ case REV_ID_MAJOR_QCN550X: - _prom_putchar = prom_putchar_ar71xx; - break; - ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -168,6 +168,12 @@ static void __init ath79_detect_sys_type - rev = id & QCA956X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_QCN550X: -+ ath79_soc = ATH79_SOC_QCA956X; -+ chip = "550X"; -+ rev = id & QCA956X_REV_ID_REVISION_MASK; -+ break; -+ - case REV_ID_MAJOR_TP9343: - ath79_soc = ATH79_SOC_TP9343; - chip = "9343"; ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -862,6 +862,7 @@ - #define REV_ID_MAJOR_QCA9558 0x1130 - #define REV_ID_MAJOR_TP9343 0x0150 - #define REV_ID_MAJOR_QCA956X 0x1150 -+#define REV_ID_MAJOR_QCN550X 0x2170 - - #define AR71XX_REV_ID_MINOR_MASK 0x3 - #define AR71XX_REV_ID_MINOR_AR7130 0x0 diff --git a/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch index a8680ceac4..48ce7e1d71 100644 --- a/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch +++ b/target/linux/ath79/patches-6.1/340-register_gpio_driver_earlier.patch @@ -11,7 +11,7 @@ Submitted-by: John Crispin --- a/drivers/gpio/gpio-ath79.c +++ b/drivers/gpio/gpio-ath79.c -@@ -297,7 +297,11 @@ static struct platform_driver ath79_gpio +@@ -301,7 +301,11 @@ static struct platform_driver ath79_gpio .probe = ath79_gpio_probe, }; diff --git a/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch index 5eb23ba6c6..67dc54725a 100644 --- a/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch +++ b/target/linux/ath79/patches-6.1/370-MIPS-ath79-sanitize-symbols.patch @@ -82,7 +82,7 @@ Signed-off-by: John Crispin endif --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile -@@ -21,7 +21,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o +@@ -19,7 +19,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o ops-bcm63xx.o obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o diff --git a/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch b/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch index 163bafdb2e..2f83b23e80 100644 --- a/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch +++ b/target/linux/ath79/patches-6.1/400-mtd-nor-support-mtd-name-from-device-tree.patch @@ -10,18 +10,17 @@ Signed-off-by: Abhimanyu Vishwakarma --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -3107,6 +3107,7 @@ int spi_nor_scan(struct spi_nor *nor, co - struct device *dev = nor->dev; +@@ -2941,12 +2941,19 @@ static void spi_nor_set_mtd_info(struct + { struct mtd_info *mtd = &nor->mtd; - struct device_node *np = spi_nor_get_flash_node(nor); + struct device *dev = nor->dev; ++ struct device_node *np = spi_nor_get_flash_node(nor); + const char __maybe_unused *of_mtd_name = NULL; - int ret; - int i; -@@ -3161,7 +3162,12 @@ int spi_nor_scan(struct spi_nor *nor, co - if (ret) - return ret; + spi_nor_set_mtd_locking_ops(nor); + spi_nor_set_mtd_otp_ops(nor); + mtd->dev.parent = dev; - if (!mtd->name) +#ifdef CONFIG_MTD_OF_PARTS + of_property_read_string(np, "linux,mtd-name", &of_mtd_name); @@ -30,11 +29,11 @@ Signed-off-by: Abhimanyu Vishwakarma + mtd->name = of_mtd_name; + else if (!mtd->name) mtd->name = dev_name(dev); - mtd->priv = nor; mtd->type = MTD_NORFLASH; + mtd->flags = MTD_CAP_NORFLASH; --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c -@@ -847,6 +847,17 @@ out_error: +@@ -840,6 +840,17 @@ out_error: */ static void mtd_set_dev_defaults(struct mtd_info *mtd) { diff --git a/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch index 4e8e536e29..d0e8aec0d5 100644 --- a/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch +++ b/target/linux/ath79/patches-6.1/410-mtd-cybertan-trx-parser.patch @@ -18,7 +18,7 @@ Submitted-by: Christian Lamparter --- a/drivers/mtd/parsers/Makefile +++ b/drivers/mtd/parsers/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o +@@ -9,6 +9,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o ofpart-y += ofpart_core.o ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o @@ -28,7 +28,7 @@ Submitted-by: Christian Lamparter obj-$(CONFIG_MTD_PARSER_TPLINK_SAFELOADER) += tplink_safeloader.o --- a/drivers/mtd/parsers/Kconfig +++ b/drivers/mtd/parsers/Kconfig -@@ -102,6 +102,14 @@ config MTD_OF_PARTS_LINKSYS_NS +@@ -112,6 +112,14 @@ config MTD_OF_PARTS_LINKSYS_NS two "firmware" partitions. Currently used firmware has to be detected using CFE environment variable. diff --git a/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch index 63bc98e14c..184c39d469 100644 --- a/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch +++ b/target/linux/ath79/patches-6.1/430-mtd-ar934x-nand-driver.patch @@ -9,7 +9,7 @@ SVN-Revision: 33385 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig -@@ -555,4 +555,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE +@@ -557,4 +557,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE load time (assuming you build diskonchip as a module) with the module parameter "inftl_bbt_write=1". @@ -24,10 +24,10 @@ SVN-Revision: 33385 endif # MTD_RAW_NAND --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile -@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_ARASAN) += arasan - obj-$(CONFIG_MTD_NAND_INTEL_LGM) += intel-nand-controller.o +@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_INTEL_LGM) += inte obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o + obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o +obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o diff --git a/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch index d6d8cb6952..293a359884 100644 --- a/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch +++ b/target/linux/ath79/patches-6.1/701-usb-add-more-OF-quirk-properties.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/usb/host/ehci-platform.c +++ b/drivers/usb/host/ehci-platform.c -@@ -277,6 +277,11 @@ static int ehci_platform_probe(struct pl +@@ -274,6 +274,11 @@ static int ehci_platform_probe(struct pl ehci = hcd_to_ehci(hcd); if (pdata == &ehci_platform_defaults && dev->dev.of_node) { diff --git a/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch index 7122756c52..18d5e14992 100644 --- a/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch +++ b/target/linux/ath79/patches-6.1/800-leds-add-reset-controller-based-driver.patch @@ -13,9 +13,9 @@ Signed-off-by: John Crispin --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig -@@ -876,6 +876,17 @@ source "drivers/leds/blink/Kconfig" - comment "Flash and Torch LED drivers" - source "drivers/leds/flash/Kconfig" +@@ -872,6 +872,17 @@ source "drivers/leds/flash/Kconfig" + comment "RGB LED drivers" + source "drivers/leds/rgb/Kconfig" +config LEDS_RESET + tristate "LED support for reset-controller API" @@ -176,7 +176,7 @@ Signed-off-by: John Crispin +MODULE_ALIAS("platform:leds-reset"); --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile -@@ -87,6 +87,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds +@@ -86,6 +86,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o diff --git a/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch b/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch index 1971b9cd01..6e4b2848c8 100644 --- a/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch +++ b/target/linux/ath79/patches-6.1/900-unaligned_access_hacks.patch @@ -86,7 +86,7 @@ SVN-Revision: 35130 } while (word != stop); return csum_fold(csum); -@@ -182,73 +186,6 @@ static inline __sum16 ip_compute_csum(co +@@ -179,73 +183,6 @@ static inline __sum16 ip_compute_csum(co return csum_fold(csum_partial(buff, len, 0)); } @@ -258,7 +258,7 @@ SVN-Revision: 35130 #include #include #include -@@ -944,10 +945,10 @@ static void tcp_v6_send_response(const s +@@ -901,10 +902,10 @@ static void tcp_v6_send_response(const s topt = (__be32 *)(t1 + 1); if (tsecr) { @@ -285,7 +285,7 @@ SVN-Revision: 35130 */ --- a/net/ipv6/datagram.c +++ b/net/ipv6/datagram.c -@@ -492,7 +492,7 @@ int ipv6_recv_error(struct sock *sk, str +@@ -497,7 +497,7 @@ int ipv6_recv_error(struct sock *sk, str ipv6_iface_scope_id(&sin->sin6_addr, IP6CB(skb)->iif); } else { @@ -294,7 +294,7 @@ SVN-Revision: 35130 &sin->sin6_addr); sin->sin6_scope_id = 0; } -@@ -846,12 +846,12 @@ int ip6_datagram_send_ctl(struct net *ne +@@ -851,12 +851,12 @@ int ip6_datagram_send_ctl(struct net *ne } if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { @@ -311,18 +311,18 @@ SVN-Revision: 35130 case IPV6_2292HOPOPTS: --- a/net/ipv6/exthdrs.c +++ b/net/ipv6/exthdrs.c -@@ -1002,7 +1002,7 @@ static bool ipv6_hop_jumbo(struct sk_buf +@@ -1003,7 +1003,7 @@ static bool ipv6_hop_jumbo(struct sk_buf goto drop; } - pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); + pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); if (pkt_len <= IPV6_MAXPLEN) { - __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); - icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); + icmpv6_param_prob_reason(skb, ICMPV6_HDR_FIELD, optoff + 2, + SKB_DROP_REASON_IP_INHDR); --- a/include/linux/types.h +++ b/include/linux/types.h -@@ -231,5 +231,11 @@ typedef void (*swap_func_t)(void *a, voi +@@ -232,5 +232,11 @@ typedef void (*swap_func_t)(void *a, voi typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv); typedef int (*cmp_func_t)(const void *a, const void *b); @@ -336,9 +336,9 @@ SVN-Revision: 35130 #endif /* _LINUX_TYPES_H */ --- a/net/ipv4/af_inet.c +++ b/net/ipv4/af_inet.c -@@ -1477,8 +1477,8 @@ struct sk_buff *inet_gro_receive(struct +@@ -1488,8 +1488,8 @@ struct sk_buff *inet_gro_receive(struct if (unlikely(ip_fast_csum((u8 *)iph, 5))) - goto out_unlock; + goto out; - id = ntohl(*(__be32 *)&iph->id); - flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); @@ -349,7 +349,7 @@ SVN-Revision: 35130 list_for_each_entry(p, head, list) { --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c -@@ -610,48 +610,53 @@ static void tcp_options_write(__be32 *pt +@@ -611,48 +611,53 @@ static void tcp_options_write(struct tcp u16 options = opts->options; /* mungable copy */ if (unlikely(OPTION_MD5 & options)) { @@ -426,7 +426,7 @@ SVN-Revision: 35130 } if (unlikely(opts->num_sack_blocks)) { -@@ -659,16 +664,17 @@ static void tcp_options_write(__be32 *pt +@@ -660,16 +665,17 @@ static void tcp_options_write(struct tcp tp->duplicate_sack : tp->selective_acks; int this_sack; @@ -450,7 +450,7 @@ SVN-Revision: 35130 } tp->rx_opt.dsack = 0; -@@ -681,13 +687,14 @@ static void tcp_options_write(__be32 *pt +@@ -682,13 +688,14 @@ static void tcp_options_write(struct tcp if (foc->exp) { len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; @@ -482,7 +482,7 @@ SVN-Revision: 35130 @@ -49,7 +49,7 @@ struct igmpv3_grec { __be16 grec_nsrcs; __be32 grec_mca; - __be32 grec_src[0]; + __be32 grec_src[]; -}; +} __attribute__((packed, aligned(2))); @@ -491,7 +491,7 @@ SVN-Revision: 35130 @@ -58,7 +58,7 @@ struct igmpv3_report { __be16 resv2; __be16 ngrec; - struct igmpv3_grec grec[0]; + struct igmpv3_grec grec[]; -}; +} __attribute__((packed, aligned(2))); @@ -500,7 +500,7 @@ SVN-Revision: 35130 @@ -79,7 +79,7 @@ struct igmpv3_query { __u8 qqic; __be16 nsrcs; - __be32 srcs[0]; + __be32 srcs[]; -}; +} __attribute__((packed, aligned(2))); @@ -508,7 +508,7 @@ SVN-Revision: 35130 #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ --- a/net/core/flow_dissector.c +++ b/net/core/flow_dissector.c -@@ -129,7 +129,7 @@ __be32 __skb_flow_get_ports(const struct +@@ -131,7 +131,7 @@ __be32 __skb_flow_get_ports(const struct ports = __skb_header_pointer(skb, thoff + poff, sizeof(_ports), data, hlen, &_ports); if (ports) @@ -578,7 +578,7 @@ SVN-Revision: 35130 goto next_ht; --- a/net/ipv6/ip6_offload.c +++ b/net/ipv6/ip6_offload.c -@@ -241,7 +241,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * +@@ -259,7 +259,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * continue; iph2 = (struct ipv6hdr *)(p->data + off); @@ -614,16 +614,16 @@ SVN-Revision: 35130 (__force __wsum)to); --- a/include/net/ipv6.h +++ b/include/net/ipv6.h -@@ -147,7 +147,7 @@ struct frag_hdr { +@@ -149,7 +149,7 @@ struct frag_hdr { __u8 reserved; __be16 frag_off; __be32 identification; -}; +} __attribute__((packed, aligned(2))); - #define IP6_MF 0x0001 - #define IP6_OFFSET 0xFFF8 -@@ -561,8 +561,8 @@ static inline void __ipv6_addr_set_half( + /* + * Jumbo payload option, as described in RFC 2675 2. +@@ -615,8 +615,8 @@ static inline void __ipv6_addr_set_half( } #endif #endif @@ -634,7 +634,7 @@ SVN-Revision: 35130 } static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -621,6 +621,8 @@ static inline bool ipv6_prefix_equal(con +@@ -675,6 +675,8 @@ static inline bool ipv6_prefix_equal(con const __be32 *a1 = addr1->s6_addr32; const __be32 *a2 = addr2->s6_addr32; unsigned int pdw, pbi; @@ -643,7 +643,7 @@ SVN-Revision: 35130 /* check complete u32 in prefix */ pdw = prefixlen >> 5; -@@ -629,7 +631,9 @@ static inline bool ipv6_prefix_equal(con +@@ -683,7 +685,9 @@ static inline bool ipv6_prefix_equal(con /* check incomplete u32 in prefix */ pbi = prefixlen & 0x1f; @@ -654,7 +654,7 @@ SVN-Revision: 35130 return false; return true; -@@ -746,13 +750,13 @@ static inline void ipv6_addr_set_v4mappe +@@ -800,13 +804,13 @@ static inline void ipv6_addr_set_v4mappe */ static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) { @@ -670,7 +670,7 @@ SVN-Revision: 35130 if (xb) return i * 32 + 31 - __fls(ntohl(xb)); } -@@ -946,17 +950,18 @@ static inline u32 ip6_multipath_hash_fie +@@ -1000,17 +1004,18 @@ static inline u32 ip6_multipath_hash_fie static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, __be32 flowlabel) { @@ -700,11 +700,11 @@ SVN-Revision: 35130 #include +#include - u64 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); - u64 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, + struct net; + --- a/include/uapi/linux/in.h +++ b/include/uapi/linux/in.h -@@ -88,7 +88,7 @@ enum { +@@ -91,7 +91,7 @@ enum { /* Internet address. */ struct in_addr { __be32 s_addr; @@ -715,7 +715,7 @@ SVN-Revision: 35130 #define IP_TOS 1 --- a/net/ipv6/ip6_fib.c +++ b/net/ipv6/ip6_fib.c -@@ -141,7 +141,7 @@ static __be32 addr_bit_set(const void *t +@@ -142,7 +142,7 @@ static __be32 addr_bit_set(const void *t * See include/asm-generic/bitops/le.h. */ return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & @@ -726,7 +726,7 @@ SVN-Revision: 35130 struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh) --- a/net/netfilter/nf_conntrack_proto_tcp.c +++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -400,7 +400,7 @@ static void tcp_sack(const struct sk_buf +@@ -406,7 +406,7 @@ static void tcp_sack(const struct sk_buf /* Fast path for timestamp-only option */ if (length == TCPOLEN_TSTAMP_ALIGNED @@ -737,7 +737,7 @@ SVN-Revision: 35130 | TCPOLEN_TIMESTAMP)) --- a/net/xfrm/xfrm_input.c +++ b/net/xfrm/xfrm_input.c -@@ -167,8 +167,8 @@ int xfrm_parse_spi(struct sk_buff *skb, +@@ -168,8 +168,8 @@ int xfrm_parse_spi(struct sk_buff *skb, if (!pskb_may_pull(skb, hlen)) return -EINVAL; @@ -750,7 +750,7 @@ SVN-Revision: 35130 EXPORT_SYMBOL(xfrm_parse_spi); --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c -@@ -4158,14 +4158,16 @@ static bool tcp_parse_aligned_timestamp( +@@ -4166,14 +4166,16 @@ static bool tcp_parse_aligned_timestamp( { const __be32 *ptr = (const __be32 *)(th + 1); @@ -784,7 +784,7 @@ SVN-Revision: 35130 --- a/include/net/neighbour.h +++ b/include/net/neighbour.h -@@ -270,8 +270,10 @@ static inline bool neigh_key_eq128(const +@@ -286,8 +286,10 @@ static inline bool neigh_key_eq128(const const u32 *n32 = (const u32 *)n->primary_key; const u32 *p32 = pkey; @@ -829,7 +829,7 @@ SVN-Revision: 35130 *sum = csum_fold(csum_partial(diff, sizeof(diff), --- a/include/linux/etherdevice.h +++ b/include/linux/etherdevice.h -@@ -525,7 +525,7 @@ static inline bool is_etherdev_addr(cons +@@ -555,7 +555,7 @@ static inline bool is_etherdev_addr(cons * @b: Pointer to Ethernet header * * Compare two Ethernet headers, returns 0 if equal. @@ -838,7 +838,7 @@ SVN-Revision: 35130 * aligned OR the platform can handle unaligned access. This is the * case for all packets coming into netif_receive_skb or similar * entry points. -@@ -548,11 +548,12 @@ static inline unsigned long compare_ethe +@@ -578,11 +578,12 @@ static inline unsigned long compare_ethe fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); return fold; #else @@ -857,7 +857,7 @@ SVN-Revision: 35130 --- a/net/ipv4/tcp_offload.c +++ b/net/ipv4/tcp_offload.c -@@ -223,7 +223,7 @@ struct sk_buff *tcp_gro_receive(struct l +@@ -220,7 +220,7 @@ struct sk_buff *tcp_gro_receive(struct l th2 = tcp_hdr(p); @@ -866,7 +866,7 @@ SVN-Revision: 35130 NAPI_GRO_CB(p)->same_flow = 0; continue; } -@@ -241,8 +241,8 @@ found: +@@ -238,8 +238,8 @@ found: ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); flush |= (__force int)(th->ack_seq ^ th2->ack_seq); for (i = sizeof(*th); i < thlen; i += 4) @@ -879,16 +879,16 @@ SVN-Revision: 35130 * continue this flow as an atomic flow with a fixed ID or if we use --- a/net/ipv6/netfilter/ip6table_mangle.c +++ b/net/ipv6/netfilter/ip6table_mangle.c -@@ -44,7 +44,7 @@ ip6t_mangle_out(struct sk_buff *skb, con +@@ -44,7 +44,7 @@ ip6t_mangle_out(void *priv, struct sk_bu hop_limit = ipv6_hdr(skb)->hop_limit; /* flowlabel and prio (includes version, which shouldn't change either */ - flowlabel = *((u_int32_t *)ipv6_hdr(skb)); + flowlabel = net_hdr_word(ipv6_hdr(skb)); - ret = ip6t_do_table(skb, state, priv); + ret = ip6t_do_table(priv, skb, state); -@@ -53,7 +53,7 @@ ip6t_mangle_out(struct sk_buff *skb, con +@@ -53,7 +53,7 @@ ip6t_mangle_out(void *priv, struct sk_bu !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || skb->mark != mark || ipv6_hdr(skb)->hop_limit != hop_limit || diff --git a/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch b/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch index 4743ad46e2..b61eef0b8a 100644 --- a/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch +++ b/target/linux/ath79/patches-6.1/910-mikrotik-rb4xx.patch @@ -45,7 +45,7 @@ Submitted-by: Christopher Hill --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig -@@ -2176,6 +2176,14 @@ config RAVE_SP_CORE +@@ -2208,6 +2208,14 @@ config RAVE_SP_CORE Select this to get support for the Supervisory Processor device found on several devices in RAVE line of hardware. @@ -62,7 +62,7 @@ Submitted-by: Christopher Hill depends on PCI && MIPS && 64BIT --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile -@@ -267,6 +267,7 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas- +@@ -269,6 +269,7 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas- obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o @@ -72,7 +72,7 @@ Submitted-by: Christopher Hill obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig -@@ -1574,6 +1574,12 @@ config GPIO_SODAVILLE +@@ -1593,6 +1593,12 @@ config GPIO_SODAVILLE help Say Y here to support Intel Sodaville GPIO. @@ -87,7 +87,7 @@ Submitted-by: Christopher Hill menu "SPI GPIO expanders" --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile -@@ -122,6 +122,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061. +@@ -123,6 +123,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061. obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o @@ -97,7 +97,7 @@ Submitted-by: Christopher Hill obj-$(CONFIG_GPIO_RDA) += gpio-rda.o --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig -@@ -563,4 +563,11 @@ config MTD_NAND_AR934X +@@ -565,4 +565,11 @@ config MTD_NAND_AR934X Enables support for NAND controller on Qualcomm Atheros SoCs. This controller is found on AR934x and QCA955x SoCs. @@ -111,9 +111,9 @@ Submitted-by: Christopher Hill endif # MTD_RAW_NAND --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_INTEL_LGM) += inte - obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o +@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rock obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o + obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o +obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o diff --git a/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch b/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch index 94967bf674..768ab6fb49 100644 --- a/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch +++ b/target/linux/ath79/patches-6.1/911-mikrotik-rb91x.patch @@ -29,11 +29,10 @@ Tested-by: Koen Vandeputte --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig -@@ -353,6 +353,13 @@ config GPIO_IXP4XX - IXP4xx series of chips. +@@ -368,6 +368,12 @@ config GPIO_IXP4XX If unsure, say N. -+ + +config GPIO_LATCH + tristate "MikroTik RouterBOARD GPIO latch support" + depends on ATH79 @@ -43,7 +42,7 @@ Tested-by: Koen Vandeputte config GPIO_LOGICVC tristate "Xylon LogiCVC GPIO support" depends on MFD_SYSCON && OF -@@ -529,6 +536,10 @@ config GPIO_ROCKCHIP +@@ -544,6 +550,10 @@ config GPIO_ROCKCHIP help Say yes here to support GPIO on Rockchip SoCs. @@ -56,7 +55,7 @@ Tested-by: Koen Vandeputte depends on MFD_SYSCON --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile -@@ -75,6 +75,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o +@@ -76,6 +76,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o @@ -64,7 +63,7 @@ Tested-by: Koen Vandeputte obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o -@@ -123,6 +124,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio +@@ -124,6 +125,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o @@ -74,7 +73,7 @@ Tested-by: Koen Vandeputte obj-$(CONFIG_GPIO_RDA) += gpio-rda.o --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig -@@ -570,4 +570,10 @@ config MTD_NAND_RB4XX +@@ -572,4 +572,10 @@ config MTD_NAND_RB4XX Enables support for the NAND flash chip on Mikrotik Routerboard RB4xx series. @@ -87,8 +86,8 @@ Tested-by: Koen Vandeputte endif # MTD_RAW_NAND --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile -@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rock - obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o +@@ -61,6 +61,7 @@ obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-n + obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o +obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o From 7189b4578466a8a4c570ee328895d8a97a942893 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 25 May 2023 18:35:20 +0800 Subject: [PATCH 05/17] ath79: fix ethernet driver build errors on kernel 6.1 Some net APIs have changed on the new kernel. Update them to fix compile errors. Signed-off-by: Shiji Yang --- .../net/ethernet/atheros/ag71xx/ag71xx_ethtool.c | 14 ++++++++++++++ .../net/ethernet/atheros/ag71xx/ag71xx_main.c | 13 ++++++++----- 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c index 104b9320b9..e5adc821d2 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c @@ -80,8 +80,15 @@ static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) ag->msg_enable = msg_level; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +static void ag71xx_ethtool_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *er, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +#else static void ag71xx_ethtool_get_ringparam(struct net_device *dev, struct ethtool_ringparam *er) +#endif { struct ag71xx *ag = netdev_priv(dev); @@ -99,8 +106,15 @@ static void ag71xx_ethtool_get_ringparam(struct net_device *dev, er->tx_pending /= AG71XX_TX_RING_DS_PER_PKT; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +static int ag71xx_ethtool_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *er, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +#else static int ag71xx_ethtool_set_ringparam(struct net_device *dev, struct ethtool_ringparam *er) +#endif { struct ag71xx *ag = netdev_priv(dev); unsigned tx_size; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 06ebbd8ea3..8f95210e0f 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -333,7 +333,7 @@ static unsigned char *ag71xx_speed_str(struct ag71xx *ag) return "?"; } -static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) +static void ag71xx_hw_set_macaddr(struct ag71xx *ag, const unsigned char *mac) { u32 t; @@ -1166,7 +1166,7 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) switch (cmd) { case SIOCSIFHWADDR: if (copy_from_user - (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) + ((void*)dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) return -EFAULT; return 0; @@ -1669,10 +1669,9 @@ static int ag71xx_probe(struct platform_device *pdev) ag->stop_desc->ctrl = 0; ag->stop_desc->next = (u32) ag->stop_desc_dma; - of_get_mac_address(np, dev->dev_addr); - if (!is_valid_ether_addr(dev->dev_addr)) { + if (of_get_ethdev_address(np, dev)) { dev_err(&pdev->dev, "invalid MAC address, using random address\n"); - eth_random_addr(dev->dev_addr); + eth_hw_addr_random(dev); } err = of_get_phy_mode(np, &ag->phy_if_mode); @@ -1699,7 +1698,11 @@ static int ag71xx_probe(struct platform_device *pdev) break; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0) + netif_napi_add_weight(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); +#else netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); +#endif ag71xx_dump_regs(ag); From 54758cf24bd8123c724c59805a21d940db0b058c Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Wed, 31 May 2023 08:31:18 +0800 Subject: [PATCH 06/17] ath79: ignore the abused interrupt-map on PCIe node ath79 PCIe interrupt controller has stopped working correctly. This is because the DT exposing a non-sensical interrupt-map property, and their drivers relying on the kernel ignoring this property[1]. This patch fixes the PCIe init error: ath9k 0000:00:00.0: of_irq_parse_pci: failed with rc=-14 Notice: This is just a workaround, not a fix. PCIe driver and related dts node need to be rewritten. [1] https://lore.kernel.org/all/20211201114102.13446-1-maz@kernel.org/ Signed-off-by: Shiji Yang --- ...he-abused-interrupt-map-on-pcie-node.patch | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 target/linux/ath79/patches-6.1/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch diff --git a/target/linux/ath79/patches-6.1/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch b/target/linux/ath79/patches-6.1/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch new file mode 100644 index 0000000000..980c265fe6 --- /dev/null +++ b/target/linux/ath79/patches-6.1/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch @@ -0,0 +1,33 @@ +From: Shiji Yang +Date: Wed, 31 May 2023 00:15:23 +0000 +Subject: [PATCH] ath79: ignore the abused interrupt-map on pcie node + +ath79 PCIe interrupt controller has stopped working correctly. This +is because the DT exposing a non-sensical interrupt-map property, +and their drivers relying on the kernel ignoring this property[1]. + +This patch fix the pcie init error: +ath9k 0000:00:00.0: of_irq_parse_pci: failed with rc=-14 + +Notice: +This is just a workaround, not a fix. PCIe driver and related dts +node need to be rewritten. + +[1] https://lore.kernel.org/all/20211201114102.13446-1-maz@kernel.org/ + +Signed-off-by: Shiji Yang +--- + drivers/of/irq.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/of/irq.c ++++ b/drivers/of/irq.c +@@ -86,6 +86,8 @@ EXPORT_SYMBOL_GPL(of_irq_find_parent); + * drawing board. + */ + static const char * const of_irq_imap_abusers[] = { ++ "qca,ar7100-pci", ++ "qcom,ar7240-pci", + "CBEA,platform-spider-pic", + "sti,platform-spider-pic", + "realtek,rtl-intc", From 7ba69a94f924b0eefd05874d63fd616fab06ded6 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Sun, 28 May 2023 09:17:34 +0800 Subject: [PATCH 07/17] ath79: backport gpio immutable irq_chip support This patch converts the driver to immutable irq-chip, which can silence some gpio warnings. Signed-off-by: Shiji Yang --- ...-ath79-Convert-to-immutable-irq_chip.patch | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 target/linux/ath79/patches-6.1/010-v6.4-gpio-ath79-Convert-to-immutable-irq_chip.patch diff --git a/target/linux/ath79/patches-6.1/010-v6.4-gpio-ath79-Convert-to-immutable-irq_chip.patch b/target/linux/ath79/patches-6.1/010-v6.4-gpio-ath79-Convert-to-immutable-irq_chip.patch new file mode 100644 index 0000000000..942380fc7b --- /dev/null +++ b/target/linux/ath79/patches-6.1/010-v6.4-gpio-ath79-Convert-to-immutable-irq_chip.patch @@ -0,0 +1,60 @@ +From b11ce7e48121a02ceedec9f4dfcab4f2bee8f35f Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Thu, 9 Mar 2023 08:45:54 +0100 +Subject: gpio: ath79: Convert to immutable irq_chip + +Convert the driver to immutable irq-chip with a bit of +intuition. + +Cc: Marc Zyngier +Acked-by: Marc Zyngier +Signed-off-by: Linus Walleij +Signed-off-by: Bartosz Golaszewski +--- + drivers/gpio/gpio-ath79.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/gpio/gpio-ath79.c ++++ b/drivers/gpio/gpio-ath79.c +@@ -71,6 +71,7 @@ static void ath79_gpio_irq_unmask(struct + u32 mask = BIT(irqd_to_hwirq(data)); + unsigned long flags; + ++ gpiochip_enable_irq(&ctrl->gc, irqd_to_hwirq(data)); + raw_spin_lock_irqsave(&ctrl->lock, flags); + ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask); + raw_spin_unlock_irqrestore(&ctrl->lock, flags); +@@ -85,6 +86,7 @@ static void ath79_gpio_irq_mask(struct i + raw_spin_lock_irqsave(&ctrl->lock, flags); + ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0); + raw_spin_unlock_irqrestore(&ctrl->lock, flags); ++ gpiochip_disable_irq(&ctrl->gc, irqd_to_hwirq(data)); + } + + static void ath79_gpio_irq_enable(struct irq_data *data) +@@ -169,13 +171,15 @@ static int ath79_gpio_irq_set_type(struc + return 0; + } + +-static struct irq_chip ath79_gpio_irqchip = { ++static const struct irq_chip ath79_gpio_irqchip = { + .name = "gpio-ath79", + .irq_enable = ath79_gpio_irq_enable, + .irq_disable = ath79_gpio_irq_disable, + .irq_mask = ath79_gpio_irq_mask, + .irq_unmask = ath79_gpio_irq_unmask, + .irq_set_type = ath79_gpio_irq_set_type, ++ .flags = IRQCHIP_IMMUTABLE, ++ GPIOCHIP_IRQ_RESOURCE_HELPERS, + }; + + static void ath79_gpio_irq_handler(struct irq_desc *desc) +@@ -274,7 +278,7 @@ static int ath79_gpio_probe(struct platf + /* Optional interrupt setup */ + if (!np || of_property_read_bool(np, "interrupt-controller")) { + girq = &ctrl->gc.irq; +- girq->chip = &ath79_gpio_irqchip; ++ gpio_irq_chip_set_chip(girq, &ath79_gpio_irqchip); + girq->parent_handler = ath79_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), From aee2af0f742d6772621dafb872e4ba277b56f8d8 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Tue, 30 May 2023 16:50:09 +0800 Subject: [PATCH 08/17] ath79: enable variable sector size erasure for generic subtarget Make use of minor sector size (4k) erasure on supported flash chips to improve spi read/write performance. Signed-off-by: Shiji Yang --- target/linux/ath79/generic/config-default | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ath79/generic/config-default b/target/linux/ath79/generic/config-default index d8c674cba7..57cc9447d8 100644 --- a/target/linux/ath79/generic/config-default +++ b/target/linux/ath79/generic/config-default @@ -15,6 +15,7 @@ CONFIG_LEDS_RESET=y CONFIG_MARVELL_PHY=y CONFIG_MICREL_PHY=y CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y CONFIG_MTD_SPLIT_EVA_FW=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_U_BOOT_ENV=y From c94383de018c561355c5e239524fbefca4aee3aa Mon Sep 17 00:00:00 2001 From: David Bauer Date: Fri, 8 Sep 2023 21:00:23 +0200 Subject: [PATCH 09/17] ath79: use kernel 6.1 as default Signed-off-by: David Bauer --- target/linux/ath79/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ath79/Makefile b/target/linux/ath79/Makefile index f7bb31c4ad..0a54fc59c6 100644 --- a/target/linux/ath79/Makefile +++ b/target/linux/ath79/Makefile @@ -8,7 +8,7 @@ SUBTARGETS:=generic mikrotik nand tiny FEATURES:=ramdisk squashfs usbgadget -KERNEL_PATCHVER:=5.15 +KERNEL_PATCHVER:=6.1 KERNEL_TESTING_PATCHVER:=6.1 include $(INCLUDE_DIR)/target.mk From 58bb5e147ae50391c29c53890f47e3a5420bbfad Mon Sep 17 00:00:00 2001 From: John Audia Date: Thu, 7 Sep 2023 06:55:41 -0400 Subject: [PATCH 10/17] kernel: bump 5.15 to 5.15.131 Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.131 All patches automatically rebased. Build system: x86_64 Build-tested: ramips/tplink_archer-a6-v3 Run-tested: ramips/tplink_archer-a6-v3 Signed-off-by: John Audia --- include/kernel-5.15 | 4 ++-- target/linux/generic/hack-5.15/204-module_strip.patch | 4 ++-- .../hack-5.15/780-usb-net-MeigLink_modem_support.patch | 2 +- ...Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch | 2 +- .../830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/kernel-5.15 b/include/kernel-5.15 index 74130b2830..0423befe74 100644 --- a/include/kernel-5.15 +++ b/include/kernel-5.15 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.15 = .130 -LINUX_KERNEL_HASH-5.15.130 = ab464e4107329ff5262f1c585c40fc29dc68f17687a9a918f3e90faba5303d62 +LINUX_VERSION-5.15 = .131 +LINUX_KERNEL_HASH-5.15.131 = 997c3391f439fb6fe32f1938fe089a046b840a5cde9a2215b6745144f8b24c69 diff --git a/target/linux/generic/hack-5.15/204-module_strip.patch b/target/linux/generic/hack-5.15/204-module_strip.patch index 31bfe07c78..e650c1b184 100644 --- a/target/linux/generic/hack-5.15/204-module_strip.patch +++ b/target/linux/generic/hack-5.15/204-module_strip.patch @@ -120,7 +120,7 @@ Signed-off-by: Felix Fietkau #ifdef CONFIG_MODVERSIONS -@@ -3266,9 +3268,11 @@ static int setup_load_info(struct load_i +@@ -3274,9 +3276,11 @@ static int setup_load_info(struct load_i static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -133,7 +133,7 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -3289,6 +3293,7 @@ static int check_modinfo(struct module * +@@ -3297,6 +3301,7 @@ static int check_modinfo(struct module * mod->name); add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); } diff --git a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch index 4f1966db16..5c1dbd69d3 100644 --- a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch @@ -29,7 +29,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1179,6 +1181,11 @@ static const struct usb_device_id option +@@ -1180,6 +1182,11 @@ static const struct usb_device_id option .driver_info = ZLP }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, diff --git a/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch b/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch index 5dd0554edb..4f4d6c7509 100644 --- a/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch +++ b/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch @@ -19,7 +19,7 @@ Signed-off-by: Rafał Miłecki --- a/drivers/base/core.c +++ b/drivers/base/core.c -@@ -1561,7 +1561,7 @@ static void device_links_purge(struct de +@@ -1562,7 +1562,7 @@ static void device_links_purge(struct de #define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \ DL_FLAG_PM_RUNTIME) diff --git a/target/linux/ramips/patches-5.15/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch b/target/linux/ramips/patches-5.15/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch index 21538859a5..2896002ed1 100644 --- a/target/linux/ramips/patches-5.15/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch +++ b/target/linux/ramips/patches-5.15/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch @@ -25,7 +25,7 @@ Signed-off-by: John Crispin --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig -@@ -1092,3 +1092,5 @@ config MMC_OWL +@@ -1093,3 +1093,5 @@ config MMC_OWL config MMC_SDHCI_EXTERNAL_DMA bool From 907e9e0bd3df456b32921893cf6ef1b54117d983 Mon Sep 17 00:00:00 2001 From: Patricia Lee Date: Wed, 30 Aug 2023 19:50:54 +0800 Subject: [PATCH 11/17] mediatek: add support for Cetron CT3003 **Hardware specification:** - SoC: MediaTek MT7981B 2x A53 - Flash: ESMT F50L1G41LB 128MB - RAM: Nanya NT5CC128M16JR-EK 256MB - Ethernet: 4 x 10/100/1000 Mbps - Switch: MediaTek MT7531AE - WiFi: MediaTek MT7976C - Button: Reset, Mesh - Power: DC 12V 1A - UART: 3.3v, 115200n8 | Layout: | | :-------- | | | | VCC | | GND | | Tx | | Rx | **Flash instructions:** 1. Rename `openwrt-mediatek-filogic-cetron_ct3003-squashfs-factory.bin` to `factory.bin`. 2. Upload the `factory.bin` using the device's Web interface. 3. Click the upgrade button and wait for the process to finish. 4. Access the OpenWrt interface using the same password. 5. Use the 'Restore' function to reset the firmware to its initial state. **Notes:** If you plan to recovery the stock firmware in the future, it's advisable to connect the device via the serial port and enter failsafe mode to back up all the MTD partitions before proceeding the steps above. Signed-off-by: Patricia Lee --- .../uboot-envtools/files/mediatek_filogic | 1 + .../mediatek/dts/mt7981b-cetron-ct3003.dts | 242 ++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 6 + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 + target/linux/mediatek/image/filogic.mk | 32 +++ 5 files changed, 286 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index b0810184e5..d7d6bbf05c 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -44,6 +44,7 @@ mercusys,mr90x-v1) local envdev=/dev/mtd$(find_mtd_index "u-boot-env") ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1" ;; +cetron,ct3003|\ netgear,wax220) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" ;; diff --git a/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts new file mode 100644 index 0000000000..d39083ffb0 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts @@ -0,0 +1,242 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include + +#include "mt7981.dtsi" + +/ { + model = "Cetron CT3003"; + compatible = "cetron,ct3003", "mediatek,mt7981"; + + aliases { + serial0 = &uart0; + led-boot = &led_status_red; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_green; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: led_status_red { + label = "red:status"; + gpios = <&pio 3 GPIO_ACTIVE_LOW>; + }; + + led_status_green: led_status_green { + label = "green:status"; + gpios = <&pio 7 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; +}; + +&mdio_bus { + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand@0 { + compatible = "spi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partition@0 { + label = "BL2"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + partition@180000 { + label = "art"; + reg = <0x0180000 0x0100000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + }; + + factory: partition@280000 { + label = "Factory"; + reg = <0x0280000 0x0100000>; + read-only; + }; + + partition@380000 { + label = "FIP"; + reg = <0x0380000 0x0200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x0580000 0x2000000>; + }; + + partition@2580000 { + label = "ubi_backup"; + reg = <0x2580000 0x2000000>; + }; + + partition@4580000 { + label = "Config_backup"; + reg = <0x4580000 0x0400000>; + }; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index e5872e7fe4..680bee604f 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -42,6 +42,7 @@ mediatek_setup_interfaces() mercusys,mr90x-v1) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2" eth1 ;; + cetron,ct3003|\ qihoo,360t7) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan ;; @@ -82,6 +83,11 @@ mediatek_setup_macs() bananapi,bpi-r3) wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1) ;; + cetron,ct3003) + lan_mac=$(mtd_get_mac_binary "art" 0) + wan_mac=$(macaddr_add "$lan_mac" 3) + label_mac=$lan_mac + ;; h3c,magic-nx30-pro) wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr) lan_mac=$(macaddr_add "$wan_mac" 1) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index ebf76640c8..ea85939068 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -30,6 +30,11 @@ case "$board" in [ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress ;; + cetron,ct3003) + addr=$(mtd_get_mac_binary "art" 0) + [ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress + ;; cudy,wr3000-v1) addr=$(mtd_get_mac_binary bdinfo 0xde00) # Originally, phy0 is phy1 mac with LA bit set. However, this would conflict diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index a799c7b5ee..571815249f 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -90,6 +90,21 @@ define Build/zyxel-nwa-fit-filogic @mv $@.new $@ endef +define Build/cetron-header + $(eval magic=$(word 1,$(1))) + $(eval model=$(word 2,$(1))) + ( \ + dd if=/dev/zero bs=856 count=1 2>/dev/null; \ + printf "$(model)," | dd bs=128 count=1 conv=sync 2>/dev/null; \ + md5sum $@ | cut -f1 -d" " | dd bs=32 count=1 2>/dev/null; \ + printf "$(magic)" | dd bs=4 count=1 conv=sync 2>/dev/null; \ + cat $@; \ + ) > $@.tmp + fw_crc=$$(gzip -c $@.tmp | tail -c 8 | od -An -N4 -tx4 --endian little | tr -d ' \n'); \ + printf "$$(echo $$fw_crc | sed 's/../\\x&/g')" | cat - $@.tmp > $@ + rm $@.tmp +endef + define Device/asus_tuf-ax4200 DEVICE_VENDOR := ASUS DEVICE_MODEL := TUF-AX4200 @@ -172,6 +187,23 @@ define Device/bananapi_bpi-r3 endef TARGET_DEVICES += bananapi_bpi-r3 +define Device/cetron_ct3003 + DEVICE_VENDOR := Cetron + DEVICE_MODEL := CT3003 + DEVICE_DTS := mt7981b-cetron-ct3003 + DEVICE_DTS_DIR := ../dts + SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_IN_UBI := 1 + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + IMAGES += factory.bin + IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | cetron-header rd30 CT3003 +endef +TARGET_DEVICES += cetron_ct3003 + define Device/cudy_wr3000-v1 DEVICE_VENDOR := Cudy DEVICE_MODEL := WR3000 From 8e0d43d569e934888b1aaea3908c982c0adccac0 Mon Sep 17 00:00:00 2001 From: Tomasz Maciej Nowak Date: Thu, 7 Sep 2023 17:06:28 +0200 Subject: [PATCH 12/17] mvebu: refresh 6.1 configs This should be a part of kernel major bump. Fortunately it didn't stall compilation, so no fixes tag. Signed-off-by: Tomasz Maciej Nowak --- target/linux/mvebu/config-6.1 | 26 ++++++++++++++++++------- target/linux/mvebu/cortexa53/config-6.1 | 10 +++++++++- target/linux/mvebu/cortexa72/config-6.1 | 11 +++++++++-- target/linux/mvebu/cortexa9/config-6.1 | 5 +++++ 4 files changed, 42 insertions(+), 10 deletions(-) diff --git a/target/linux/mvebu/config-6.1 b/target/linux/mvebu/config-6.1 index 0811ee6d4c..88e5fff4d9 100644 --- a/target/linux/mvebu/config-6.1 +++ b/target/linux/mvebu/config-6.1 @@ -29,13 +29,11 @@ CONFIG_ARM_ATAG_DTB_COMPAT=y # CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y CONFIG_ARM_ERRATA_720789=y CONFIG_ARM_ERRATA_764369=y CONFIG_ARM_GIC=y CONFIG_ARM_GLOBAL_TIMER=y CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1 -CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_ARM_HEAVY_MB=y CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_L1_CACHE_SHIFT_6=y @@ -58,11 +56,17 @@ CONFIG_BLK_MQ_PCI=y CONFIG_BOUNCE=y # CONFIG_CACHE_FEROCEON_L2 is not set CONFIG_CACHE_L2X0=y +CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y CONFIG_CLKSRC_MMIO=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_CPU_32v6K=y @@ -111,7 +115,10 @@ CONFIG_CRYPTO_DEV_MARVELL_CESA=y CONFIG_CRYPTO_ESSIV=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y @@ -133,18 +140,17 @@ CONFIG_DEBUG_UART_8250=y CONFIG_DEBUG_UART_8250_SHIFT=2 CONFIG_DEBUG_UART_PHYS=0xd0012000 CONFIG_DEBUG_UART_VIRT=0xfec12000 -CONFIG_DEBUG_UNCOMPRESS=y CONFIG_DEBUG_USER=y CONFIG_DMADEVICES=y CONFIG_DMA_ENGINE=y CONFIG_DMA_ENGINE_RAID=y CONFIG_DMA_OF=y CONFIG_DMA_OPS=y -CONFIG_DMA_REMAP=y CONFIG_DTC=y CONFIG_EARLY_PRINTK=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_EXT4_FS=y CONFIG_EXTCON=y CONFIG_F2FS_FS=y @@ -154,6 +160,8 @@ CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_GENERIC_BUG=y @@ -182,7 +190,6 @@ CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_VDSO_32=y CONFIG_GLOB=y -CONFIG_GPIOLIB=y CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_CDEV=y CONFIG_GPIO_GENERIC=y @@ -191,7 +198,6 @@ CONFIG_GPIO_MVEBU=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y @@ -315,6 +321,9 @@ CONFIG_OUTER_CACHE_SYNC=y CONFIG_PADATA=y CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PCI=y CONFIG_PCI_BRIDGE_EMUL=y CONFIG_PCI_DOMAINS=y @@ -330,7 +339,6 @@ CONFIG_PHYLINK=y # CONFIG_PHY_MVEBU_A3700_UTMI is not set # CONFIG_PHY_MVEBU_A38X_COMPHY is not set # CONFIG_PHY_MVEBU_CP110_COMPHY is not set -# CONFIG_PHY_MVEBU_CP110_UTMI is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_38X=y @@ -343,9 +351,11 @@ CONFIG_PLAT_ORION=y CONFIG_PM_OPP=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO=y +CONFIG_PREEMPT_NONE_BUILD=y CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_PWM=y CONFIG_PWM_SYSFS=y +CONFIG_RANDSTRUCT_NONE=y CONFIG_RATIONAL=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y @@ -381,6 +391,7 @@ CONFIG_SMP=y CONFIG_SMP_ON_UP=y CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_SOC_BUS=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_SPARSE_IRQ=y CONFIG_SPI=y # CONFIG_SPI_ARMADA_3700 is not set @@ -431,5 +442,6 @@ CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/mvebu/cortexa53/config-6.1 b/target/linux/mvebu/cortexa53/config-6.1 index 27d410f68b..3534537b54 100644 --- a/target/linux/mvebu/cortexa53/config-6.1 +++ b/target/linux/mvebu/cortexa53/config-6.1 @@ -1,4 +1,6 @@ CONFIG_64BIT=y +CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y CONFIG_ARCH_MMAP_RND_BITS=18 @@ -8,6 +10,7 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ARCH_STACKWALK=y CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_ARM64=y CONFIG_ARM64_4K_PAGES=y CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y @@ -35,13 +38,15 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y # CONFIG_ARM_PL172_MPMC is not set CONFIG_ARM_PSCI_FW=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_FRAME_POINTER=y +CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_PINCONF=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_MAILBOX=y @@ -61,9 +66,11 @@ CONFIG_PGTABLE_LEVELS=3 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_MVEBU_A3700_COMPHY=y CONFIG_PHY_MVEBU_A3700_UTMI=y +CONFIG_PINCTRL_AC5=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_PINCTRL_ARMADA_AP806=y CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POWER_SUPPLY=y CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y @@ -77,6 +84,7 @@ CONFIG_SPI_ARMADA_3700=y CONFIG_SWIOTLB=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_TURRIS_MOX_RWTM=y CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_VMAP_STACK=y diff --git a/target/linux/mvebu/cortexa72/config-6.1 b/target/linux/mvebu/cortexa72/config-6.1 index cb27e0285f..5a3dcc66f7 100644 --- a/target/linux/mvebu/cortexa72/config-6.1 +++ b/target/linux/mvebu/cortexa72/config-6.1 @@ -1,5 +1,7 @@ CONFIG_64BIT=y CONFIG_AQUANTIA_PHY=y +CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y CONFIG_ARCH_MMAP_RND_BITS=18 @@ -9,10 +11,10 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ARCH_STACKWALK=y CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_ARM64=y CONFIG_ARM64_4K_PAGES=y CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1742098=y CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_PA_BITS=48 CONFIG_ARM64_PA_BITS_48=y @@ -36,13 +38,15 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y # CONFIG_ARM_PL172_MPMC is not set CONFIG_ARM_PSCI_FW=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_FRAME_POINTER=y +CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_PINCONF=y CONFIG_HW_RANDOM_OMAP=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 @@ -72,9 +76,11 @@ CONFIG_PCIE_DW_HOST=y CONFIG_PGTABLE_LEVELS=3 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_MVEBU_CP110_COMPHY=y +CONFIG_PINCTRL_AC5=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_PINCTRL_ARMADA_AP806=y CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POWER_SUPPLY=y CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y @@ -92,6 +98,7 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SWIOTLB=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_VMAP_STACK=y CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa9/config-6.1 b/target/linux/mvebu/cortexa9/config-6.1 index 88a2f14c02..b78c734fad 100644 --- a/target/linux/mvebu/cortexa9/config-6.1 +++ b/target/linux/mvebu/cortexa9/config-6.1 @@ -1,3 +1,8 @@ +CONFIG_ARM_HAS_GROUP_RELOCS=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CURRENT_POINTER_IN_TPIDRURO=y +CONFIG_IRQSTACKS=y CONFIG_LED_TRIGGER_PHY=y CONFIG_PHY_MVEBU_A38X_COMPHY=y CONFIG_RTC_DRV_MV=y +CONFIG_THREAD_INFO_IN_TASK=y From eac192843030d16046a0d603284c2b4c89822431 Mon Sep 17 00:00:00 2001 From: Tomasz Maciej Nowak Date: Thu, 7 Sep 2023 17:06:29 +0200 Subject: [PATCH 13/17] mvebu: cortexa72: enable USB PHY Since kernel 5.13 this is needed to enable USB ports on all devices in subtarget. Previously TF-A and COMPHY driver might have set up this PHY, but not anymore. Signed-off-by: Tomasz Maciej Nowak Tested-by: Robert Marko --- target/linux/mvebu/cortexa72/config-5.15 | 1 + target/linux/mvebu/cortexa72/config-6.1 | 1 + 2 files changed, 2 insertions(+) diff --git a/target/linux/mvebu/cortexa72/config-5.15 b/target/linux/mvebu/cortexa72/config-5.15 index cb27e0285f..978208f1cb 100644 --- a/target/linux/mvebu/cortexa72/config-5.15 +++ b/target/linux/mvebu/cortexa72/config-5.15 @@ -72,6 +72,7 @@ CONFIG_PCIE_DW_HOST=y CONFIG_PGTABLE_LEVELS=3 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_MVEBU_CP110_COMPHY=y +CONFIG_PHY_MVEBU_CP110_UTMI=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_PINCTRL_ARMADA_AP806=y CONFIG_PINCTRL_ARMADA_CP110=y diff --git a/target/linux/mvebu/cortexa72/config-6.1 b/target/linux/mvebu/cortexa72/config-6.1 index 5a3dcc66f7..535b67225e 100644 --- a/target/linux/mvebu/cortexa72/config-6.1 +++ b/target/linux/mvebu/cortexa72/config-6.1 @@ -76,6 +76,7 @@ CONFIG_PCIE_DW_HOST=y CONFIG_PGTABLE_LEVELS=3 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_MVEBU_CP110_COMPHY=y +CONFIG_PHY_MVEBU_CP110_UTMI=y CONFIG_PINCTRL_AC5=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_PINCTRL_ARMADA_AP806=y From 5294b358aa1ab2015e151f4caabdb4dcccf62190 Mon Sep 17 00:00:00 2001 From: John Audia Date: Thu, 7 Sep 2023 06:07:43 -0400 Subject: [PATCH 14/17] kernel: bump 6.1 to 6.1.52 Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.52 All patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia --- include/kernel-6.1 | 4 ++-- target/linux/generic/hack-6.1/204-module_strip.patch | 4 ++-- .../generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 16e40238b5..cc106e2572 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .51 -LINUX_KERNEL_HASH-6.1.51 = 58b0446d8ea4bc0b26a35e2e3509bd53efcdeb295c9e4f48d33a23b1cdaa103b +LINUX_VERSION-6.1 = .52 +LINUX_KERNEL_HASH-6.1.52 = 567737990dbc9265966a0786392821a9fa559fd346494fd1eff050dbeb383a52 diff --git a/target/linux/generic/hack-6.1/204-module_strip.patch b/target/linux/generic/hack-6.1/204-module_strip.patch index 71ee62ece8..bd168649f2 100644 --- a/target/linux/generic/hack-6.1/204-module_strip.patch +++ b/target/linux/generic/hack-6.1/204-module_strip.patch @@ -118,7 +118,7 @@ Signed-off-by: Felix Fietkau static char *get_modinfo(const struct load_info *info, const char *tag); static char *get_next_modinfo(const struct load_info *info, const char *tag, -@@ -1950,9 +1952,11 @@ static int setup_load_info(struct load_i +@@ -1958,9 +1960,11 @@ static int setup_load_info(struct load_i static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -131,7 +131,7 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -1973,6 +1977,7 @@ static int check_modinfo(struct module * +@@ -1981,6 +1985,7 @@ static int check_modinfo(struct module * mod->name); add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); } diff --git a/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch index 9ec5b539d3..a68562d095 100644 --- a/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch @@ -29,7 +29,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1179,6 +1181,11 @@ static const struct usb_device_id option +@@ -1180,6 +1182,11 @@ static const struct usb_device_id option .driver_info = ZLP }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, From 7f54d9ba1aa9796e218b554633a4e05906a9ac7f Mon Sep 17 00:00:00 2001 From: David Bauer Date: Sat, 9 Sep 2023 08:42:04 +0200 Subject: [PATCH 15/17] Revert "ath79: use kernel 6.1 as default" This reverts commit c94383de018c561355c5e239524fbefca4aee3aa. THis commit was not meant to be pushed to main yet. Signed-off-by: David Bauer --- target/linux/ath79/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ath79/Makefile b/target/linux/ath79/Makefile index 0a54fc59c6..f7bb31c4ad 100644 --- a/target/linux/ath79/Makefile +++ b/target/linux/ath79/Makefile @@ -8,7 +8,7 @@ SUBTARGETS:=generic mikrotik nand tiny FEATURES:=ramdisk squashfs usbgadget -KERNEL_PATCHVER:=6.1 +KERNEL_PATCHVER:=5.15 KERNEL_TESTING_PATCHVER:=6.1 include $(INCLUDE_DIR)/target.mk From 9725524235b30b436f6430d70cd809abf1b48a91 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sat, 2 Sep 2023 00:54:40 +0100 Subject: [PATCH 16/17] uboot-mediatek: sync mtk-snand driver with SDK Sync SPI-NAND/ECC controller driver for MT7622, MT7981, MT7986 and MT7988: * Platform data for MT7981 was actually missing and is now added. * Add support for Winbond W25N01KV 1Gbit chip. Signed-off-by: Daniel Golle --- ...support-for-MediaTek-SPI-NAND-flash-.patch | 32 +++++++++++++++---- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch b/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch index 311c051344..05138d984e 100644 --- a/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch +++ b/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch @@ -17,14 +17,14 @@ Signed-off-by: Weijie Gao drivers/mtd/mtk-snand/Kconfig | 21 + drivers/mtd/mtk-snand/Makefile | 11 + drivers/mtd/mtk-snand/mtk-snand-def.h | 271 ++++ - drivers/mtd/mtk-snand/mtk-snand-ecc.c | 395 +++++ - drivers/mtd/mtk-snand/mtk-snand-ids.c | 511 +++++++ + drivers/mtd/mtk-snand/mtk-snand-ecc.c | 411 ++++++ + drivers/mtd/mtk-snand/mtk-snand-ids.c | 515 +++++++ drivers/mtd/mtk-snand/mtk-snand-mtd.c | 535 +++++++ drivers/mtd/mtk-snand/mtk-snand-os.c | 39 + drivers/mtd/mtk-snand/mtk-snand-os.h | 120 ++ drivers/mtd/mtk-snand/mtk-snand.c | 1933 +++++++++++++++++++++++++ drivers/mtd/mtk-snand/mtk-snand.h | 77 + - 12 files changed, 3917 insertions(+) + 12 files changed, 3937 insertions(+) create mode 100644 drivers/mtd/mtk-snand/Kconfig create mode 100644 drivers/mtd/mtk-snand/Makefile create mode 100644 drivers/mtd/mtk-snand/mtk-snand-def.h @@ -369,7 +369,7 @@ Signed-off-by: Weijie Gao +#endif /* _MTK_SNAND_DEF_H_ */ --- /dev/null +++ b/drivers/mtd/mtk-snand/mtk-snand-ecc.c -@@ -0,0 +1,395 @@ +@@ -0,0 +1,411 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved. @@ -418,6 +418,10 @@ Signed-off-by: Weijie Gao + +static const uint8_t mt7622_ecc_caps[] = { 4, 6, 8, 10, 12 }; + ++static const uint8_t mt7981_ecc_caps[] = { ++ 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 ++}; ++ +static const uint8_t mt7986_ecc_caps[] = { + 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 +}; @@ -426,6 +430,10 @@ Signed-off-by: Weijie Gao + [ECC_DECDONE] = 0x11c, +}; + ++static const uint32_t mt7981_ecc_regs[] = { ++ [ECC_DECDONE] = 0x124, ++}; ++ +static const uint32_t mt7986_ecc_regs[] = { + [ECC_DECDONE] = 0x124, +}; @@ -447,6 +455,14 @@ Signed-off-by: Weijie Gao + .errnum_bits = 5, + .errnum_shift = 5, + }, ++ [SNAND_SOC_MT7981] = { ++ .ecc_caps = mt7981_ecc_caps, ++ .num_ecc_cap = ARRAY_SIZE(mt7981_ecc_caps), ++ .regs = mt7981_ecc_regs, ++ .mode_shift = 5, ++ .errnum_bits = 5, ++ .errnum_shift = 8, ++ }, + [SNAND_SOC_MT7986] = { + .ecc_caps = mt7986_ecc_caps, + .num_ecc_cap = ARRAY_SIZE(mt7986_ecc_caps), @@ -767,7 +783,7 @@ Signed-off-by: Weijie Gao +} --- /dev/null +++ b/drivers/mtd/mtk-snand/mtk-snand-ids.c -@@ -0,0 +1,511 @@ +@@ -0,0 +1,515 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved. @@ -860,6 +876,10 @@ Signed-off-by: Weijie Gao + &snand_cap_read_from_cache_quad, + &snand_cap_program_load_x4, + mtk_snand_winbond_select_die), ++ SNAND_INFO("W25N01KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xae, 0x21), ++ SNAND_MEMORG_1G_2K_64, ++ &snand_cap_read_from_cache_quad, ++ &snand_cap_program_load_x4), + SNAND_INFO("W25N02KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x22), + SNAND_MEMORG_2G_2K_128, + &snand_cap_read_from_cache_quad, @@ -903,7 +923,7 @@ Signed-off-by: Weijie Gao + &snand_cap_program_load_x4), + SNAND_INFO("GD5F2GQ5UExxG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0x52), + SNAND_MEMORG_2G_2K_128, -+ &snand_cap_read_from_cache_quad_q2d, ++ &snand_cap_read_from_cache_quad_a8d, + &snand_cap_program_load_x4), + SNAND_INFO("GD5F4GQ4UCxIG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0xb4), + SNAND_MEMORG_4G_4K_256, From 948ad2ec7a21645bac4d523c8f31d1cc3e2eac71 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 10 Sep 2023 23:39:33 +0100 Subject: [PATCH 17/17] arm-trusted-firmware-mediatek: fix hang on reboot on MT7622 With recent updates of TF-A the previously already fixed bug slipped back into the source tree. Again, reorder bl2 init for MT7622 and initialize WDT only after DRAM init has completed to avoid the notorious hang. Signed-off-by: Daniel Golle --- .../arm-trusted-firmware-mediatek/Makefile | 2 +- ...mt7622-move-wdt-init-after-dram-init.patch | 28 +++++++++++++++++++ 2 files changed, 29 insertions(+), 1 deletion(-) create mode 100644 package/boot/arm-trusted-firmware-mediatek/patches/002-mt7622-move-wdt-init-after-dram-init.patch diff --git a/package/boot/arm-trusted-firmware-mediatek/Makefile b/package/boot/arm-trusted-firmware-mediatek/Makefile index 853049cfb0..718ebf99e0 100644 --- a/package/boot/arm-trusted-firmware-mediatek/Makefile +++ b/package/boot/arm-trusted-firmware-mediatek/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=arm-trusted-firmware-mediatek -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/002-mt7622-move-wdt-init-after-dram-init.patch b/package/boot/arm-trusted-firmware-mediatek/patches/002-mt7622-move-wdt-init-after-dram-init.patch new file mode 100644 index 0000000000..4a4d252beb --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/002-mt7622-move-wdt-init-after-dram-init.patch @@ -0,0 +1,28 @@ +From 9e8cb08bc64530e7511b86a131cfad1ae0199586 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Sun, 10 Sep 2023 23:35:47 +0100 +Subject: [PATCH] mt7622: move wdt init after dram init + +resolves hang on reboot +--- + plat/mediatek/mt7622/bl2/bl2_plat_init.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/plat/mediatek/mt7622/bl2/bl2_plat_init.c ++++ b/plat/mediatek/mt7622/bl2/bl2_plat_init.c +@@ -40,7 +40,6 @@ bool plat_is_my_cpu_primary(void) + const struct initcall bl2_initcalls[] = { + INITCALL(plat_mt_cpuxgpt_init), + INITCALL(generic_delay_timer_init), +- INITCALL(mtk_wdt_init), + INITCALL(mtk_print_cpu), + INITCALL(mtk_pin_init), + #ifndef IMAGE_BL2PL +@@ -49,6 +48,7 @@ const struct initcall bl2_initcalls[] = + INITCALL(mtk_pwrap_init), + INITCALL(mtk_pmic_init), + INITCALL(mtk_mem_init), ++ INITCALL(mtk_wdt_init), + + INITCALL(NULL) + };