diff --git a/config/Config-build.in b/config/Config-build.in index a028ebfbc3..9bef36e53e 100644 --- a/config/Config-build.in +++ b/config/Config-build.in @@ -376,7 +376,7 @@ menu "Global build settings" bool "Enable SECCOMP" select KERNEL_SECCOMP select PACKAGE_procd-seccomp - depends on (aarch64 || arm || armeb || mips || mipsel || i386 || powerpc || x86_64) + depends on (aarch64 || arm || armeb || mips || mipsel || mips64 || mips64el || i386 || powerpc || x86_64) depends on !TARGET_uml default y help diff --git a/include/bpf.mk b/include/bpf.mk index 9636ad5165..c68ad74554 100644 --- a/include/bpf.mk +++ b/include/bpf.mk @@ -1,6 +1,7 @@ BPF_DEPENDS := @HAS_BPF_TOOLCHAIN +LLVM_VER:= -ifneq ($(CONFIG_BPF_TOOLCHAIN_HOST),) +ifneq ($(CONFIG_USE_LLVM_HOST),) BPF_TOOLCHAIN_HOST_PATH:=$(call qstrip,$(CONFIG_BPF_TOOLCHAIN_HOST_PATH)) ifneq ($(BPF_TOOLCHAIN_HOST_PATH),) BPF_PATH:=$(BPF_TOOLCHAIN_HOST_PATH)/bin:$(PATH) @@ -9,9 +10,12 @@ ifneq ($(CONFIG_BPF_TOOLCHAIN_HOST),) endif CLANG:=$(firstword $(shell PATH='$(BPF_PATH)' which clang clang-13 clang-12 clang-11)) LLVM_VER:=$(subst clang,,$(notdir $(CLANG))) -else - CLANG:=$(STAGING_DIR_HOST)/bin/clang - LLVM_VER:= +endif +ifneq ($(CONFIG_USE_LLVM_PREBUILT),) + CLANG:=$(TOPDIR)/llvm-bpf/bin/clang +endif +ifneq ($(CONFIG_USE_LLVM_BUILD),) + CLANG:=$(STAGING_DIR_HOST)/llvm-bpf/bin/clang endif LLVM_PATH:=$(dir $(CLANG)) diff --git a/include/cmake.mk b/include/cmake.mk index 3318468c90..b9a7e36dee 100644 --- a/include/cmake.mk +++ b/include/cmake.mk @@ -52,6 +52,7 @@ CMAKE_RANLIB:=$(call cmake_tool,$(TARGET_RANLIB)) CMAKE_FIND_ROOT_PATH:=$(STAGING_DIR)/usr;$(TOOLCHAIN_DIR)$(if $(CONFIG_EXTERNAL_TOOLCHAIN),;$(CONFIG_TOOLCHAIN_ROOT)) CMAKE_HOST_FIND_ROOT_PATH:=$(STAGING_DIR)/host;$(STAGING_DIR_HOSTPKG);$(STAGING_DIR_HOST) CMAKE_SHARED_LDFLAGS:=-Wl,-Bsymbolic-functions +CMAKE_HOST_INSTALL_PREFIX = $(HOST_BUILD_PREFIX) ifeq ($(HOST_USE_NINJA),1) CMAKE_HOST_OPTIONS += -DCMAKE_GENERATOR="Ninja" @@ -157,7 +158,7 @@ define Host/Configure/Default -DCMAKE_FIND_ROOT_PATH_MODE_LIBRARY=ONLY \ -DCMAKE_FIND_ROOT_PATH_MODE_INCLUDE=ONLY \ -DCMAKE_STRIP=: \ - -DCMAKE_INSTALL_PREFIX=$(HOST_BUILD_PREFIX) \ + -DCMAKE_INSTALL_PREFIX=$(CMAKE_HOST_INSTALL_PREFIX) \ -DCMAKE_PREFIX_PATH=$(HOST_BUILD_PREFIX) \ -DCMAKE_SKIP_RPATH=TRUE \ -DCMAKE_INSTALL_LIBDIR=lib \ diff --git a/include/host-build.mk b/include/host-build.mk index cfa29419aa..b68c8c4536 100644 --- a/include/host-build.mk +++ b/include/host-build.mk @@ -205,5 +205,5 @@ endif define HostBuild $(HostBuild/Core) - $(if $(if $(PKG_HOST_ONLY),,$(STAMP_PREPARED)),,$(if $(strip $(PKG_SOURCE_URL)),$(call Download,default))) + $(if $(if $(PKG_HOST_ONLY),,$(if $(and $(filter host-%,$(MAKECMDGOALS)),$(PKG_SKIP_DOWNLOAD)),,$(STAMP_PREPARED))),,$(if $(strip $(PKG_SOURCE_URL)),$(call Download,default))) endef diff --git a/include/package.mk b/include/package.mk index 55d9352072..509ef61e08 100644 --- a/include/package.mk +++ b/include/package.mk @@ -13,6 +13,7 @@ PKG_INSTALL_DIR ?= $(PKG_BUILD_DIR)/ipkg-install PKG_BUILD_PARALLEL ?= PKG_USE_MIPS16 ?= 1 PKG_IREMAP ?= 1 +PKG_SKIP_DOWNLOAD=$(USE_SOURCE_DIR)$(USE_GIT_TREE)$(USE_GIT_SRC_CHECKOUT) MAKE_J:=$(if $(MAKE_JOBSERVER),$(MAKE_JOBSERVER) $(if $(filter 3.% 4.0 4.1,$(MAKE_VERSION)),-j)) @@ -264,7 +265,7 @@ define Build/CoreTargets endef define Build/DefaultTargets - $(if $(USE_SOURCE_DIR)$(USE_GIT_TREE)$(USE_GIT_SRC_CHECKOUT),,$(if $(strip $(PKG_SOURCE_URL)),$(call Download,default))) + $(if $(PKG_SKIP_DOWNLOAD),,$(if $(strip $(PKG_SOURCE_URL)),$(call Download,default))) $(if $(DUMP),,$(Build/CoreTargets)) define Build/DefaultTargets diff --git a/include/subdir.mk b/include/subdir.mk index d33b947fdf..155f493538 100644 --- a/include/subdir.mk +++ b/include/subdir.mk @@ -27,7 +27,7 @@ lastdir=$(word $(words $(subst /, ,$(1))),$(subst /, ,$(1))) diralias=$(if $(findstring $(1),$(call lastdir,$(1))),,$(call lastdir,$(1))) subdir_make_opts = \ - -r -C $(1) \ + $(if $(SUBDIR_MAKE_DEBUG),-d) -r -C $(1) \ BUILD_SUBDIR="$(1)" \ BUILD_VARIANT="$(4)" \ ALL_VARIANTS="$(5)" diff --git a/package/boot/kobs-ng/Makefile b/package/boot/kobs-ng/Makefile index 3fa8302b8c..68e6ff170c 100644 --- a/package/boot/kobs-ng/Makefile +++ b/package/boot/kobs-ng/Makefile @@ -25,7 +25,7 @@ define Package/kobs-ng SECTION:=utils CATEGORY:=Utilities TITLE:=Application for writing bootstreams to NAND flash - DEPENDS:=@TARGET_imx6 + DEPENDS:=@TARGET_imx endef define Package/kobs-ng/description diff --git a/package/boot/uboot-envtools/files/imx6 b/package/boot/uboot-envtools/files/imx_cortexa9 similarity index 98% rename from package/boot/uboot-envtools/files/imx6 rename to package/boot/uboot-envtools/files/imx_cortexa9 index dac3c3792e..c6d6d94d16 100644 --- a/package/boot/uboot-envtools/files/imx6 +++ b/package/boot/uboot-envtools/files/imx_cortexa9 @@ -6,7 +6,7 @@ touch /etc/config/ubootenv -. /lib/imx6.sh +. /lib/imx.sh . /lib/uboot-envtools.sh . /lib/functions.sh diff --git a/package/boot/uboot-imx6/Makefile b/package/boot/uboot-imx/Makefile similarity index 92% rename from package/boot/uboot-imx6/Makefile rename to package/boot/uboot-imx/Makefile index 6c2297dd81..2faa48bd73 100644 --- a/package/boot/uboot-imx6/Makefile +++ b/package/boot/uboot-imx/Makefile @@ -16,7 +16,7 @@ include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk define U-Boot/Default - BUILD_TARGET:=imx6 + BUILD_TARGET:=imx UBOOT_IMAGE:=u-boot.imx endef @@ -24,6 +24,7 @@ define U-Boot/apalis_imx6 NAME:=Toradex Apalis UBOOT_IMAGE:=SPL u-boot.img u-boot-with-spl.imx UBOOT_MAKE_FLAGS:=SPL u-boot.img u-boot-with-spl.imx + BUILD_SUBTARGET:=cortexa9 BUILD_DEVICES:=toradex_apalis endef @@ -31,11 +32,13 @@ define U-Boot/mx6cuboxi NAME:=SolidRun Cubox-i boards UBOOT_IMAGE:=SPL u-boot.img UBOOT_MAKE_FLAGS:=SPL u-boot.img + BUILD_SUBTARGET:=cortexa9 BUILD_DEVICES:=solidrun_cubox-i endef define U-Boot/wandboard NAME:=Wandboard Dual Lite/Quad/Solo + BUILD_SUBTARGET:=cortexa9 BUILD_DEVICES:=wandboard_dual endef diff --git a/package/boot/uboot-imx6/patches/0001-apalis_imx6_defconfig-enable-some-useful-commands.patch b/package/boot/uboot-imx/patches/0001-apalis_imx6_defconfig-enable-some-useful-commands.patch similarity index 100% rename from package/boot/uboot-imx6/patches/0001-apalis_imx6_defconfig-enable-some-useful-commands.patch rename to package/boot/uboot-imx/patches/0001-apalis_imx6_defconfig-enable-some-useful-commands.patch diff --git a/package/boot/uboot-imx6/patches/110-mx6cuboxi-mmc-fallback.patch b/package/boot/uboot-imx/patches/110-mx6cuboxi-mmc-fallback.patch similarity index 100% rename from package/boot/uboot-imx6/patches/110-mx6cuboxi-mmc-fallback.patch rename to package/boot/uboot-imx/patches/110-mx6cuboxi-mmc-fallback.patch diff --git a/package/boot/uboot-imx6/patches/111-mx6cuboxi_defconfig-force-mmc-boot.patch b/package/boot/uboot-imx/patches/111-mx6cuboxi_defconfig-force-mmc-boot.patch similarity index 100% rename from package/boot/uboot-imx6/patches/111-mx6cuboxi_defconfig-force-mmc-boot.patch rename to package/boot/uboot-imx/patches/111-mx6cuboxi_defconfig-force-mmc-boot.patch diff --git a/package/devel/binutils/Makefile b/package/devel/binutils/Makefile index ca1099349c..5fdb83036e 100644 --- a/package/devel/binutils/Makefile +++ b/package/devel/binutils/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=binutils -PKG_VERSION:=2.35.2 +PKG_VERSION:=2.37 PKG_RELEASE:=1 PKG_SOURCE_URL:=@GNU/binutils PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_VERSION:=$(PKG_VERSION) -PKG_HASH:=dcd5b0416e7b0a9b24bed76cd8c6c132526805761863150a26d016415b8bdc7b +PKG_HASH:=820d9724f020a3e69cb337893a0b63c2db161dadcb0e06fc11dc29eb1e84a32c PKG_FIXUP:=autoreconf PKG_LIBTOOL_PATHS:=. gas bfd opcodes gprof binutils ld libiberty gold intl diff --git a/package/devel/gdb/Makefile b/package/devel/gdb/Makefile index a357996991..9e20644b04 100644 --- a/package/devel/gdb/Makefile +++ b/package/devel/gdb/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=gdb -PKG_VERSION:=10.2 +PKG_VERSION:=11.1 PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@GNU/gdb -PKG_HASH:=aaa1223d534c9b700a8bec952d9748ee1977513f178727e1bee520ee000b4f29 +PKG_HASH:=cccfcc407b20d343fb320d4a9a2110776dd3165118ffd41f4b1b162340333f94 PKG_BUILD_PARALLEL:=1 PKG_INSTALL:=1 @@ -26,7 +26,7 @@ include $(INCLUDE_DIR)/nls.mk define Package/gdb/Default SECTION:=devel CATEGORY:=Development - DEPENDS:=+!USE_MUSL:libthread-db $(ICONV_DEPENDS) $(INTL_DEPENDS) + DEPENDS:=+!USE_MUSL:libthread-db $(ICONV_DEPENDS) $(INTL_DEPENDS) +libgmp URL:=https://www.gnu.org/software/gdb/ endef diff --git a/package/devel/gdb/patches/110-shared_libgcc.patch b/package/devel/gdb/patches/110-shared_libgcc.patch index de92a1f945..3979ccd26b 100644 --- a/package/devel/gdb/patches/110-shared_libgcc.patch +++ b/package/devel/gdb/patches/110-shared_libgcc.patch @@ -1,6 +1,6 @@ --- a/configure.ac +++ b/configure.ac -@@ -1302,13 +1302,13 @@ if test -z "$LD"; then +@@ -1300,13 +1300,13 @@ if test -z "$LD"; then fi fi @@ -17,7 +17,7 @@ AC_LANG_PUSH(C++) AC_LINK_IFELSE([AC_LANG_SOURCE([ #if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5) -@@ -1648,7 +1648,7 @@ AC_ARG_WITH(stage1-ldflags, +@@ -1705,7 +1705,7 @@ AC_ARG_WITH(stage1-ldflags, # trust that they are doing what they want. if test "$with_static_standard_libraries" = yes -a "$stage1_libs" = "" \ -a "$have_static_libs" = yes; then @@ -26,7 +26,7 @@ fi]) AC_SUBST(stage1_ldflags) -@@ -1677,7 +1677,7 @@ AC_ARG_WITH(boot-ldflags, +@@ -1734,7 +1734,7 @@ AC_ARG_WITH(boot-ldflags, # statically. But if the user explicitly specified the libraries to # use, trust that they are doing what they want. if test "$poststage1_libs" = ""; then @@ -37,7 +37,7 @@ --- a/configure +++ b/configure -@@ -5075,14 +5075,14 @@ if test -z "$LD"; then +@@ -5257,14 +5257,14 @@ if test -z "$LD"; then fi fi @@ -56,7 +56,7 @@ ac_ext=cpp ac_cpp='$CXXCPP $CPPFLAGS' ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' -@@ -5883,7 +5883,7 @@ else +@@ -6149,7 +6149,7 @@ else # trust that they are doing what they want. if test "$with_static_standard_libraries" = yes -a "$stage1_libs" = "" \ -a "$have_static_libs" = yes; then @@ -65,7 +65,7 @@ fi fi -@@ -5919,7 +5919,7 @@ else +@@ -6185,7 +6185,7 @@ else # statically. But if the user explicitly specified the libraries to # use, trust that they are doing what they want. if test "$poststage1_libs" = ""; then diff --git a/package/devel/gdb/patches/130-gdb-ctrl-c.patch b/package/devel/gdb/patches/130-gdb-ctrl-c.patch index 88b5de9d8c..72b7273434 100644 --- a/package/devel/gdb/patches/130-gdb-ctrl-c.patch +++ b/package/devel/gdb/patches/130-gdb-ctrl-c.patch @@ -24,7 +24,7 @@ Signed-off-by: Khem Raj --- a/gdbserver/linux-low.cc +++ b/gdbserver/linux-low.cc -@@ -5714,7 +5714,7 @@ linux_process_target::request_interrupt +@@ -5733,7 +5733,7 @@ linux_process_target::request_interrupt { /* Send a SIGINT to the process group. This acts just like the user typed a ^C on the controlling terminal. */ diff --git a/package/devel/strace/Makefile b/package/devel/strace/Makefile index 8c4a26b63b..527b3e01d8 100644 --- a/package/devel/strace/Makefile +++ b/package/devel/strace/Makefile @@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=strace -PKG_VERSION:=5.10 -PKG_RELEASE:=2 +PKG_VERSION:=5.14 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://strace.io/files/$(PKG_VERSION) -PKG_HASH:=fe3982ea4cd9aeb3b4ba35f6279f0b577a37175d3282be24b9a5537b56b8f01c +PKG_HASH:=901bee6db5e17debad4530dd9ffb4dc9a96c4a656edbe1c3141b7cb307b11e73 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=LGPL-2.1-or-later @@ -70,7 +70,8 @@ endef CONFIGURE_ARGS += \ --with-libdw=$(if $(CONFIG_STRACE_LIBDW),yes,no) \ --with-libunwind=$(if $(CONFIG_STRACE_LIBUNWIND),yes,no) \ - --enable-mpers=no + --enable-mpers=no \ + --without-libselinux MAKE_FLAGS := \ CCOPT="$(TARGET_CFLAGS)" diff --git a/package/devel/strace/patches/010-m4.patch b/package/devel/strace/patches/010-m4.patch index 478961ce26..32584e1180 100644 --- a/package/devel/strace/patches/010-m4.patch +++ b/package/devel/strace/patches/010-m4.patch @@ -1,10 +1,10 @@ --- a/Makefile.am +++ b/Makefile.am -@@ -408,7 +408,6 @@ strace_LDADD += $(libiberty_LIBS) - endif - endif +@@ -21,7 +21,6 @@ man_MANS = doc/strace.1 doc/strace-log-m + + ACLOCAL_AMFLAGS = -I m4 -I src/xlat -@CODE_COVERAGE_RULES@ CODE_COVERAGE_BRANCH_COVERAGE = 1 CODE_COVERAGE_GENHTML_OPTIONS = $(CODE_COVERAGE_GENHTML_OPTIONS_DEFAULT) \ - --prefix $(shell cd $(abs_top_srcdir)/.. && pwd || echo .) + --title "$(PACKAGE_NAME)-$(PACKAGE_VERSION)" \ diff --git a/package/devel/valgrind/Makefile b/package/devel/valgrind/Makefile index 829f37569e..e6ebff4b30 100644 --- a/package/devel/valgrind/Makefile +++ b/package/devel/valgrind/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=valgrind -PKG_VERSION:=3.16.1 +PKG_VERSION:=3.18.1 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=http://sourceware.org/pub/valgrind/ -PKG_HASH:=c91f3a2f7b02db0f3bc99479861656154d241d2fdb265614ba918cc6720a33ca +PKG_HASH:=00859aa13a772eddf7822225f4b46ee0d39afbe071d32778da4d99984081f7f5 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=GPL-2.0+ @@ -33,7 +33,7 @@ include $(INCLUDE_DIR)/kernel.mk define Package/valgrind SECTION:=devel CATEGORY:=Development - DEPENDS:=@mips||mipsel||i386||x86_64||powerpc||arm_v7||aarch64 +libpthread +librt + DEPENDS:=@mips||mipsel||mips64||mips64el||i386||x86_64||powerpc||arm_v7||aarch64 +libpthread +librt TITLE:=debugging and profiling tools for Linux URL:=http://www.valgrind.org endef diff --git a/package/devel/valgrind/patches/010-mips-Fix-new-syscall-numbers.patch b/package/devel/valgrind/patches/010-mips-Fix-new-syscall-numbers.patch new file mode 100644 index 0000000000..e84273c973 --- /dev/null +++ b/package/devel/valgrind/patches/010-mips-Fix-new-syscall-numbers.patch @@ -0,0 +1,131 @@ +From 86ab9452bd10f08dbfa22d94e1155838f6f9f2e0 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Sun, 31 Oct 2021 23:11:11 +0100 +Subject: [PATCH] mips: Fix new syscall numbers + +The MIPS32 and MIPS64 O32 ABI are adding 4000 to all syscall numbers. +The MIPS64 N64 ABI adds 5000 to each syscall and the MIPS64 N32 ABI adds +6000 to each syscall number. We can not sue the shared file for MIPS and +have to define this for each sycall separately. + +Without this change valgrind is not able to detect new syscalls like +clock_gettime64 correctly. + +Signed-off-by: Hauke Mehrtens +--- + include/pub_tool_vkiscnums_asm.h | 3 --- + include/vki/vki-scnums-mips32-linux.h | 36 +++++++++++++++++++++++++++ + include/vki/vki-scnums-mips64-linux.h | 32 ++++++++++++++++++++++++ + 3 files changed, 68 insertions(+), 3 deletions(-) + +--- a/include/pub_tool_vkiscnums_asm.h ++++ b/include/pub_tool_vkiscnums_asm.h +@@ -63,15 +63,12 @@ + # include "vki/vki-scnums-arm64-linux.h" + + #elif defined(VGP_mips32_linux) +-# include "vki/vki-scnums-shared-linux.h" +-# include "vki/vki-scnums-32bit-linux.h" + # include "vki/vki-scnums-mips32-linux.h" + + #elif defined(VGP_nanomips_linux) + # include "vki/vki-scnums-nanomips-linux.h" + + #elif defined(VGP_mips64_linux) +-# include "vki/vki-scnums-shared-linux.h" + # include "vki/vki-scnums-mips64-linux.h" + + #elif defined(VGP_x86_freebsd) || defined(VGP_amd64_freebsd) +--- a/include/vki/vki-scnums-mips32-linux.h ++++ b/include/vki/vki-scnums-mips32-linux.h +@@ -401,6 +401,42 @@ + #define __NR_pkey_free (__NR_Linux + 365) + #define __NR_statx (__NR_Linux + 366) + ++#define __NR_clock_gettime64 (__NR_Linux + 403) ++#define __NR_clock_settime64 (__NR_Linux + 404) ++#define __NR_clock_adjtime64 (__NR_Linux + 405) ++#define __NR_clock_getres_time64 (__NR_Linux + 406) ++#define __NR_clock_nanosleep_time64 (__NR_Linux + 407) ++#define __NR_timer_gettime64 (__NR_Linux + 408) ++#define __NR_timer_settime64 (__NR_Linux + 409) ++#define __NR_timerfd_gettime64 (__NR_Linux + 410) ++#define __NR_timerfd_settime64 (__NR_Linux + 411) ++#define __NR_utimensat_time64 (__NR_Linux + 412) ++#define __NR_pselect6_time64 (__NR_Linux + 413) ++#define __NR_ppoll_time64 (__NR_Linux + 414) ++#define __NR_io_pgetevents_time64 (__NR_Linux + 416) ++#define __NR_recvmmsg_time64 (__NR_Linux + 417) ++#define __NR_mq_timedsend_time64 (__NR_Linux + 418) ++#define __NR_mq_timedreceive_time64 (__NR_Linux + 419) ++#define __NR_semtimedop_time64 (__NR_Linux + 420) ++#define __NR_rt_sigtimedwait_time64 (__NR_Linux + 421) ++#define __NR_futex_time64 (__NR_Linux + 422) ++#define __NR_sched_rr_get_interval_time64 (__NR_Linux + 423) ++#define __NR_pidfd_send_signal (__NR_Linux + 424) ++#define __NR_io_uring_setup (__NR_Linux + 425) ++#define __NR_io_uring_enter (__NR_Linux + 426) ++#define __NR_io_uring_register (__NR_Linux + 427) ++#define __NR_open_tree (__NR_Linux + 428) ++#define __NR_move_mount (__NR_Linux + 429) ++#define __NR_fsopen (__NR_Linux + 430) ++#define __NR_fsconfig (__NR_Linux + 431) ++#define __NR_fsmount (__NR_Linux + 432) ++#define __NR_fspick (__NR_Linux + 433) ++ ++#define __NR_clone3 (__NR_Linux + 435) ++#define __NR_close_range (__NR_Linux + 436) ++ ++#define __NR_faccessat2 (__NR_Linux + 439) ++ + /* + * Offset of the last Linux o32 flavoured syscall + */ +--- a/include/vki/vki-scnums-mips64-linux.h ++++ b/include/vki/vki-scnums-mips64-linux.h +@@ -363,6 +363,22 @@ + #define __NR_pkey_free (__NR_Linux + 325) + #define __NR_statx (__NR_Linux + 326) + ++#define __NR_pidfd_send_signal (__NR_Linux + 424) ++#define __NR_io_uring_setup (__NR_Linux + 425) ++#define __NR_io_uring_enter (__NR_Linux + 426) ++#define __NR_io_uring_register (__NR_Linux + 427) ++#define __NR_open_tree (__NR_Linux + 428) ++#define __NR_move_mount (__NR_Linux + 429) ++#define __NR_fsopen (__NR_Linux + 430) ++#define __NR_fsconfig (__NR_Linux + 431) ++#define __NR_fsmount (__NR_Linux + 432) ++#define __NR_fspick (__NR_Linux + 433) ++ ++#define __NR_clone3 (__NR_Linux + 435) ++#define __NR_close_range (__NR_Linux + 436) ++ ++#define __NR_faccessat2 (__NR_Linux + 439) ++ + #elif defined(VGABI_N32) + + /* +@@ -702,6 +718,22 @@ + #define __NR_pkey_free (__NR_Linux + 329) + #define __NR_statx (__NR_Linux + 330) + ++#define __NR_pidfd_send_signal (__NR_Linux + 424) ++#define __NR_io_uring_setup (__NR_Linux + 425) ++#define __NR_io_uring_enter (__NR_Linux + 426) ++#define __NR_io_uring_register (__NR_Linux + 427) ++#define __NR_open_tree (__NR_Linux + 428) ++#define __NR_move_mount (__NR_Linux + 429) ++#define __NR_fsopen (__NR_Linux + 430) ++#define __NR_fsconfig (__NR_Linux + 431) ++#define __NR_fsmount (__NR_Linux + 432) ++#define __NR_fspick (__NR_Linux + 433) ++ ++#define __NR_clone3 (__NR_Linux + 435) ++#define __NR_close_range (__NR_Linux + 436) ++ ++#define __NR_faccessat2 (__NR_Linux + 439) ++ + #else + #error unknown mips64 abi + #endif diff --git a/package/devel/valgrind/patches/130-mips_fix_soft_float.patch b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch index 05be099ca5..427aa85524 100644 --- a/package/devel/valgrind/patches/130-mips_fix_soft_float.patch +++ b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch @@ -14,7 +14,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32: --- a/VEX/priv/guest_mips_helpers.c +++ b/VEX/priv/guest_mips_helpers.c -@@ -617,6 +617,7 @@ extern UInt mips_dirtyhelper_calculate_F +@@ -616,6 +616,7 @@ extern UInt mips_dirtyhelper_calculate_F flt_op inst ) { UInt ret = 0; @@ -22,7 +22,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32: #if defined(__mips__) VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs; UInt loFsVal, hiFsVal, loFtVal, hiFtVal; -@@ -699,6 +700,7 @@ extern UInt mips_dirtyhelper_calculate_F +@@ -698,6 +699,7 @@ extern UInt mips_dirtyhelper_calculate_F break; } #endif @@ -30,7 +30,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32: return ret; } -@@ -708,6 +710,7 @@ extern UInt mips_dirtyhelper_calculate_F +@@ -707,6 +709,7 @@ extern UInt mips_dirtyhelper_calculate_F flt_op inst ) { UInt ret = 0; @@ -38,7 +38,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32: #if defined(__mips__) && ((__mips == 64) || \ (defined(__mips_isa_rev) && (__mips_isa_rev >= 2))) #if defined(VGA_mips32) -@@ -860,6 +863,7 @@ extern UInt mips_dirtyhelper_calculate_F +@@ -859,6 +862,7 @@ extern UInt mips_dirtyhelper_calculate_F break; } #endif @@ -48,7 +48,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32: --- a/coregrind/m_machine.c +++ b/coregrind/m_machine.c -@@ -1828,6 +1828,7 @@ Bool VG_(machine_get_hwcaps)( void ) +@@ -2103,6 +2103,7 @@ Bool VG_(machine_get_hwcaps)( void ) we are using alternative way to determine FP mode */ ULong result = 0; @@ -56,7 +56,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32: if (!VG_MINIMAL_SETJMP(env_unsup_insn)) { __asm__ volatile ( ".set push\n\t" -@@ -1845,6 +1846,9 @@ Bool VG_(machine_get_hwcaps)( void ) +@@ -2120,6 +2121,9 @@ Bool VG_(machine_get_hwcaps)( void ) fpmode = (result != 0x3FF0000000000000ull); } diff --git a/package/kernel/hwmon-gsc/Makefile b/package/kernel/hwmon-gsc/Makefile index 8cf4e0ee79..34c33dc581 100644 --- a/package/kernel/hwmon-gsc/Makefile +++ b/package/kernel/hwmon-gsc/Makefile @@ -8,7 +8,7 @@ include $(INCLUDE_DIR)/package.mk define KernelPackage/hwmon-gsc SUBMENU:=Hardware Monitoring Support - DEPENDS:=@TARGET_imx6 +kmod-hwmon-core +kmod-i2c-core + DEPENDS:=@TARGET_imx +kmod-hwmon-core +kmod-i2c-core TITLE:=Driver for the Gateworks System Controller AUTOLOAD:=$(call AutoLoad,60,gsc) FILES:=$(PKG_BUILD_DIR)/gsc.ko diff --git a/package/kernel/linux/modules/can.mk b/package/kernel/linux/modules/can.mk index 3060fc0966..9cdebb9091 100644 --- a/package/kernel/linux/modules/can.mk +++ b/package/kernel/linux/modules/can.mk @@ -121,7 +121,7 @@ define KernelPackage/can-flexcan KCONFIG:=CONFIG_CAN_FLEXCAN FILES:=$(LINUX_DIR)/drivers/net/can/flexcan.ko AUTOLOAD:=$(call AutoProbe,flexcan) - $(call AddDepends/can,@TARGET_imx6) + $(call AddDepends/can,@TARGET_imx) endef define KernelPackage/can-flexcan/description diff --git a/package/kernel/linux/modules/crypto.mk b/package/kernel/linux/modules/crypto.mk index 6cecb1a0fa..4097957277 100644 --- a/package/kernel/linux/modules/crypto.mk +++ b/package/kernel/linux/modules/crypto.mk @@ -287,7 +287,7 @@ define KernelPackage/crypto-ghash/arm-ce AUTOLOAD+=$(call AutoLoad,09,ghash-arm-ce) endef -KernelPackage/crypto-ghash/imx6=$(KernelPackage/crypto-ghash/arm-ce) +KernelPackage/crypto-ghash/imx=$(KernelPackage/crypto-ghash/arm-ce) KernelPackage/crypto-ghash/ipq40xx=$(KernelPackage/crypto-ghash/arm-ce) KernelPackage/crypto-ghash/mvebu/cortexa9=$(KernelPackage/crypto-ghash/arm-ce) @@ -857,7 +857,7 @@ define KernelPackage/crypto-sha1/arm-neon AUTOLOAD+=$(call AutoLoad,09,sha1-arm-neon) endef -KernelPackage/crypto-sha1/imx6=$(KernelPackage/crypto-sha1/arm-neon) +KernelPackage/crypto-sha1/imx=$(KernelPackage/crypto-sha1/arm-neon) KernelPackage/crypto-sha1/ipq40xx=$(KernelPackage/crypto-sha1/arm-neon) KernelPackage/crypto-sha1/mvebu/cortexa9=$(KernelPackage/crypto-sha1/arm-neon) @@ -921,7 +921,7 @@ define KernelPackage/crypto-sha512/arm AUTOLOAD+=$(call AutoLoad,09,sha512-arm) endef -KernelPackage/crypto-sha512/imx6=$(KernelPackage/crypto-sha512/arm) +KernelPackage/crypto-sha512/imx=$(KernelPackage/crypto-sha512/arm) KernelPackage/crypto-sha512/ipq40xx=$(KernelPackage/crypto-sha512/arm) KernelPackage/crypto-sha512/mvebu/cortexa9=$(KernelPackage/crypto-sha512/arm) diff --git a/package/kernel/linux/modules/input.mk b/package/kernel/linux/modules/input.mk index c2f39ddd90..e870bf7f8b 100644 --- a/package/kernel/linux/modules/input.mk +++ b/package/kernel/linux/modules/input.mk @@ -196,7 +196,7 @@ $(eval $(call KernelPackage,input-touchscreen-ads7846)) define KernelPackage/keyboard-imx SUBMENU:=$(INPUT_MODULES_MENU) TITLE:=IMX keypad support - DEPENDS:=@(TARGET_mxs||TARGET_imx6) +kmod-input-matrixkmap + DEPENDS:=@(TARGET_mxs||TARGET_imx) +kmod-input-matrixkmap KCONFIG:= \ CONFIG_KEYBOARD_IMX \ CONFIG_INPUT_KEYBOARD=y diff --git a/package/kernel/linux/modules/sound.mk b/package/kernel/linux/modules/sound.mk index e43be25bc6..e1d7f72a0f 100644 --- a/package/kernel/linux/modules/sound.mk +++ b/package/kernel/linux/modules/sound.mk @@ -225,12 +225,12 @@ define KernelPackage/sound-soc-imx $(LINUX_DIR)/sound/soc/fsl/snd-soc-fsl-ssi.ko \ $(LINUX_DIR)/sound/soc/fsl/imx-pcm-dma.ko AUTOLOAD:=$(call AutoLoad,56,snd-soc-imx-audmux snd-soc-fsl-ssi snd-soc-imx-pcm) - DEPENDS:=@TARGET_imx6 +kmod-sound-soc-core + DEPENDS:=@TARGET_imx +kmod-sound-soc-core $(call AddDepends/sound) endef define KernelPackage/sound-soc-imx/description - Support for i.MX6 Platform sound (ssi/audmux/pcm) + Support for i.MX Platform sound (ssi/audmux/pcm) endef $(eval $(call KernelPackage,sound-soc-imx)) @@ -243,12 +243,12 @@ define KernelPackage/sound-soc-imx-sgtl5000 $(LINUX_DIR)/sound/soc/codecs/snd-soc-sgtl5000.ko \ $(LINUX_DIR)/sound/soc/fsl/snd-soc-imx-sgtl5000.ko AUTOLOAD:=$(call AutoLoad,57,snd-soc-sgtl5000 snd-soc-imx-sgtl5000) - DEPENDS:=@TARGET_imx6 +kmod-sound-soc-imx + DEPENDS:=@TARGET_imx +kmod-sound-soc-imx $(call AddDepends/sound) endef define KernelPackage/sound-soc-imx-sgtl5000/description - Support for i.MX6 Platform sound SGTL5000 codec + Support for i.MX Platform sound SGTL5000 codec endef $(eval $(call KernelPackage,sound-soc-imx-sgtl5000)) diff --git a/package/kernel/linux/modules/video.mk b/package/kernel/linux/modules/video.mk index fd351077c5..84f5922cea 100644 --- a/package/kernel/linux/modules/video.mk +++ b/package/kernel/linux/modules/video.mk @@ -317,7 +317,7 @@ $(eval $(call KernelPackage,drm-amdgpu)) define KernelPackage/drm-imx SUBMENU:=$(VIDEO_MENU) TITLE:=Freescale i.MX DRM support - DEPENDS:=@TARGET_imx6 +kmod-drm-kms-helper + DEPENDS:=@TARGET_imx +kmod-drm-kms-helper KCONFIG:=CONFIG_DRM_IMX \ CONFIG_DRM_FBDEV_EMULATION=y \ CONFIG_DRM_FBDEV_OVERALLOC=100 \ diff --git a/package/kernel/linux/modules/w1.mk b/package/kernel/linux/modules/w1.mk index 6ac7458e42..e0f7eecb6e 100644 --- a/package/kernel/linux/modules/w1.mk +++ b/package/kernel/linux/modules/w1.mk @@ -83,7 +83,7 @@ $(eval $(call KernelPackage,w1-master-ds2490)) define KernelPackage/w1-master-mxc TITLE:=Freescale MXC 1-wire busmaster - DEPENDS:=@TARGET_imx6 + DEPENDS:=@TARGET_imx KCONFIG:=CONFIG_W1_MASTER_MXC FILES:=$(W1_MASTERS_DIR)/mxc_w1.ko AUTOLOAD:=$(call AutoProbe,mxc_w1) diff --git a/package/libs/libubox/Makefile b/package/libs/libubox/Makefile index 33aa73eef7..1ba95a4ccf 100644 --- a/package/libs/libubox/Makefile +++ b/package/libs/libubox/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/libubox.git -PKG_MIRROR_HASH:=1cdb91ac0ee925f133ee9f70eac131a99def312fe7cf0aed44df84eb1762e30b -PKG_SOURCE_DATE:=2021-08-19 -PKG_SOURCE_VERSION:=d716ac4bc4236031d4c3cc1ed362b502e20e3787 +PKG_MIRROR_HASH:=7ea3c04e8d274bfc99789f9880c97aead9013095d2ac6dc4fcbee47fc533f3a9 +PKG_SOURCE_DATE:=2021-11-04 +PKG_SOURCE_VERSION:=c86a894ec63d83ecf2c373bbf9dc8fba9713d942 PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE)) CMAKE_INSTALL:=1 diff --git a/package/libs/toolchain/Makefile b/package/libs/toolchain/Makefile index 52a4cda19f..dea99060f9 100644 --- a/package/libs/toolchain/Makefile +++ b/package/libs/toolchain/Makefile @@ -115,7 +115,7 @@ define Package/libasan $(call Package/gcc/Default) NAME:=libasan TITLE:=Runtime library for AddressSanitizer in GCC - DEPENDS:=@USE_GLIBC +librt +libstdcpp @!mips @!mipsel @!mips64 @!mips64el @!arc + DEPENDS:=@USE_GLIBC +librt +libstdcpp @!mips64 @!mips64el @!arc ABI_VERSION:=5 endef @@ -202,7 +202,7 @@ define Package/libubsan $(call Package/gcc/Default) NAME:=libubsan TITLE:=Runtime library for UndefinedBehaviorSanitizer in GCC - DEPENDS:=@USE_GLIBC +librt +libstdcpp @!mips @!mipsel @!mips64 @!mips64el @!arc + DEPENDS:=@USE_GLIBC +librt +libstdcpp @!mips64 @!mips64el @!arc ABI_VERSION:=1 endef diff --git a/package/network/config/qosify/Makefile b/package/network/config/qosify/Makefile index 3c055c2af6..198772ce36 100644 --- a/package/network/config/qosify/Makefile +++ b/package/network/config/qosify/Makefile @@ -23,6 +23,7 @@ PKG_BUILD_DEPENDS:=bpf-headers include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/cmake.mk include $(INCLUDE_DIR)/bpf.mk +include $(INCLUDE_DIR)/nls.mk define Package/qosify SECTION:=net diff --git a/package/network/config/qosify/files/qosify.conf b/package/network/config/qosify/files/qosify.conf index cf703a3bfb..d607abe462 100644 --- a/package/network/config/qosify/files/qosify.conf +++ b/package/network/config/qosify/files/qosify.conf @@ -17,6 +17,7 @@ config interface wan option ingress 1 option egress 1 option mode diffserv4 + option nat 1 option host_isolate 1 option autorate_ingress 1 option ingress_options "" diff --git a/package/network/config/qosify/files/qosify.init b/package/network/config/qosify/files/qosify.init index c4139d7381..5928630dc0 100644 --- a/package/network/config/qosify/files/qosify.init +++ b/package/network/config/qosify/files/qosify.init @@ -61,6 +61,7 @@ add_interface() { add_option boolean ingress add_option boolean egress add_option string mode + add_option boolean nat add_option boolean host_isolate add_option boolean autorate_ingress add_option string ingress_options diff --git a/package/network/config/vti/Makefile b/package/network/config/vti/Makefile index 292ab111e5..548b8f951f 100644 --- a/package/network/config/vti/Makefile +++ b/package/network/config/vti/Makefile @@ -8,47 +8,28 @@ include $(TOPDIR)/rules.mk PKG_NAME:=vti -PKG_RELEASE:=4 +PKG_RELEASE:=5 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk define Package/vti/Default - SECTION:=net - CATEGORY:=Network - MAINTAINER:=Andre Valentin - PKGARCH:=all endef define Package/vti -$(call Package/vti/Default) + SECTION:=net + CATEGORY:=Network + MAINTAINER:=Andre Valentin TITLE:=Virtual IPsec Tunnel Interface config support + DEPENDS:=+kmod-ip-vti +IPV6:kmod-ip6-vti + PROVIDES:=vtiv4 vtiv6 + PKGARCH:=all endef define Package/vti/description Virtual IPsec Tunnel Interface config support (IPv4 and IPv6) in /etc/config/network. endef -define Package/vtiv4 -$(call Package/vti/Default) - TITLE:=Virtual IPsec Tunnel Interface (IPv4) config support - DEPENDS:=@(PACKAGE_vti) +kmod-ip-vti -endef - -define Package/vtiv4/description - Virtual IPsec Tunnel Interface config support (IPv4) in /etc/config/network. -endef - -define Package/vtiv6 -$(call Package/vti/Default) - TITLE:=Virtual IPsec Tunnel Interface (IPv6) config support - DEPENDS:=@(PACKAGE_vti) @IPV6 +kmod-ip6-vti -endef - -define Package/vtiv6/description - Virtual IPsec Tunnel Interface config support (IPv6) in /etc/config/network. -endef - define Build/Compile endef @@ -60,14 +41,4 @@ define Package/vti/install $(INSTALL_BIN) ./files/vti.sh $(1)/lib/netifd/proto/vti.sh endef -define Package/vtiv4/install - : -endef - -define Package/vtiv6/install - : -endef - $(eval $(call BuildPackage,vti)) -$(eval $(call BuildPackage,vtiv4)) -$(eval $(call BuildPackage,vtiv6)) diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh index f3a3babfca..be4ae9e10d 100644 --- a/package/network/services/hostapd/files/hostapd.sh +++ b/package/network/services/hostapd/files/hostapd.sh @@ -976,7 +976,6 @@ hostapd_set_bss_options() { [ -n "$iw_network_auth_type" ] && \ append bss_conf "network_auth_type=$iw_network_auth_type" "$N" [ -n "$iw_gas_address3" ] && append bss_conf "gas_address3=$iw_gas_address3" "$N" - [ -n "$iw_qos_map_set" ] && append bss_conf "qos_map_set=$iw_qos_map_set" "$N" json_for_each_item append_iw_roaming_consortium iw_roaming_consortium json_for_each_item append_iw_anqp_elem iw_anqp_elem @@ -995,6 +994,12 @@ hostapd_set_bss_options() { append bss_conf "anqp_3gpp_cell_net=$iw_anqp_3gpp_cell_net_conf" "$N" fi + set_default iw_qos_map_set 0,0,2,16,1,1,255,255,18,22,24,38,40,40,44,46,48,56 + case "$iw_qos_map_set" in + *,*);; + *) iw_qos_map_set="";; + esac + [ -n "$iw_qos_map_set" ] && append bss_conf "qos_map_set=$iw_qos_map_set" "$N" local hs20 disable_dgaf osen anqp_domain_id hs20_deauth_req_timeout \ osu_ssid hs20_wan_metrics hs20_operating_class hs20_t_c_filename hs20_t_c_timestamp \ diff --git a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch b/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch new file mode 100644 index 0000000000..1e6892e375 --- /dev/null +++ b/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch @@ -0,0 +1,112 @@ +--- a/hostapd/config_file.c ++++ b/hostapd/config_file.c +@@ -1643,6 +1643,8 @@ static int parse_anqp_elem(struct hostap + return 0; + } + ++#endif /* CONFIG_INTERWORKING */ ++ + + static int parse_qos_map_set(struct hostapd_bss_config *bss, + char *buf, int line) +@@ -1684,8 +1686,6 @@ static int parse_qos_map_set(struct host + return 0; + } + +-#endif /* CONFIG_INTERWORKING */ +- + + #ifdef CONFIG_HS20 + static int hs20_parse_conn_capab(struct hostapd_bss_config *bss, char *buf, +@@ -4058,10 +4058,10 @@ static int hostapd_config_fill(struct ho + bss->gas_frag_limit = val; + } else if (os_strcmp(buf, "gas_comeback_delay") == 0) { + bss->gas_comeback_delay = atoi(pos); ++#endif /* CONFIG_INTERWORKING */ + } else if (os_strcmp(buf, "qos_map_set") == 0) { + if (parse_qos_map_set(bss, pos, line) < 0) + return 1; +-#endif /* CONFIG_INTERWORKING */ + #ifdef CONFIG_RADIUS_TEST + } else if (os_strcmp(buf, "dump_msk_file") == 0) { + os_free(bss->dump_msk_file); +--- a/src/ap/hostapd.c ++++ b/src/ap/hostapd.c +@@ -1415,6 +1415,7 @@ static int hostapd_setup_bss(struct host + wpa_printf(MSG_ERROR, "GAS server initialization failed"); + return -1; + } ++#endif /* CONFIG_INTERWORKING */ + + if (conf->qos_map_set_len && + hostapd_drv_set_qos_map(hapd, conf->qos_map_set, +@@ -1422,7 +1423,6 @@ static int hostapd_setup_bss(struct host + wpa_printf(MSG_ERROR, "Failed to initialize QoS Map"); + return -1; + } +-#endif /* CONFIG_INTERWORKING */ + + if (conf->bss_load_update_period && bss_load_update_init(hapd)) { + wpa_printf(MSG_ERROR, "BSS Load initialization failed"); +--- a/src/ap/drv_callbacks.c ++++ b/src/ap/drv_callbacks.c +@@ -271,12 +271,10 @@ int hostapd_notif_assoc(struct hostapd_d + } + #endif /* NEED_AP_MLME */ + +-#ifdef CONFIG_INTERWORKING + if (elems.ext_capab && elems.ext_capab_len > 4) { + if (elems.ext_capab[4] & 0x01) + sta->qos_map_enabled = 1; + } +-#endif /* CONFIG_INTERWORKING */ + + #ifdef CONFIG_HS20 + wpabuf_free(sta->hs20_ie); +--- a/src/ap/ieee802_11.c ++++ b/src/ap/ieee802_11.c +@@ -4136,13 +4136,11 @@ static u16 copy_supp_rates(struct hostap + static u16 check_ext_capab(struct hostapd_data *hapd, struct sta_info *sta, + const u8 *ext_capab_ie, size_t ext_capab_ie_len) + { +-#ifdef CONFIG_INTERWORKING + /* check for QoS Map support */ + if (ext_capab_ie_len >= 5) { + if (ext_capab_ie[4] & 0x01) + sta->qos_map_enabled = 1; + } +-#endif /* CONFIG_INTERWORKING */ + + if (ext_capab_ie_len > 0) { + sta->ecsa_supported = !!(ext_capab_ie[0] & BIT(2)); +--- a/wpa_supplicant/events.c ++++ b/wpa_supplicant/events.c +@@ -2535,8 +2535,6 @@ void wnm_bss_keep_alive_deinit(struct wp + } + + +-#ifdef CONFIG_INTERWORKING +- + static int wpas_qos_map_set(struct wpa_supplicant *wpa_s, const u8 *qos_map, + size_t len) + { +@@ -2569,8 +2567,6 @@ static void interworking_process_assoc_r + } + } + +-#endif /* CONFIG_INTERWORKING */ +- + + static void multi_ap_process_assoc_resp(struct wpa_supplicant *wpa_s, + const u8 *ies, size_t ies_len) +@@ -2704,10 +2700,8 @@ static int wpa_supplicant_event_associnf + wnm_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, + data->assoc_info.resp_ies_len); + #endif /* CONFIG_WNM */ +-#ifdef CONFIG_INTERWORKING + interworking_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, + data->assoc_info.resp_ies_len); +-#endif /* CONFIG_INTERWORKING */ + if (wpa_s->hw_capab == CAPAB_VHT && + get_ie(data->assoc_info.resp_ies, + data->assoc_info.resp_ies_len, WLAN_EID_VHT_CAP)) diff --git a/package/network/services/omcproxy/Makefile b/package/network/services/omcproxy/Makefile index 26c7893384..c5b2f3e67f 100644 --- a/package/network/services/omcproxy/Makefile +++ b/package/network/services/omcproxy/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=9 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/omcproxy.git -PKG_SOURCE_DATE:=2018-12-14 -PKG_SOURCE_VERSION:=722151f04348cf1b759613c087bced52fb45790a -PKG_MIRROR_HASH:=4d218923c149e2dc9010b8932ea92ab7e06f30df06814ffedaba7e081f2d4640 +PKG_MIRROR_HASH:=6443276368dc7d45ee58bd7067da6c3a85396d9996039232cae3bdd426382f0c +PKG_SOURCE_DATE:=2021-11-04 +PKG_SOURCE_VERSION:=bfba2aa75802ff1a70ef2fd3eba53409a8c6e93a PKG_MAINTAINER:=Steven Barth PKG_LICENSE:=Apache-2.0 diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile index 2c4b83d9e1..b831f86639 100644 --- a/package/system/procd/Makefile +++ b/package/system/procd/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git -PKG_SOURCE_DATE:=2021-11-01 -PKG_SOURCE_VERSION:=c1976e57ce869d6d2a273ecbbe4fc071e53a181e -PKG_MIRROR_HASH:=a7e5760b8ed55f89e8e36b3794c6653b6b58198bc55cce8be52a69e087e3dbf9 +PKG_MIRROR_HASH:=0d51642d82d7bb4150355a6986e54504dce171c6fcb7eeff312d20a5d106bad8 +PKG_SOURCE_DATE:=2021-11-04 +PKG_SOURCE_VERSION:=0ee8e734a7f67220cf4a3412b60ff674b5fb20dd CMAKE_INSTALL:=1 PKG_LICENSE:=GPL-2.0 @@ -89,7 +89,7 @@ endef define Package/uxc SECTION:=base CATEGORY:=Base system - DEPENDS:=+procd-ujail +libubus +libubox +libblobmsg-json +blockd +rpcd + DEPENDS:=+procd-ujail +libubus +libubox +libblobmsg-json +blockd +PACKAGE_uxc:rpcd TITLE:=OpenWrt container management MAINTAINER:=Daniel Golle endef diff --git a/package/system/rpcd/Makefile b/package/system/rpcd/Makefile index 9880ea4d66..2827e955db 100644 --- a/package/system/rpcd/Makefile +++ b/package/system/rpcd/Makefile @@ -12,10 +12,10 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/rpcd.git -PKG_SOURCE_DATE:=2021-07-13 -PKG_SOURCE_VERSION:=1fa35765ddf64976aa48950cac53d501fb71dda0 +PKG_MIRROR_HASH:=98071b4a1ce983a0e738d7e4a2f6e52b7f6db19f99510ddef430093314134ca4 +PKG_SOURCE_DATE:=2021-11-04 +PKG_SOURCE_VERSION:=d11ffe9383ae0ec34836421926364b24c1d891ca PKG_MAINTAINER:=Jo-Philipp Wich -PKG_MIRROR_HASH:=be116e2616b3ae1b5fb9c4c338d6908f8cc9e5de239a2c83aa21b7a69b5c1c93 PKG_LICENSE:=ISC PKG_LICENSE_FILES:= diff --git a/target/linux/ath79/dts/ar9344_netgear_r6100.dts b/target/linux/ath79/dts/ar9344_netgear_r6100.dts new file mode 100644 index 0000000000..80951d6249 --- /dev/null +++ b/target/linux/ath79/dts/ar9344_netgear_r6100.dts @@ -0,0 +1,231 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9344.dtsi" + +#include +#include + +/ { + model = "Netgear R6100"; + compatible = "netgear,r6100", "qca,ar9344"; + + aliases { + label-mac-device = ð0; + led-boot = &led_power_green; + led-failsafe = &led_power_amber; + led-running = &led_power_green; + led-upgrade = &led_power_green; + }; + + gpio-export { + compatible = "gpio-export"; + #size-cells = <0>; + + usb-power { + gpio-export,name = "usb-power"; + gpio-export,output = <1>; + gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + rfkill { + label = "rfkill"; + linux,code = ; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_amber: power_amber { + label = "amber:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + led_power_green: power_green { + label = "green:power"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + + usb { + label = "blue:usb"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + trigger-sources = <&hub_port>; + linux,default-trigger = "usbport"; + }; + + wan_amber { + label = "amber:wan"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + wan_green { + label = "green:wan"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + }; + + wlan { + label = "blue:wlan"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&swphy0>; + + nvmem-cells = <&macaddr_caldata_6>; + nvmem-cell-names = "mac-address"; + + gmac-config { + device = <&gmac>; + switch-phy-swap = <1>; + }; +}; + +ð1 { + status = "okay"; + + nvmem-cells = <&macaddr_caldata_0>; + nvmem-cell-names = "mac-address"; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x0020000>; + read-only; + }; + + caldata: partition@20000 { + label = "caldata"; + reg = <0x0020000 0x0040000>; + read-only; + }; + + partition@60000 { + label = "caldata-backup"; + reg = <0x0060000 0x0040000>; + read-only; + }; + + partition@a0000 { + label = "config"; + reg = <0x00a0000 0x0080000>; + read-only; + }; + + partition@120000 { + label = "pot"; + reg = <0x0120000 0x0080000>; + read-only; + }; + + partition@1a0000 { + label = "kernel"; + reg = <0x01a0000 0x0400000>; + }; + + partition@5a0000 { + label = "ubi"; + reg = <0x05a0000 0x7560000>; + }; + + partition@7b00000 { + label = "language"; + reg = <0x7b00000 0x0200000>; + read-only; + }; + + partition@7d00000 { + label = "traffic_meter"; + reg = <0x7d00000 0x0300000>; + read-only; + }; + }; +}; + +&pcie { + status = "okay"; + + wifi@0,0,0 { + compatible = "qcom,ath10k"; + reg = <0x0000 0 0 0 0>; + + nvmem-cells = <&macaddr_caldata_c>; + nvmem-cell-names = "mac-address"; + }; +}; + +&ref { + clock-frequency = <40000000>; +}; + +&usb { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + hub_port: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&usb_phy { + status = "okay"; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&caldata 0x1000>; +}; + +&caldata { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_caldata_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_caldata_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_caldata_c: macaddr@c { + reg = <0xc 0x6>; + }; +}; diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk index b34e796ac3..91fd7ec301 100644 --- a/target/linux/ath79/image/nand.mk +++ b/target/linux/ath79/image/nand.mk @@ -215,6 +215,17 @@ define Device/netgear_ath79_nand UBINIZE_OPTS := -E 5 endef +define Device/netgear_r6100 + SOC := ar9344 + DEVICE_MODEL := R6100 + UIMAGE_MAGIC := 0x36303030 + NETGEAR_BOARD_ID := R6100 + NETGEAR_HW_ID := 29764434+0+128+128+2x2+2x2 + $(Device/netgear_ath79_nand) + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += netgear_r6100 + define Device/netgear_wndr3700-v4 SOC := ar9344 DEVICE_MODEL := WNDR3700 diff --git a/target/linux/ath79/nand/base-files/etc/board.d/01_leds b/target/linux/ath79/nand/base-files/etc/board.d/01_leds index f694d07e9c..dc7d84df95 100644 --- a/target/linux/ath79/nand/base-files/etc/board.d/01_leds +++ b/target/linux/ath79/nand/base-files/etc/board.d/01_leds @@ -14,6 +14,9 @@ glinet,gl-ar300m-nand|\ glinet,gl-ar300m-nor) ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0" ;; +netgear,r6100) + ucidef_set_led_netdev "wan-green" "WAN (green)" "green:wan" "eth1" + ;; netgear,wndr3700-v4|\ netgear,wndr4300|\ netgear,wndr4300sw|\ diff --git a/target/linux/ath79/nand/base-files/etc/board.d/02_network b/target/linux/ath79/nand/base-files/etc/board.d/02_network index dbb9e68150..76cdab18f8 100644 --- a/target/linux/ath79/nand/base-files/etc/board.d/02_network +++ b/target/linux/ath79/nand/base-files/etc/board.d/02_network @@ -25,6 +25,11 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "2:lan:2" "3:lan:1" "1:wan" ;; + netgear,r6100) + ucidef_set_interface_wan "eth1" + ucidef_add_switch "switch0" \ + "0@eth0" "1:lan:4" "2:lan:1" "3:lan:2" "4:lan:3" + ;; netgear,wndr3700-v4|\ netgear,wndr4300|\ netgear,wndr4300sw|\ diff --git a/target/linux/ath79/nand/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ath79/nand/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index 71dfb161e4..03e225ddde 100644 --- a/target/linux/ath79/nand/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ath79/nand/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -23,6 +23,9 @@ case "$FIRMWARE" in caldata_extract "art" 0x5000 0x844 ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) 1) ;; + netgear,r6100) + caldata_extract "caldata" 0x5000 0x844 + ;; zyxel,nbg6716) caldata_extract "art" 0x5000 0x844 ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 1) diff --git a/target/linux/bcm4908/Makefile b/target/linux/bcm4908/Makefile index bbe5030b65..4aae7acfcd 100644 --- a/target/linux/bcm4908/Makefile +++ b/target/linux/bcm4908/Makefile @@ -10,7 +10,7 @@ CPU_TYPE:=cortex-a53 SUBTARGETS:=generic KERNEL_PATCHVER:=5.4 -KERNEL_TESTING_PATCHVER:=5.4 +KERNEL_TESTING_PATCHVER:=5.10 define Target/Description Build firmware images for Broadcom BCM4908 SoC family routers. diff --git a/target/linux/bcm4908/base-files/lib/upgrade/platform.sh b/target/linux/bcm4908/base-files/lib/upgrade/platform.sh index 8aca7119e4..ee43e3a713 100644 --- a/target/linux/bcm4908/base-files/lib/upgrade/platform.sh +++ b/target/linux/bcm4908/base-files/lib/upgrade/platform.sh @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause -RAMFS_COPY_BIN="bcm4908img" +RAMFS_COPY_BIN="bcm4908img expr" PART_NAME=firmware @@ -129,7 +129,7 @@ platform_calc_new_cferam() { umount $dir rm -fr $dir - idx=$(((idx + inc) % 1000)) + idx=$(($(expr $idx + $inc) % 1000)) echo $(printf "cferam.%03d" $idx) } diff --git a/target/linux/bcm4908/config-5.10 b/target/linux/bcm4908/config-5.10 new file mode 100644 index 0000000000..71f7d60d72 --- /dev/null +++ b/target/linux/bcm4908/config-5.10 @@ -0,0 +1,220 @@ +CONFIG_64BIT=y +CONFIG_ARCH_BCM4908=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_SSBD=y +CONFIG_ARM64_SVE=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_PSCI_FW=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_B53=y +# CONFIG_B53_MDIO_DRIVER is not set +# CONFIG_B53_MMAP_DRIVER is not set +# CONFIG_B53_SERDES is not set +# CONFIG_B53_SPI_DRIVER is not set +# CONFIG_B53_SRAB_DRIVER is not set +CONFIG_BCM4908_ENET=y +CONFIG_BCM7XXX_PHY=y +CONFIG_BCM_NET_PHYLIB=y +CONFIG_BCM_PMB=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_PM=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="earlycon=bcm63xx_uart,0xff800640 console=ttyS0,115200" +CONFIG_CMDLINE_FORCE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_CPU_RMAP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_REMAP=y +CONFIG_DRM_RCAR_WRITEBACK=y +CONFIG_DTC=y +CONFIG_EDAC_SUPPORT=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_HZ_PERIODIC=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BCM_UNIMAC=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_OF_PARTS_BCM4908=y +# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPLIT_CFE_BOOTFS=y +# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_BCM_SF2=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_IOPORT_MAP=y +CONFIG_NR_CPUS=4 +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_PADATA=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_BRCM_USB=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REFCOUNT_FULL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELOCATABLE=y +CONFIG_RFS_ACCEL=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_RPS=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SRCU=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_USB_SUPPORT=y +CONFIG_VMAP_STACK=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA32=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bcm4908/files-5.10/drivers/net/ethernet/broadcom/unimac.h b/target/linux/bcm4908/files-5.10/drivers/net/ethernet/broadcom/unimac.h new file mode 100644 index 0000000000..585a852862 --- /dev/null +++ b/target/linux/bcm4908/files-5.10/drivers/net/ethernet/broadcom/unimac.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __UNIMAC_H +#define __UNIMAC_H + +#define UMAC_HD_BKP_CTRL 0x004 +#define HD_FC_EN (1 << 0) +#define HD_FC_BKOFF_OK (1 << 1) +#define IPG_CONFIG_RX_SHIFT 2 +#define IPG_CONFIG_RX_MASK 0x1F +#define UMAC_CMD 0x008 +#define CMD_TX_EN (1 << 0) +#define CMD_RX_EN (1 << 1) +#define CMD_SPEED_10 0 +#define CMD_SPEED_100 1 +#define CMD_SPEED_1000 2 +#define CMD_SPEED_2500 3 +#define CMD_SPEED_SHIFT 2 +#define CMD_SPEED_MASK 3 +#define CMD_PROMISC (1 << 4) +#define CMD_PAD_EN (1 << 5) +#define CMD_CRC_FWD (1 << 6) +#define CMD_PAUSE_FWD (1 << 7) +#define CMD_RX_PAUSE_IGNORE (1 << 8) +#define CMD_TX_ADDR_INS (1 << 9) +#define CMD_HD_EN (1 << 10) +#define CMD_SW_RESET_OLD (1 << 11) +#define CMD_SW_RESET (1 << 13) +#define CMD_LCL_LOOP_EN (1 << 15) +#define CMD_AUTO_CONFIG (1 << 22) +#define CMD_CNTL_FRM_EN (1 << 23) +#define CMD_NO_LEN_CHK (1 << 24) +#define CMD_RMT_LOOP_EN (1 << 25) +#define CMD_RX_ERR_DISC (1 << 26) +#define CMD_PRBL_EN (1 << 27) +#define CMD_TX_PAUSE_IGNORE (1 << 28) +#define CMD_TX_RX_EN (1 << 29) +#define CMD_RUNT_FILTER_DIS (1 << 30) +#define UMAC_MAC0 0x00c +#define UMAC_MAC1 0x010 +#define UMAC_MAX_FRAME_LEN 0x014 +#define UMAC_PAUSE_QUANTA 0x018 +#define UMAC_MODE 0x044 +#define MODE_LINK_STATUS (1 << 5) +#define UMAC_FRM_TAG0 0x048 /* outer tag */ +#define UMAC_FRM_TAG1 0x04c /* inner tag */ +#define UMAC_TX_IPG_LEN 0x05c +#define UMAC_EEE_CTRL 0x064 +#define EN_LPI_RX_PAUSE (1 << 0) +#define EN_LPI_TX_PFC (1 << 1) +#define EN_LPI_TX_PAUSE (1 << 2) +#define EEE_EN (1 << 3) +#define RX_FIFO_CHECK (1 << 4) +#define EEE_TX_CLK_DIS (1 << 5) +#define DIS_EEE_10M (1 << 6) +#define LP_IDLE_PREDICTION_MODE (1 << 7) +#define UMAC_EEE_LPI_TIMER 0x068 +#define UMAC_EEE_WAKE_TIMER 0x06C +#define UMAC_EEE_REF_COUNT 0x070 +#define EEE_REFERENCE_COUNT_MASK 0xffff +#define UMAC_RX_IPG_INV 0x078 +#define UMAC_MACSEC_PROG_TX_CRC 0x310 +#define UMAC_MACSEC_CTRL 0x314 +#define UMAC_PAUSE_CTRL 0x330 +#define UMAC_TX_FLUSH 0x334 +#define UMAC_RX_FIFO_STATUS 0x338 +#define UMAC_TX_FIFO_STATUS 0x33c + +#endif diff --git a/target/linux/bcm4908/patches-5.10/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch b/target/linux/bcm4908/patches-5.10/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch new file mode 100644 index 0000000000..66726cbf0b --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch @@ -0,0 +1,60 @@ +From 2f8913a7b17efd3a116825160a2d3a6610444587 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 12 Nov 2020 16:08:31 +0100 +Subject: [PATCH] dt-bindings: arm: bcm: document BCM4908 bindings +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 is a new family that includes BCM4906, BCM4908 and BCM49408. +It's mostly used in home routers and often replaces Northstar in vendors +portfolio. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../bindings/arm/bcm/brcm,bcm4908.yaml | 38 +++++++++++++++++++ + 1 file changed, 38 insertions(+) + create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml +@@ -0,0 +1,38 @@ ++# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Broadcom BCM4908 device tree bindings ++ ++description: ++ Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs. ++ ++maintainers: ++ - Rafał Miłecki ++ ++properties: ++ $nodename: ++ const: '/' ++ compatible: ++ oneOf: ++ - description: BCM4906 based boards ++ items: ++ - const: brcm,bcm4906 ++ - const: brcm,bcm4908 ++ ++ - description: BCM4908 based boards ++ items: ++ - enum: ++ - asus,gt-ac5300 ++ - const: brcm,bcm4908 ++ ++ - description: BCM49408 based boards ++ items: ++ - const: brcm,bcm49408 ++ - const: brcm,bcm4908 ++ ++additionalProperties: true ++ ++... diff --git a/target/linux/bcm4908/patches-5.10/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch b/target/linux/bcm4908/patches-5.10/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch new file mode 100644 index 0000000000..fd7d6a5f11 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch @@ -0,0 +1,307 @@ +From 2961f69f151c0a6771f55cef46398fe49ca20902 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 12 Nov 2020 16:08:32 +0100 +Subject: [PATCH] arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early + DTS files +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +They don't descibe hardware fully yet but it's enough to boot a system. + +Some missing blocks: +1. PMC (Power Management Controller?) +2. Ethernet +3. Crypto +4. Thermal + +Asus DTS is missing defining full NAND partitions layout and buttons. + +Further changes will fill those gaps as soon as required bindings will +be found / tested / added. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/Makefile | 1 + + arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 2 + + .../bcm4908/bcm4908-asus-gt-ac5300.dts | 66 +++++++ + .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 187 ++++++++++++++++++ + 4 files changed, 256 insertions(+) + create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile + create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts + create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi + +--- a/arch/arm64/boot/dts/broadcom/Makefile ++++ b/arch/arm64/boot/dts/broadcom/Makefile +@@ -5,5 +5,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp + bcm2837-rpi-3-b-plus.dtb \ + bcm2837-rpi-cm3-io3.dtb + ++subdir-y += bcm4908 + subdir-y += northstar2 + subdir-y += stingray +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile +@@ -0,0 +1,2 @@ ++# SPDX-License-Identifier: GPL-2.0 ++dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +@@ -0,0 +1,66 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++#include ++#include ++ ++#include "bcm4908.dtsi" ++ ++/ { ++ compatible = "asus,gt-ac5300", "brcm,bcm4908"; ++ model = "Asus GT-AC5300"; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x00 0x00 0x00 0x40000000>; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ poll-interval = <100>; ++ ++ wifi { ++ label = "WiFi"; ++ linux,code = ; ++ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wps { ++ label = "WPS"; ++ linux,code = ; ++ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; ++ }; ++ ++ restart { ++ label = "Reset"; ++ linux,code = ; ++ gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; ++ }; ++ ++ brightness { ++ label = "LEDs"; ++ linux,code = ; ++ gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&nandcs { ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ nand-on-flash-bbt; ++ brcm,nand-has-wp; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "cferom"; ++ reg = <0x0 0x100000>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -0,0 +1,187 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++#include ++#include ++ ++/dts-v1/; ++ ++/ { ++ interrupt-parent = <&gic>; ++ ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "brcm,brahma-b53"; ++ reg = <0x0>; ++ next-level-cache = <&l2>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "brcm,brahma-b53"; ++ reg = <0x1>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0xfff8>; ++ next-level-cache = <&l2>; ++ }; ++ ++ cpu2: cpu@2 { ++ device_type = "cpu"; ++ compatible = "brcm,brahma-b53"; ++ reg = <0x2>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0xfff8>; ++ next-level-cache = <&l2>; ++ }; ++ ++ cpu3: cpu@3 { ++ device_type = "cpu"; ++ compatible = "brcm,brahma-b53"; ++ reg = <0x3>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0xfff8>; ++ next-level-cache = <&l2>; ++ }; ++ ++ l2: l2-cache0 { ++ compatible = "cache"; ++ }; ++ }; ++ ++ axi@81000000 { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x00 0x00 0x81000000 0x4000>; ++ ++ gic: interrupt-controller@1000 { ++ compatible = "arm,gic-400"; ++ #interrupt-cells = <3>; ++ #address-cells = <0>; ++ interrupt-controller; ++ reg = <0x1000 0x1000>, ++ <0x2000 0x2000>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,armv8-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ }; ++ ++ pmu { ++ compatible = "arm,cortex-a53-pmu"; ++ interrupts = , ++ , ++ , ++ ; ++ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; ++ }; ++ ++ clocks { ++ periph_clk: periph_clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <50000000>; ++ clock-output-names = "periph"; ++ }; ++ }; ++ ++ soc { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x00 0x00 0x80000000 0x10000>; ++ ++ usb@c300 { ++ compatible = "generic-ehci"; ++ reg = <0xc300 0x100>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ usb@c400 { ++ compatible = "generic-ohci"; ++ reg = <0xc400 0x100>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ usb@d000 { ++ compatible = "generic-xhci"; ++ reg = <0xd000 0x8c8>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ }; ++ ++ bus@ff800000 { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x00 0x00 0xff800000 0x3000>; ++ ++ timer: timer@400 { ++ compatible = "brcm,bcm6328-timer", "syscon"; ++ reg = <0x400 0x3c>; ++ }; ++ ++ gpio0: gpio-controller@500 { ++ compatible = "brcm,bcm6345-gpio"; ++ reg-names = "dirout", "dat"; ++ reg = <0x500 0x28>, <0x528 0x28>; ++ ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; ++ ++ uart0: serial@640 { ++ compatible = "brcm,bcm6345-uart"; ++ reg = <0x640 0x18>; ++ interrupts = ; ++ clocks = <&periph_clk>; ++ clock-names = "periph"; ++ status = "okay"; ++ }; ++ ++ nand@1800 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand"; ++ reg = <0x1800 0x600>, <0x2000 0x10>; ++ reg-names = "nand", "nand-int-base"; ++ interrupts = ; ++ interrupt-names = "nand"; ++ status = "okay"; ++ ++ nandcs: nandcs@0 { ++ compatible = "brcm,nandcs"; ++ reg = <0>; ++ }; ++ }; ++ ++ reboot { ++ compatible = "syscon-reboot"; ++ regmap = <&timer>; ++ offset = <0x34>; ++ mask = <1>; ++ }; ++ }; ++}; diff --git a/target/linux/bcm4908/patches-5.10/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch b/target/linux/bcm4908/patches-5.10/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch new file mode 100644 index 0000000000..962517a57e --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch @@ -0,0 +1,44 @@ +From dccb22d078ebd098115e4f66bde1ee2249c8640b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 12 Nov 2020 16:08:30 +0100 +Subject: [PATCH] arm64: add config for Broadcom BCM4908 SoCs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add ARCH_BCM4908 config that can be used for compiling DTS files. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/Kconfig.platforms | 8 ++++++++ + arch/arm64/configs/defconfig | 1 + + 2 files changed, 9 insertions(+) + +--- a/arch/arm64/Kconfig.platforms ++++ b/arch/arm64/Kconfig.platforms +@@ -43,6 +43,14 @@ config ARCH_BCM2835 + This enables support for the Broadcom BCM2837 and BCM2711 SoC. + These SoCs are used in the Raspberry Pi 3 and 4 devices. + ++config ARCH_BCM4908 ++ bool "Broadcom BCM4908 family" ++ select GPIOLIB ++ help ++ This enables support for the Broadcom BCM4906, BCM4908 and ++ BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be ++ found in home routers. ++ + config ARCH_BCM_IPROC + bool "Broadcom iProc SoC Family" + select COMMON_CLK_IPROC +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -32,6 +32,7 @@ CONFIG_ARCH_AGILEX=y + CONFIG_ARCH_SUNXI=y + CONFIG_ARCH_ALPINE=y + CONFIG_ARCH_BCM2835=y ++CONFIG_ARCH_BCM4908=y + CONFIG_ARCH_BCM_IPROC=y + CONFIG_ARCH_BERLIN=y + CONFIG_ARCH_BRCMSTB=y diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch new file mode 100644 index 0000000000..24a0749c77 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch @@ -0,0 +1,28 @@ +From 3a5da4f54801ac42837a0b3151fa8285e01e8b0e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 8 Dec 2020 08:03:03 +0100 +Subject: [PATCH] dt-bindings: arm: bcm: document Netgear R8000P binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It's a BCM4906 based device. + +Signed-off-by: Rafał Miłecki +Acked-by: Rob Herring +Signed-off-by: Florian Fainelli +--- + Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml ++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml +@@ -19,6 +19,8 @@ properties: + oneOf: + - description: BCM4906 based boards + items: ++ - enum: ++ - netgear,r8000p + - const: brcm,bcm4906 + - const: brcm,bcm4908 + diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch new file mode 100644 index 0000000000..93fa2150af --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch @@ -0,0 +1,104 @@ +From c8b404fb05dcfadff477e49b7ea6b500e015f101 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 8 Dec 2020 08:03:04 +0100 +Subject: [PATCH 2/4] arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P + DTS files +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Netgear R8000P is home router based on BCM4906 that is a cheaper variant +of BCM4908 (e.g. 2 cores instead of 4). + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 + + .../bcm4908/bcm4906-netgear-r8000p.dts | 52 +++++++++++++++++++ + .../boot/dts/broadcom/bcm4908/bcm4906.dtsi | 18 +++++++ + 3 files changed, 71 insertions(+) + create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts + create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile +@@ -1,2 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0 ++dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb + dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +@@ -0,0 +1,52 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++#include ++#include ++#include ++ ++#include "bcm4906.dtsi" ++ ++/ { ++ compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908"; ++ model = "Netgear R8000P"; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x00 0x00 0x00 0x20000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ wps { ++ function = LED_FUNCTION_WPS; ++ color = ; ++ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&nandcs { ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ nand-on-flash-bbt; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "cferom"; ++ reg = <0x0 0x100000>; ++ }; ++ ++ partition@100000 { ++ label = "firmware"; ++ reg = <0x100000 0x4400000>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi +@@ -0,0 +1,18 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++#include "bcm4908.dtsi" ++ ++/ { ++ cpus { ++ /delete-node/ cpu@2; ++ ++ /delete-node/ cpu@3; ++ }; ++ ++ pmu { ++ compatible = "arm,cortex-a53-pmu"; ++ interrupts = , ++ ; ++ interrupt-affinity = <&cpu0>, <&cpu1>; ++ }; ++}; diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch new file mode 100644 index 0000000000..ccd260fadf --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch @@ -0,0 +1,32 @@ +From 56098be85d19cd56b59d7b3854ea035cc8cb9e95 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 8 Dec 2020 11:49:50 +0100 +Subject: [PATCH 3/4] arm64: dts: broadcom: bcm4908: use proper NAND binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 has controller that needs different IRQ handling just like the +BCM63138. Describe it properly. + +On Linux this change fixes: +brcmstb_nand ff801800.nand: timeout waiting for command 0x9 +brcmstb_nand ff801800.nand: intfc status d0000000 + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -164,7 +164,7 @@ + nand@1800 { + #address-cells = <1>; + #size-cells = <0>; +- compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand"; ++ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + interrupts = ; diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch new file mode 100644 index 0000000000..8ce4d69d8f --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch @@ -0,0 +1,41 @@ +From 1b88c6ed26a1aa1d68d1661404e6e939709ff530 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 10 Dec 2020 08:21:54 +0100 +Subject: [PATCH 4/4] arm64: dts: broadcom: bcm4908: describe PCIe reset + controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reset controller is a single register in the Broadcom's MISC block. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -177,6 +177,21 @@ + }; + }; + ++ misc@2600 { ++ compatible = "brcm,misc", "simple-mfd"; ++ reg = <0x2600 0xe4>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x00 0x2600 0xe4>; ++ ++ reset-controller@2644 { ++ compatible = "brcm,bcm4908-misc-pcie-reset"; ++ reg = <0x44 0x04>; ++ #reset-cells = <1>; ++ }; ++ }; ++ + reboot { + compatible = "syscon-reboot"; + regmap = <&timer>; diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch new file mode 100644 index 0000000000..f80dc239bc --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch @@ -0,0 +1,184 @@ +From 527a3ac9bdf81da4b7160ce3cea57f28a0e5eb64 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 13 Jan 2021 12:14:06 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe internal switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always +connected to the internal PHYs. Remaining ports depend on device setup. + +Asus GT-AC5300 has an extra switch with its PHYs accessible using the +internal MDIO. + +CPU port and Ethernet interface remain to be documented. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../bcm4908/bcm4908-asus-gt-ac5300.dts | 51 +++++++++++ + .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 85 ++++++++++++++++++- + 2 files changed, 135 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +@@ -44,6 +44,57 @@ + }; + }; + ++&ports { ++ port@0 { ++ label = "lan2"; ++ }; ++ ++ port@1 { ++ label = "lan1"; ++ }; ++ ++ port@2 { ++ label = "lan6"; ++ }; ++ ++ port@3 { ++ label = "lan5"; ++ }; ++ ++ /* External BCM53134S switch */ ++ port@7 { ++ label = "sw"; ++ reg = <7>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++}; ++ ++&mdio { ++ /* lan8 */ ++ ethernet-phy@0 { ++ reg = <0>; ++ }; ++ ++ /* lan7 */ ++ ethernet-phy@1 { ++ reg = <1>; ++ }; ++ ++ /* lan4 */ ++ ethernet-phy@2 { ++ reg = <2>; ++ }; ++ ++ /* lan3 */ ++ ethernet-phy@3 { ++ reg = <3>; ++ }; ++}; ++ + &nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -108,7 +108,7 @@ + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; +- ranges = <0x00 0x00 0x80000000 0x10000>; ++ ranges = <0x00 0x00 0x80000000 0xd0000>; + + usb@c300 { + compatible = "generic-ehci"; +@@ -130,6 +130,89 @@ + interrupts = ; + status = "disabled"; + }; ++ ++ ethernet-switch@80000 { ++ compatible = "simple-bus"; ++ #size-cells = <1>; ++ #address-cells = <1>; ++ ranges = <0 0x80000 0x50000>; ++ ++ ethernet-switch@0 { ++ compatible = "brcm,bcm4908-switch"; ++ reg = <0x0 0x40000>, ++ <0x40000 0x110>, ++ <0x40340 0x30>, ++ <0x40380 0x30>, ++ <0x40600 0x34>, ++ <0x40800 0x208>; ++ reg-names = "core", "reg", "intrl2_0", ++ "intrl2_1", "fcb", "acb"; ++ interrupts = , ++ ; ++ brcm,num-gphy = <5>; ++ brcm,num-rgmii-ports = <2>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ports: ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ phy-mode = "internal"; ++ phy-handle = <&phy8>; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ phy-mode = "internal"; ++ phy-handle = <&phy9>; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ phy-mode = "internal"; ++ phy-handle = <&phy10>; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ phy-mode = "internal"; ++ phy-handle = <&phy11>; ++ }; ++ }; ++ }; ++ ++ mdio: mdio@405c0 { ++ compatible = "brcm,unimac-mdio"; ++ reg = <0x405c0 0x8>; ++ reg-names = "mdio"; ++ #size-cells = <0>; ++ #address-cells = <1>; ++ ++ phy8: ethernet-phy@8 { ++ reg = <8>; ++ }; ++ ++ phy9: ethernet-phy@9 { ++ reg = <9>; ++ }; ++ ++ phy10: ethernet-phy@a { ++ reg = <10>; ++ }; ++ ++ phy11: ethernet-phy@b { ++ reg = <11>; ++ }; ++ ++ phy12: ethernet-phy@c { ++ reg = <12>; ++ }; ++ }; ++ }; + }; + + bus@ff800000 { diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch new file mode 100644 index 0000000000..c1a9c35837 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch @@ -0,0 +1,50 @@ +From edcf90801c8e58bd6306d85a4e714a6f09f452df Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 13 Jan 2021 12:15:47 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe PMB block +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +PMB (Power Management Bus) controls powering connected devices (e.g. +PCIe, USB, SATA). In BCM4908 it's a part of the PROCMON block. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -108,7 +108,7 @@ + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; +- ranges = <0x00 0x00 0x80000000 0xd0000>; ++ ranges = <0x00 0x00 0x80000000 0x281000>; + + usb@c300 { + compatible = "generic-ehci"; +@@ -213,6 +213,21 @@ + }; + }; + }; ++ ++ procmon: syscon@280000 { ++ compatible = "simple-bus"; ++ reg = <0x280000 0x1000>; ++ ranges; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ power-controller@2800c0 { ++ compatible = "brcm,bcm4908-pmb"; ++ reg = <0x2800c0 0x40>; ++ #power-domain-cells = <1>; ++ }; ++ }; + }; + + bus@ff800000 { diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch new file mode 100644 index 0000000000..edf2ca6a38 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch @@ -0,0 +1,134 @@ +From 3c321ba794ca6383a4aa68ea803e18cc6ad44412 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 19 Feb 2021 06:50:26 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe USB PHY +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI +and XHCI. It requires powering up using the PMB. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../bcm4908/bcm4906-netgear-r8000p.dts | 17 +++++++++++++ + .../bcm4908/bcm4908-asus-gt-ac5300.dts | 17 +++++++++++++ + .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 25 ++++++++++++++++--- + 3 files changed, 55 insertions(+), 4 deletions(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +@@ -26,6 +26,23 @@ + }; + }; + ++&usb_phy { ++ brcm,ioc = <1>; ++ status = "okay"; ++}; ++ ++&ehci { ++ status = "okay"; ++}; ++ ++&ohci { ++ status = "okay"; ++}; ++ ++&xhci { ++ status = "okay"; ++}; ++ + &nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +@@ -44,6 +44,23 @@ + }; + }; + ++&usb_phy { ++ brcm,ioc = <1>; ++ status = "okay"; ++}; ++ ++&ehci { ++ status = "okay"; ++}; ++ ++&ohci { ++ status = "okay"; ++}; ++ ++&xhci { ++ status = "okay"; ++}; ++ + &ports { + port@0 { + label = "lan2"; +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -2,6 +2,8 @@ + + #include + #include ++#include ++#include + + /dts-v1/; + +@@ -110,24 +112,39 @@ + #size-cells = <1>; + ranges = <0x00 0x00 0x80000000 0x281000>; + +- usb@c300 { ++ usb_phy: usb-phy@c200 { ++ compatible = "brcm,bcm4908-usb-phy"; ++ reg = <0xc200 0x100>; ++ reg-names = "ctrl"; ++ power-domains = <&pmb BCM_PMB_HOST_USB>; ++ dr_mode = "host"; ++ brcm,has-xhci; ++ brcm,has-eohci; ++ #phy-cells = <1>; ++ status = "disabled"; ++ }; ++ ++ ehci: usb@c300 { + compatible = "generic-ehci"; + reg = <0xc300 0x100>; + interrupts = ; ++ phys = <&usb_phy PHY_TYPE_USB2>; + status = "disabled"; + }; + +- usb@c400 { ++ ohci: usb@c400 { + compatible = "generic-ohci"; + reg = <0xc400 0x100>; + interrupts = ; ++ phys = <&usb_phy PHY_TYPE_USB2>; + status = "disabled"; + }; + +- usb@d000 { ++ xhci: usb@d000 { + compatible = "generic-xhci"; + reg = <0xd000 0x8c8>; + interrupts = ; ++ phys = <&usb_phy PHY_TYPE_USB3>; + status = "disabled"; + }; + +@@ -222,7 +239,7 @@ + #address-cells = <1>; + #size-cells = <1>; + +- power-controller@2800c0 { ++ pmb: power-controller@2800c0 { + compatible = "brcm,bcm4908-pmb"; + reg = <0x2800c0 0x40>; + #power-domain-cells = <1>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch new file mode 100644 index 0000000000..6c41e3d797 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch @@ -0,0 +1,51 @@ +From b1bbe48eec190b6a35f400c5a3ec6b0fc8fc3fe6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 19 Feb 2021 06:50:27 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Ethernet controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 SoCs have an integrated Ethernet controller. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -112,6 +112,14 @@ + #size-cells = <1>; + ranges = <0x00 0x00 0x80000000 0x281000>; + ++ enet: ethernet@2000 { ++ compatible = "brcm,bcm4908-enet"; ++ reg = <0x2000 0x1000>; ++ ++ interrupts = ; ++ interrupt-names = "rx"; ++ }; ++ + usb_phy: usb-phy@c200 { + compatible = "brcm,bcm4908-usb-phy"; + reg = <0xc200 0x100>; +@@ -199,6 +207,17 @@ + phy-mode = "internal"; + phy-handle = <&phy11>; + }; ++ ++ port@8 { ++ reg = <8>; ++ phy-mode = "internal"; ++ ethernet = <&enet>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; + }; + }; + diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch new file mode 100644 index 0000000000..9c7f9cee6c --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch @@ -0,0 +1,50 @@ +From 406e98afffe975982f63ea5d21bf9a47a81b56ee Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 19 Feb 2021 06:50:28 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +R8000P model has 4 LAN ports and 1 WAN port. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../bcm4908/bcm4906-netgear-r8000p.dts | 25 +++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +@@ -43,6 +43,31 @@ + status = "okay"; + }; + ++&ports { ++ port@0 { ++ label = "lan4"; ++ }; ++ ++ port@1 { ++ label = "lan3"; ++ }; ++ ++ port@2 { ++ label = "lan2"; ++ }; ++ ++ port@3 { ++ label = "lan1"; ++ }; ++ ++ port@7 { ++ reg = <7>; ++ phy-mode = "internal"; ++ phy-handle = <&phy12>; ++ label = "wan"; ++ }; ++}; ++ + &nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch new file mode 100644 index 0000000000..56249c82f8 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch @@ -0,0 +1,81 @@ +From 6224415c0389ba6661825746312163a64ece8f3a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 19 Feb 2021 06:50:29 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P + LEDs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There are a few more GPIO connected LEDs there didn't get described +initially. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../bcm4908/bcm4906-netgear-r8000p.dts | 50 ++++++++++++++++++- + 1 file changed, 49 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +@@ -18,11 +18,59 @@ + leds { + compatible = "gpio-leds"; + +- wps { ++ led-power-white { ++ function = LED_FUNCTION_POWER; ++ color = ; ++ gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-power-amber { ++ function = LED_FUNCTION_POWER; ++ color = ; ++ gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + }; ++ ++ led-2ghz { ++ function = "2ghz"; ++ color = ; ++ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-5ghz-1 { ++ function = "5ghz-1"; ++ color = ; ++ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-5ghz-2 { ++ function = "5ghz-2"; ++ color = ; ++ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-usb2 { ++ function = "usb2"; ++ color = ; ++ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-usb3 { ++ function = "usb3"; ++ color = ; ++ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-wifi { ++ function = "wifi"; ++ color = ; ++ gpios = <&gpio0 56 GPIO_ACTIVE_LOW>; ++ }; + }; + }; + diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch new file mode 100644 index 0000000000..d03adc1743 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch @@ -0,0 +1,55 @@ +From cbaca2c467dc25a163107e14a53b7925214eab17 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 19 Feb 2021 06:50:30 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe firmware partitions +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 bootloader supports multiple firmware partitions and has its own +bindings defined for them. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 1 + + .../dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 12 +++++++++++- + 2 files changed, 12 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +@@ -135,6 +135,7 @@ + }; + + partition@100000 { ++ compatible = "brcm,bcm4908-firmware"; + label = "firmware"; + reg = <0x100000 0x4400000>; + }; +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +@@ -122,7 +122,7 @@ + #size-cells = <0>; + + partitions { +- compatible = "fixed-partitions"; ++ compatible = "brcm,bcm4908-partitions"; + #address-cells = <1>; + #size-cells = <1>; + +@@ -130,5 +130,15 @@ + label = "cferom"; + reg = <0x0 0x100000>; + }; ++ ++ partition@100000 { ++ compatible = "brcm,bcm4908-firmware"; ++ reg = <0x100000 0x5700000>; ++ }; ++ ++ partition@5800000 { ++ compatible = "brcm,bcm4908-firmware"; ++ reg = <0x5800000 0x5700000>; ++ }; + }; + }; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch new file mode 100644 index 0000000000..8b95fc2759 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch @@ -0,0 +1,30 @@ +From a348ff97ffb840b9d74b0e64b3e0e6002187d224 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 9 Mar 2021 19:44:09 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: fix switch parent node name +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Ethernet switch and MDIO are grouped using "simple-bus". It's not +allowed to use "ethernet-switch" node name as it isn't a switch. Replace +it with "bus". + +Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch") +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -156,7 +156,7 @@ + status = "disabled"; + }; + +- ethernet-switch@80000 { ++ bus@80000 { + compatible = "simple-bus"; + #size-cells = <1>; + #address-cells = <1>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch new file mode 100644 index 0000000000..07d4121ef1 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch @@ -0,0 +1,27 @@ +From b3de2a12d1a61d90a4d86c9840acc7d05066137f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 10 Mar 2021 08:46:02 +0100 +Subject: [PATCH] dt-bindings: arm: bcm: document TP-Link Archer C2300 binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +One more BCM4906 based device. + +Signed-off-by: Rafał Miłecki +Reviewed-by: Rob Herring +Signed-off-by: Florian Fainelli +--- + Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 1 + + 1 file changed, 1 insertion(+) + +--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml ++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml +@@ -21,6 +21,7 @@ properties: + items: + - enum: + - netgear,r8000p ++ - tplink,archer-c2300-v1 + - const: brcm,bcm4906 + - const: brcm,bcm4908 + diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch new file mode 100644 index 0000000000..0dd7f2301f --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch @@ -0,0 +1,212 @@ +From 6a30934a5470a0ce7ea32b0c6b600accfae94b1a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 10 Mar 2021 08:46:03 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It +has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports, +1 WAN port. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 + + .../bcm4906-tplink-archer-c2300-v1.dts | 182 ++++++++++++++++++ + 2 files changed, 183 insertions(+) + create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile +@@ -1,3 +1,4 @@ + # SPDX-License-Identifier: GPL-2.0 + dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb ++dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb + dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts +@@ -0,0 +1,182 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++ ++#include ++#include ++#include ++ ++#include "bcm4906.dtsi" ++ ++/ { ++ compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908"; ++ model = "TP-Link Archer C2300 V1"; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x00 0x00 0x00 0x20000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-power { ++ function = LED_FUNCTION_POWER; ++ color = ; ++ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-2ghz { ++ function = "2ghz"; ++ color = ; ++ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-5ghz { ++ function = "5ghz"; ++ color = ; ++ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-wan-amber { ++ function = LED_FUNCTION_WAN; ++ color = ; ++ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led-wan-blue { ++ function = LED_FUNCTION_WAN; ++ color = ; ++ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-lan { ++ function = LED_FUNCTION_LAN; ++ color = ; ++ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-wps { ++ function = LED_FUNCTION_WPS; ++ color = ; ++ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-usb2 { ++ function = "usb2"; ++ color = ; ++ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-usb3 { ++ function = "usbd3"; ++ color = ; ++ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-brightness { ++ function = LED_FUNCTION_BACKLIGHT; ++ color = ; ++ gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ poll-interval = <100>; ++ ++ brightness { ++ label = "LEDs"; ++ linux,code = ; ++ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wps { ++ label = "WPS"; ++ linux,code = ; ++ gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wifi { ++ label = "WiFi"; ++ linux,code = ; ++ gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; ++ }; ++ ++ restart { ++ label = "Reset"; ++ linux,code = ; ++ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&usb_phy { ++ brcm,ioc = <1>; ++ status = "okay"; ++}; ++ ++&ehci { ++ status = "okay"; ++}; ++ ++&ohci { ++ status = "okay"; ++}; ++ ++&xhci { ++ status = "okay"; ++}; ++ ++&ports { ++ port@0 { ++ label = "lan4"; ++ }; ++ ++ port@1 { ++ label = "lan3"; ++ }; ++ ++ port@2 { ++ label = "lan2"; ++ }; ++ ++ port@3 { ++ label = "lan1"; ++ }; ++ ++ port@7 { ++ reg = <7>; ++ phy-mode = "internal"; ++ phy-handle = <&phy12>; ++ label = "wan"; ++ }; ++}; ++ ++&nandcs { ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ nand-on-flash-bbt; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ partitions { ++ compatible = "brcm,bcm4908-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "cferom"; ++ reg = <0x0 0x100000>; ++ }; ++ ++ partition@100000 { ++ compatible = "brcm,bcm4908-firmware"; ++ reg = <0x100000 0x3900000>; ++ }; ++ ++ partition@5800000 { ++ compatible = "brcm,bcm4908-firmware"; ++ reg = <0x3a00000 0x3900000>; ++ }; ++ }; ++}; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch new file mode 100644 index 0000000000..30def36c39 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch @@ -0,0 +1,28 @@ +From 5ccb9f9cf05bbd729430c6d6d30d40c96a15c56a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 12 Mar 2021 12:01:20 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY + mode +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Port 7 is connected to the external BCM53134S switch using RGMII. + +Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch") +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +@@ -82,6 +82,7 @@ + port@7 { + label = "sw"; + reg = <7>; ++ phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch new file mode 100644 index 0000000000..9ba30b3a14 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch @@ -0,0 +1,30 @@ +From 5337af7918bedde9713cd223ce5df74b3d6c7d7a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 17 Mar 2021 09:16:31 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Ethernet TX irq +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This hardware supports two interrupts, one per DMA channel (RX and TX). + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -116,8 +116,9 @@ + compatible = "brcm,bcm4908-enet"; + reg = <0x2000 0x1000>; + +- interrupts = ; +- interrupt-names = "rx"; ++ interrupts = , ++ ; ++ interrupt-names = "rx", "tx"; + }; + + usb_phy: usb-phy@c200 { diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch new file mode 100644 index 0000000000..67f30c8213 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch @@ -0,0 +1,82 @@ +From 9f01f5cdb548352418b34ce77db02a560fe2913b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 29 Mar 2021 17:45:14 +0200 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Ethernet MAC addr +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On most BCM4908 devices MAC address can be read from the bootloader +binary section containing device settings. Use NVMEM to describe that. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + .../broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 14 ++++++++++++++ + .../broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 14 ++++++++++++++ + 2 files changed, 28 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +@@ -74,6 +74,11 @@ + }; + }; + ++&enet { ++ nvmem-cells = <&base_mac_addr>; ++ nvmem-cell-names = "mac-address"; ++}; ++ + &usb_phy { + brcm,ioc = <1>; + status = "okay"; +@@ -130,8 +135,17 @@ + #size-cells = <1>; + + partition@0 { ++ compatible = "nvmem-cells"; + label = "cferom"; + reg = <0x0 0x100000>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x0 0x100000>; ++ ++ base_mac_addr: mac@106a0 { ++ reg = <0x106a0 0x6>; ++ }; + }; + + partition@100000 { +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +@@ -44,6 +44,11 @@ + }; + }; + ++&enet { ++ nvmem-cells = <&base_mac_addr>; ++ nvmem-cell-names = "mac-address"; ++}; ++ + &usb_phy { + brcm,ioc = <1>; + status = "okay"; +@@ -128,8 +133,17 @@ + #size-cells = <1>; + + partition@0 { ++ compatible = "nvmem-cells"; + label = "cferom"; + reg = <0x0 0x100000>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x0 0x100000>; ++ ++ base_mac_addr: mac@106a0 { ++ reg = <0x106a0 0x6>; ++ }; + }; + + partition@100000 { diff --git a/target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch b/target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch new file mode 100644 index 0000000000..e2f63e7fa0 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch @@ -0,0 +1,141 @@ +From 73b7a6047971aa6ce4a70fc4901964d14f077171 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 6 Jan 2021 22:32:02 +0100 +Subject: [PATCH] net: dsa: bcm_sf2: support BCM4908's integrated switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 family SoCs come with integrated Starfighter 2 switch. Its +registers layout it a mix of BCM7278 and BCM7445. It has 5 integrated +PHYs and 8 ports. It also supports RGMII and SerDes. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210106213202.17459-3-zajec5@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/b53/b53_common.c | 14 +++++++++++++ + drivers/net/dsa/b53/b53_priv.h | 1 + + drivers/net/dsa/bcm_sf2.c | 36 +++++++++++++++++++++++++++++--- + drivers/net/dsa/bcm_sf2_regs.h | 1 + + 4 files changed, 49 insertions(+), 3 deletions(-) + +--- a/drivers/net/dsa/b53/b53_common.c ++++ b/drivers/net/dsa/b53/b53_common.c +@@ -2493,6 +2493,22 @@ static const struct b53_chip_data b53_sw + .jumbo_pm_reg = B53_JUMBO_PORT_MASK, + .jumbo_size_reg = B53_JUMBO_MAX_SIZE, + }, ++ /* Starfighter 2 */ ++ { ++ .chip_id = BCM4908_DEVICE_ID, ++ .dev_name = "BCM4908", ++ .vlans = 4096, ++ .enabled_ports = 0x1bf, ++#if 0 ++ .arl_bins = 4, ++ .arl_buckets = 256, ++#endif ++ .cpu_port = 8, /* TODO: ports 4, 5, 8 */ ++ .vta_regs = B53_VTA_REGS, ++ .duplex_reg = B53_DUPLEX_STAT_GE, ++ .jumbo_pm_reg = B53_JUMBO_PORT_MASK, ++ .jumbo_size_reg = B53_JUMBO_MAX_SIZE, ++ }, + { + .chip_id = BCM7445_DEVICE_ID, + .dev_name = "BCM7445", +--- a/drivers/net/dsa/b53/b53_priv.h ++++ b/drivers/net/dsa/b53/b53_priv.h +@@ -64,6 +64,7 @@ struct b53_io_ops { + #define B53_INVALID_LANE 0xff + + enum { ++ BCM4908_DEVICE_ID = 0x4908, + BCM5325_DEVICE_ID = 0x25, + BCM5365_DEVICE_ID = 0x65, + BCM5389_DEVICE_ID = 0x89, +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -105,7 +105,8 @@ static void bcm_sf2_imp_setup(struct dsa + b53_brcm_hdr_setup(ds, port); + + if (port == 8) { +- if (priv->type == BCM7445_DEVICE_ID) ++ if (priv->type == BCM4908_DEVICE_ID || ++ priv->type == BCM7445_DEVICE_ID) + offset = CORE_STS_OVERRIDE_IMP; + else + offset = CORE_STS_OVERRIDE_IMP2; +@@ -708,7 +709,8 @@ static void bcm_sf2_sw_mac_link_down(str + u32 reg, offset; + + if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { +- if (priv->type == BCM7445_DEVICE_ID) ++ if (priv->type == BCM4908_DEVICE_ID || ++ priv->type == BCM7445_DEVICE_ID) + offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); + else + offset = CORE_STS_OVERRIDE_GMIIP2_PORT(port); +@@ -735,7 +737,8 @@ static void bcm_sf2_sw_mac_link_up(struc + bcm_sf2_sw_mac_link_set(ds, port, interface, true); + + if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { +- if (priv->type == BCM7445_DEVICE_ID) ++ if (priv->type == BCM4908_DEVICE_ID || ++ priv->type == BCM7445_DEVICE_ID) + offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); + else + offset = CORE_STS_OVERRIDE_GMIIP2_PORT(port); +@@ -1128,6 +1131,30 @@ struct bcm_sf2_of_data { + unsigned int num_cfp_rules; + }; + ++static const u16 bcm_sf2_4908_reg_offsets[] = { ++ [REG_SWITCH_CNTRL] = 0x00, ++ [REG_SWITCH_STATUS] = 0x04, ++ [REG_DIR_DATA_WRITE] = 0x08, ++ [REG_DIR_DATA_READ] = 0x0c, ++ [REG_SWITCH_REVISION] = 0x10, ++ [REG_PHY_REVISION] = 0x14, ++ [REG_SPHY_CNTRL] = 0x24, ++ [REG_CROSSBAR] = 0xc8, ++ [REG_RGMII_0_CNTRL] = 0xe0, ++ [REG_RGMII_1_CNTRL] = 0xec, ++ [REG_RGMII_2_CNTRL] = 0xf8, ++ [REG_LED_0_CNTRL] = 0x40, ++ [REG_LED_1_CNTRL] = 0x4c, ++ [REG_LED_2_CNTRL] = 0x58, ++}; ++ ++static const struct bcm_sf2_of_data bcm_sf2_4908_data = { ++ .type = BCM4908_DEVICE_ID, ++ .core_reg_align = 0, ++ .reg_offsets = bcm_sf2_4908_reg_offsets, ++ .num_cfp_rules = 0, /* FIXME */ ++}; ++ + /* Register offsets for the SWITCH_REG_* block */ + static const u16 bcm_sf2_7445_reg_offsets[] = { + [REG_SWITCH_CNTRL] = 0x00, +@@ -1176,6 +1203,9 @@ static const struct bcm_sf2_of_data bcm_ + }; + + static const struct of_device_id bcm_sf2_of_match[] = { ++ { .compatible = "brcm,bcm4908-switch", ++ .data = &bcm_sf2_4908_data ++ }, + { .compatible = "brcm,bcm7445-switch-v4.0", + .data = &bcm_sf2_7445_data + }, +--- a/drivers/net/dsa/bcm_sf2_regs.h ++++ b/drivers/net/dsa/bcm_sf2_regs.h +@@ -17,6 +17,7 @@ enum bcm_sf2_reg_offs { + REG_SWITCH_REVISION, + REG_PHY_REVISION, + REG_SPHY_CNTRL, ++ REG_CROSSBAR, + REG_RGMII_0_CNTRL, + REG_RGMII_1_CNTRL, + REG_RGMII_2_CNTRL, diff --git a/target/linux/bcm4908/patches-5.10/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch b/target/linux/bcm4908/patches-5.10/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch new file mode 100644 index 0000000000..7785e0c036 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch @@ -0,0 +1,33 @@ +From 8373a0fe9c7160a55482effa8a3f725efd3f8434 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 10 Mar 2021 13:51:59 +0100 +Subject: [PATCH] net: dsa: bcm_sf2: use 2 Gbps IMP port link on BCM4908 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 uses 2 Gbps link between switch and the Ethernet interface. +Without this BCM4908 devices were able to achieve only 2 x ~895 Mb/s. +This allows handling e.g. NAT traffic with 940 Mb/s. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/bcm_sf2.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -114,7 +114,10 @@ static void bcm_sf2_imp_setup(struct dsa + /* Force link status for IMP port */ + reg = core_readl(priv, offset); + reg |= (MII_SW_OR | LINK_STS); +- reg &= ~GMII_SPEED_UP_2G; ++ if (priv->type == BCM4908_DEVICE_ID) ++ reg |= GMII_SPEED_UP_2G; ++ else ++ reg &= ~GMII_SPEED_UP_2G; + core_writel(priv, reg, offset); + + /* Enable Broadcast, Multicast, Unicast forwarding to IMP port */ diff --git a/target/linux/bcm4908/patches-5.10/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch b/target/linux/bcm4908/patches-5.10/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch new file mode 100644 index 0000000000..8c60b9706e --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch @@ -0,0 +1,65 @@ +From 387d1c1819790aa8398c7cffab587f9a050a0d1a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Sun, 7 Feb 2021 23:26:31 +0100 +Subject: [PATCH] dt-bindings: net: document BCM4908 Ethernet controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 is a family of SoCs with integrated Ethernet controller. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + .../bindings/net/brcm,bcm4908enet.yaml | 45 +++++++++++++++++++ + 1 file changed, 45 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml +@@ -0,0 +1,45 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/net/brcm,bcm4908enet.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Broadcom BCM4908 Ethernet controller ++ ++description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs ++ ++maintainers: ++ - Rafał Miłecki ++ ++properties: ++ compatible: ++ const: brcm,bcm4908enet ++ ++ reg: ++ maxItems: 1 ++ ++ interrupts: ++ description: RX interrupt ++ ++ interrupt-names: ++ const: rx ++ ++required: ++ - reg ++ - interrupts ++ - interrupt-names ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ #include ++ ++ ethernet@80002000 { ++ compatible = "brcm,bcm4908enet"; ++ reg = <0x80002000 0x1000>; ++ ++ interrupts = ; ++ interrupt-names = "rx"; ++ }; diff --git a/target/linux/bcm4908/patches-5.10/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch b/target/linux/bcm4908/patches-5.10/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch new file mode 100644 index 0000000000..958ef85f9e --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch @@ -0,0 +1,847 @@ +From 4feffeadbcb2e5b11cbbf191a33c245b74a5837b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Sun, 7 Feb 2021 23:26:32 +0100 +Subject: [PATCH] net: broadcom: bcm4908enet: add BCM4908 controller driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 SoCs family uses Ethernel controller that includes UniMAC but +uses different DMA engine (than other controllers) and requires +different programming. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + MAINTAINERS | 9 + + drivers/net/ethernet/broadcom/Kconfig | 8 + + drivers/net/ethernet/broadcom/Makefile | 1 + + drivers/net/ethernet/broadcom/bcm4908enet.c | 676 ++++++++++++++++++++ + drivers/net/ethernet/broadcom/bcm4908enet.h | 96 +++ + 5 files changed, 790 insertions(+) + create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.c + create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.h + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -3427,6 +3427,15 @@ F: Documentation/devicetree/bindings/mip + F: arch/mips/bcm47xx/* + F: arch/mips/include/asm/mach-bcm47xx/* + ++BROADCOM BCM4908 ETHERNET DRIVER ++M: Rafał Miłecki ++M: bcm-kernel-feedback-list@broadcom.com ++L: netdev@vger.kernel.org ++S: Maintained ++F: Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml ++F: drivers/net/ethernet/broadcom/bcm4908enet.* ++F: drivers/net/ethernet/broadcom/unimac.h ++ + BROADCOM BCM5301X ARM ARCHITECTURE + M: Hauke Mehrtens + M: Rafał Miłecki +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -51,6 +51,14 @@ config B44_PCI + depends on B44_PCI_AUTOSELECT && B44_PCICORE_AUTOSELECT + default y + ++config BCM4908ENET ++ tristate "Broadcom BCM4908 internal mac support" ++ depends on ARCH_BCM4908 || COMPILE_TEST ++ default y ++ help ++ This driver supports Ethernet controller integrated into Broadcom ++ BCM4908 family SoCs. ++ + config BCM63XX_ENET + tristate "Broadcom 63xx internal mac support" + depends on BCM63XX +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -4,6 +4,7 @@ + # + + obj-$(CONFIG_B44) += b44.o ++obj-$(CONFIG_BCM4908ENET) += bcm4908enet.o + obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o + obj-$(CONFIG_BCMGENET) += genet/ + obj-$(CONFIG_BNX2) += bnx2.o +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/bcm4908enet.c +@@ -0,0 +1,676 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (C) 2021 Rafał Miłecki ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "bcm4908enet.h" ++#include "unimac.h" ++ ++#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG ++#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG ++#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM ++#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM ++ ++#define ENET_TX_BDS_NUM 200 ++#define ENET_RX_BDS_NUM 200 ++#define ENET_RX_BDS_NUM_MAX 8192 ++ ++#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \ ++ ENET_DMA_CH_CFG_INT_NO_DESC | \ ++ ENET_DMA_CH_CFG_INT_BUFF_DONE) ++#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ ++ ++#define ENET_MTU_MIN 60 ++#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ ++#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ ++ ++struct bcm4908enet_dma_ring_bd { ++ __le32 ctl; ++ __le32 addr; ++} __packed; ++ ++struct bcm4908enet_dma_ring_slot { ++ struct sk_buff *skb; ++ unsigned int len; ++ dma_addr_t dma_addr; ++}; ++ ++struct bcm4908enet_dma_ring { ++ int is_tx; ++ int read_idx; ++ int write_idx; ++ int length; ++ u16 cfg_block; ++ u16 st_ram_block; ++ ++ union { ++ void *cpu_addr; ++ struct bcm4908enet_dma_ring_bd *buf_desc; ++ }; ++ dma_addr_t dma_addr; ++ ++ struct bcm4908enet_dma_ring_slot *slots; ++}; ++ ++struct bcm4908enet { ++ struct device *dev; ++ struct net_device *netdev; ++ struct napi_struct napi; ++ void __iomem *base; ++ ++ struct bcm4908enet_dma_ring tx_ring; ++ struct bcm4908enet_dma_ring rx_ring; ++}; ++ ++/*** ++ * R/W ops ++ */ ++ ++static inline u32 enet_read(struct bcm4908enet *enet, u16 offset) ++{ ++ return readl(enet->base + offset); ++} ++ ++static inline void enet_write(struct bcm4908enet *enet, u16 offset, u32 value) ++{ ++ writel(value, enet->base + offset); ++} ++ ++static inline void enet_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) ++{ ++ u32 val; ++ ++ WARN_ON(set & ~mask); ++ ++ val = enet_read(enet, offset); ++ val = (val & ~mask) | (set & mask); ++ enet_write(enet, offset, val); ++} ++ ++static inline void enet_set(struct bcm4908enet *enet, u16 offset, u32 set) ++{ ++ enet_maskset(enet, offset, set, set); ++} ++ ++static inline u32 enet_umac_read(struct bcm4908enet *enet, u16 offset) ++{ ++ return enet_read(enet, ENET_UNIMAC + offset); ++} ++ ++static inline void enet_umac_write(struct bcm4908enet *enet, u16 offset, u32 value) ++{ ++ enet_write(enet, ENET_UNIMAC + offset, value); ++} ++ ++static inline void enet_umac_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) ++{ ++ enet_maskset(enet, ENET_UNIMAC + offset, mask, set); ++} ++ ++static inline void enet_umac_set(struct bcm4908enet *enet, u16 offset, u32 set) ++{ ++ enet_set(enet, ENET_UNIMAC + offset, set); ++} ++ ++/*** ++ * Helpers ++ */ ++ ++static void bcm4908enet_intrs_on(struct bcm4908enet *enet) ++{ ++ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); ++} ++ ++static void bcm4908enet_intrs_off(struct bcm4908enet *enet) ++{ ++ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); ++} ++ ++static void bcm4908enet_intrs_ack(struct bcm4908enet *enet) ++{ ++ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); ++} ++ ++/*** ++ * DMA ++ */ ++ ++static int bcm4908_dma_alloc_buf_descs(struct bcm4908enet *enet, struct bcm4908enet_dma_ring *ring) ++{ ++ int size = ring->length * sizeof(struct bcm4908enet_dma_ring_bd); ++ struct device *dev = enet->dev; ++ ++ ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL); ++ if (!ring->cpu_addr) ++ return -ENOMEM; ++ ++ if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) { ++ dev_err(dev, "Invalid DMA ring alignment\n"); ++ goto err_free_buf_descs; ++ } ++ ++ ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL); ++ if (!ring->slots) ++ goto err_free_buf_descs; ++ ++ memset(ring->cpu_addr, 0, size); ++ ++ ring->read_idx = 0; ++ ring->write_idx = 0; ++ ++ return 0; ++ ++err_free_buf_descs: ++ dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr); ++ return -ENOMEM; ++} ++ ++static void bcm4908enet_dma_free(struct bcm4908enet *enet) ++{ ++ struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; ++ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct device *dev = enet->dev; ++ int size; ++ ++ size = rx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); ++ if (rx_ring->cpu_addr) ++ dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr); ++ kfree(rx_ring->slots); ++ ++ size = tx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); ++ if (tx_ring->cpu_addr) ++ dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr); ++ kfree(tx_ring->slots); ++} ++ ++static int bcm4908enet_dma_alloc(struct bcm4908enet *enet) ++{ ++ struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; ++ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct device *dev = enet->dev; ++ int err; ++ ++ tx_ring->length = ENET_TX_BDS_NUM; ++ tx_ring->is_tx = 1; ++ tx_ring->cfg_block = ENET_DMA_CH_TX_CFG; ++ tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM; ++ err = bcm4908_dma_alloc_buf_descs(enet, tx_ring); ++ if (err) { ++ dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err); ++ return err; ++ } ++ ++ rx_ring->length = ENET_RX_BDS_NUM; ++ rx_ring->is_tx = 0; ++ rx_ring->cfg_block = ENET_DMA_CH_RX_CFG; ++ rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM; ++ err = bcm4908_dma_alloc_buf_descs(enet, rx_ring); ++ if (err) { ++ dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err); ++ bcm4908enet_dma_free(enet); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void bcm4908enet_dma_reset(struct bcm4908enet *enet) ++{ ++ struct bcm4908enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring }; ++ int i; ++ ++ /* Disable the DMA controller and channel */ ++ for (i = 0; i < ARRAY_SIZE(rings); i++) ++ enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0); ++ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0); ++ ++ /* Reset channels state */ ++ for (i = 0; i < ARRAY_SIZE(rings); i++) { ++ struct bcm4908enet_dma_ring *ring = rings[i]; ++ ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0); ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0); ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0); ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0); ++ } ++} ++ ++static int bcm4908enet_dma_alloc_rx_buf(struct bcm4908enet *enet, unsigned int idx) ++{ ++ struct bcm4908enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx]; ++ struct bcm4908enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx]; ++ struct device *dev = enet->dev; ++ u32 tmp; ++ int err; ++ ++ slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; ++ ++ slot->skb = netdev_alloc_skb(enet->netdev, slot->len); ++ if (!slot->skb) ++ return -ENOMEM; ++ ++ slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); ++ err = dma_mapping_error(dev, slot->dma_addr); ++ if (err) { ++ dev_err(dev, "Failed to map DMA buffer: %d\n", err); ++ kfree_skb(slot->skb); ++ slot->skb = NULL; ++ return err; ++ } ++ ++ tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; ++ tmp |= DMA_CTL_STATUS_OWN; ++ if (idx == enet->rx_ring.length - 1) ++ tmp |= DMA_CTL_STATUS_WRAP; ++ buf_desc->ctl = cpu_to_le32(tmp); ++ buf_desc->addr = cpu_to_le32(slot->dma_addr); ++ ++ return 0; ++} ++ ++static void bcm4908enet_dma_ring_init(struct bcm4908enet *enet, ++ struct bcm4908enet_dma_ring *ring) ++{ ++ int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */ ++ int reset_subch = ring->is_tx ? 1 : 0; ++ ++ /* Reset the DMA channel */ ++ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch)); ++ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0); ++ ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); ++ ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, ++ (uint32_t)ring->dma_addr); ++} ++ ++static void bcm4908enet_dma_uninit(struct bcm4908enet *enet) ++{ ++ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct bcm4908enet_dma_ring_slot *slot; ++ struct device *dev = enet->dev; ++ int i; ++ ++ for (i = rx_ring->length - 1; i >= 0; i--) { ++ slot = &rx_ring->slots[i]; ++ if (!slot->skb) ++ continue; ++ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); ++ kfree_skb(slot->skb); ++ slot->skb = NULL; ++ } ++} ++ ++static int bcm4908enet_dma_init(struct bcm4908enet *enet) ++{ ++ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct device *dev = enet->dev; ++ int err; ++ int i; ++ ++ for (i = 0; i < rx_ring->length; i++) { ++ err = bcm4908enet_dma_alloc_rx_buf(enet, i); ++ if (err) { ++ dev_err(dev, "Failed to alloc RX buffer: %d\n", err); ++ bcm4908enet_dma_uninit(enet); ++ return err; ++ } ++ } ++ ++ bcm4908enet_dma_ring_init(enet, &enet->tx_ring); ++ bcm4908enet_dma_ring_init(enet, &enet->rx_ring); ++ ++ return 0; ++} ++ ++static void bcm4908enet_dma_tx_ring_ensable(struct bcm4908enet *enet, ++ struct bcm4908enet_dma_ring *ring) ++{ ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); ++} ++ ++static void bcm4908enet_dma_tx_ring_disable(struct bcm4908enet *enet, ++ struct bcm4908enet_dma_ring *ring) ++{ ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); ++} ++ ++static void bcm4908enet_dma_rx_ring_enable(struct bcm4908enet *enet, ++ struct bcm4908enet_dma_ring *ring) ++{ ++ enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); ++} ++ ++static void bcm4908enet_dma_rx_ring_disable(struct bcm4908enet *enet, ++ struct bcm4908enet_dma_ring *ring) ++{ ++ unsigned long deadline; ++ u32 tmp; ++ ++ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); ++ ++ deadline = jiffies + usecs_to_jiffies(2000); ++ do { ++ tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG); ++ if (!(tmp & ENET_DMA_CH_CFG_ENABLE)) ++ return; ++ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); ++ usleep_range(10, 30); ++ } while (!time_after_eq(jiffies, deadline)); ++ ++ dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n"); ++} ++ ++/*** ++ * Ethernet driver ++ */ ++ ++static void bcm4908enet_gmac_init(struct bcm4908enet *enet) ++{ ++ u32 cmd; ++ ++ cmd = enet_umac_read(enet, UMAC_CMD); ++ enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); ++ enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); ++ ++ enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH); ++ enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0); ++ ++ enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB); ++ enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0); ++ ++ cmd = enet_umac_read(enet, UMAC_CMD); ++ cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT); ++ cmd &= ~CMD_TX_EN; ++ cmd &= ~CMD_RX_EN; ++ cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT; ++ enet_umac_write(enet, UMAC_CMD, cmd); ++ ++ enet_maskset(enet, ENET_GMAC_STATUS, ++ ENET_GMAC_STATUS_ETH_SPEED_MASK | ++ ENET_GMAC_STATUS_HD | ++ ENET_GMAC_STATUS_AUTO_CFG_EN | ++ ENET_GMAC_STATUS_LINK_UP, ++ ENET_GMAC_STATUS_ETH_SPEED_1000 | ++ ENET_GMAC_STATUS_AUTO_CFG_EN | ++ ENET_GMAC_STATUS_LINK_UP); ++} ++ ++static irqreturn_t bcm4908enet_irq_handler(int irq, void *dev_id) ++{ ++ struct bcm4908enet *enet = dev_id; ++ ++ bcm4908enet_intrs_off(enet); ++ bcm4908enet_intrs_ack(enet); ++ ++ napi_schedule(&enet->napi); ++ ++ return IRQ_HANDLED; ++} ++ ++static int bcm4908enet_open(struct net_device *netdev) ++{ ++ struct bcm4908enet *enet = netdev_priv(netdev); ++ struct device *dev = enet->dev; ++ int err; ++ ++ err = request_irq(netdev->irq, bcm4908enet_irq_handler, 0, "enet", enet); ++ if (err) { ++ dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err); ++ return err; ++ } ++ ++ bcm4908enet_gmac_init(enet); ++ bcm4908enet_dma_reset(enet); ++ bcm4908enet_dma_init(enet); ++ ++ enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN); ++ ++ enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); ++ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); ++ bcm4908enet_dma_rx_ring_enable(enet, &enet->rx_ring); ++ ++ napi_enable(&enet->napi); ++ netif_carrier_on(netdev); ++ netif_start_queue(netdev); ++ ++ bcm4908enet_intrs_ack(enet); ++ bcm4908enet_intrs_on(enet); ++ ++ return 0; ++} ++ ++static int bcm4908enet_stop(struct net_device *netdev) ++{ ++ struct bcm4908enet *enet = netdev_priv(netdev); ++ ++ netif_stop_queue(netdev); ++ netif_carrier_off(netdev); ++ napi_disable(&enet->napi); ++ ++ bcm4908enet_dma_rx_ring_disable(enet, &enet->rx_ring); ++ bcm4908enet_dma_tx_ring_disable(enet, &enet->tx_ring); ++ ++ bcm4908enet_dma_uninit(enet); ++ ++ free_irq(enet->netdev->irq, enet); ++ ++ return 0; ++} ++ ++static int bcm4908enet_start_xmit(struct sk_buff *skb, struct net_device *netdev) ++{ ++ struct bcm4908enet *enet = netdev_priv(netdev); ++ struct bcm4908enet_dma_ring *ring = &enet->tx_ring; ++ struct bcm4908enet_dma_ring_slot *slot; ++ struct device *dev = enet->dev; ++ struct bcm4908enet_dma_ring_bd *buf_desc; ++ int free_buf_descs; ++ u32 tmp; ++ ++ /* Free transmitted skbs */ ++ while (ring->read_idx != ring->write_idx) { ++ buf_desc = &ring->buf_desc[ring->read_idx]; ++ if (buf_desc->ctl & DMA_CTL_STATUS_OWN) ++ break; ++ slot = &ring->slots[ring->read_idx]; ++ ++ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); ++ dev_kfree_skb(slot->skb); ++ if (++ring->read_idx == ring->length) ++ ring->read_idx = 0; ++ } ++ ++ /* Don't use the last empty buf descriptor */ ++ if (ring->read_idx <= ring->write_idx) ++ free_buf_descs = ring->read_idx - ring->write_idx + ring->length; ++ else ++ free_buf_descs = ring->read_idx - ring->write_idx; ++ if (free_buf_descs < 2) ++ return NETDEV_TX_BUSY; ++ ++ /* Hardware removes OWN bit after sending data */ ++ buf_desc = &ring->buf_desc[ring->write_idx]; ++ if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) { ++ netif_stop_queue(netdev); ++ return NETDEV_TX_BUSY; ++ } ++ ++ slot = &ring->slots[ring->write_idx]; ++ slot->skb = skb; ++ slot->len = skb->len; ++ slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE); ++ if (unlikely(dma_mapping_error(dev, slot->dma_addr))) ++ return NETDEV_TX_BUSY; ++ ++ tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; ++ tmp |= DMA_CTL_STATUS_OWN; ++ tmp |= DMA_CTL_STATUS_SOP; ++ tmp |= DMA_CTL_STATUS_EOP; ++ tmp |= DMA_CTL_STATUS_APPEND_CRC; ++ if (ring->write_idx + 1 == ring->length - 1) ++ tmp |= DMA_CTL_STATUS_WRAP; ++ ++ buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); ++ buf_desc->ctl = cpu_to_le32(tmp); ++ ++ bcm4908enet_dma_tx_ring_ensable(enet, &enet->tx_ring); ++ ++ if (++ring->write_idx == ring->length - 1) ++ ring->write_idx = 0; ++ enet->netdev->stats.tx_bytes += skb->len; ++ enet->netdev->stats.tx_packets++; ++ ++ return NETDEV_TX_OK; ++} ++ ++static int bcm4908enet_poll(struct napi_struct *napi, int weight) ++{ ++ struct bcm4908enet *enet = container_of(napi, struct bcm4908enet, napi); ++ struct device *dev = enet->dev; ++ int handled = 0; ++ ++ while (handled < weight) { ++ struct bcm4908enet_dma_ring_bd *buf_desc; ++ struct bcm4908enet_dma_ring_slot slot; ++ u32 ctl; ++ int len; ++ int err; ++ ++ buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx]; ++ ctl = le32_to_cpu(buf_desc->ctl); ++ if (ctl & DMA_CTL_STATUS_OWN) ++ break; ++ ++ slot = enet->rx_ring.slots[enet->rx_ring.read_idx]; ++ ++ /* Provide new buffer before unpinning the old one */ ++ err = bcm4908enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx); ++ if (err) ++ break; ++ ++ if (++enet->rx_ring.read_idx == enet->rx_ring.length) ++ enet->rx_ring.read_idx = 0; ++ ++ len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; ++ ++ if (len < ENET_MTU_MIN || ++ (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { ++ enet->netdev->stats.rx_dropped++; ++ break; ++ } ++ ++ dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); ++ ++ skb_put(slot.skb, len - 4 + 2); ++ slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); ++ netif_receive_skb(slot.skb); ++ ++ enet->netdev->stats.rx_packets++; ++ enet->netdev->stats.rx_bytes += len; ++ } ++ ++ if (handled < weight) { ++ napi_complete_done(napi, handled); ++ bcm4908enet_intrs_on(enet); ++ } ++ ++ return handled; ++} ++ ++static const struct net_device_ops bcm96xx_netdev_ops = { ++ .ndo_open = bcm4908enet_open, ++ .ndo_stop = bcm4908enet_stop, ++ .ndo_start_xmit = bcm4908enet_start_xmit, ++ .ndo_set_mac_address = eth_mac_addr, ++}; ++ ++static int bcm4908enet_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct net_device *netdev; ++ struct bcm4908enet *enet; ++ int err; ++ ++ netdev = devm_alloc_etherdev(dev, sizeof(*enet)); ++ if (!netdev) ++ return -ENOMEM; ++ ++ enet = netdev_priv(netdev); ++ enet->dev = dev; ++ enet->netdev = netdev; ++ ++ enet->base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(enet->base)) { ++ dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base)); ++ return PTR_ERR(enet->base); ++ } ++ ++ netdev->irq = platform_get_irq_byname(pdev, "rx"); ++ if (netdev->irq < 0) ++ return netdev->irq; ++ ++ dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); ++ ++ err = bcm4908enet_dma_alloc(enet); ++ if (err) ++ return err; ++ ++ SET_NETDEV_DEV(netdev, &pdev->dev); ++ eth_hw_addr_random(netdev); ++ netdev->netdev_ops = &bcm96xx_netdev_ops; ++ netdev->min_mtu = ETH_ZLEN; ++ netdev->mtu = ENET_MTU_MAX; ++ netdev->max_mtu = ENET_MTU_MAX; ++ netif_napi_add(netdev, &enet->napi, bcm4908enet_poll, 64); ++ ++ err = register_netdev(netdev); ++ if (err) { ++ bcm4908enet_dma_free(enet); ++ return err; ++ } ++ ++ platform_set_drvdata(pdev, enet); ++ ++ return 0; ++} ++ ++static int bcm4908enet_remove(struct platform_device *pdev) ++{ ++ struct bcm4908enet *enet = platform_get_drvdata(pdev); ++ ++ unregister_netdev(enet->netdev); ++ netif_napi_del(&enet->napi); ++ bcm4908enet_dma_free(enet); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm4908enet_of_match[] = { ++ { .compatible = "brcm,bcm4908enet"}, ++ {}, ++}; ++ ++static struct platform_driver bcm4908enet_driver = { ++ .driver = { ++ .name = "bcm4908enet", ++ .of_match_table = bcm4908enet_of_match, ++ }, ++ .probe = bcm4908enet_probe, ++ .remove = bcm4908enet_remove, ++}; ++module_platform_driver(bcm4908enet_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_DEVICE_TABLE(of, bcm4908enet_of_match); +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/bcm4908enet.h +@@ -0,0 +1,96 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++#ifndef __BCM4908ENET_H ++#define __BCM4908ENET_H ++ ++#define ENET_CONTROL 0x000 ++#define ENET_MIB_CTRL 0x004 ++#define ENET_MIB_CTRL_CLR_MIB 0x00000001 ++#define ENET_RX_ERR_MASK 0x008 ++#define ENET_MIB_MAX_PKT_SIZE 0x00C ++#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff ++#define ENET_DIAG_OUT 0x01c ++#define ENET_ENABLE_DROP_PKT 0x020 ++#define ENET_IRQ_ENABLE 0x024 ++#define ENET_IRQ_ENABLE_OVFL 0x00000001 ++#define ENET_GMAC_STATUS 0x028 ++#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003 ++#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000 ++#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001 ++#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002 ++#define ENET_GMAC_STATUS_HD 0x00000004 ++#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008 ++#define ENET_GMAC_STATUS_LINK_UP 0x00000010 ++#define ENET_IRQ_STATUS 0x02c ++#define ENET_IRQ_STATUS_OVFL 0x00000001 ++#define ENET_OVERFLOW_COUNTER 0x030 ++#define ENET_FLUSH 0x034 ++#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001 ++#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002 ++#define ENET_RSV_SELECT 0x038 ++#define ENET_BP_FORCE 0x03c ++#define ENET_BP_FORCE_FORCE 0x00000001 ++#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040 ++#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f ++#define ENET_TX_CRC_CTRL 0x044 ++#define ENET_MIB 0x200 ++#define ENET_UNIMAC 0x400 ++#define ENET_DMA 0x800 ++#define ENET_DMA_CONTROLLER_CFG 0x800 ++#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001 ++#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002 ++#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004 ++#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804 ++#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808 ++#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c ++#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000 ++#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810 ++#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814 ++#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818 ++#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C ++#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820 ++#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824 ++#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828 ++#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C ++#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830 ++#define ENET_DMA_CTRL_CHANNEL_RESET 0x834 ++#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838 ++#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840 ++#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844 ++#define ENET_DMA_CH0_CFG 0xa00 /* RX */ ++#define ENET_DMA_CH1_CFG 0xa10 /* TX */ ++#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */ ++#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ ++ ++#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */ ++#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */ ++#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */ ++#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ ++#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */ ++#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */ ++#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */ ++#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */ ++#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */ ++#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */ ++#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ ++#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */ ++#define ENET_DMA_CH_CFG_SIZE 0x10 ++ ++#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */ ++#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */ ++#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */ ++#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */ ++#define ENET_DMA_CH_STATE_RAM_SIZE 0x10 ++ ++#define DMA_CTL_STATUS_APPEND_CRC 0x00000100 ++#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200 ++#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */ ++#define DMA_CTL_STATUS_WRAP 0x00001000 /* */ ++#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */ ++#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */ ++#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */ ++#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000 ++#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16 ++#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000 ++#define DMA_CTL_LEN_DESC_USEFPM 0x80000000 ++ ++#endif diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch new file mode 100644 index 0000000000..dd297bcf9b --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch @@ -0,0 +1,128 @@ +From 6710c5b0674f8811f7d8fbfc526684e7ed77f765 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:32 +0100 +Subject: [PATCH] dt-bindings: net: rename BCM4908 Ethernet binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Rob pointed out that a normal convention is "brcm,bcm4908-enet" so +update whole binding to match it. + +Suggested-by: Rob Herring +Signed-off-by: Rafał Miłecki +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + .../net/{brcm,bcm4908enet.yaml => brcm,bcm4908-enet.yaml} | 6 +++--- + MAINTAINERS | 2 +- + 2 files changed, 4 insertions(+), 4 deletions(-) + rename Documentation/devicetree/bindings/net/{brcm,bcm4908enet.yaml => brcm,bcm4908-enet.yaml} (85%) + +--- a/Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml ++++ /dev/null +@@ -1,45 +0,0 @@ +-# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +-%YAML 1.2 +---- +-$id: http://devicetree.org/schemas/net/brcm,bcm4908enet.yaml# +-$schema: http://devicetree.org/meta-schemas/core.yaml# +- +-title: Broadcom BCM4908 Ethernet controller +- +-description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs +- +-maintainers: +- - Rafał Miłecki +- +-properties: +- compatible: +- const: brcm,bcm4908enet +- +- reg: +- maxItems: 1 +- +- interrupts: +- description: RX interrupt +- +- interrupt-names: +- const: rx +- +-required: +- - reg +- - interrupts +- - interrupt-names +- +-additionalProperties: false +- +-examples: +- - | +- #include +- #include +- +- ethernet@80002000 { +- compatible = "brcm,bcm4908enet"; +- reg = <0x80002000 0x1000>; +- +- interrupts = ; +- interrupt-names = "rx"; +- }; +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml +@@ -0,0 +1,45 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/net/brcm,bcm4908-enet.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Broadcom BCM4908 Ethernet controller ++ ++description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs ++ ++maintainers: ++ - Rafał Miłecki ++ ++properties: ++ compatible: ++ const: brcm,bcm4908-enet ++ ++ reg: ++ maxItems: 1 ++ ++ interrupts: ++ description: RX interrupt ++ ++ interrupt-names: ++ const: rx ++ ++required: ++ - reg ++ - interrupts ++ - interrupt-names ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ #include ++ ++ ethernet@80002000 { ++ compatible = "brcm,bcm4908-enet"; ++ reg = <0x80002000 0x1000>; ++ ++ interrupts = ; ++ interrupt-names = "rx"; ++ }; +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -3432,7 +3432,7 @@ M: Rafał Miłecki + M: bcm-kernel-feedback-list@broadcom.com + L: netdev@vger.kernel.org + S: Maintained +-F: Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml ++F: Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml + F: drivers/net/ethernet/broadcom/bcm4908enet.* + F: drivers/net/ethernet/broadcom/unimac.h + diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch new file mode 100644 index 0000000000..a4409a818a --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch @@ -0,0 +1,32 @@ +From f08b5cf1eb1f2aefc6fe4a89c8c757ba94721d0b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:33 +0100 +Subject: [PATCH] dt-bindings: net: bcm4908-enet: include + ethernet-controller.yaml +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It should be /included/ by every Ethernet controller binding. It adds +support for various generic properties. + +Suggested-by: Rob Herring +Signed-off-by: Rafał Miłecki +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml ++++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml +@@ -11,6 +11,9 @@ description: Broadcom's Ethernet control + maintainers: + - Rafał Miłecki + ++allOf: ++ - $ref: ethernet-controller.yaml# ++ + properties: + compatible: + const: brcm,bcm4908-enet diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch new file mode 100644 index 0000000000..3d22d0e042 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch @@ -0,0 +1,1614 @@ +From 9d61d138ab30bbfe4a8609853c81e881c4054a0b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:34 +0100 +Subject: [PATCH] net: broadcom: rename BCM4908 driver & update DT binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +compatible string was updated to match normal naming convention so +update driver as well + +Signed-off-by: Rafał Miłecki +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + MAINTAINERS | 2 +- + drivers/net/ethernet/broadcom/Kconfig | 2 +- + drivers/net/ethernet/broadcom/Makefile | 2 +- + .../{bcm4908enet.c => bcm4908_enet.c} | 215 +++++++++--------- + .../{bcm4908enet.h => bcm4908_enet.h} | 4 +- + 5 files changed, 113 insertions(+), 112 deletions(-) + rename drivers/net/ethernet/broadcom/{bcm4908enet.c => bcm4908_enet.c} (68%) + rename drivers/net/ethernet/broadcom/{bcm4908enet.h => bcm4908_enet.h} (98%) + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -3433,7 +3433,7 @@ M: bcm-kernel-feedback-list@broadcom.com + L: netdev@vger.kernel.org + S: Maintained + F: Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml +-F: drivers/net/ethernet/broadcom/bcm4908enet.* ++F: drivers/net/ethernet/broadcom/bcm4908_enet.* + F: drivers/net/ethernet/broadcom/unimac.h + + BROADCOM BCM5301X ARM ARCHITECTURE +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -51,7 +51,7 @@ config B44_PCI + depends on B44_PCI_AUTOSELECT && B44_PCICORE_AUTOSELECT + default y + +-config BCM4908ENET ++config BCM4908_ENET + tristate "Broadcom BCM4908 internal mac support" + depends on ARCH_BCM4908 || COMPILE_TEST + default y +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -4,7 +4,7 @@ + # + + obj-$(CONFIG_B44) += b44.o +-obj-$(CONFIG_BCM4908ENET) += bcm4908enet.o ++obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o + obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o + obj-$(CONFIG_BCMGENET) += genet/ + obj-$(CONFIG_BNX2) += bnx2.o +--- a/drivers/net/ethernet/broadcom/bcm4908enet.c ++++ /dev/null +@@ -1,676 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0-only +-/* +- * Copyright (C) 2021 Rafał Miłecki +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include "bcm4908enet.h" +-#include "unimac.h" +- +-#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG +-#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG +-#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM +-#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM +- +-#define ENET_TX_BDS_NUM 200 +-#define ENET_RX_BDS_NUM 200 +-#define ENET_RX_BDS_NUM_MAX 8192 +- +-#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \ +- ENET_DMA_CH_CFG_INT_NO_DESC | \ +- ENET_DMA_CH_CFG_INT_BUFF_DONE) +-#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ +- +-#define ENET_MTU_MIN 60 +-#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ +-#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ +- +-struct bcm4908enet_dma_ring_bd { +- __le32 ctl; +- __le32 addr; +-} __packed; +- +-struct bcm4908enet_dma_ring_slot { +- struct sk_buff *skb; +- unsigned int len; +- dma_addr_t dma_addr; +-}; +- +-struct bcm4908enet_dma_ring { +- int is_tx; +- int read_idx; +- int write_idx; +- int length; +- u16 cfg_block; +- u16 st_ram_block; +- +- union { +- void *cpu_addr; +- struct bcm4908enet_dma_ring_bd *buf_desc; +- }; +- dma_addr_t dma_addr; +- +- struct bcm4908enet_dma_ring_slot *slots; +-}; +- +-struct bcm4908enet { +- struct device *dev; +- struct net_device *netdev; +- struct napi_struct napi; +- void __iomem *base; +- +- struct bcm4908enet_dma_ring tx_ring; +- struct bcm4908enet_dma_ring rx_ring; +-}; +- +-/*** +- * R/W ops +- */ +- +-static inline u32 enet_read(struct bcm4908enet *enet, u16 offset) +-{ +- return readl(enet->base + offset); +-} +- +-static inline void enet_write(struct bcm4908enet *enet, u16 offset, u32 value) +-{ +- writel(value, enet->base + offset); +-} +- +-static inline void enet_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) +-{ +- u32 val; +- +- WARN_ON(set & ~mask); +- +- val = enet_read(enet, offset); +- val = (val & ~mask) | (set & mask); +- enet_write(enet, offset, val); +-} +- +-static inline void enet_set(struct bcm4908enet *enet, u16 offset, u32 set) +-{ +- enet_maskset(enet, offset, set, set); +-} +- +-static inline u32 enet_umac_read(struct bcm4908enet *enet, u16 offset) +-{ +- return enet_read(enet, ENET_UNIMAC + offset); +-} +- +-static inline void enet_umac_write(struct bcm4908enet *enet, u16 offset, u32 value) +-{ +- enet_write(enet, ENET_UNIMAC + offset, value); +-} +- +-static inline void enet_umac_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) +-{ +- enet_maskset(enet, ENET_UNIMAC + offset, mask, set); +-} +- +-static inline void enet_umac_set(struct bcm4908enet *enet, u16 offset, u32 set) +-{ +- enet_set(enet, ENET_UNIMAC + offset, set); +-} +- +-/*** +- * Helpers +- */ +- +-static void bcm4908enet_intrs_on(struct bcm4908enet *enet) +-{ +- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); +-} +- +-static void bcm4908enet_intrs_off(struct bcm4908enet *enet) +-{ +- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); +-} +- +-static void bcm4908enet_intrs_ack(struct bcm4908enet *enet) +-{ +- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); +-} +- +-/*** +- * DMA +- */ +- +-static int bcm4908_dma_alloc_buf_descs(struct bcm4908enet *enet, struct bcm4908enet_dma_ring *ring) +-{ +- int size = ring->length * sizeof(struct bcm4908enet_dma_ring_bd); +- struct device *dev = enet->dev; +- +- ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL); +- if (!ring->cpu_addr) +- return -ENOMEM; +- +- if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) { +- dev_err(dev, "Invalid DMA ring alignment\n"); +- goto err_free_buf_descs; +- } +- +- ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL); +- if (!ring->slots) +- goto err_free_buf_descs; +- +- memset(ring->cpu_addr, 0, size); +- +- ring->read_idx = 0; +- ring->write_idx = 0; +- +- return 0; +- +-err_free_buf_descs: +- dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr); +- return -ENOMEM; +-} +- +-static void bcm4908enet_dma_free(struct bcm4908enet *enet) +-{ +- struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; +- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; +- struct device *dev = enet->dev; +- int size; +- +- size = rx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); +- if (rx_ring->cpu_addr) +- dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr); +- kfree(rx_ring->slots); +- +- size = tx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); +- if (tx_ring->cpu_addr) +- dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr); +- kfree(tx_ring->slots); +-} +- +-static int bcm4908enet_dma_alloc(struct bcm4908enet *enet) +-{ +- struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; +- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; +- struct device *dev = enet->dev; +- int err; +- +- tx_ring->length = ENET_TX_BDS_NUM; +- tx_ring->is_tx = 1; +- tx_ring->cfg_block = ENET_DMA_CH_TX_CFG; +- tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM; +- err = bcm4908_dma_alloc_buf_descs(enet, tx_ring); +- if (err) { +- dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err); +- return err; +- } +- +- rx_ring->length = ENET_RX_BDS_NUM; +- rx_ring->is_tx = 0; +- rx_ring->cfg_block = ENET_DMA_CH_RX_CFG; +- rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM; +- err = bcm4908_dma_alloc_buf_descs(enet, rx_ring); +- if (err) { +- dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err); +- bcm4908enet_dma_free(enet); +- return err; +- } +- +- return 0; +-} +- +-static void bcm4908enet_dma_reset(struct bcm4908enet *enet) +-{ +- struct bcm4908enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring }; +- int i; +- +- /* Disable the DMA controller and channel */ +- for (i = 0; i < ARRAY_SIZE(rings); i++) +- enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0); +- enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0); +- +- /* Reset channels state */ +- for (i = 0; i < ARRAY_SIZE(rings); i++) { +- struct bcm4908enet_dma_ring *ring = rings[i]; +- +- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0); +- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0); +- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0); +- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0); +- } +-} +- +-static int bcm4908enet_dma_alloc_rx_buf(struct bcm4908enet *enet, unsigned int idx) +-{ +- struct bcm4908enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx]; +- struct bcm4908enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx]; +- struct device *dev = enet->dev; +- u32 tmp; +- int err; +- +- slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; +- +- slot->skb = netdev_alloc_skb(enet->netdev, slot->len); +- if (!slot->skb) +- return -ENOMEM; +- +- slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); +- err = dma_mapping_error(dev, slot->dma_addr); +- if (err) { +- dev_err(dev, "Failed to map DMA buffer: %d\n", err); +- kfree_skb(slot->skb); +- slot->skb = NULL; +- return err; +- } +- +- tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; +- tmp |= DMA_CTL_STATUS_OWN; +- if (idx == enet->rx_ring.length - 1) +- tmp |= DMA_CTL_STATUS_WRAP; +- buf_desc->ctl = cpu_to_le32(tmp); +- buf_desc->addr = cpu_to_le32(slot->dma_addr); +- +- return 0; +-} +- +-static void bcm4908enet_dma_ring_init(struct bcm4908enet *enet, +- struct bcm4908enet_dma_ring *ring) +-{ +- int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */ +- int reset_subch = ring->is_tx ? 1 : 0; +- +- /* Reset the DMA channel */ +- enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch)); +- enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0); +- +- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); +- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN); +- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); +- +- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, +- (uint32_t)ring->dma_addr); +-} +- +-static void bcm4908enet_dma_uninit(struct bcm4908enet *enet) +-{ +- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; +- struct bcm4908enet_dma_ring_slot *slot; +- struct device *dev = enet->dev; +- int i; +- +- for (i = rx_ring->length - 1; i >= 0; i--) { +- slot = &rx_ring->slots[i]; +- if (!slot->skb) +- continue; +- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); +- kfree_skb(slot->skb); +- slot->skb = NULL; +- } +-} +- +-static int bcm4908enet_dma_init(struct bcm4908enet *enet) +-{ +- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; +- struct device *dev = enet->dev; +- int err; +- int i; +- +- for (i = 0; i < rx_ring->length; i++) { +- err = bcm4908enet_dma_alloc_rx_buf(enet, i); +- if (err) { +- dev_err(dev, "Failed to alloc RX buffer: %d\n", err); +- bcm4908enet_dma_uninit(enet); +- return err; +- } +- } +- +- bcm4908enet_dma_ring_init(enet, &enet->tx_ring); +- bcm4908enet_dma_ring_init(enet, &enet->rx_ring); +- +- return 0; +-} +- +-static void bcm4908enet_dma_tx_ring_ensable(struct bcm4908enet *enet, +- struct bcm4908enet_dma_ring *ring) +-{ +- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); +-} +- +-static void bcm4908enet_dma_tx_ring_disable(struct bcm4908enet *enet, +- struct bcm4908enet_dma_ring *ring) +-{ +- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); +-} +- +-static void bcm4908enet_dma_rx_ring_enable(struct bcm4908enet *enet, +- struct bcm4908enet_dma_ring *ring) +-{ +- enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); +-} +- +-static void bcm4908enet_dma_rx_ring_disable(struct bcm4908enet *enet, +- struct bcm4908enet_dma_ring *ring) +-{ +- unsigned long deadline; +- u32 tmp; +- +- enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); +- +- deadline = jiffies + usecs_to_jiffies(2000); +- do { +- tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG); +- if (!(tmp & ENET_DMA_CH_CFG_ENABLE)) +- return; +- enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); +- usleep_range(10, 30); +- } while (!time_after_eq(jiffies, deadline)); +- +- dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n"); +-} +- +-/*** +- * Ethernet driver +- */ +- +-static void bcm4908enet_gmac_init(struct bcm4908enet *enet) +-{ +- u32 cmd; +- +- cmd = enet_umac_read(enet, UMAC_CMD); +- enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); +- enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); +- +- enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH); +- enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0); +- +- enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB); +- enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0); +- +- cmd = enet_umac_read(enet, UMAC_CMD); +- cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT); +- cmd &= ~CMD_TX_EN; +- cmd &= ~CMD_RX_EN; +- cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT; +- enet_umac_write(enet, UMAC_CMD, cmd); +- +- enet_maskset(enet, ENET_GMAC_STATUS, +- ENET_GMAC_STATUS_ETH_SPEED_MASK | +- ENET_GMAC_STATUS_HD | +- ENET_GMAC_STATUS_AUTO_CFG_EN | +- ENET_GMAC_STATUS_LINK_UP, +- ENET_GMAC_STATUS_ETH_SPEED_1000 | +- ENET_GMAC_STATUS_AUTO_CFG_EN | +- ENET_GMAC_STATUS_LINK_UP); +-} +- +-static irqreturn_t bcm4908enet_irq_handler(int irq, void *dev_id) +-{ +- struct bcm4908enet *enet = dev_id; +- +- bcm4908enet_intrs_off(enet); +- bcm4908enet_intrs_ack(enet); +- +- napi_schedule(&enet->napi); +- +- return IRQ_HANDLED; +-} +- +-static int bcm4908enet_open(struct net_device *netdev) +-{ +- struct bcm4908enet *enet = netdev_priv(netdev); +- struct device *dev = enet->dev; +- int err; +- +- err = request_irq(netdev->irq, bcm4908enet_irq_handler, 0, "enet", enet); +- if (err) { +- dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err); +- return err; +- } +- +- bcm4908enet_gmac_init(enet); +- bcm4908enet_dma_reset(enet); +- bcm4908enet_dma_init(enet); +- +- enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN); +- +- enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); +- enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); +- bcm4908enet_dma_rx_ring_enable(enet, &enet->rx_ring); +- +- napi_enable(&enet->napi); +- netif_carrier_on(netdev); +- netif_start_queue(netdev); +- +- bcm4908enet_intrs_ack(enet); +- bcm4908enet_intrs_on(enet); +- +- return 0; +-} +- +-static int bcm4908enet_stop(struct net_device *netdev) +-{ +- struct bcm4908enet *enet = netdev_priv(netdev); +- +- netif_stop_queue(netdev); +- netif_carrier_off(netdev); +- napi_disable(&enet->napi); +- +- bcm4908enet_dma_rx_ring_disable(enet, &enet->rx_ring); +- bcm4908enet_dma_tx_ring_disable(enet, &enet->tx_ring); +- +- bcm4908enet_dma_uninit(enet); +- +- free_irq(enet->netdev->irq, enet); +- +- return 0; +-} +- +-static int bcm4908enet_start_xmit(struct sk_buff *skb, struct net_device *netdev) +-{ +- struct bcm4908enet *enet = netdev_priv(netdev); +- struct bcm4908enet_dma_ring *ring = &enet->tx_ring; +- struct bcm4908enet_dma_ring_slot *slot; +- struct device *dev = enet->dev; +- struct bcm4908enet_dma_ring_bd *buf_desc; +- int free_buf_descs; +- u32 tmp; +- +- /* Free transmitted skbs */ +- while (ring->read_idx != ring->write_idx) { +- buf_desc = &ring->buf_desc[ring->read_idx]; +- if (buf_desc->ctl & DMA_CTL_STATUS_OWN) +- break; +- slot = &ring->slots[ring->read_idx]; +- +- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); +- dev_kfree_skb(slot->skb); +- if (++ring->read_idx == ring->length) +- ring->read_idx = 0; +- } +- +- /* Don't use the last empty buf descriptor */ +- if (ring->read_idx <= ring->write_idx) +- free_buf_descs = ring->read_idx - ring->write_idx + ring->length; +- else +- free_buf_descs = ring->read_idx - ring->write_idx; +- if (free_buf_descs < 2) +- return NETDEV_TX_BUSY; +- +- /* Hardware removes OWN bit after sending data */ +- buf_desc = &ring->buf_desc[ring->write_idx]; +- if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) { +- netif_stop_queue(netdev); +- return NETDEV_TX_BUSY; +- } +- +- slot = &ring->slots[ring->write_idx]; +- slot->skb = skb; +- slot->len = skb->len; +- slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE); +- if (unlikely(dma_mapping_error(dev, slot->dma_addr))) +- return NETDEV_TX_BUSY; +- +- tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; +- tmp |= DMA_CTL_STATUS_OWN; +- tmp |= DMA_CTL_STATUS_SOP; +- tmp |= DMA_CTL_STATUS_EOP; +- tmp |= DMA_CTL_STATUS_APPEND_CRC; +- if (ring->write_idx + 1 == ring->length - 1) +- tmp |= DMA_CTL_STATUS_WRAP; +- +- buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); +- buf_desc->ctl = cpu_to_le32(tmp); +- +- bcm4908enet_dma_tx_ring_ensable(enet, &enet->tx_ring); +- +- if (++ring->write_idx == ring->length - 1) +- ring->write_idx = 0; +- enet->netdev->stats.tx_bytes += skb->len; +- enet->netdev->stats.tx_packets++; +- +- return NETDEV_TX_OK; +-} +- +-static int bcm4908enet_poll(struct napi_struct *napi, int weight) +-{ +- struct bcm4908enet *enet = container_of(napi, struct bcm4908enet, napi); +- struct device *dev = enet->dev; +- int handled = 0; +- +- while (handled < weight) { +- struct bcm4908enet_dma_ring_bd *buf_desc; +- struct bcm4908enet_dma_ring_slot slot; +- u32 ctl; +- int len; +- int err; +- +- buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx]; +- ctl = le32_to_cpu(buf_desc->ctl); +- if (ctl & DMA_CTL_STATUS_OWN) +- break; +- +- slot = enet->rx_ring.slots[enet->rx_ring.read_idx]; +- +- /* Provide new buffer before unpinning the old one */ +- err = bcm4908enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx); +- if (err) +- break; +- +- if (++enet->rx_ring.read_idx == enet->rx_ring.length) +- enet->rx_ring.read_idx = 0; +- +- len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; +- +- if (len < ENET_MTU_MIN || +- (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { +- enet->netdev->stats.rx_dropped++; +- break; +- } +- +- dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); +- +- skb_put(slot.skb, len - 4 + 2); +- slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); +- netif_receive_skb(slot.skb); +- +- enet->netdev->stats.rx_packets++; +- enet->netdev->stats.rx_bytes += len; +- } +- +- if (handled < weight) { +- napi_complete_done(napi, handled); +- bcm4908enet_intrs_on(enet); +- } +- +- return handled; +-} +- +-static const struct net_device_ops bcm96xx_netdev_ops = { +- .ndo_open = bcm4908enet_open, +- .ndo_stop = bcm4908enet_stop, +- .ndo_start_xmit = bcm4908enet_start_xmit, +- .ndo_set_mac_address = eth_mac_addr, +-}; +- +-static int bcm4908enet_probe(struct platform_device *pdev) +-{ +- struct device *dev = &pdev->dev; +- struct net_device *netdev; +- struct bcm4908enet *enet; +- int err; +- +- netdev = devm_alloc_etherdev(dev, sizeof(*enet)); +- if (!netdev) +- return -ENOMEM; +- +- enet = netdev_priv(netdev); +- enet->dev = dev; +- enet->netdev = netdev; +- +- enet->base = devm_platform_ioremap_resource(pdev, 0); +- if (IS_ERR(enet->base)) { +- dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base)); +- return PTR_ERR(enet->base); +- } +- +- netdev->irq = platform_get_irq_byname(pdev, "rx"); +- if (netdev->irq < 0) +- return netdev->irq; +- +- dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); +- +- err = bcm4908enet_dma_alloc(enet); +- if (err) +- return err; +- +- SET_NETDEV_DEV(netdev, &pdev->dev); +- eth_hw_addr_random(netdev); +- netdev->netdev_ops = &bcm96xx_netdev_ops; +- netdev->min_mtu = ETH_ZLEN; +- netdev->mtu = ENET_MTU_MAX; +- netdev->max_mtu = ENET_MTU_MAX; +- netif_napi_add(netdev, &enet->napi, bcm4908enet_poll, 64); +- +- err = register_netdev(netdev); +- if (err) { +- bcm4908enet_dma_free(enet); +- return err; +- } +- +- platform_set_drvdata(pdev, enet); +- +- return 0; +-} +- +-static int bcm4908enet_remove(struct platform_device *pdev) +-{ +- struct bcm4908enet *enet = platform_get_drvdata(pdev); +- +- unregister_netdev(enet->netdev); +- netif_napi_del(&enet->napi); +- bcm4908enet_dma_free(enet); +- +- return 0; +-} +- +-static const struct of_device_id bcm4908enet_of_match[] = { +- { .compatible = "brcm,bcm4908enet"}, +- {}, +-}; +- +-static struct platform_driver bcm4908enet_driver = { +- .driver = { +- .name = "bcm4908enet", +- .of_match_table = bcm4908enet_of_match, +- }, +- .probe = bcm4908enet_probe, +- .remove = bcm4908enet_remove, +-}; +-module_platform_driver(bcm4908enet_driver); +- +-MODULE_LICENSE("GPL v2"); +-MODULE_DEVICE_TABLE(of, bcm4908enet_of_match); +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -0,0 +1,677 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (C) 2021 Rafał Miłecki ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "bcm4908_enet.h" ++#include "unimac.h" ++ ++#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG ++#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG ++#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM ++#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM ++ ++#define ENET_TX_BDS_NUM 200 ++#define ENET_RX_BDS_NUM 200 ++#define ENET_RX_BDS_NUM_MAX 8192 ++ ++#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \ ++ ENET_DMA_CH_CFG_INT_NO_DESC | \ ++ ENET_DMA_CH_CFG_INT_BUFF_DONE) ++#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ ++ ++#define ENET_MTU_MIN 60 ++#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ ++#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ ++ ++struct bcm4908_enet_dma_ring_bd { ++ __le32 ctl; ++ __le32 addr; ++} __packed; ++ ++struct bcm4908_enet_dma_ring_slot { ++ struct sk_buff *skb; ++ unsigned int len; ++ dma_addr_t dma_addr; ++}; ++ ++struct bcm4908_enet_dma_ring { ++ int is_tx; ++ int read_idx; ++ int write_idx; ++ int length; ++ u16 cfg_block; ++ u16 st_ram_block; ++ ++ union { ++ void *cpu_addr; ++ struct bcm4908_enet_dma_ring_bd *buf_desc; ++ }; ++ dma_addr_t dma_addr; ++ ++ struct bcm4908_enet_dma_ring_slot *slots; ++}; ++ ++struct bcm4908_enet { ++ struct device *dev; ++ struct net_device *netdev; ++ struct napi_struct napi; ++ void __iomem *base; ++ ++ struct bcm4908_enet_dma_ring tx_ring; ++ struct bcm4908_enet_dma_ring rx_ring; ++}; ++ ++/*** ++ * R/W ops ++ */ ++ ++static inline u32 enet_read(struct bcm4908_enet *enet, u16 offset) ++{ ++ return readl(enet->base + offset); ++} ++ ++static inline void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value) ++{ ++ writel(value, enet->base + offset); ++} ++ ++static inline void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) ++{ ++ u32 val; ++ ++ WARN_ON(set & ~mask); ++ ++ val = enet_read(enet, offset); ++ val = (val & ~mask) | (set & mask); ++ enet_write(enet, offset, val); ++} ++ ++static inline void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set) ++{ ++ enet_maskset(enet, offset, set, set); ++} ++ ++static inline u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset) ++{ ++ return enet_read(enet, ENET_UNIMAC + offset); ++} ++ ++static inline void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value) ++{ ++ enet_write(enet, ENET_UNIMAC + offset, value); ++} ++ ++static inline void enet_umac_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) ++{ ++ enet_maskset(enet, ENET_UNIMAC + offset, mask, set); ++} ++ ++static inline void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set) ++{ ++ enet_set(enet, ENET_UNIMAC + offset, set); ++} ++ ++/*** ++ * Helpers ++ */ ++ ++static void bcm4908_enet_intrs_on(struct bcm4908_enet *enet) ++{ ++ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); ++} ++ ++static void bcm4908_enet_intrs_off(struct bcm4908_enet *enet) ++{ ++ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); ++} ++ ++static void bcm4908_enet_intrs_ack(struct bcm4908_enet *enet) ++{ ++ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); ++} ++ ++/*** ++ * DMA ++ */ ++ ++static int bcm4908_dma_alloc_buf_descs(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) ++{ ++ int size = ring->length * sizeof(struct bcm4908_enet_dma_ring_bd); ++ struct device *dev = enet->dev; ++ ++ ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL); ++ if (!ring->cpu_addr) ++ return -ENOMEM; ++ ++ if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) { ++ dev_err(dev, "Invalid DMA ring alignment\n"); ++ goto err_free_buf_descs; ++ } ++ ++ ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL); ++ if (!ring->slots) ++ goto err_free_buf_descs; ++ ++ memset(ring->cpu_addr, 0, size); ++ ++ ring->read_idx = 0; ++ ring->write_idx = 0; ++ ++ return 0; ++ ++err_free_buf_descs: ++ dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr); ++ return -ENOMEM; ++} ++ ++static void bcm4908_enet_dma_free(struct bcm4908_enet *enet) ++{ ++ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; ++ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct device *dev = enet->dev; ++ int size; ++ ++ size = rx_ring->length * sizeof(struct bcm4908_enet_dma_ring_bd); ++ if (rx_ring->cpu_addr) ++ dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr); ++ kfree(rx_ring->slots); ++ ++ size = tx_ring->length * sizeof(struct bcm4908_enet_dma_ring_bd); ++ if (tx_ring->cpu_addr) ++ dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr); ++ kfree(tx_ring->slots); ++} ++ ++static int bcm4908_enet_dma_alloc(struct bcm4908_enet *enet) ++{ ++ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; ++ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct device *dev = enet->dev; ++ int err; ++ ++ tx_ring->length = ENET_TX_BDS_NUM; ++ tx_ring->is_tx = 1; ++ tx_ring->cfg_block = ENET_DMA_CH_TX_CFG; ++ tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM; ++ err = bcm4908_dma_alloc_buf_descs(enet, tx_ring); ++ if (err) { ++ dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err); ++ return err; ++ } ++ ++ rx_ring->length = ENET_RX_BDS_NUM; ++ rx_ring->is_tx = 0; ++ rx_ring->cfg_block = ENET_DMA_CH_RX_CFG; ++ rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM; ++ err = bcm4908_dma_alloc_buf_descs(enet, rx_ring); ++ if (err) { ++ dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err); ++ bcm4908_enet_dma_free(enet); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void bcm4908_enet_dma_reset(struct bcm4908_enet *enet) ++{ ++ struct bcm4908_enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring }; ++ int i; ++ ++ /* Disable the DMA controller and channel */ ++ for (i = 0; i < ARRAY_SIZE(rings); i++) ++ enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0); ++ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0); ++ ++ /* Reset channels state */ ++ for (i = 0; i < ARRAY_SIZE(rings); i++) { ++ struct bcm4908_enet_dma_ring *ring = rings[i]; ++ ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0); ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0); ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0); ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0); ++ } ++} ++ ++static int bcm4908_enet_dma_alloc_rx_buf(struct bcm4908_enet *enet, unsigned int idx) ++{ ++ struct bcm4908_enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx]; ++ struct bcm4908_enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx]; ++ struct device *dev = enet->dev; ++ u32 tmp; ++ int err; ++ ++ slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; ++ ++ slot->skb = netdev_alloc_skb(enet->netdev, slot->len); ++ if (!slot->skb) ++ return -ENOMEM; ++ ++ slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); ++ err = dma_mapping_error(dev, slot->dma_addr); ++ if (err) { ++ dev_err(dev, "Failed to map DMA buffer: %d\n", err); ++ kfree_skb(slot->skb); ++ slot->skb = NULL; ++ return err; ++ } ++ ++ tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; ++ tmp |= DMA_CTL_STATUS_OWN; ++ if (idx == enet->rx_ring.length - 1) ++ tmp |= DMA_CTL_STATUS_WRAP; ++ buf_desc->ctl = cpu_to_le32(tmp); ++ buf_desc->addr = cpu_to_le32(slot->dma_addr); ++ ++ return 0; ++} ++ ++static void bcm4908_enet_dma_ring_init(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) ++{ ++ int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */ ++ int reset_subch = ring->is_tx ? 1 : 0; ++ ++ /* Reset the DMA channel */ ++ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch)); ++ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0); ++ ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); ++ ++ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, ++ (uint32_t)ring->dma_addr); ++} ++ ++static void bcm4908_enet_dma_uninit(struct bcm4908_enet *enet) ++{ ++ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct bcm4908_enet_dma_ring_slot *slot; ++ struct device *dev = enet->dev; ++ int i; ++ ++ for (i = rx_ring->length - 1; i >= 0; i--) { ++ slot = &rx_ring->slots[i]; ++ if (!slot->skb) ++ continue; ++ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); ++ kfree_skb(slot->skb); ++ slot->skb = NULL; ++ } ++} ++ ++static int bcm4908_enet_dma_init(struct bcm4908_enet *enet) ++{ ++ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; ++ struct device *dev = enet->dev; ++ int err; ++ int i; ++ ++ for (i = 0; i < rx_ring->length; i++) { ++ err = bcm4908_enet_dma_alloc_rx_buf(enet, i); ++ if (err) { ++ dev_err(dev, "Failed to alloc RX buffer: %d\n", err); ++ bcm4908_enet_dma_uninit(enet); ++ return err; ++ } ++ } ++ ++ bcm4908_enet_dma_ring_init(enet, &enet->tx_ring); ++ bcm4908_enet_dma_ring_init(enet, &enet->rx_ring); ++ ++ return 0; ++} ++ ++static void bcm4908_enet_dma_tx_ring_ensable(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) ++{ ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); ++} ++ ++static void bcm4908_enet_dma_tx_ring_disable(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) ++{ ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); ++} ++ ++static void bcm4908_enet_dma_rx_ring_enable(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) ++{ ++ enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); ++} ++ ++static void bcm4908_enet_dma_rx_ring_disable(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) ++{ ++ unsigned long deadline; ++ u32 tmp; ++ ++ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); ++ ++ deadline = jiffies + usecs_to_jiffies(2000); ++ do { ++ tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG); ++ if (!(tmp & ENET_DMA_CH_CFG_ENABLE)) ++ return; ++ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); ++ usleep_range(10, 30); ++ } while (!time_after_eq(jiffies, deadline)); ++ ++ dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n"); ++} ++ ++/*** ++ * Ethernet driver ++ */ ++ ++static void bcm4908_enet_gmac_init(struct bcm4908_enet *enet) ++{ ++ u32 cmd; ++ ++ cmd = enet_umac_read(enet, UMAC_CMD); ++ enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); ++ enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); ++ ++ enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH); ++ enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0); ++ ++ enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB); ++ enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0); ++ ++ cmd = enet_umac_read(enet, UMAC_CMD); ++ cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT); ++ cmd &= ~CMD_TX_EN; ++ cmd &= ~CMD_RX_EN; ++ cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT; ++ enet_umac_write(enet, UMAC_CMD, cmd); ++ ++ enet_maskset(enet, ENET_GMAC_STATUS, ++ ENET_GMAC_STATUS_ETH_SPEED_MASK | ++ ENET_GMAC_STATUS_HD | ++ ENET_GMAC_STATUS_AUTO_CFG_EN | ++ ENET_GMAC_STATUS_LINK_UP, ++ ENET_GMAC_STATUS_ETH_SPEED_1000 | ++ ENET_GMAC_STATUS_AUTO_CFG_EN | ++ ENET_GMAC_STATUS_LINK_UP); ++} ++ ++static irqreturn_t bcm4908_enet_irq_handler(int irq, void *dev_id) ++{ ++ struct bcm4908_enet *enet = dev_id; ++ ++ bcm4908_enet_intrs_off(enet); ++ bcm4908_enet_intrs_ack(enet); ++ ++ napi_schedule(&enet->napi); ++ ++ return IRQ_HANDLED; ++} ++ ++static int bcm4908_enet_open(struct net_device *netdev) ++{ ++ struct bcm4908_enet *enet = netdev_priv(netdev); ++ struct device *dev = enet->dev; ++ int err; ++ ++ err = request_irq(netdev->irq, bcm4908_enet_irq_handler, 0, "enet", enet); ++ if (err) { ++ dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err); ++ return err; ++ } ++ ++ bcm4908_enet_gmac_init(enet); ++ bcm4908_enet_dma_reset(enet); ++ bcm4908_enet_dma_init(enet); ++ ++ enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN); ++ ++ enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); ++ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); ++ bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring); ++ ++ napi_enable(&enet->napi); ++ netif_carrier_on(netdev); ++ netif_start_queue(netdev); ++ ++ bcm4908_enet_intrs_ack(enet); ++ bcm4908_enet_intrs_on(enet); ++ ++ return 0; ++} ++ ++static int bcm4908_enet_stop(struct net_device *netdev) ++{ ++ struct bcm4908_enet *enet = netdev_priv(netdev); ++ ++ netif_stop_queue(netdev); ++ netif_carrier_off(netdev); ++ napi_disable(&enet->napi); ++ ++ bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring); ++ bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring); ++ ++ bcm4908_enet_dma_uninit(enet); ++ ++ free_irq(enet->netdev->irq, enet); ++ ++ return 0; ++} ++ ++static int bcm4908_enet_start_xmit(struct sk_buff *skb, struct net_device *netdev) ++{ ++ struct bcm4908_enet *enet = netdev_priv(netdev); ++ struct bcm4908_enet_dma_ring *ring = &enet->tx_ring; ++ struct bcm4908_enet_dma_ring_slot *slot; ++ struct device *dev = enet->dev; ++ struct bcm4908_enet_dma_ring_bd *buf_desc; ++ int free_buf_descs; ++ u32 tmp; ++ ++ /* Free transmitted skbs */ ++ while (ring->read_idx != ring->write_idx) { ++ buf_desc = &ring->buf_desc[ring->read_idx]; ++ if (buf_desc->ctl & DMA_CTL_STATUS_OWN) ++ break; ++ slot = &ring->slots[ring->read_idx]; ++ ++ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); ++ dev_kfree_skb(slot->skb); ++ if (++ring->read_idx == ring->length) ++ ring->read_idx = 0; ++ } ++ ++ /* Don't use the last empty buf descriptor */ ++ if (ring->read_idx <= ring->write_idx) ++ free_buf_descs = ring->read_idx - ring->write_idx + ring->length; ++ else ++ free_buf_descs = ring->read_idx - ring->write_idx; ++ if (free_buf_descs < 2) ++ return NETDEV_TX_BUSY; ++ ++ /* Hardware removes OWN bit after sending data */ ++ buf_desc = &ring->buf_desc[ring->write_idx]; ++ if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) { ++ netif_stop_queue(netdev); ++ return NETDEV_TX_BUSY; ++ } ++ ++ slot = &ring->slots[ring->write_idx]; ++ slot->skb = skb; ++ slot->len = skb->len; ++ slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE); ++ if (unlikely(dma_mapping_error(dev, slot->dma_addr))) ++ return NETDEV_TX_BUSY; ++ ++ tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; ++ tmp |= DMA_CTL_STATUS_OWN; ++ tmp |= DMA_CTL_STATUS_SOP; ++ tmp |= DMA_CTL_STATUS_EOP; ++ tmp |= DMA_CTL_STATUS_APPEND_CRC; ++ if (ring->write_idx + 1 == ring->length - 1) ++ tmp |= DMA_CTL_STATUS_WRAP; ++ ++ buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); ++ buf_desc->ctl = cpu_to_le32(tmp); ++ ++ bcm4908_enet_dma_tx_ring_ensable(enet, &enet->tx_ring); ++ ++ if (++ring->write_idx == ring->length - 1) ++ ring->write_idx = 0; ++ enet->netdev->stats.tx_bytes += skb->len; ++ enet->netdev->stats.tx_packets++; ++ ++ return NETDEV_TX_OK; ++} ++ ++static int bcm4908_enet_poll(struct napi_struct *napi, int weight) ++{ ++ struct bcm4908_enet *enet = container_of(napi, struct bcm4908_enet, napi); ++ struct device *dev = enet->dev; ++ int handled = 0; ++ ++ while (handled < weight) { ++ struct bcm4908_enet_dma_ring_bd *buf_desc; ++ struct bcm4908_enet_dma_ring_slot slot; ++ u32 ctl; ++ int len; ++ int err; ++ ++ buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx]; ++ ctl = le32_to_cpu(buf_desc->ctl); ++ if (ctl & DMA_CTL_STATUS_OWN) ++ break; ++ ++ slot = enet->rx_ring.slots[enet->rx_ring.read_idx]; ++ ++ /* Provide new buffer before unpinning the old one */ ++ err = bcm4908_enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx); ++ if (err) ++ break; ++ ++ if (++enet->rx_ring.read_idx == enet->rx_ring.length) ++ enet->rx_ring.read_idx = 0; ++ ++ len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; ++ ++ if (len < ENET_MTU_MIN || ++ (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { ++ enet->netdev->stats.rx_dropped++; ++ break; ++ } ++ ++ dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); ++ ++ skb_put(slot.skb, len - 4 + 2); ++ slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); ++ netif_receive_skb(slot.skb); ++ ++ enet->netdev->stats.rx_packets++; ++ enet->netdev->stats.rx_bytes += len; ++ } ++ ++ if (handled < weight) { ++ napi_complete_done(napi, handled); ++ bcm4908_enet_intrs_on(enet); ++ } ++ ++ return handled; ++} ++ ++static const struct net_device_ops bcm96xx_netdev_ops = { ++ .ndo_open = bcm4908_enet_open, ++ .ndo_stop = bcm4908_enet_stop, ++ .ndo_start_xmit = bcm4908_enet_start_xmit, ++ .ndo_set_mac_address = eth_mac_addr, ++}; ++ ++static int bcm4908_enet_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct net_device *netdev; ++ struct bcm4908_enet *enet; ++ int err; ++ ++ netdev = devm_alloc_etherdev(dev, sizeof(*enet)); ++ if (!netdev) ++ return -ENOMEM; ++ ++ enet = netdev_priv(netdev); ++ enet->dev = dev; ++ enet->netdev = netdev; ++ ++ enet->base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(enet->base)) { ++ dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base)); ++ return PTR_ERR(enet->base); ++ } ++ ++ netdev->irq = platform_get_irq_byname(pdev, "rx"); ++ if (netdev->irq < 0) ++ return netdev->irq; ++ ++ dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); ++ ++ err = bcm4908_enet_dma_alloc(enet); ++ if (err) ++ return err; ++ ++ SET_NETDEV_DEV(netdev, &pdev->dev); ++ eth_hw_addr_random(netdev); ++ netdev->netdev_ops = &bcm96xx_netdev_ops; ++ netdev->min_mtu = ETH_ZLEN; ++ netdev->mtu = ENET_MTU_MAX; ++ netdev->max_mtu = ENET_MTU_MAX; ++ netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64); ++ ++ err = register_netdev(netdev); ++ if (err) { ++ bcm4908_enet_dma_free(enet); ++ return err; ++ } ++ ++ platform_set_drvdata(pdev, enet); ++ ++ return 0; ++} ++ ++static int bcm4908_enet_remove(struct platform_device *pdev) ++{ ++ struct bcm4908_enet *enet = platform_get_drvdata(pdev); ++ ++ unregister_netdev(enet->netdev); ++ netif_napi_del(&enet->napi); ++ bcm4908_enet_dma_free(enet); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm4908_enet_of_match[] = { ++ { .compatible = "brcm,bcm4908-enet"}, ++ {}, ++}; ++ ++static struct platform_driver bcm4908_enet_driver = { ++ .driver = { ++ .name = "bcm4908_enet", ++ .of_match_table = bcm4908_enet_of_match, ++ }, ++ .probe = bcm4908_enet_probe, ++ .remove = bcm4908_enet_remove, ++}; ++module_platform_driver(bcm4908_enet_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_DEVICE_TABLE(of, bcm4908_enet_of_match); +--- a/drivers/net/ethernet/broadcom/bcm4908enet.h ++++ /dev/null +@@ -1,96 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0-only */ +-#ifndef __BCM4908ENET_H +-#define __BCM4908ENET_H +- +-#define ENET_CONTROL 0x000 +-#define ENET_MIB_CTRL 0x004 +-#define ENET_MIB_CTRL_CLR_MIB 0x00000001 +-#define ENET_RX_ERR_MASK 0x008 +-#define ENET_MIB_MAX_PKT_SIZE 0x00C +-#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff +-#define ENET_DIAG_OUT 0x01c +-#define ENET_ENABLE_DROP_PKT 0x020 +-#define ENET_IRQ_ENABLE 0x024 +-#define ENET_IRQ_ENABLE_OVFL 0x00000001 +-#define ENET_GMAC_STATUS 0x028 +-#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003 +-#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000 +-#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001 +-#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002 +-#define ENET_GMAC_STATUS_HD 0x00000004 +-#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008 +-#define ENET_GMAC_STATUS_LINK_UP 0x00000010 +-#define ENET_IRQ_STATUS 0x02c +-#define ENET_IRQ_STATUS_OVFL 0x00000001 +-#define ENET_OVERFLOW_COUNTER 0x030 +-#define ENET_FLUSH 0x034 +-#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001 +-#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002 +-#define ENET_RSV_SELECT 0x038 +-#define ENET_BP_FORCE 0x03c +-#define ENET_BP_FORCE_FORCE 0x00000001 +-#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040 +-#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f +-#define ENET_TX_CRC_CTRL 0x044 +-#define ENET_MIB 0x200 +-#define ENET_UNIMAC 0x400 +-#define ENET_DMA 0x800 +-#define ENET_DMA_CONTROLLER_CFG 0x800 +-#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001 +-#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002 +-#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004 +-#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804 +-#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808 +-#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c +-#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000 +-#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810 +-#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814 +-#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818 +-#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C +-#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820 +-#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824 +-#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828 +-#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C +-#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830 +-#define ENET_DMA_CTRL_CHANNEL_RESET 0x834 +-#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838 +-#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840 +-#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844 +-#define ENET_DMA_CH0_CFG 0xa00 /* RX */ +-#define ENET_DMA_CH1_CFG 0xa10 /* TX */ +-#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */ +-#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ +- +-#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */ +-#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */ +-#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */ +-#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ +-#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */ +-#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */ +-#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */ +-#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */ +-#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */ +-#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */ +-#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ +-#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */ +-#define ENET_DMA_CH_CFG_SIZE 0x10 +- +-#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */ +-#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */ +-#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */ +-#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */ +-#define ENET_DMA_CH_STATE_RAM_SIZE 0x10 +- +-#define DMA_CTL_STATUS_APPEND_CRC 0x00000100 +-#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200 +-#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */ +-#define DMA_CTL_STATUS_WRAP 0x00001000 /* */ +-#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */ +-#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */ +-#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */ +-#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000 +-#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16 +-#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000 +-#define DMA_CTL_LEN_DESC_USEFPM 0x80000000 +- +-#endif +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.h +@@ -0,0 +1,96 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++#ifndef __BCM4908_ENET_H ++#define __BCM4908_ENET_H ++ ++#define ENET_CONTROL 0x000 ++#define ENET_MIB_CTRL 0x004 ++#define ENET_MIB_CTRL_CLR_MIB 0x00000001 ++#define ENET_RX_ERR_MASK 0x008 ++#define ENET_MIB_MAX_PKT_SIZE 0x00C ++#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff ++#define ENET_DIAG_OUT 0x01c ++#define ENET_ENABLE_DROP_PKT 0x020 ++#define ENET_IRQ_ENABLE 0x024 ++#define ENET_IRQ_ENABLE_OVFL 0x00000001 ++#define ENET_GMAC_STATUS 0x028 ++#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003 ++#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000 ++#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001 ++#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002 ++#define ENET_GMAC_STATUS_HD 0x00000004 ++#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008 ++#define ENET_GMAC_STATUS_LINK_UP 0x00000010 ++#define ENET_IRQ_STATUS 0x02c ++#define ENET_IRQ_STATUS_OVFL 0x00000001 ++#define ENET_OVERFLOW_COUNTER 0x030 ++#define ENET_FLUSH 0x034 ++#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001 ++#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002 ++#define ENET_RSV_SELECT 0x038 ++#define ENET_BP_FORCE 0x03c ++#define ENET_BP_FORCE_FORCE 0x00000001 ++#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040 ++#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f ++#define ENET_TX_CRC_CTRL 0x044 ++#define ENET_MIB 0x200 ++#define ENET_UNIMAC 0x400 ++#define ENET_DMA 0x800 ++#define ENET_DMA_CONTROLLER_CFG 0x800 ++#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001 ++#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002 ++#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004 ++#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804 ++#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808 ++#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c ++#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000 ++#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810 ++#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814 ++#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818 ++#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C ++#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820 ++#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824 ++#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828 ++#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C ++#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830 ++#define ENET_DMA_CTRL_CHANNEL_RESET 0x834 ++#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838 ++#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840 ++#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844 ++#define ENET_DMA_CH0_CFG 0xa00 /* RX */ ++#define ENET_DMA_CH1_CFG 0xa10 /* TX */ ++#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */ ++#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ ++ ++#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */ ++#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */ ++#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */ ++#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ ++#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */ ++#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */ ++#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */ ++#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */ ++#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */ ++#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */ ++#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ ++#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */ ++#define ENET_DMA_CH_CFG_SIZE 0x10 ++ ++#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */ ++#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */ ++#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */ ++#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */ ++#define ENET_DMA_CH_STATE_RAM_SIZE 0x10 ++ ++#define DMA_CTL_STATUS_APPEND_CRC 0x00000100 ++#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200 ++#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */ ++#define DMA_CTL_STATUS_WRAP 0x00001000 /* */ ++#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */ ++#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */ ++#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */ ++#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000 ++#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16 ++#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000 ++#define DMA_CTL_LEN_DESC_USEFPM 0x80000000 ++ ++#endif diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch new file mode 100644 index 0000000000..561f045b75 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch @@ -0,0 +1,30 @@ +From af263af64683f018be9ce3c309edfa9903f5109a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:35 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: drop unneeded memset() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +dma_alloc_coherent takes care of zeroing allocated memory + +Suggested-by: Andrew Lunn +Signed-off-by: Rafał Miłecki +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -163,8 +163,6 @@ static int bcm4908_dma_alloc_buf_descs(s + if (!ring->slots) + goto err_free_buf_descs; + +- memset(ring->cpu_addr, 0, size); +- + ring->read_idx = 0; + ring->write_idx = 0; + diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch new file mode 100644 index 0000000000..a8c188f30d --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch @@ -0,0 +1,75 @@ +From 7b778ae4eb9cd6e1518e4e47902a104b13ae8929 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:36 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: drop "inline" from C functions +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It seems preferred to let compiler optimize code if applicable. +While at it drop unused enet_umac_maskset(). + +Suggested-by: Andrew Lunn +Signed-off-by: Rafał Miłecki +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 19 +++++++------------ + 1 file changed, 7 insertions(+), 12 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -75,17 +75,17 @@ struct bcm4908_enet { + * R/W ops + */ + +-static inline u32 enet_read(struct bcm4908_enet *enet, u16 offset) ++static u32 enet_read(struct bcm4908_enet *enet, u16 offset) + { + return readl(enet->base + offset); + } + +-static inline void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value) ++static void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value) + { + writel(value, enet->base + offset); + } + +-static inline void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) ++static void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) + { + u32 val; + +@@ -96,27 +96,22 @@ static inline void enet_maskset(struct b + enet_write(enet, offset, val); + } + +-static inline void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set) ++static void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set) + { + enet_maskset(enet, offset, set, set); + } + +-static inline u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset) ++static u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset) + { + return enet_read(enet, ENET_UNIMAC + offset); + } + +-static inline void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value) ++static void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value) + { + enet_write(enet, ENET_UNIMAC + offset, value); + } + +-static inline void enet_umac_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) +-{ +- enet_maskset(enet, ENET_UNIMAC + offset, mask, set); +-} +- +-static inline void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set) ++static void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set) + { + enet_set(enet, ENET_UNIMAC + offset, set); + } diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch new file mode 100644 index 0000000000..1aacb1c8cf --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch @@ -0,0 +1,60 @@ +From e3948811720341f99cd5cb4a8a650473400ec4f8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:37 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: fix minor typos +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +1. Fix "ensable" typo noticed by Andrew +2. Fix chipset name in the struct net_device_ops variable + +Suggested-by: Andrew Lunn +Signed-off-by: Rafał Miłecki +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -328,8 +328,8 @@ static int bcm4908_enet_dma_init(struct + return 0; + } + +-static void bcm4908_enet_dma_tx_ring_ensable(struct bcm4908_enet *enet, +- struct bcm4908_enet_dma_ring *ring) ++static void bcm4908_enet_dma_tx_ring_enable(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) + { + enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); + } +@@ -519,7 +519,7 @@ static int bcm4908_enet_start_xmit(struc + buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); + buf_desc->ctl = cpu_to_le32(tmp); + +- bcm4908_enet_dma_tx_ring_ensable(enet, &enet->tx_ring); ++ bcm4908_enet_dma_tx_ring_enable(enet, &enet->tx_ring); + + if (++ring->write_idx == ring->length - 1) + ring->write_idx = 0; +@@ -583,7 +583,7 @@ static int bcm4908_enet_poll(struct napi + return handled; + } + +-static const struct net_device_ops bcm96xx_netdev_ops = { ++static const struct net_device_ops bcm4908_enet_netdev_ops = { + .ndo_open = bcm4908_enet_open, + .ndo_stop = bcm4908_enet_stop, + .ndo_start_xmit = bcm4908_enet_start_xmit, +@@ -623,7 +623,7 @@ static int bcm4908_enet_probe(struct pla + + SET_NETDEV_DEV(netdev, &pdev->dev); + eth_hw_addr_random(netdev); +- netdev->netdev_ops = &bcm96xx_netdev_ops; ++ netdev->netdev_ops = &bcm4908_enet_netdev_ops; + netdev->min_mtu = ETH_ZLEN; + netdev->mtu = ENET_MTU_MAX; + netdev->max_mtu = ENET_MTU_MAX; diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch new file mode 100644 index 0000000000..1b51979d71 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch @@ -0,0 +1,28 @@ +From 195e2d9febfbeef1d09701c387925e5c2f5cb038 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:38 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: fix received skb length +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use ETH_FCS_LEN instead of magic value and drop incorrect + 2 + +Signed-off-by: Rafał Miłecki +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -567,7 +567,7 @@ static int bcm4908_enet_poll(struct napi + + dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); + +- skb_put(slot.skb, len - 4 + 2); ++ skb_put(slot.skb, len - ETH_FCS_LEN); + slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); + netif_receive_skb(slot.skb); + diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch new file mode 100644 index 0000000000..eda0bf482e --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch @@ -0,0 +1,28 @@ +From bdd70b997799099597fc0952fb0ec1bd80505bc4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Feb 2021 13:12:39 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: fix endianness in xmit code +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use le32_to_cpu() for reading __le32 struct field filled by hw. + +Signed-off-by: Rafał Miłecki +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -476,7 +476,7 @@ static int bcm4908_enet_start_xmit(struc + /* Free transmitted skbs */ + while (ring->read_idx != ring->write_idx) { + buf_desc = &ring->buf_desc[ring->read_idx]; +- if (buf_desc->ctl & DMA_CTL_STATUS_OWN) ++ if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN) + break; + slot = &ring->slots[ring->read_idx]; + diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch new file mode 100644 index 0000000000..0201bfeda3 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch @@ -0,0 +1,119 @@ +From 14b3b46a67f78ade99eafcbf320105615e948569 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 12 Feb 2021 16:21:35 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: set MTU on open & on request +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Hardware comes up with default max frame size set to 1518. When using it +with switch it results in actual Ethernet MTU 1492: +1518 - 14 (Ethernet header) - 4 (Broadcom's tag) - 4 (802.1q) - 4 (FCS) + +Above means hardware in its default state can't handle standard Ethernet +traffic (MTU 1500). + +Define maximum possible Ethernet overhead and always set MAC max frame +length accordingly. This change fixes handling Ethernet frames of length +1506 - 1514. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 31 ++++++++++++++++---- + 1 file changed, 25 insertions(+), 6 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -5,6 +5,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -29,9 +30,10 @@ + ENET_DMA_CH_CFG_INT_BUFF_DONE) + #define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ + +-#define ENET_MTU_MIN 60 +-#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ +-#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ ++#define ENET_MTU_MAX ETH_DATA_LEN /* Is it possible to support 2044? */ ++#define BRCM_MAX_TAG_LEN 6 ++#define ENET_MAX_ETH_OVERHEAD (ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \ ++ ETH_FCS_LEN + 4) /* 32 */ + + struct bcm4908_enet_dma_ring_bd { + __le32 ctl; +@@ -135,6 +137,11 @@ static void bcm4908_enet_intrs_ack(struc + enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); + } + ++static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu) ++{ ++ enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD); ++} ++ + /*** + * DMA + */ +@@ -246,7 +253,7 @@ static int bcm4908_enet_dma_alloc_rx_buf + u32 tmp; + int err; + +- slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; ++ slot->len = ENET_MTU_MAX + ENET_MAX_ETH_OVERHEAD; + + slot->skb = netdev_alloc_skb(enet->netdev, slot->len); + if (!slot->skb) +@@ -374,6 +381,8 @@ static void bcm4908_enet_gmac_init(struc + { + u32 cmd; + ++ bcm4908_enet_set_mtu(enet, enet->netdev->mtu); ++ + cmd = enet_umac_read(enet, UMAC_CMD); + enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); + enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); +@@ -559,7 +568,7 @@ static int bcm4908_enet_poll(struct napi + + len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; + +- if (len < ENET_MTU_MIN || ++ if (len < ETH_ZLEN || + (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { + enet->netdev->stats.rx_dropped++; + break; +@@ -583,11 +592,21 @@ static int bcm4908_enet_poll(struct napi + return handled; + } + ++static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu) ++{ ++ struct bcm4908_enet *enet = netdev_priv(netdev); ++ ++ bcm4908_enet_set_mtu(enet, new_mtu); ++ ++ return 0; ++} ++ + static const struct net_device_ops bcm4908_enet_netdev_ops = { + .ndo_open = bcm4908_enet_open, + .ndo_stop = bcm4908_enet_stop, + .ndo_start_xmit = bcm4908_enet_start_xmit, + .ndo_set_mac_address = eth_mac_addr, ++ .ndo_change_mtu = bcm4908_enet_change_mtu, + }; + + static int bcm4908_enet_probe(struct platform_device *pdev) +@@ -625,7 +644,7 @@ static int bcm4908_enet_probe(struct pla + eth_hw_addr_random(netdev); + netdev->netdev_ops = &bcm4908_enet_netdev_ops; + netdev->min_mtu = ETH_ZLEN; +- netdev->mtu = ENET_MTU_MAX; ++ netdev->mtu = ETH_DATA_LEN; + netdev->max_mtu = ENET_MTU_MAX; + netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64); + diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch new file mode 100644 index 0000000000..8a24324122 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch @@ -0,0 +1,30 @@ +From 4dc7f09b8becfa35a55430a49d95acf19f996e6b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 24 Feb 2021 16:18:41 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: fix RX path possible mem leak +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +After filling RX ring slot with new skb it's required to free old skb. +Immediately on error or later in the net subsystem. + +Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210224151842.2419-1-zajec5@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -570,6 +570,7 @@ static int bcm4908_enet_poll(struct napi + + if (len < ETH_ZLEN || + (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { ++ kfree_skb(slot.skb); + enet->netdev->stats.rx_dropped++; + break; + } diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch new file mode 100644 index 0000000000..d4cf84e4b6 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch @@ -0,0 +1,31 @@ +From 4d9274cee40b6a20dd6148c6c81c6733c2678cbc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 24 Feb 2021 16:18:42 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: fix NAPI poll returned value +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Missing increment was resulting in poll function always returning 0 +instead of amount of processed packets. + +Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210224151842.2419-2-zajec5@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -583,6 +583,8 @@ static int bcm4908_enet_poll(struct napi + + enet->netdev->stats.rx_packets++; + enet->netdev->stats.rx_bytes += len; ++ ++ handled++; + } + + if (handled < weight) { diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch new file mode 100644 index 0000000000..ad1bebf3ec --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch @@ -0,0 +1,34 @@ +From d313d16bbaea0f11a2e98f04a6c678b43c208915 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 26 Feb 2021 14:20:38 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: enable RX after processing + packets +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When receiving a lot of packets hardware may run out of free +descriptiors and stop RX ring. Enable it every time after handling +received packets. + +Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210226132038.29849-1-zajec5@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -592,6 +592,9 @@ static int bcm4908_enet_poll(struct napi + bcm4908_enet_intrs_on(enet); + } + ++ /* Hardware could disable ring if it run out of descriptors */ ++ bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring); ++ + return handled; + } + diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch new file mode 100644 index 0000000000..43e5ee01bf --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch @@ -0,0 +1,33 @@ +From a3bc483216650a7232559bf0a1debfbabff3e12c Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Tue, 16 Mar 2021 15:03:41 +0100 +Subject: [PATCH] net: broadcom: BCM4908_ENET should not default to y, + unconditionally +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Merely enabling compile-testing should not enable additional code. +To fix this, restrict the automatic enabling of BCM4908_ENET to +ARCH_BCM4908. + +Fixes: 4feffeadbcb2e5b1 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") +Signed-off-by: Geert Uytterhoeven +Acked-by: Florian Fainelli +Acked-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -54,7 +54,7 @@ config B44_PCI + config BCM4908_ENET + tristate "Broadcom BCM4908 internal mac support" + depends on ARCH_BCM4908 || COMPILE_TEST +- default y ++ default y if ARCH_BCM4908 + help + This driver supports Ethernet controller integrated into Broadcom + BCM4908 family SoCs. diff --git a/target/linux/bcm4908/patches-5.10/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch b/target/linux/bcm4908/patches-5.10/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch new file mode 100644 index 0000000000..c4f336e671 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch @@ -0,0 +1,38 @@ +From 3559c1ea4336636c886002996d50805365d3055c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 10 Mar 2021 09:48:13 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: read MAC from OF +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 devices have MAC address accessible using NVMEM so it's needed +to use OF helper for reading it. + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -647,7 +648,9 @@ static int bcm4908_enet_probe(struct pla + return err; + + SET_NETDEV_DEV(netdev, &pdev->dev); +- eth_hw_addr_random(netdev); ++ of_get_mac_address(dev->of_node, netdev->dev_addr); ++ if (!is_valid_ether_addr(netdev->dev_addr)) ++ eth_hw_addr_random(netdev); + netdev->netdev_ops = &bcm4908_enet_netdev_ops; + netdev->min_mtu = ETH_ZLEN; + netdev->mtu = ETH_DATA_LEN; diff --git a/target/linux/bcm4908/patches-5.10/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch b/target/linux/bcm4908/patches-5.10/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch new file mode 100644 index 0000000000..b61437a2de --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch @@ -0,0 +1,50 @@ +From ab4dda7a8cb7e55ea3d92fd5e249cf6f5396028c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Mar 2021 13:35:20 +0100 +Subject: [PATCH] dt-bindings: net: bcm4908-enet: add optional TX interrupt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +I discovered that hardware actually supports two interrupts, one per DMA +channel (RX and TX). + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + .../bindings/net/brcm,bcm4908-enet.yaml | 17 +++++++++++++---- + 1 file changed, 13 insertions(+), 4 deletions(-) + +--- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml ++++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml +@@ -22,10 +22,18 @@ properties: + maxItems: 1 + + interrupts: +- description: RX interrupt ++ minItems: 1 ++ maxItems: 2 ++ items: ++ - description: RX interrupt ++ - description: TX interrupt + + interrupt-names: +- const: rx ++ minItems: 1 ++ maxItems: 2 ++ items: ++ - const: rx ++ - const: tx + + required: + - reg +@@ -43,6 +51,7 @@ examples: + compatible = "brcm,bcm4908-enet"; + reg = <0x80002000 0x1000>; + +- interrupts = ; +- interrupt-names = "rx"; ++ interrupts = , ++ ; ++ interrupt-names = "rx", "tx"; + }; diff --git a/target/linux/bcm4908/patches-5.10/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch b/target/linux/bcm4908/patches-5.10/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch new file mode 100644 index 0000000000..03ac4b07bf --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch @@ -0,0 +1,300 @@ +From 12bb508bfe5a564c36864b12253db23cac83bfa1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 11 Mar 2021 13:35:21 +0100 +Subject: [PATCH] net: broadcom: bcm4908_enet: support TX interrupt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It appears that each DMA channel has its own interrupt and both rings +can be configured (the same way) to handle interrupts. + +1. Make ring interrupts code generic (make it operate on given ring) +2. Move napi to ring (so each has its own) +3. Make IRQ handler generic (match ring against received IRQ number) +4. Add (optional) support for TX interrupt + +Signed-off-by: Rafał Miłecki +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 138 ++++++++++++++----- + 1 file changed, 103 insertions(+), 35 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -54,6 +54,7 @@ struct bcm4908_enet_dma_ring { + int length; + u16 cfg_block; + u16 st_ram_block; ++ struct napi_struct napi; + + union { + void *cpu_addr; +@@ -67,8 +68,8 @@ struct bcm4908_enet_dma_ring { + struct bcm4908_enet { + struct device *dev; + struct net_device *netdev; +- struct napi_struct napi; + void __iomem *base; ++ int irq_tx; + + struct bcm4908_enet_dma_ring tx_ring; + struct bcm4908_enet_dma_ring rx_ring; +@@ -123,24 +124,31 @@ static void enet_umac_set(struct bcm4908 + * Helpers + */ + +-static void bcm4908_enet_intrs_on(struct bcm4908_enet *enet) ++static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu) + { +- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); ++ enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD); + } + +-static void bcm4908_enet_intrs_off(struct bcm4908_enet *enet) ++/*** ++ * DMA ring ops ++ */ ++ ++static void bcm4908_enet_dma_ring_intrs_on(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) + { +- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); + } + +-static void bcm4908_enet_intrs_ack(struct bcm4908_enet *enet) ++static void bcm4908_enet_dma_ring_intrs_off(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) + { +- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); + } + +-static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu) ++static void bcm4908_enet_dma_ring_intrs_ack(struct bcm4908_enet *enet, ++ struct bcm4908_enet_dma_ring *ring) + { +- enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD); ++ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); + } + + /*** +@@ -414,11 +422,14 @@ static void bcm4908_enet_gmac_init(struc + static irqreturn_t bcm4908_enet_irq_handler(int irq, void *dev_id) + { + struct bcm4908_enet *enet = dev_id; ++ struct bcm4908_enet_dma_ring *ring; + +- bcm4908_enet_intrs_off(enet); +- bcm4908_enet_intrs_ack(enet); ++ ring = (irq == enet->irq_tx) ? &enet->tx_ring : &enet->rx_ring; + +- napi_schedule(&enet->napi); ++ bcm4908_enet_dma_ring_intrs_off(enet, ring); ++ bcm4908_enet_dma_ring_intrs_ack(enet, ring); ++ ++ napi_schedule(&ring->napi); + + return IRQ_HANDLED; + } +@@ -426,6 +437,8 @@ static irqreturn_t bcm4908_enet_irq_hand + static int bcm4908_enet_open(struct net_device *netdev) + { + struct bcm4908_enet *enet = netdev_priv(netdev); ++ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; ++ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; + struct device *dev = enet->dev; + int err; + +@@ -435,6 +448,17 @@ static int bcm4908_enet_open(struct net_ + return err; + } + ++ if (enet->irq_tx > 0) { ++ err = request_irq(enet->irq_tx, bcm4908_enet_irq_handler, 0, ++ "tx", enet); ++ if (err) { ++ dev_err(dev, "Failed to request IRQ %d: %d\n", ++ enet->irq_tx, err); ++ free_irq(netdev->irq, enet); ++ return err; ++ } ++ } ++ + bcm4908_enet_gmac_init(enet); + bcm4908_enet_dma_reset(enet); + bcm4908_enet_dma_init(enet); +@@ -443,14 +467,19 @@ static int bcm4908_enet_open(struct net_ + + enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); + enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); +- bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring); + +- napi_enable(&enet->napi); ++ if (enet->irq_tx > 0) { ++ napi_enable(&tx_ring->napi); ++ bcm4908_enet_dma_ring_intrs_ack(enet, tx_ring); ++ bcm4908_enet_dma_ring_intrs_on(enet, tx_ring); ++ } ++ ++ bcm4908_enet_dma_rx_ring_enable(enet, rx_ring); ++ napi_enable(&rx_ring->napi); + netif_carrier_on(netdev); + netif_start_queue(netdev); +- +- bcm4908_enet_intrs_ack(enet); +- bcm4908_enet_intrs_on(enet); ++ bcm4908_enet_dma_ring_intrs_ack(enet, rx_ring); ++ bcm4908_enet_dma_ring_intrs_on(enet, rx_ring); + + return 0; + } +@@ -458,16 +487,20 @@ static int bcm4908_enet_open(struct net_ + static int bcm4908_enet_stop(struct net_device *netdev) + { + struct bcm4908_enet *enet = netdev_priv(netdev); ++ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; ++ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; + + netif_stop_queue(netdev); + netif_carrier_off(netdev); +- napi_disable(&enet->napi); ++ napi_disable(&rx_ring->napi); ++ napi_disable(&tx_ring->napi); + + bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring); + bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring); + + bcm4908_enet_dma_uninit(enet); + ++ free_irq(enet->irq_tx, enet); + free_irq(enet->netdev->irq, enet); + + return 0; +@@ -484,25 +517,19 @@ static int bcm4908_enet_start_xmit(struc + u32 tmp; + + /* Free transmitted skbs */ +- while (ring->read_idx != ring->write_idx) { +- buf_desc = &ring->buf_desc[ring->read_idx]; +- if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN) +- break; +- slot = &ring->slots[ring->read_idx]; +- +- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); +- dev_kfree_skb(slot->skb); +- if (++ring->read_idx == ring->length) +- ring->read_idx = 0; +- } ++ if (enet->irq_tx < 0 && ++ !(le32_to_cpu(ring->buf_desc[ring->read_idx].ctl) & DMA_CTL_STATUS_OWN)) ++ napi_schedule(&enet->tx_ring.napi); + + /* Don't use the last empty buf descriptor */ + if (ring->read_idx <= ring->write_idx) + free_buf_descs = ring->read_idx - ring->write_idx + ring->length; + else + free_buf_descs = ring->read_idx - ring->write_idx; +- if (free_buf_descs < 2) ++ if (free_buf_descs < 2) { ++ netif_stop_queue(netdev); + return NETDEV_TX_BUSY; ++ } + + /* Hardware removes OWN bit after sending data */ + buf_desc = &ring->buf_desc[ring->write_idx]; +@@ -539,9 +566,10 @@ static int bcm4908_enet_start_xmit(struc + return NETDEV_TX_OK; + } + +-static int bcm4908_enet_poll(struct napi_struct *napi, int weight) ++static int bcm4908_enet_poll_rx(struct napi_struct *napi, int weight) + { +- struct bcm4908_enet *enet = container_of(napi, struct bcm4908_enet, napi); ++ struct bcm4908_enet_dma_ring *rx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi); ++ struct bcm4908_enet *enet = container_of(rx_ring, struct bcm4908_enet, rx_ring); + struct device *dev = enet->dev; + int handled = 0; + +@@ -590,7 +618,7 @@ static int bcm4908_enet_poll(struct napi + + if (handled < weight) { + napi_complete_done(napi, handled); +- bcm4908_enet_intrs_on(enet); ++ bcm4908_enet_dma_ring_intrs_on(enet, rx_ring); + } + + /* Hardware could disable ring if it run out of descriptors */ +@@ -599,6 +627,42 @@ static int bcm4908_enet_poll(struct napi + return handled; + } + ++static int bcm4908_enet_poll_tx(struct napi_struct *napi, int weight) ++{ ++ struct bcm4908_enet_dma_ring *tx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi); ++ struct bcm4908_enet *enet = container_of(tx_ring, struct bcm4908_enet, tx_ring); ++ struct bcm4908_enet_dma_ring_bd *buf_desc; ++ struct bcm4908_enet_dma_ring_slot *slot; ++ struct device *dev = enet->dev; ++ unsigned int bytes = 0; ++ int handled = 0; ++ ++ while (handled < weight && tx_ring->read_idx != tx_ring->write_idx) { ++ buf_desc = &tx_ring->buf_desc[tx_ring->read_idx]; ++ if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN) ++ break; ++ slot = &tx_ring->slots[tx_ring->read_idx]; ++ ++ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); ++ dev_kfree_skb(slot->skb); ++ bytes += slot->len; ++ if (++tx_ring->read_idx == tx_ring->length) ++ tx_ring->read_idx = 0; ++ ++ handled++; ++ } ++ ++ if (handled < weight) { ++ napi_complete_done(napi, handled); ++ bcm4908_enet_dma_ring_intrs_on(enet, tx_ring); ++ } ++ ++ if (netif_queue_stopped(enet->netdev)) ++ netif_wake_queue(enet->netdev); ++ ++ return handled; ++} ++ + static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu) + { + struct bcm4908_enet *enet = netdev_priv(netdev); +@@ -641,6 +705,8 @@ static int bcm4908_enet_probe(struct pla + if (netdev->irq < 0) + return netdev->irq; + ++ enet->irq_tx = platform_get_irq_byname(pdev, "tx"); ++ + dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); + + err = bcm4908_enet_dma_alloc(enet); +@@ -655,7 +721,8 @@ static int bcm4908_enet_probe(struct pla + netdev->min_mtu = ETH_ZLEN; + netdev->mtu = ETH_DATA_LEN; + netdev->max_mtu = ENET_MTU_MAX; +- netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64); ++ netif_tx_napi_add(netdev, &enet->tx_ring.napi, bcm4908_enet_poll_tx, NAPI_POLL_WEIGHT); ++ netif_napi_add(netdev, &enet->rx_ring.napi, bcm4908_enet_poll_rx, NAPI_POLL_WEIGHT); + + err = register_netdev(netdev); + if (err) { +@@ -673,7 +740,8 @@ static int bcm4908_enet_remove(struct pl + struct bcm4908_enet *enet = platform_get_drvdata(pdev); + + unregister_netdev(enet->netdev); +- netif_napi_del(&enet->napi); ++ netif_napi_del(&enet->rx_ring.napi); ++ netif_napi_del(&enet->tx_ring.napi); + bcm4908_enet_dma_free(enet); + + return 0; diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch new file mode 100644 index 0000000000..9b3a831773 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch @@ -0,0 +1,73 @@ +From 01488a0ccd9abe15565bed50a45afcddbb0fe199 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 12 Mar 2021 11:41:07 +0100 +Subject: [PATCH] net: dsa: bcm_sf2: store PHY interface/mode in port structure +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It's needed later for proper switch / crossbar setup. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/bcm_sf2.c | 16 ++++++++++++---- + drivers/net/dsa/bcm_sf2.h | 1 + + 2 files changed, 13 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -446,10 +446,11 @@ static void bcm_sf2_intr_disable(struct + static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv, + struct device_node *dn) + { ++ struct device *dev = priv->dev->ds->dev; ++ struct bcm_sf2_port_status *port_st; + struct device_node *port; + unsigned int port_num; + struct property *prop; +- phy_interface_t mode; + int err; + + priv->moca_port = -1; +@@ -458,19 +459,26 @@ static void bcm_sf2_identify_ports(struc + if (of_property_read_u32(port, "reg", &port_num)) + continue; + ++ if (port_num >= DSA_MAX_PORTS) { ++ dev_err(dev, "Invalid port number %d\n", port_num); ++ continue; ++ } ++ ++ port_st = &priv->port_sts[port_num]; ++ + /* Internal PHYs get assigned a specific 'phy-mode' property + * value: "internal" to help flag them before MDIO probing + * has completed, since they might be turned off at that + * time + */ +- err = of_get_phy_mode(port, &mode); ++ err = of_get_phy_mode(port, &port_st->mode); + if (err) + continue; + +- if (mode == PHY_INTERFACE_MODE_INTERNAL) ++ if (port_st->mode == PHY_INTERFACE_MODE_INTERNAL) + priv->int_phy_mask |= 1 << port_num; + +- if (mode == PHY_INTERFACE_MODE_MOCA) ++ if (port_st->mode == PHY_INTERFACE_MODE_MOCA) + priv->moca_port = port_num; + + if (of_property_read_bool(port, "brcm,use-bcm-hdr")) +--- a/drivers/net/dsa/bcm_sf2.h ++++ b/drivers/net/dsa/bcm_sf2.h +@@ -44,6 +44,7 @@ struct bcm_sf2_hw_params { + #define BCM_SF2_REGS_NUM 6 + + struct bcm_sf2_port_status { ++ phy_interface_t mode; + unsigned int link; + bool enabled; + }; diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch new file mode 100644 index 0000000000..c6c0c23570 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch @@ -0,0 +1,152 @@ +From a9349f08ec6c1251d41ef167d27a15cc39bc5b97 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 12 Mar 2021 11:41:08 +0100 +Subject: [PATCH] net: dsa: bcm_sf2: setup BCM4908 internal crossbar +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On some SoCs (e.g. BCM4908, BCM631[345]8) SF2 has an integrated +crossbar. It allows connecting its selected external ports to internal +ports. It's used by vendors to handle custom Ethernet setups. + +BCM4908 has following 3x2 crossbar. On Asus GT-AC5300 rgmii is used for +connecting external BCM53134S switch. GPHY4 is usually used for WAN +port. More fancy devices use SerDes for 2.5 Gbps Ethernet. + + ┌──────────┐ +SerDes ─── 0 ─┤ │ + │ 3x2 ├─ 0 ─── switch port 7 + GPHY4 ─── 1 ─┤ │ + │ crossbar ├─ 1 ─── runner (accelerator) + rgmii ─── 2 ─┤ │ + └──────────┘ + +Use setup data based on DT info to configure BCM4908's switch port 7. +Right now only GPHY and rgmii variants are supported. Handling SerDes +can be implemented later. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/bcm_sf2.c | 45 ++++++++++++++++++++++++++++++++++ + drivers/net/dsa/bcm_sf2.h | 1 + + drivers/net/dsa/bcm_sf2_regs.h | 7 ++++++ + 3 files changed, 53 insertions(+) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -435,6 +435,44 @@ static int bcm_sf2_sw_rst(struct bcm_sf2 + return 0; + } + ++static void bcm_sf2_crossbar_setup(struct bcm_sf2_priv *priv) ++{ ++ struct device *dev = priv->dev->ds->dev; ++ int shift; ++ u32 mask; ++ u32 reg; ++ int i; ++ ++ mask = BIT(priv->num_crossbar_int_ports) - 1; ++ ++ reg = reg_readl(priv, REG_CROSSBAR); ++ switch (priv->type) { ++ case BCM4908_DEVICE_ID: ++ shift = CROSSBAR_BCM4908_INT_P7 * priv->num_crossbar_int_ports; ++ reg &= ~(mask << shift); ++ if (0) /* FIXME */ ++ reg |= CROSSBAR_BCM4908_EXT_SERDES << shift; ++ else if (priv->int_phy_mask & BIT(7)) ++ reg |= CROSSBAR_BCM4908_EXT_GPHY4 << shift; ++ else if (phy_interface_mode_is_rgmii(priv->port_sts[7].mode)) ++ reg |= CROSSBAR_BCM4908_EXT_RGMII << shift; ++ else if (WARN(1, "Invalid port mode\n")) ++ return; ++ break; ++ default: ++ return; ++ } ++ reg_writel(priv, reg, REG_CROSSBAR); ++ ++ reg = reg_readl(priv, REG_CROSSBAR); ++ for (i = 0; i < priv->num_crossbar_int_ports; i++) { ++ shift = i * priv->num_crossbar_int_ports; ++ ++ dev_dbg(dev, "crossbar int port #%d - ext port #%d\n", i, ++ (reg >> shift) & mask); ++ } ++} ++ + static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv) + { + intrl2_0_mask_set(priv, 0xffffffff); +@@ -869,6 +907,8 @@ static int bcm_sf2_sw_resume(struct dsa_ + return ret; + } + ++ bcm_sf2_crossbar_setup(priv); ++ + ret = bcm_sf2_cfp_resume(ds); + if (ret) + return ret; +@@ -1140,6 +1180,7 @@ struct bcm_sf2_of_data { + const u16 *reg_offsets; + unsigned int core_reg_align; + unsigned int num_cfp_rules; ++ unsigned int num_crossbar_int_ports; + }; + + static const u16 bcm_sf2_4908_reg_offsets[] = { +@@ -1164,6 +1205,7 @@ static const struct bcm_sf2_of_data bcm_ + .core_reg_align = 0, + .reg_offsets = bcm_sf2_4908_reg_offsets, + .num_cfp_rules = 0, /* FIXME */ ++ .num_crossbar_int_ports = 2, + }; + + /* Register offsets for the SWITCH_REG_* block */ +@@ -1274,6 +1316,7 @@ static int bcm_sf2_sw_probe(struct platf + priv->reg_offsets = data->reg_offsets; + priv->core_reg_align = data->core_reg_align; + priv->num_cfp_rules = data->num_cfp_rules; ++ priv->num_crossbar_int_ports = data->num_crossbar_int_ports; + + priv->rcdev = devm_reset_control_get_optional_exclusive(&pdev->dev, + "switch"); +@@ -1347,6 +1390,8 @@ static int bcm_sf2_sw_probe(struct platf + goto out_clk_mdiv; + } + ++ bcm_sf2_crossbar_setup(priv); ++ + bcm_sf2_gphy_enable_set(priv->dev->ds, true); + + ret = bcm_sf2_mdio_register(ds); +--- a/drivers/net/dsa/bcm_sf2.h ++++ b/drivers/net/dsa/bcm_sf2.h +@@ -74,6 +74,7 @@ struct bcm_sf2_priv { + const u16 *reg_offsets; + unsigned int core_reg_align; + unsigned int num_cfp_rules; ++ unsigned int num_crossbar_int_ports; + + /* spinlock protecting access to the indirect registers */ + spinlock_t indir_lock; +--- a/drivers/net/dsa/bcm_sf2_regs.h ++++ b/drivers/net/dsa/bcm_sf2_regs.h +@@ -48,6 +48,13 @@ enum bcm_sf2_reg_offs { + #define PHY_PHYAD_SHIFT 8 + #define PHY_PHYAD_MASK 0x1F + ++/* Relative to REG_CROSSBAR */ ++#define CROSSBAR_BCM4908_INT_P7 0 ++#define CROSSBAR_BCM4908_INT_RUNNER 1 ++#define CROSSBAR_BCM4908_EXT_SERDES 0 ++#define CROSSBAR_BCM4908_EXT_GPHY4 1 ++#define CROSSBAR_BCM4908_EXT_RGMII 2 ++ + #define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x)) + + /* Relative to REG_RGMII_CNTRL */ diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch new file mode 100644 index 0000000000..58fcec27ea --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch @@ -0,0 +1,25 @@ +From f4e6d7cdbfae502788bc468295b232dec76ee57e Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Fri, 12 Mar 2021 13:11:01 -0800 +Subject: [PATCH] net: dsa: bcm_sf2: Fill in BCM4908 CFP entries + +The BCM4908 switch has 256 CFP entrie, update that setting so CFP can be +used. + +Signed-off-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/bcm_sf2.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -1204,7 +1204,7 @@ static const struct bcm_sf2_of_data bcm_ + .type = BCM4908_DEVICE_ID, + .core_reg_align = 0, + .reg_offsets = bcm_sf2_4908_reg_offsets, +- .num_cfp_rules = 0, /* FIXME */ ++ .num_cfp_rules = 256, + .num_crossbar_int_ports = 2, + }; + diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch new file mode 100644 index 0000000000..52387776b5 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch @@ -0,0 +1,161 @@ +From 55cfeb396965c3906a84d09a9c487d065e37773b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 18 Mar 2021 09:01:42 +0100 +Subject: [PATCH 1/2] net: dsa: bcm_sf2: add function finding RGMII register +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Simple macro like REG_RGMII_CNTRL_P() is insufficient as: +1. It doesn't validate port argument +2. It doesn't support chipsets with non-lineral RGMII regs layout + +Missing port validation could result in getting register offset from out +of array. Random memory -> random offset -> random reads/writes. It +affected e.g. BCM4908 for REG_RGMII_CNTRL_P(7). + +Fixes: a78e86ed586d ("net: dsa: bcm_sf2: Prepare for different register layouts") +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/bcm_sf2.c | 49 +++++++++++++++++++++++++++++----- + drivers/net/dsa/bcm_sf2_regs.h | 2 -- + 2 files changed, 42 insertions(+), 9 deletions(-) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -75,6 +75,31 @@ static void bcm_sf2_recalc_clock(struct + clk_set_rate(priv->clk_mdiv, new_rate); + } + ++static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port) ++{ ++ switch (priv->type) { ++ case BCM4908_DEVICE_ID: ++ /* TODO */ ++ break; ++ default: ++ switch (port) { ++ case 0: ++ return REG_RGMII_0_CNTRL; ++ case 1: ++ return REG_RGMII_1_CNTRL; ++ case 2: ++ return REG_RGMII_2_CNTRL; ++ default: ++ break; ++ } ++ } ++ ++ WARN_ONCE(1, "Unsupported port %d\n", port); ++ ++ /* RO fallback reg */ ++ return REG_SWITCH_STATUS; ++} ++ + static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port) + { + struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); +@@ -693,6 +718,7 @@ static void bcm_sf2_sw_mac_config(struct + { + struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); + u32 id_mode_dis = 0, port_mode; ++ u32 reg_rgmii_ctrl; + u32 reg; + + if (port == core_readl(priv, CORE_IMP0_PRT_ID)) +@@ -716,10 +742,12 @@ static void bcm_sf2_sw_mac_config(struct + return; + } + ++ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); ++ + /* Clear id_mode_dis bit, and the existing port mode, let + * RGMII_MODE_EN bet set by mac_link_{up,down} + */ +- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); ++ reg = reg_readl(priv, reg_rgmii_ctrl); + reg &= ~ID_MODE_DIS; + reg &= ~(PORT_MODE_MASK << PORT_MODE_SHIFT); + +@@ -727,13 +755,14 @@ static void bcm_sf2_sw_mac_config(struct + if (id_mode_dis) + reg |= ID_MODE_DIS; + +- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); ++ reg_writel(priv, reg, reg_rgmii_ctrl); + } + + static void bcm_sf2_sw_mac_link_set(struct dsa_switch *ds, int port, + phy_interface_t interface, bool link) + { + struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); ++ u32 reg_rgmii_ctrl; + u32 reg; + + if (!phy_interface_mode_is_rgmii(interface) && +@@ -741,13 +770,15 @@ static void bcm_sf2_sw_mac_link_set(stru + interface != PHY_INTERFACE_MODE_REVMII) + return; + ++ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); ++ + /* If the link is down, just disable the interface to conserve power */ +- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); ++ reg = reg_readl(priv, reg_rgmii_ctrl); + if (link) + reg |= RGMII_MODE_EN; + else + reg &= ~RGMII_MODE_EN; +- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); ++ reg_writel(priv, reg, reg_rgmii_ctrl); + } + + static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port, +@@ -781,11 +812,15 @@ static void bcm_sf2_sw_mac_link_up(struc + { + struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); + struct ethtool_eee *p = &priv->dev->ports[port].eee; +- u32 reg, offset; + + bcm_sf2_sw_mac_link_set(ds, port, interface, true); + + if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { ++ u32 reg_rgmii_ctrl; ++ u32 reg, offset; ++ ++ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); ++ + if (priv->type == BCM4908_DEVICE_ID || + priv->type == BCM7445_DEVICE_ID) + offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); +@@ -796,7 +831,7 @@ static void bcm_sf2_sw_mac_link_up(struc + interface == PHY_INTERFACE_MODE_RGMII_TXID || + interface == PHY_INTERFACE_MODE_MII || + interface == PHY_INTERFACE_MODE_REVMII) { +- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); ++ reg = reg_readl(priv, reg_rgmii_ctrl); + reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN); + + if (tx_pause) +@@ -804,7 +839,7 @@ static void bcm_sf2_sw_mac_link_up(struc + if (rx_pause) + reg |= RX_PAUSE_EN; + +- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); ++ reg_writel(priv, reg, reg_rgmii_ctrl); + } + + reg = SW_OVERRIDE | LINK_STS; +--- a/drivers/net/dsa/bcm_sf2_regs.h ++++ b/drivers/net/dsa/bcm_sf2_regs.h +@@ -55,8 +55,6 @@ enum bcm_sf2_reg_offs { + #define CROSSBAR_BCM4908_EXT_GPHY4 1 + #define CROSSBAR_BCM4908_EXT_RGMII 2 + +-#define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x)) +- + /* Relative to REG_RGMII_CNTRL */ + #define RGMII_MODE_EN (1 << 0) + #define ID_MODE_DIS (1 << 1) diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch new file mode 100644 index 0000000000..ea4234761d --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch @@ -0,0 +1,56 @@ +From 6859d91549341c2ad769d482de58129f080c0f04 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 18 Mar 2021 09:01:43 +0100 +Subject: [PATCH 2/2] net: dsa: bcm_sf2: fix BCM4908 RGMII reg(s) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 has only 1 RGMII reg for controlling port 7. + +Fixes: 73b7a6047971 ("net: dsa: bcm_sf2: support BCM4908's integrated switch") +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/bcm_sf2.c | 11 +++++++---- + drivers/net/dsa/bcm_sf2_regs.h | 1 + + 2 files changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -79,7 +79,12 @@ static u16 bcm_sf2_reg_rgmii_cntrl(struc + { + switch (priv->type) { + case BCM4908_DEVICE_ID: +- /* TODO */ ++ switch (port) { ++ case 7: ++ return REG_RGMII_11_CNTRL; ++ default: ++ break; ++ } + break; + default: + switch (port) { +@@ -1223,9 +1228,7 @@ static const u16 bcm_sf2_4908_reg_offset + [REG_PHY_REVISION] = 0x14, + [REG_SPHY_CNTRL] = 0x24, + [REG_CROSSBAR] = 0xc8, +- [REG_RGMII_0_CNTRL] = 0xe0, +- [REG_RGMII_1_CNTRL] = 0xec, +- [REG_RGMII_2_CNTRL] = 0xf8, ++ [REG_RGMII_11_CNTRL] = 0x014c, + [REG_LED_0_CNTRL] = 0x40, + [REG_LED_1_CNTRL] = 0x4c, + [REG_LED_2_CNTRL] = 0x58, +--- a/drivers/net/dsa/bcm_sf2_regs.h ++++ b/drivers/net/dsa/bcm_sf2_regs.h +@@ -21,6 +21,7 @@ enum bcm_sf2_reg_offs { + REG_RGMII_0_CNTRL, + REG_RGMII_1_CNTRL, + REG_RGMII_2_CNTRL, ++ REG_RGMII_11_CNTRL, + REG_LED_0_CNTRL, + REG_LED_1_CNTRL, + REG_LED_2_CNTRL, diff --git a/target/linux/bcm4908/patches-5.10/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch b/target/linux/bcm4908/patches-5.10/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch new file mode 100644 index 0000000000..38e3d056b9 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch @@ -0,0 +1,31 @@ +From f35a07f92616700733636c06dd6e5b6cdc807fe4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 25 Nov 2020 10:06:08 +0100 +Subject: [PATCH] tty: serial: bcm63xx: lower driver dependencies +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Hardware supported by bcm63xx is also used by BCM4908 SoCs family that +is ARM64. In future more architectures may need it as well. There is +nothing arch specific breaking compilation so just stick to requiring +COMMON_CLK. + +Signed-off-by: Rafał Miłecki +Link: https://lore.kernel.org/r/20201125090608.28442-1-zajec5@gmail.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/tty/serial/Kconfig ++++ b/drivers/tty/serial/Kconfig +@@ -1133,7 +1133,7 @@ config SERIAL_TIMBERDALE + config SERIAL_BCM63XX + tristate "Broadcom BCM63xx/BCM33xx UART support" + select SERIAL_CORE +- depends on MIPS || ARM || COMPILE_TEST ++ depends on COMMON_CLK + help + This enables the driver for the onchip UART core found on + the following chipsets: diff --git a/target/linux/bcm4908/patches-5.10/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch b/target/linux/bcm4908/patches-5.10/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch new file mode 100644 index 0000000000..28702c9d0e --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch @@ -0,0 +1,40 @@ +From def26913b66fd94e431afecf28e09c08e8c02a35 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 27 Nov 2020 12:14:42 +0100 +Subject: [PATCH] reset: simple: add BCM4908 MISC PCIe reset controller support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It's a trivial reset controller. One register with bit per PCIe core. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Signed-off-by: Philipp Zabel +--- + drivers/reset/Kconfig | 2 +- + drivers/reset/reset-simple.c | 2 ++ + 2 files changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/reset/Kconfig ++++ b/drivers/reset/Kconfig +@@ -167,7 +167,7 @@ config RESET_SCMI + + config RESET_SIMPLE + bool "Simple Reset Controller Driver" if COMPILE_TEST +- default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC ++ default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC + help + This enables a simple reset controller driver for reset lines that + that can be asserted and deasserted by toggling bits in a contiguous, +--- a/drivers/reset/reset-simple.c ++++ b/drivers/reset/reset-simple.c +@@ -146,6 +146,8 @@ static const struct of_device_id reset_s + { .compatible = "aspeed,ast2500-lpc-reset" }, + { .compatible = "bitmain,bm1880-reset", + .data = &reset_simple_active_low }, ++ { .compatible = "brcm,bcm4908-misc-pcie-reset", ++ .data = &reset_simple_active_low }, + { .compatible = "snps,dw-high-reset" }, + { .compatible = "snps,dw-low-reset", + .data = &reset_simple_active_low }, diff --git a/target/linux/bcm4908/patches-5.10/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch b/target/linux/bcm4908/patches-5.10/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch new file mode 100644 index 0000000000..c5c1a5dc7e --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch @@ -0,0 +1,90 @@ +From 82853543057f78d8a331272b70bc3f1e8cb0cbf4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 14 Dec 2020 19:07:42 +0100 +Subject: [PATCH] dt-bindings: power: document Broadcom's PMB binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Broadcom's PMB is power controller used for disabling and enabling SoC +devices. + +Signed-off-by: Rafał Miłecki +Reviewed-by: Rob Herring +Acked-by: Florian Fainelli +Acked-by: Ulf Hansson +Signed-off-by: Florian Fainelli +--- + .../bindings/power/brcm,bcm-pmb.yaml | 50 +++++++++++++++++++ + include/dt-bindings/soc/bcm-pmb.h | 11 ++++ + 2 files changed, 61 insertions(+) + create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml + create mode 100644 include/dt-bindings/soc/bcm-pmb.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml +@@ -0,0 +1,50 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/power/brcm,bcm-pmb.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Broadcom PMB (Power Management Bus) controller ++ ++description: This document describes Broadcom's PMB controller. It supports ++ powering various types of connected devices (e.g. PCIe, USB, SATA). ++ ++maintainers: ++ - Rafał Miłecki ++ ++properties: ++ compatible: ++ enum: ++ - brcm,bcm4908-pmb ++ ++ reg: ++ description: register space of one or more buses ++ maxItems: 1 ++ ++ big-endian: ++ $ref: /schemas/types.yaml#/definitions/flag ++ description: Flag to use for block working in big endian mode. ++ ++ "#power-domain-cells": ++ description: cell specifies device ID (see bcm-pmb.h) ++ const: 1 ++ ++required: ++ - reg ++ - "#power-domain-cells" ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ ++ pmb: power-controller@802800e0 { ++ compatible = "brcm,bcm4908-pmb"; ++ reg = <0x802800e0 0x40>; ++ #power-domain-cells = <1>; ++ }; ++ ++ foo { ++ power-domains = <&pmb BCM_PMB_PCIE0>; ++ }; +--- /dev/null ++++ b/include/dt-bindings/soc/bcm-pmb.h +@@ -0,0 +1,11 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */ ++ ++#ifndef __DT_BINDINGS_SOC_BCM_PMB_H ++#define __DT_BINDINGS_SOC_BCM_PMB_H ++ ++#define BCM_PMB_PCIE0 0x01 ++#define BCM_PMB_PCIE1 0x02 ++#define BCM_PMB_PCIE2 0x03 ++#define BCM_PMB_HOST_USB 0x04 ++ ++#endif diff --git a/target/linux/bcm4908/patches-5.10/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch b/target/linux/bcm4908/patches-5.10/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch new file mode 100644 index 0000000000..8cbf33f5a9 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch @@ -0,0 +1,409 @@ +From 8bcac4011ebe0dbdd46fd55b036ee855c95702d3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 14 Dec 2020 19:07:43 +0100 +Subject: [PATCH] soc: bcm: add PM driver for Broadcom's PMB +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +PMB originally comes from BCM63138 but can be also found on many other +chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like +PCIe, SATA, USB. + +Signed-off-by: Rafał Miłecki +Acked-by: Ulf Hansson +Signed-off-by: Florian Fainelli +--- + MAINTAINERS | 10 + + drivers/soc/bcm/Makefile | 2 +- + drivers/soc/bcm/bcm63xx/Kconfig | 9 + + drivers/soc/bcm/bcm63xx/Makefile | 1 + + drivers/soc/bcm/bcm63xx/bcm-pmb.c | 333 ++++++++++++++++++++++++++++++ + 5 files changed, 354 insertions(+), 1 deletion(-) + create mode 100644 drivers/soc/bcm/bcm63xx/bcm-pmb.c + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -3674,6 +3674,16 @@ L: linux-mips@vger.kernel.org + S: Maintained + F: drivers/firmware/broadcom/* + ++BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER ++M: Rafał Miłecki ++M: Florian Fainelli ++M: bcm-kernel-feedback-list@broadcom.com ++L: linux-pm@vger.kernel.org ++S: Maintained ++T: git git://github.com/broadcom/stblinux.git ++F: drivers/soc/bcm/bcm-pmb.c ++F: include/dt-bindings/soc/bcm-pmb.h ++ + BROADCOM SPECIFIC AMBA DRIVER (BCMA) + M: Rafał Miłecki + L: linux-wireless@vger.kernel.org +--- a/drivers/soc/bcm/Makefile ++++ b/drivers/soc/bcm/Makefile +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o + obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o +-obj-$(CONFIG_SOC_BCM63XX) += bcm63xx/ ++obj-y += bcm63xx/ + obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/ +--- a/drivers/soc/bcm/bcm63xx/Kconfig ++++ b/drivers/soc/bcm/bcm63xx/Kconfig +@@ -10,3 +10,12 @@ config BCM63XX_POWER + BCM6318, BCM6328, BCM6362 and BCM63268 SoCs. + + endif # SOC_BCM63XX ++ ++config BCM_PMB ++ bool "Broadcom PMB (Power Management Bus) driver" ++ depends on ARCH_BCM4908 || (COMPILE_TEST && OF) ++ default ARCH_BCM4908 ++ select PM_GENERIC_DOMAINS if PM ++ help ++ This enables support for the Broadcom's PMB (Power Management Bus) that ++ is used for disabling and enabling SoC devices. +--- a/drivers/soc/bcm/bcm63xx/Makefile ++++ b/drivers/soc/bcm/bcm63xx/Makefile +@@ -1,2 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_BCM63XX_POWER) += bcm63xx-power.o ++obj-$(CONFIG_BCM_PMB) += bcm-pmb.o +--- /dev/null ++++ b/drivers/soc/bcm/bcm63xx/bcm-pmb.c +@@ -0,0 +1,333 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2013 Broadcom ++ * Copyright (C) 2020 Rafał Miłecki ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define BPCM_ID_REG 0x00 ++#define BPCM_CAPABILITIES 0x04 ++#define BPCM_CAP_NUM_ZONES 0x000000ff ++#define BPCM_CAP_SR_REG_BITS 0x0000ff00 ++#define BPCM_CAP_PLLTYPE 0x00030000 ++#define BPCM_CAP_UBUS 0x00080000 ++#define BPCM_CONTROL 0x08 ++#define BPCM_STATUS 0x0c ++#define BPCM_ROSC_CONTROL 0x10 ++#define BPCM_ROSC_THRESH_H 0x14 ++#define BPCM_ROSC_THRESHOLD_BCM6838 0x14 ++#define BPCM_ROSC_THRESH_S 0x18 ++#define BPCM_ROSC_COUNT_BCM6838 0x18 ++#define BPCM_ROSC_COUNT 0x1c ++#define BPCM_PWD_CONTROL_BCM6838 0x1c ++#define BPCM_PWD_CONTROL 0x20 ++#define BPCM_SR_CONTROL_BCM6838 0x20 ++#define BPCM_PWD_ACCUM_CONTROL 0x24 ++#define BPCM_SR_CONTROL 0x28 ++#define BPCM_GLOBAL_CONTROL 0x2c ++#define BPCM_MISC_CONTROL 0x30 ++#define BPCM_MISC_CONTROL2 0x34 ++#define BPCM_SGPHY_CNTL 0x38 ++#define BPCM_SGPHY_STATUS 0x3c ++#define BPCM_ZONE0 0x40 ++#define BPCM_ZONE_CONTROL 0x00 ++#define BPCM_ZONE_CONTROL_MANUAL_CLK_EN 0x00000001 ++#define BPCM_ZONE_CONTROL_MANUAL_RESET_CTL 0x00000002 ++#define BPCM_ZONE_CONTROL_FREQ_SCALE_USED 0x00000004 /* R/O */ ++#define BPCM_ZONE_CONTROL_DPG_CAPABLE 0x00000008 /* R/O */ ++#define BPCM_ZONE_CONTROL_MANUAL_MEM_PWR 0x00000030 ++#define BPCM_ZONE_CONTROL_MANUAL_ISO_CTL 0x00000040 ++#define BPCM_ZONE_CONTROL_MANUAL_CTL 0x00000080 ++#define BPCM_ZONE_CONTROL_DPG_CTL_EN 0x00000100 ++#define BPCM_ZONE_CONTROL_PWR_DN_REQ 0x00000200 ++#define BPCM_ZONE_CONTROL_PWR_UP_REQ 0x00000400 ++#define BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN 0x00000800 ++#define BPCM_ZONE_CONTROL_BLK_RESET_ASSERT 0x00001000 ++#define BPCM_ZONE_CONTROL_MEM_STBY 0x00002000 ++#define BPCM_ZONE_CONTROL_RESERVED 0x0007c000 ++#define BPCM_ZONE_CONTROL_PWR_CNTL_STATE 0x00f80000 ++#define BPCM_ZONE_CONTROL_FREQ_SCALAR_DYN_SEL 0x01000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_PWR_OFF_STATE 0x02000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_PWR_ON_STATE 0x04000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_PWR_GOOD 0x08000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_DPG_PWR_STATE 0x10000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_MEM_PWR_STATE 0x20000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_ISO_STATE 0x40000000 /* R/O */ ++#define BPCM_ZONE_CONTROL_RESET_STATE 0x80000000 /* R/O */ ++#define BPCM_ZONE_CONFIG1 0x04 ++#define BPCM_ZONE_CONFIG2 0x08 ++#define BPCM_ZONE_FREQ_SCALAR_CONTROL 0x0c ++#define BPCM_ZONE_SIZE 0x10 ++ ++struct bcm_pmb { ++ struct device *dev; ++ void __iomem *base; ++ spinlock_t lock; ++ bool little_endian; ++ struct genpd_onecell_data genpd_onecell_data; ++}; ++ ++struct bcm_pmb_pd_data { ++ const char * const name; ++ int id; ++ u8 bus; ++ u8 device; ++}; ++ ++struct bcm_pmb_pm_domain { ++ struct bcm_pmb *pmb; ++ const struct bcm_pmb_pd_data *data; ++ struct generic_pm_domain genpd; ++}; ++ ++static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device, ++ int offset, u32 *val) ++{ ++ void __iomem *base = pmb->base + bus * 0x20; ++ unsigned long flags; ++ int err; ++ ++ spin_lock_irqsave(&pmb->lock, flags); ++ err = bpcm_rd(base, device, offset, val); ++ spin_unlock_irqrestore(&pmb->lock, flags); ++ ++ if (!err) ++ *val = pmb->little_endian ? le32_to_cpu(*val) : be32_to_cpu(*val); ++ ++ return err; ++} ++ ++static int bcm_pmb_bpcm_write(struct bcm_pmb *pmb, int bus, u8 device, ++ int offset, u32 val) ++{ ++ void __iomem *base = pmb->base + bus * 0x20; ++ unsigned long flags; ++ int err; ++ ++ val = pmb->little_endian ? cpu_to_le32(val) : cpu_to_be32(val); ++ ++ spin_lock_irqsave(&pmb->lock, flags); ++ err = bpcm_wr(base, device, offset, val); ++ spin_unlock_irqrestore(&pmb->lock, flags); ++ ++ return err; ++} ++ ++static int bcm_pmb_power_off_zone(struct bcm_pmb *pmb, int bus, u8 device, ++ int zone) ++{ ++ int offset; ++ u32 val; ++ int err; ++ ++ offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL; ++ ++ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val); ++ if (err) ++ return err; ++ ++ val |= BPCM_ZONE_CONTROL_PWR_DN_REQ; ++ val &= ~BPCM_ZONE_CONTROL_PWR_UP_REQ; ++ ++ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val); ++ ++ return err; ++} ++ ++static int bcm_pmb_power_on_zone(struct bcm_pmb *pmb, int bus, u8 device, ++ int zone) ++{ ++ int offset; ++ u32 val; ++ int err; ++ ++ offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL; ++ ++ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val); ++ if (err) ++ return err; ++ ++ if (!(val & BPCM_ZONE_CONTROL_PWR_ON_STATE)) { ++ val &= ~BPCM_ZONE_CONTROL_PWR_DN_REQ; ++ val |= BPCM_ZONE_CONTROL_DPG_CTL_EN; ++ val |= BPCM_ZONE_CONTROL_PWR_UP_REQ; ++ val |= BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN; ++ val |= BPCM_ZONE_CONTROL_BLK_RESET_ASSERT; ++ ++ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val); ++ } ++ ++ return err; ++} ++ ++static int bcm_pmb_power_off_device(struct bcm_pmb *pmb, int bus, u8 device) ++{ ++ int offset; ++ u32 val; ++ int err; ++ ++ /* Entire device can be powered off by powering off the 0th zone */ ++ offset = BPCM_ZONE0 + BPCM_ZONE_CONTROL; ++ ++ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val); ++ if (err) ++ return err; ++ ++ if (!(val & BPCM_ZONE_CONTROL_PWR_OFF_STATE)) { ++ val = BPCM_ZONE_CONTROL_PWR_DN_REQ; ++ ++ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val); ++ } ++ ++ return err; ++} ++ ++static int bcm_pmb_power_on_device(struct bcm_pmb *pmb, int bus, u8 device) ++{ ++ u32 val; ++ int err; ++ int i; ++ ++ err = bcm_pmb_bpcm_read(pmb, bus, device, BPCM_CAPABILITIES, &val); ++ if (err) ++ return err; ++ ++ for (i = 0; i < (val & BPCM_CAP_NUM_ZONES); i++) { ++ err = bcm_pmb_power_on_zone(pmb, bus, device, i); ++ if (err) ++ return err; ++ } ++ ++ return err; ++} ++ ++static int bcm_pmb_power_on(struct generic_pm_domain *genpd) ++{ ++ struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd); ++ const struct bcm_pmb_pd_data *data = pd->data; ++ struct bcm_pmb *pmb = pd->pmb; ++ ++ switch (data->id) { ++ case BCM_PMB_PCIE0: ++ case BCM_PMB_PCIE1: ++ case BCM_PMB_PCIE2: ++ return bcm_pmb_power_on_zone(pmb, data->bus, data->device, 0); ++ case BCM_PMB_HOST_USB: ++ return bcm_pmb_power_on_device(pmb, data->bus, data->device); ++ default: ++ dev_err(pmb->dev, "unsupported device id: %d\n", data->id); ++ return -EINVAL; ++ } ++} ++ ++static int bcm_pmb_power_off(struct generic_pm_domain *genpd) ++{ ++ struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd); ++ const struct bcm_pmb_pd_data *data = pd->data; ++ struct bcm_pmb *pmb = pd->pmb; ++ ++ switch (data->id) { ++ case BCM_PMB_PCIE0: ++ case BCM_PMB_PCIE1: ++ case BCM_PMB_PCIE2: ++ return bcm_pmb_power_off_zone(pmb, data->bus, data->device, 0); ++ case BCM_PMB_HOST_USB: ++ return bcm_pmb_power_off_device(pmb, data->bus, data->device); ++ default: ++ dev_err(pmb->dev, "unsupported device id: %d\n", data->id); ++ return -EINVAL; ++ } ++} ++ ++static int bcm_pmb_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ const struct bcm_pmb_pd_data *table; ++ const struct bcm_pmb_pd_data *e; ++ struct resource *res; ++ struct bcm_pmb *pmb; ++ int max_id; ++ int err; ++ ++ pmb = devm_kzalloc(dev, sizeof(*pmb), GFP_KERNEL); ++ if (!pmb) ++ return -ENOMEM; ++ ++ pmb->dev = dev; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ pmb->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(pmb->base)) ++ return PTR_ERR(pmb->base); ++ ++ spin_lock_init(&pmb->lock); ++ ++ pmb->little_endian = !of_device_is_big_endian(dev->of_node); ++ ++ table = of_device_get_match_data(dev); ++ if (!table) ++ return -EINVAL; ++ ++ max_id = 0; ++ for (e = table; e->name; e++) ++ max_id = max(max_id, e->id); ++ ++ pmb->genpd_onecell_data.num_domains = max_id + 1; ++ pmb->genpd_onecell_data.domains = ++ devm_kcalloc(dev, pmb->genpd_onecell_data.num_domains, ++ sizeof(struct generic_pm_domain *), GFP_KERNEL); ++ if (!pmb->genpd_onecell_data.domains) ++ return -ENOMEM; ++ ++ for (e = table; e->name; e++) { ++ struct bcm_pmb_pm_domain *pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); ++ ++ pd->pmb = pmb; ++ pd->data = e; ++ pd->genpd.name = e->name; ++ pd->genpd.power_on = bcm_pmb_power_on; ++ pd->genpd.power_off = bcm_pmb_power_off; ++ ++ pm_genpd_init(&pd->genpd, NULL, true); ++ pmb->genpd_onecell_data.domains[e->id] = &pd->genpd; ++ } ++ ++ err = of_genpd_add_provider_onecell(dev->of_node, &pmb->genpd_onecell_data); ++ if (err) { ++ dev_err(dev, "failed to add genpd provider: %d\n", err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static const struct bcm_pmb_pd_data bcm_pmb_bcm4908_data[] = { ++ { .name = "pcie2", .id = BCM_PMB_PCIE2, .bus = 0, .device = 2, }, ++ { .name = "pcie0", .id = BCM_PMB_PCIE0, .bus = 1, .device = 14, }, ++ { .name = "pcie1", .id = BCM_PMB_PCIE1, .bus = 1, .device = 15, }, ++ { .name = "usb", .id = BCM_PMB_HOST_USB, .bus = 1, .device = 17, }, ++ { }, ++}; ++ ++static const struct of_device_id bcm_pmb_of_match[] = { ++ { .compatible = "brcm,bcm4908-pmb", .data = &bcm_pmb_bcm4908_data, }, ++ { }, ++}; ++ ++static struct platform_driver bcm_pmb_driver = { ++ .driver = { ++ .name = "bcm-pmb", ++ .of_match_table = bcm_pmb_of_match, ++ }, ++ .probe = bcm_pmb_probe, ++}; ++ ++builtin_platform_driver(bcm_pmb_driver); diff --git a/target/linux/bcm4908/patches-5.10/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch b/target/linux/bcm4908/patches-5.10/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch new file mode 100644 index 0000000000..aab65925b4 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch @@ -0,0 +1,63 @@ +From 149ae80b1d50e7db5ac7df1cdf0820017b70e716 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 14 Jan 2021 11:53:18 +0100 +Subject: [PATCH] soc: bcm: brcmstb: add stubs for getting platform IDs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some brcmstb drivers may be shared with other SoC families. E.g. the +same USB PHY block is shared by brcmstb and BCM4908. + +To avoid building brcmstb common code on non-brcmstb platforms we need +stubs for: +1. brcmstb_get_family_id() +2. brcmstb_get_product_id() +(to avoid "undefined reference to" errors). + +With this change PHY_BRCM_USB will not have to unconditionally select +SOC_BRCMSTB anymore. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + include/linux/soc/brcmstb/brcmstb.h | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/include/linux/soc/brcmstb/brcmstb.h ++++ b/include/linux/soc/brcmstb/brcmstb.h +@@ -2,6 +2,8 @@ + #ifndef __BRCMSTB_SOC_H + #define __BRCMSTB_SOC_H + ++#include ++ + static inline u32 BRCM_ID(u32 reg) + { + return reg >> 28 ? reg >> 16 : reg >> 8; +@@ -12,6 +14,8 @@ static inline u32 BRCM_REV(u32 reg) + return reg & 0xff; + } + ++#if IS_ENABLED(CONFIG_SOC_BRCMSTB) ++ + /* + * Helper functions for getting family or product id from the + * SoC driver. +@@ -19,4 +23,16 @@ static inline u32 BRCM_REV(u32 reg) + u32 brcmstb_get_family_id(void); + u32 brcmstb_get_product_id(void); + ++#else ++static inline u32 brcmstb_get_family_id(void) ++{ ++ return 0; ++} ++ ++static inline u32 brcmstb_get_product_id(void) ++{ ++ return 0; ++} ++#endif ++ + #endif /* __BRCMSTB_SOC_H */ diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0001-phy-phy-brcm-usb-improve-getting-OF-matching-data.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0001-phy-phy-brcm-usb-improve-getting-OF-matching-data.patch new file mode 100644 index 0000000000..cc71373165 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.12-0001-phy-phy-brcm-usb-improve-getting-OF-matching-data.patch @@ -0,0 +1,49 @@ +From d14f4cce9340a6586512a0eb6bc680dedeaaef14 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 16 Dec 2020 15:33:04 +0100 +Subject: [PATCH] phy: phy-brcm-usb: improve getting OF matching data +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +1. Use of_device_get_match_data() helper to simplify the code +2. Check for NULL as a good practice + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20201216143305.12179-1-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + drivers/phy/broadcom/phy-brcm-usb.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +--- a/drivers/phy/broadcom/phy-brcm-usb.c ++++ b/drivers/phy/broadcom/phy-brcm-usb.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -427,7 +428,6 @@ static int brcm_usb_phy_probe(struct pla + struct device_node *dn = pdev->dev.of_node; + int err; + const char *mode; +- const struct of_device_id *match; + void (*dvr_init)(struct brcm_usb_init_params *params); + const struct match_chip_info *info; + struct regmap *rmap; +@@ -441,8 +441,9 @@ static int brcm_usb_phy_probe(struct pla + priv->ini.family_id = brcmstb_get_family_id(); + priv->ini.product_id = brcmstb_get_product_id(); + +- match = of_match_node(brcm_usb_dt_ids, dev->of_node); +- info = match->data; ++ info = of_device_get_match_data(&pdev->dev); ++ if (!info) ++ return -ENOENT; + dvr_init = info->init_func; + (*dvr_init)(&priv->ini); + diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0002-phy-phy-brcm-usb-specify-init-function-format-at-str.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0002-phy-phy-brcm-usb-specify-init-function-format-at-str.patch new file mode 100644 index 0000000000..bdc932732c --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.12-0002-phy-phy-brcm-usb-specify-init-function-format-at-str.patch @@ -0,0 +1,50 @@ +From 915f1d230e5292bc2156a9997bcb19d9e632f10b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 16 Dec 2020 15:33:05 +0100 +Subject: [PATCH] phy: phy-brcm-usb: specify init function format at struct + level +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This is slightly cleaner solution that assures noone assings a wrong +function to the pointer. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20201216143305.12179-2-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + drivers/phy/broadcom/phy-brcm-usb.c | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +--- a/drivers/phy/broadcom/phy-brcm-usb.c ++++ b/drivers/phy/broadcom/phy-brcm-usb.c +@@ -35,7 +35,7 @@ struct value_to_name_map { + }; + + struct match_chip_info { +- void *init_func; ++ void (*init_func)(struct brcm_usb_init_params *params); + u8 required_regs[BRCM_REGS_MAX + 1]; + u8 optional_reg; + }; +@@ -428,7 +428,6 @@ static int brcm_usb_phy_probe(struct pla + struct device_node *dn = pdev->dev.of_node; + int err; + const char *mode; +- void (*dvr_init)(struct brcm_usb_init_params *params); + const struct match_chip_info *info; + struct regmap *rmap; + int x; +@@ -444,8 +443,8 @@ static int brcm_usb_phy_probe(struct pla + info = of_device_get_match_data(&pdev->dev); + if (!info) + return -ENOENT; +- dvr_init = info->init_func; +- (*dvr_init)(&priv->ini); ++ ++ info->init_func(&priv->ini); + + dev_dbg(dev, "Best mapping table is for %s\n", + priv->ini.family_name); diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0003-dt-bindings-phy-brcm-brcmstb-usb-phy-convert-to-the-.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0003-dt-bindings-phy-brcm-brcmstb-usb-phy-convert-to-the-.patch new file mode 100644 index 0000000000..1edd63ea5d --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.12-0003-dt-bindings-phy-brcm-brcmstb-usb-phy-convert-to-the-.patch @@ -0,0 +1,315 @@ +From b39069a482ade0c5e18c407c3218ba1aeed371b6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 6 Jan 2021 21:58:36 +0100 +Subject: [PATCH] dt-bindings: phy: brcm, brcmstb-usb-phy: convert to the + json-schema +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Changes that require mentioning: +1. interrupt-names + Name "wakeup" was changed to the "wake". It matches example and what + Linux driver looks for in the first place +2. brcm,ipp and brcm,ioc + Both were described as booleans with 0 / 1 values. In examples they + were integers and Linux checks for int as well. Both got uint32. +3. Added minimal description + +Signed-off-by: Rafał Miłecki +Reviewed-by: Florian Fainelli +Reviewed-by: Rob Herring +Link: https://lore.kernel.org/r/20210106205838.10964-1-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + .../bindings/phy/brcm,brcmstb-usb-phy.txt | 86 -------- + .../bindings/phy/brcm,brcmstb-usb-phy.yaml | 193 ++++++++++++++++++ + 2 files changed, 193 insertions(+), 86 deletions(-) + delete mode 100644 Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt + create mode 100644 Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml + +--- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt ++++ /dev/null +@@ -1,86 +0,0 @@ +-Broadcom STB USB PHY +- +-Required properties: +-- compatible: should be one of +- "brcm,brcmstb-usb-phy" +- "brcm,bcm7216-usb-phy" +- "brcm,bcm7211-usb-phy" +- +-- reg and reg-names properties requirements are specific to the +- compatible string. +- "brcm,brcmstb-usb-phy": +- - reg: 1 or 2 offset and length pairs. One for the base CTRL registers +- and an optional pair for systems with USB 3.x support +- - reg-names: not specified +- "brcm,bcm7216-usb-phy": +- - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL +- registers +- - reg-names: "ctrl", "xhci_ec", "xhci_gbl" +- "brcm,bcm7211-usb-phy": +- - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL, +- USB_PHY and USB_MDIO registers and an optional pair +- for the BDC registers +- - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec" +- +-- #phy-cells: Shall be 1 as it expects one argument for setting +- the type of the PHY. Possible values are: +- - PHY_TYPE_USB2 for USB1.1/2.0 PHY +- - PHY_TYPE_USB3 for USB3.x PHY +- +-Optional Properties: +-- clocks : clock phandles. +-- clock-names: String, clock name. +-- interrupts: wakeup interrupt +-- interrupt-names: "wakeup" +-- brcm,ipp: Boolean, Invert Port Power. +- Possible values are: 0 (Don't invert), 1 (Invert) +-- brcm,ioc: Boolean, Invert Over Current detection. +- Possible values are: 0 (Don't invert), 1 (Invert) +-- dr_mode: String, PHY Device mode. +- Possible values are: "host", "peripheral ", "drd" or "typec-pd" +- If this property is not defined, the phy will default to "host" mode. +-- brcm,syscon-piarbctl: phandle to syscon for handling config registers +-NOTE: one or both of the following two properties must be set +-- brcm,has-xhci: Boolean indicating the phy has an XHCI phy. +-- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy. +- +- +-Example: +- +-usbphy_0: usb-phy@f0470200 { +- reg = <0xf0470200 0xb8>, +- <0xf0471940 0x6c0>; +- compatible = "brcm,brcmstb-usb-phy"; +- #phy-cells = <1>; +- dr_mode = "host" +- brcm,ioc = <1>; +- brcm,ipp = <1>; +- brcm,has-xhci; +- brcm,has-eohci; +- clocks = <&usb20>, <&usb30>; +- clock-names = "sw_usb", "sw_usb3"; +-}; +- +-usb-phy@29f0200 { +- reg = <0x29f0200 0x200>, +- <0x29c0880 0x30>, +- <0x29cc100 0x534>, +- <0x2808000 0x24>, +- <0x2980080 0x8>; +- reg-names = "ctrl", +- "xhci_ec", +- "xhci_gbl", +- "usb_phy", +- "usb_mdio"; +- brcm,ioc = <0x0>; +- brcm,ipp = <0x0>; +- compatible = "brcm,bcm7211-usb-phy"; +- interrupts = <0x30>; +- interrupt-parent = <&vpu_intr1_nosec_intc>; +- interrupt-names = "wake"; +- #phy-cells = <0x1>; +- brcm,has-xhci; +- syscon-piarbctl = <&syscon_piarbctl>; +- clocks = <&scmi_clk 256>; +- clock-names = "sw_usb"; +-}; +--- /dev/null ++++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml +@@ -0,0 +1,193 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/phy/brcm,brcmstb-usb-phy.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Broadcom STB USB PHY ++ ++description: Broadcom's PHY that handles EHCI/OHCI and/or XHCI ++ ++maintainers: ++ - Al Cooper ++ - Rafał Miłecki ++ ++properties: ++ compatible: ++ enum: ++ - brcm,bcm7211-usb-phy ++ - brcm,bcm7216-usb-phy ++ - brcm,brcmstb-usb-phy ++ ++ reg: ++ minItems: 1 ++ maxItems: 6 ++ items: ++ - description: the base CTRL register ++ - description: XHCI EC register ++ - description: XHCI GBL register ++ - description: USB PHY register ++ - description: USB MDIO register ++ - description: BDC register ++ ++ reg-names: ++ minItems: 1 ++ maxItems: 6 ++ items: ++ - const: ctrl ++ - const: xhci_ec ++ - const: xhci_gbl ++ - const: usb_phy ++ - const: usb_mdio ++ - const: bdc_ec ++ ++ clocks: ++ minItems: 1 ++ maxItems: 2 ++ ++ clock-names: ++ minItems: 1 ++ maxItems: 2 ++ items: ++ - const: sw_usb ++ - const: sw_usb3 ++ ++ interrupts: ++ description: wakeup interrupt ++ ++ interrupt-names: ++ const: wake ++ ++ brcm,ipp: ++ $ref: /schemas/types.yaml#/definitions/uint32 ++ description: Invert Port Power ++ minimum: 0 ++ maximum: 1 ++ ++ brcm,ioc: ++ $ref: /schemas/types.yaml#/definitions/uint32 ++ description: Invert Over Current detection ++ minimum: 0 ++ maximum: 1 ++ ++ dr_mode: ++ description: PHY Device mode. If this property is not defined, the PHY will ++ default to "host" mode. ++ enum: ++ - host ++ - peripheral ++ - drd ++ - typec-pd ++ ++ brcm,syscon-piarbctl: ++ description: phandle to syscon for handling config registers ++ $ref: /schemas/types.yaml#/definitions/phandle ++ ++ brcm,has-xhci: ++ description: Indicates the PHY has an XHCI PHY. ++ type: boolean ++ ++ brcm,has-eohci: ++ description: Indicates the PHY has an EHCI/OHCI PHY. ++ type: boolean ++ ++ "#phy-cells": ++ description: | ++ Cell allows setting the type of the PHY. Possible values are: ++ - PHY_TYPE_USB2 for USB1.1/2.0 PHY ++ - PHY_TYPE_USB3 for USB3.x PHY ++ const: 1 ++ ++required: ++ - reg ++ - "#phy-cells" ++ ++anyOf: ++ - required: ++ - brcm,has-xhci ++ - required: ++ - brcm,has-eohci ++ ++allOf: ++ - if: ++ properties: ++ compatible: ++ contains: ++ const: brcm,brcmstb-usb-phy ++ then: ++ properties: ++ reg: ++ minItems: 1 ++ maxItems: 2 ++ - if: ++ properties: ++ compatible: ++ contains: ++ const: brcm,bcm7211-usb-phy ++ then: ++ properties: ++ reg: ++ minItems: 5 ++ maxItems: 6 ++ reg-names: ++ minItems: 5 ++ maxItems: 6 ++ - if: ++ properties: ++ compatible: ++ contains: ++ const: brcm,bcm7216-usb-phy ++ then: ++ properties: ++ reg: ++ minItems: 3 ++ maxItems: 3 ++ reg-names: ++ minItems: 3 ++ maxItems: 3 ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ ++ usb-phy@f0470200 { ++ compatible = "brcm,brcmstb-usb-phy"; ++ reg = <0xf0470200 0xb8>, ++ <0xf0471940 0x6c0>; ++ #phy-cells = <1>; ++ dr_mode = "host"; ++ brcm,ioc = <1>; ++ brcm,ipp = <1>; ++ brcm,has-xhci; ++ brcm,has-eohci; ++ clocks = <&usb20>, <&usb30>; ++ clock-names = "sw_usb", "sw_usb3"; ++ }; ++ - | ++ #include ++ ++ usb-phy@29f0200 { ++ compatible = "brcm,bcm7211-usb-phy"; ++ reg = <0x29f0200 0x200>, ++ <0x29c0880 0x30>, ++ <0x29cc100 0x534>, ++ <0x2808000 0x24>, ++ <0x2980080 0x8>; ++ reg-names = "ctrl", ++ "xhci_ec", ++ "xhci_gbl", ++ "usb_phy", ++ "usb_mdio"; ++ brcm,ioc = <0x0>; ++ brcm,ipp = <0x0>; ++ interrupts = <0x30>; ++ interrupt-parent = <&vpu_intr1_nosec_intc>; ++ interrupt-names = "wake"; ++ #phy-cells = <0x1>; ++ brcm,has-xhci; ++ brcm,syscon-piarbctl = <&syscon_piarbctl>; ++ clocks = <&scmi_clk 256>; ++ clock-names = "sw_usb"; ++ }; diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0004-dt-bindings-phy-brcm-brcmstb-usb-phy-add-BCM4908-bin.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0004-dt-bindings-phy-brcm-brcmstb-usb-phy-add-BCM4908-bin.patch new file mode 100644 index 0000000000..6127800a43 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.12-0004-dt-bindings-phy-brcm-brcmstb-usb-phy-add-BCM4908-bin.patch @@ -0,0 +1,41 @@ +From 46b616c1574def7a1629bdeded3d44e76382f950 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 6 Jan 2021 21:58:37 +0100 +Subject: [PATCH] dt-bindings: phy: brcm, brcmstb-usb-phy: add BCM4908 binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 uses the same PHY and may require just a slightly different +programming. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Acked-by: Rob Herring +Link: https://lore.kernel.org/r/20210106205838.10964-2-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + .../devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml ++++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml +@@ -15,6 +15,7 @@ maintainers: + properties: + compatible: + enum: ++ - brcm,bcm4908-usb-phy + - brcm,bcm7211-usb-phy + - brcm,bcm7216-usb-phy + - brcm,brcmstb-usb-phy +@@ -113,7 +114,9 @@ allOf: + properties: + compatible: + contains: +- const: brcm,brcmstb-usb-phy ++ enum: ++ - const: brcm,bcm4908-usb-phy ++ - const: brcm,brcmstb-usb-phy + then: + properties: + reg: diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0005-phy-phy-brcm-usb-support-PHY-on-the-BCM4908.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0005-phy-phy-brcm-usb-support-PHY-on-the-BCM4908.patch new file mode 100644 index 0000000000..a2cea0f138 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.12-0005-phy-phy-brcm-usb-support-PHY-on-the-BCM4908.patch @@ -0,0 +1,48 @@ +From 4b402fa8e0b7817f3e3738d7828038f114e6899e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 6 Jan 2021 21:58:38 +0100 +Subject: [PATCH] phy: phy-brcm-usb: support PHY on the BCM4908 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 seems to have slightly different registers but works when +programmed just like the STB one. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210106205838.10964-3-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + drivers/phy/broadcom/Kconfig | 3 ++- + drivers/phy/broadcom/phy-brcm-usb.c | 4 ++++ + 2 files changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/phy/broadcom/Kconfig ++++ b/drivers/phy/broadcom/Kconfig +@@ -91,10 +91,11 @@ config PHY_BRCM_SATA + + config PHY_BRCM_USB + tristate "Broadcom STB USB PHY driver" +- depends on ARCH_BRCMSTB || COMPILE_TEST ++ depends on ARCH_BCM4908 || ARCH_BRCMSTB || COMPILE_TEST + depends on OF + select GENERIC_PHY + select SOC_BRCMSTB ++ default ARCH_BCM4908 + default ARCH_BRCMSTB + help + Enable this to support the Broadcom STB USB PHY. +--- a/drivers/phy/broadcom/phy-brcm-usb.c ++++ b/drivers/phy/broadcom/phy-brcm-usb.c +@@ -287,6 +287,10 @@ static const struct match_chip_info chip + + static const struct of_device_id brcm_usb_dt_ids[] = { + { ++ .compatible = "brcm,bcm4908-usb-phy", ++ .data = &chip_info_7445, ++ }, ++ { + .compatible = "brcm,bcm7216-usb-phy", + .data = &chip_info_7216, + }, diff --git a/target/linux/bcm4908/patches-5.10/086-v5.13-0001-phy-phy-brcm-usb-select-SOC_BRCMSTB-on-brcmstb-only.patch b/target/linux/bcm4908/patches-5.10/086-v5.13-0001-phy-phy-brcm-usb-select-SOC_BRCMSTB-on-brcmstb-only.patch new file mode 100644 index 0000000000..89ee4df78c --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.13-0001-phy-phy-brcm-usb-select-SOC_BRCMSTB-on-brcmstb-only.patch @@ -0,0 +1,35 @@ +From 261ab1fd5c5d2d7ff7d5bab3f5db3c69c4bcea58 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 5 Mar 2021 16:24:06 +0100 +Subject: [PATCH] phy: phy-brcm-usb: select SOC_BRCMSTB on brcmstb only +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +phy-brcm-usb has some conditional init code required on selected brcmstb +devices. Execution of that code depends on family / product detected by +brcmstb soc code. + +For ARCH_BCM4908 brcmstb soc code always return 0 values as ids. Don't +bother selecting & compiling that redundant driver. + +Depends-on: 149ae80b1d50 ("soc: bcm: brcmstb: add stubs for getting platform IDs") +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210305152406.2588-1-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + drivers/phy/broadcom/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/phy/broadcom/Kconfig ++++ b/drivers/phy/broadcom/Kconfig +@@ -94,7 +94,7 @@ config PHY_BRCM_USB + depends on ARCH_BCM4908 || ARCH_BRCMSTB || COMPILE_TEST + depends on OF + select GENERIC_PHY +- select SOC_BRCMSTB ++ select SOC_BRCMSTB if ARCH_BRCMSTB + default ARCH_BCM4908 + default ARCH_BRCMSTB + help diff --git a/target/linux/bcm4908/patches-5.10/086-v5.13-0002-dt-bindings-phy-brcm-brcmstb-usb-phy-add-power-domai.patch b/target/linux/bcm4908/patches-5.10/086-v5.13-0002-dt-bindings-phy-brcm-brcmstb-usb-phy-add-power-domai.patch new file mode 100644 index 0000000000..4db442c0ae --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/086-v5.13-0002-dt-bindings-phy-brcm-brcmstb-usb-phy-add-power-domai.patch @@ -0,0 +1,31 @@ +From d9de0cbd5b1f6b51c92a40937945f26a35d848ff Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 9 Mar 2021 19:26:16 +0100 +Subject: [PATCH] dt-bindings: phy: brcm,brcmstb-usb-phy: add power-domains +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On BCM4908 USB PHY is managed using power controller so it needs +describing properly using the power-domains. + +Signed-off-by: Rafał Miłecki +Acked-by: Florian Fainelli +Link: https://lore.kernel.org/r/20210309182616.25783-1-zajec5@gmail.com +Signed-off-by: Vinod Koul +--- + .../devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml ++++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml +@@ -42,6 +42,9 @@ properties: + - const: usb_mdio + - const: bdc_ec + ++ power-domains: ++ maxItems: 1 ++ + clocks: + minItems: 1 + maxItems: 2 diff --git a/target/linux/bcm4908/patches-5.10/170-net-broadcom-bcm4908_enet-reset-DMA-rings-sw-indexes.patch b/target/linux/bcm4908/patches-5.10/170-net-broadcom-bcm4908_enet-reset-DMA-rings-sw-indexes.patch new file mode 100644 index 0000000000..7e82230f9a --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/170-net-broadcom-bcm4908_enet-reset-DMA-rings-sw-indexes.patch @@ -0,0 +1,43 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 22 Jun 2021 07:05:04 +0200 +Subject: [PATCH] net: broadcom: bcm4908_enet: reset DMA rings sw indexes + properly +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Resetting software indexes in bcm4908_dma_alloc_buf_descs() is not +enough as it's called during device probe only. Driver resets DMA on +every .ndo_open callback and it's required to reset indexes then. + +This fixes inconsistent rings state and stalled traffic after interface +down & up sequence. + +Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") +Signed-off-by: Rafał Miłecki +--- + drivers/net/ethernet/broadcom/bcm4908_enet.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c +@@ -174,9 +174,6 @@ static int bcm4908_dma_alloc_buf_descs(s + if (!ring->slots) + goto err_free_buf_descs; + +- ring->read_idx = 0; +- ring->write_idx = 0; +- + return 0; + + err_free_buf_descs: +@@ -303,6 +300,9 @@ static void bcm4908_enet_dma_ring_init(s + + enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, + (uint32_t)ring->dma_addr); ++ ++ ring->read_idx = 0; ++ ring->write_idx = 0; + } + + static void bcm4908_enet_dma_uninit(struct bcm4908_enet *enet) diff --git a/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcm4908-limit-amount-of-GPIOs.patch b/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcm4908-limit-amount-of-GPIOs.patch new file mode 100644 index 0000000000..c28c69c6f8 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcm4908-limit-amount-of-GPIOs.patch @@ -0,0 +1,23 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 15 Feb 2021 22:01:03 +0100 +Subject: [PATCH] arm64: dts: broadcom: bcm4908: limit amount of GPIOs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Linux driver can't handle more than 64 GPIOs + +Signed-off-by: Rafał Miłecki +--- + +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -281,7 +281,7 @@ + gpio0: gpio-controller@500 { + compatible = "brcm,bcm6345-gpio"; + reg-names = "dirout", "dat"; +- reg = <0x500 0x28>, <0x528 0x28>; ++ reg = <0x500 0x8>, <0x528 0x8>; + + #gpio-cells = <2>; + gpio-controller; diff --git a/target/linux/bcm4908/patches-5.10/400-mtd-rawnand-brcmnand-disable-WP-on-BCM4908.patch b/target/linux/bcm4908/patches-5.10/400-mtd-rawnand-brcmnand-disable-WP-on-BCM4908.patch new file mode 100644 index 0000000000..74dddb7f48 --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/400-mtd-rawnand-brcmnand-disable-WP-on-BCM4908.patch @@ -0,0 +1,34 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 21 Jan 2021 10:44:53 +0100 +Subject: [PATCH] mtd: rawnand: brcmnand: disable WP on BCM4908 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BCM4908 contains NAND controller version 0x0701 (v7.1). It means that +NAND_WP should be available. + +For some reason setting #WP on doesn't result in clearing NAND_STATUS_WP +status bit: +[ 1.077857] bcm63138_nand ff801800.nand: timeout on status poll (expected c0000040 got c00000c0) +[ 1.086832] bcm63138_nand ff801800.nand: nand #WP expected on + +For now try working without touching #WP. + +Signed-off-by: Rafał Miłecki +--- + +--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c ++++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c +@@ -37,7 +37,11 @@ + * 1: NAND_WP is set by default, cleared for erase/write operations + * 2: NAND_WP is always cleared + */ ++#if IS_ENABLED(CONFIG_ARCH_BCM4908) ++static int wp_on = 0; ++#else + static int wp_on = 1; ++#endif + module_param(wp_on, int, 0444); + + /*********************************************************************** diff --git a/target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch b/target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch new file mode 100644 index 0000000000..c8d362df4a --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch @@ -0,0 +1,46 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 15 Feb 2021 23:59:26 +0100 +Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +GPHY needs to be enabled to succesfully probe & setup switch port +connected to it. Otherwise hardcoding PHY OUI would be required. + +Before: +brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7 + +After: +brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL) +brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL) + +Signed-off-by: Rafał Miłecki +--- + drivers/net/dsa/bcm_sf2.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -1484,10 +1484,14 @@ static int bcm_sf2_sw_probe(struct platf + rev = reg_readl(priv, REG_PHY_REVISION); + priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK; + ++ bcm_sf2_gphy_enable_set(priv->dev->ds, true); ++ + ret = b53_switch_register(dev); + if (ret) + goto out_mdio; + ++ bcm_sf2_gphy_enable_set(priv->dev->ds, false); ++ + dev_info(&pdev->dev, + "Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n", + priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff, diff --git a/target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch b/target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch new file mode 100644 index 0000000000..9449cf9e5c --- /dev/null +++ b/target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch @@ -0,0 +1,30 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 16 Feb 2021 00:06:35 +0100 +Subject: [PATCH] net: dsa: bcm_sf2: keep GPHY enabled on the BCM4908 + +Trying to access disabled PHY results in MDIO_READ_FAIL and: +[ 11.962886] brcm-sf2 80080000.switch wan: configuring for phy/internal link mode +[ 11.972500] 8021q: adding VLAN 0 to HW filter on device wan +[ 11.980205] ------------[ cut here ]------------ +[ 11.984885] WARNING: CPU: 0 PID: 7 at phy_error+0x10/0x58 + +Signed-off-by: Rafał Miłecki +--- + drivers/net/dsa/bcm_sf2.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/net/dsa/bcm_sf2.c ++++ b/drivers/net/dsa/bcm_sf2.c +@@ -1498,6 +1498,12 @@ static int bcm_sf2_sw_probe(struct platf + priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff, + priv->irq0, priv->irq1); + ++ /* BCM4908 has 5 GPHYs which means bcm_sf2_port_setup() will not enable ++ * GPHY when needed. Leave it enabled here. ++ */ ++ if (priv->type == BCM4908_DEVICE_ID) ++ bcm_sf2_gphy_enable_set(priv->dev->ds, true); ++ + return 0; + + out_mdio: diff --git a/target/linux/bcm53xx/patches-5.10/034-v5.17-0001-ARM-dts-NSP-MX65-add-qca8k-falling-edge-PLL-properti.patch b/target/linux/bcm53xx/patches-5.10/034-v5.17-0001-ARM-dts-NSP-MX65-add-qca8k-falling-edge-PLL-properti.patch new file mode 100644 index 0000000000..a0be1eda4d --- /dev/null +++ b/target/linux/bcm53xx/patches-5.10/034-v5.17-0001-ARM-dts-NSP-MX65-add-qca8k-falling-edge-PLL-properti.patch @@ -0,0 +1,42 @@ +From 58d3d07985c1adab31a3ed76360d016bb1c5b358 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan +Date: Fri, 15 Oct 2021 23:50:22 +0100 +Subject: [PATCH] ARM: dts: NSP: MX65: add qca8k falling-edge, PLL properties + +This patch enables two properties for the QCA8337 switches on the MX65. + +Set the SGMII transmit clock to falling edge +"qca,sgmii-txclk-falling-edge" to conform to the OEM configuration [1]. + +The new explicit PLL enable option "qca,sgmii-enable-pll" is required +[2]. + +[1] https://git.kernel.org/netdev/net-next/c/6c43809bf1be +[2] https://git.kernel.org/netdev/net-next/c/bbc4799e8bb6 + +Signed-off-by: Matthew Hagan +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi ++++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi +@@ -118,6 +118,8 @@ + reg = <0>; + ethernet = <&sgmii1>; + phy-mode = "sgmii"; ++ qca,sgmii-enable-pll; ++ qca,sgmii-txclk-falling-edge; + fixed-link { + speed = <1000>; + full-duplex; +@@ -194,6 +196,8 @@ + reg = <0>; + ethernet = <&sgmii0>; + phy-mode = "sgmii"; ++ qca,sgmii-enable-pll; ++ qca,sgmii-txclk-falling-edge; + fixed-link { + speed = <1000>; + full-duplex; diff --git a/target/linux/bcm53xx/patches-5.10/034-v5.17-0002-ARM-dts-BCM5301X-remove-unnecessary-address-size-cel.patch b/target/linux/bcm53xx/patches-5.10/034-v5.17-0002-ARM-dts-BCM5301X-remove-unnecessary-address-size-cel.patch new file mode 100644 index 0000000000..3c3725adec --- /dev/null +++ b/target/linux/bcm53xx/patches-5.10/034-v5.17-0002-ARM-dts-BCM5301X-remove-unnecessary-address-size-cel.patch @@ -0,0 +1,29 @@ +From 835992e7eca4b29a87c204cefff2f7863fd087f3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Wed, 27 Oct 2021 00:57:03 +0800 +Subject: [PATCH] ARM: dts: BCM5301X: remove unnecessary address & size cells + from Asus RT-AC88U +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Remove the unnecessary #address-cells & #size-cells in the gpio-keys node +from the device tree of Asus RT-AC88U. + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts ++++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts +@@ -68,8 +68,6 @@ + + gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + + wps { + label = "WPS"; diff --git a/target/linux/bcm53xx/patches-5.10/034-v5.17-0003-ARM-dts-BCM5301X-define-RTL8365MB-switch-on-Asus-RT-.patch b/target/linux/bcm53xx/patches-5.10/034-v5.17-0003-ARM-dts-BCM5301X-define-RTL8365MB-switch-on-Asus-RT-.patch new file mode 100644 index 0000000000..562d5a22c7 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.10/034-v5.17-0003-ARM-dts-BCM5301X-define-RTL8365MB-switch-on-Asus-RT-.patch @@ -0,0 +1,104 @@ +From b6c99228c8edc5e67d8229ba1c5f76cce210ddfc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Wed, 27 Oct 2021 00:57:06 +0800 +Subject: [PATCH] ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Define the Realtek RTL8365MB switch without interrupt support on the device +tree of Asus RT-AC88U. + +Signed-off-by: Arınç ÜNAL +Acked-by: Alvin Šipraga +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 77 ++++++++++++++++++++ + 1 file changed, 77 insertions(+) + +--- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts ++++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts +@@ -93,6 +93,83 @@ + gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; + }; + }; ++ ++ switch { ++ compatible = "realtek,rtl8365mb"; ++ /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */ ++ mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; ++ mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; ++ realtek,disable-leds; ++ dsa,member = <1 0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ ++ port@0 { ++ reg = <0>; ++ label = "lan5"; ++ phy-handle = <ðphy0>; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan6"; ++ phy-handle = <ðphy1>; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan7"; ++ phy-handle = <ðphy2>; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan8"; ++ phy-handle = <ðphy3>; ++ }; ++ ++ port@6 { ++ reg = <6>; ++ label = "cpu"; ++ ethernet = <&sw0_p5>; ++ phy-mode = "rgmii"; ++ tx-internal-delay-ps = <2000>; ++ rx-internal-delay-ps = <2000>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ }; ++ ++ mdio { ++ compatible = "realtek,smi-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethphy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ ++ ethphy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ ++ ethphy2: ethernet-phy@2 { ++ reg = <2>; ++ }; ++ ++ ethphy3: ethernet-phy@3 { ++ reg = <3>; ++ }; ++ }; ++ }; + }; + + &srab { diff --git a/target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch b/target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch index 628569eca9..39ce3259fb 100644 --- a/target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch +++ b/target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch @@ -14,11 +14,9 @@ Signed-off-by: Florian Fainelli arch/arm/boot/dts/bcm5301x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi -index f92089290ccd..ec5de636796e 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -408,7 +408,7 @@ uart2: serial@18008000 { +@@ -408,7 +408,7 @@ i2c0: i2c@18009000 { compatible = "brcm,iproc-i2c"; reg = <0x18009000 0x50>; @@ -27,6 +25,3 @@ index f92089290ccd..ec5de636796e 100644 #address-cells = <1>; #size-cells = <0>; clock-frequency = <100000>; --- -2.25.1 - diff --git a/target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch b/target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch index acd69edaab..9e2adfa131 100644 --- a/target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch +++ b/target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch @@ -51,7 +51,7 @@ Signed-off-by: Christian Lamparter }; &uart0 { -@@ -196,3 +168,31 @@ +@@ -229,3 +195,31 @@ }; }; }; diff --git a/target/linux/imx6/Makefile b/target/linux/imx/Makefile similarity index 75% rename from target/linux/imx6/Makefile rename to target/linux/imx/Makefile index e735d1d885..b293655a9a 100644 --- a/target/linux/imx6/Makefile +++ b/target/linux/imx/Makefile @@ -5,14 +5,12 @@ include $(TOPDIR)/rules.mk ARCH:=arm -BOARD:=imx6 -BOARDNAME:=NXP i.MX 6 +BOARD:=imx +BOARDNAME:=NXP i.MX FEATURES:=audio display fpu gpio pcie rtc usb usbgadget squashfs targz nand ubifs boot-part rootfs-part -CPU_TYPE:=cortex-a9 -CPU_SUBTYPE:=neon +SUBTARGETS:=cortexa7 cortexa9 -KERNEL_PATCHVER:=5.4 -KERNEL_TESTING_PATCHVER:=5.10 +KERNEL_PATCHVER:=5.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/imx6/base-files/etc/inittab b/target/linux/imx/base-files/etc/inittab similarity index 100% rename from target/linux/imx6/base-files/etc/inittab rename to target/linux/imx/base-files/etc/inittab diff --git a/target/linux/imx6/config-5.4 b/target/linux/imx/config-5.10 similarity index 84% rename from target/linux/imx6/config-5.4 rename to target/linux/imx/config-5.10 index 8bfc21a282..f8fd0437bb 100644 --- a/target/linux/imx6/config-5.4 +++ b/target/linux/imx/config-5.10 @@ -1,7 +1,5 @@ -CONFIG_AHCI_IMX=y CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y @@ -13,18 +11,19 @@ CONFIG_ARCH_MXC=y CONFIG_ARCH_NR_GPIO=0 CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARM=y -CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_CRYPTO=y CONFIG_ARM_ERRATA_754322=y CONFIG_ARM_ERRATA_764369=y CONFIG_ARM_ERRATA_775420=y CONFIG_ARM_ERRATA_814220=y -CONFIG_ARM_GIC=y CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_IMX6Q_CPUFREQ=y # CONFIG_ARM_IMX_CPUFREQ_DT is not set CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_L1_CACHE_SHIFT_6=y @@ -37,20 +36,22 @@ CONFIG_ASN1=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_ATA=y CONFIG_ATAGS=y +# CONFIG_ATA_SFF is not set CONFIG_AUTO_ZRELADDR=y CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y CONFIG_BLK_PM=y CONFIG_BLK_SCSI_REQUEST=y CONFIG_CACHE_L2X0=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_IMX_GPT=y CONFIG_CLKSRC_MMIO=y +# CONFIG_CLK_IMX8MM is not set +# CONFIG_CLK_IMX8MN is not set +# CONFIG_CLK_IMX8MP is not set +# CONFIG_CLK_IMX8MQ is not set CONFIG_CLONE_BACKWARDS=y CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="pci=nomsi" -CONFIG_CMDLINE_EXTEND=y CONFIG_COMMON_CLK=y CONFIG_COMPAT_32BIT_TIME=y CONFIG_CPUFREQ_DT=y @@ -83,13 +84,9 @@ CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V7=y CONFIG_CPU_V7=y CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_AES_ARM=y CONFIG_CRYPTO_AES_ARM_BS=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CHACHA20=y @@ -98,7 +95,6 @@ CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32_ARM_CE=y CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DEV_FSL_CAAM=y @@ -117,18 +113,16 @@ CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_ENGINE=y +CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y @@ -155,10 +149,10 @@ CONFIG_DECOMPRESS_XZ=y CONFIG_DMADEVICES=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y CONFIG_DMA_REMAP=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DTC=y -CONFIG_E1000E=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_ENCRYPTED_KEYS=y @@ -169,11 +163,11 @@ CONFIG_EXTCON=y CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" CONFIG_EXTRA_FIRMWARE_DIR="firmware" CONFIG_F2FS_FS=y -CONFIG_FEC=y +# CONFIG_FEC is not set CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FSL_GUTS=y CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y @@ -185,14 +179,12 @@ CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_MULTI_HANDLER=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PINCONF=y CONFIG_GENERIC_PINCTRL_GROUPS=y @@ -202,14 +194,12 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y # CONFIG_GIANFAR is not set CONFIG_GLOB=y CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_MXC=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GRO_CELLS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDEN_BRANCH_PREDICTOR=y @@ -220,7 +210,6 @@ CONFIG_HAS_IOPORT_MAP=y CONFIG_HAVE_SMP=y CONFIG_HWMON=y CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IMX_RNGC=y CONFIG_HZ_FIXED=0 CONFIG_HZ_PERIODIC=y CONFIG_I2C=y @@ -230,13 +219,14 @@ CONFIG_I2C_IMX=y # CONFIG_I2C_IMX_LPI2C is not set CONFIG_IMX2_WDT=y # CONFIG_IMX7ULP_WDT is not set +# CONFIG_IMX8MM_THERMAL is not set CONFIG_IMX_DMA=y # CONFIG_IMX_GPCV2_PM_DOMAINS is not set +CONFIG_IMX_INTMUX=y CONFIG_IMX_IRQSTEER=y CONFIG_IMX_SDMA=y CONFIG_IMX_THERMAL=y # CONFIG_IMX_WEIM is not set -# CONFIG_INITRAMFS_FORCE is not set CONFIG_INITRAMFS_SOURCE="" CONFIG_IO_URING=y CONFIG_IRQCHIP=y @@ -248,16 +238,16 @@ CONFIG_JBD2=y # CONFIG_JFFS2_FS is not set CONFIG_KEYS=y CONFIG_LIBFDT=y +CONFIG_LLD_VERSION=0 CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MARVELL_PHY=y CONFIG_MDIO_BUS=y CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y CONFIG_MEMFD_CREATE=y CONFIG_MFD_SYSCON=y -CONFIG_MICREL_PHY=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_MIGRATION=y CONFIG_MMC=y @@ -265,14 +255,12 @@ CONFIG_MMC_BLOCK=y CONFIG_MMC_CQHCI=y # CONFIG_MMC_MXC is not set CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -# CONFIG_MMC_SDHCI_PCI is not set +# CONFIG_MMC_SDHCI_ESDHC_IMX is not set CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_MPILIB=y CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_ECC_SW_HAMMING=y CONFIG_MTD_NAND_GPMI_NAND=y CONFIG_MTD_RAW_NAND=y @@ -288,8 +276,6 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEON=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y CONFIG_NET_DSA_TAG_DSA=y CONFIG_NET_DSA_TAG_EDSA=y CONFIG_NET_FLOW_LIMIT=y @@ -318,32 +304,18 @@ CONFIG_OUTER_CACHE=y CONFIG_OUTER_CACHE_SYNC=y CONFIG_PADATA=y CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_IMX6=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y CONFIG_PHYLINK=y CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX=y -CONFIG_PINCTRL_IMX6Q=y -CONFIG_PINCTRL_IMX6SL=y -CONFIG_PINCTRL_IMX6SX=y -CONFIG_PINCTRL_IMX6UL=y +# CONFIG_PINCTRL_IMX8MM is not set +# CONFIG_PINCTRL_IMX8MN is not set +# CONFIG_PINCTRL_IMX8MP is not set +# CONFIG_PINCTRL_IMX8MQ is not set CONFIG_PL310_ERRATA_769419=y CONFIG_PM=y CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y CONFIG_PM_OPP=y CONFIG_PPS=y CONFIG_PTP_1588_CLOCK=y @@ -358,33 +330,25 @@ CONFIG_RD_BZIP2=y CONFIG_RD_GZIP=y CONFIG_RD_LZO=y CONFIG_RD_XZ=y -CONFIG_REFCOUNT_FULL=y CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_LTC3676=y -CONFIG_REGULATOR_PFUZE100=y CONFIG_RESET_CONTROLLER=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y CONFIG_RTC_CLASS=y # CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_DS1672=y # CONFIG_RTC_DRV_IMXDI is not set # CONFIG_RTC_DRV_MXC is not set # CONFIG_RTC_DRV_MXC_V2 is not set CONFIG_RTC_I2C_AND_SPI=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_SCSI=y -CONFIG_SENSORS_AD7418=y -# CONFIG_SENSORS_DRIVETEMP is not set CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_IMX_EARLYCON=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SGL_ALLOC=y CONFIG_SG_POOL=y @@ -394,14 +358,14 @@ CONFIG_SOC_BUS=y # CONFIG_SOC_IMX50 is not set # CONFIG_SOC_IMX51 is not set # CONFIG_SOC_IMX53 is not set -CONFIG_SOC_IMX6=y -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y +# CONFIG_SOC_IMX6Q is not set +# CONFIG_SOC_IMX6SL is not set # CONFIG_SOC_IMX6SLL is not set -CONFIG_SOC_IMX6SX=y -CONFIG_SOC_IMX6UL=y +# CONFIG_SOC_IMX6SX is not set +# CONFIG_SOC_IMX6UL is not set # CONFIG_SOC_IMX7D is not set # CONFIG_SOC_IMX7ULP is not set +# CONFIG_SOC_IMX8M is not set # CONFIG_SOC_LS1021A is not set # CONFIG_SOC_VF610 is not set CONFIG_SPARSE_IRQ=y @@ -435,7 +399,6 @@ CONFIG_UNWINDER_ARM=y CONFIG_USB=y CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_OF=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_COMMON=y CONFIG_USB_EHCI_HCD=y diff --git a/target/linux/imx/cortexa7/base-files/etc/board.d/02_network b/target/linux/imx/cortexa7/base-files/etc/board.d/02_network new file mode 100644 index 0000000000..75d1c7d1d8 --- /dev/null +++ b/target/linux/imx/cortexa7/base-files/etc/board.d/02_network @@ -0,0 +1,15 @@ +. /lib/functions/uci-defaults.sh + +board=$(board_name) + +board_config_update + +case "$board" in +*) + ucidef_set_interfaces_lan_wan "eth0" "eth1" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/imx/cortexa7/base-files/lib/upgrade/platform.sh b/target/linux/imx/cortexa7/base-files/lib/upgrade/platform.sh new file mode 100644 index 0000000000..9a613c43b1 --- /dev/null +++ b/target/linux/imx/cortexa7/base-files/lib/upgrade/platform.sh @@ -0,0 +1,16 @@ +PART_NAME=firmware +REQUIRE_IMAGE_METADATA=1 + +platform_check_image() { + return 0 +} + +platform_do_upgrade() { + local board=$(board_name) + + case "$board" in + *) + default_do_upgrade "$1" + ;; + esac +} diff --git a/target/linux/imx/cortexa7/config-default b/target/linux/imx/cortexa7/config-default new file mode 100644 index 0000000000..b91c01cd56 --- /dev/null +++ b/target/linux/imx/cortexa7/config-default @@ -0,0 +1,27 @@ +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_GIC=y +CONFIG_CLK_IMX6UL=y +CONFIG_CMA=y +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CONTIG_ALLOC=y +# CONFIG_DMA_CMA is not set +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_HW_RANDOM_IMX_RNGC=y +CONFIG_JFFS2_FS=y +CONFIG_LEDS_GPIO=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_PINCTRL_IMX=y +CONFIG_PINCTRL_IMX6UL=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_SOC_IMX6=y +CONFIG_SOC_IMX6UL=y +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_SPI_MEM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_EHCI_MXC=y diff --git a/target/linux/imx/cortexa7/target.mk b/target/linux/imx/cortexa7/target.mk new file mode 100644 index 0000000000..11de87507d --- /dev/null +++ b/target/linux/imx/cortexa7/target.mk @@ -0,0 +1,7 @@ +BOARDNAME:=NXP i.MX with Cortex-A7 +CPU_TYPE:=cortex-a7 +CPU_SUBTYPE:=neon-vfpv4 + +define Target/Description + Build firmware images for NXP i.MX (Cortex-A7) based boards. +endef diff --git a/target/linux/imx6/base-files/etc/board.d/02_network b/target/linux/imx/cortexa9/base-files/etc/board.d/02_network similarity index 100% rename from target/linux/imx6/base-files/etc/board.d/02_network rename to target/linux/imx/cortexa9/base-files/etc/board.d/02_network diff --git a/target/linux/imx6/base-files/lib/imx6.sh b/target/linux/imx/cortexa9/base-files/lib/imx.sh similarity index 100% rename from target/linux/imx6/base-files/lib/imx6.sh rename to target/linux/imx/cortexa9/base-files/lib/imx.sh diff --git a/target/linux/imx6/base-files/lib/preinit/79_move_config b/target/linux/imx/cortexa9/base-files/lib/preinit/79_move_config similarity index 96% rename from target/linux/imx6/base-files/lib/preinit/79_move_config rename to target/linux/imx/cortexa9/base-files/lib/preinit/79_move_config index baa7ffe44b..6ed59320ac 100644 --- a/target/linux/imx6/base-files/lib/preinit/79_move_config +++ b/target/linux/imx/cortexa9/base-files/lib/preinit/79_move_config @@ -1,4 +1,4 @@ -. /lib/imx6.sh +. /lib/imx.sh . /lib/functions.sh . /lib/upgrade/common.sh diff --git a/target/linux/imx6/base-files/lib/upgrade/platform.sh b/target/linux/imx/cortexa9/base-files/lib/upgrade/platform.sh similarity index 99% rename from target/linux/imx6/base-files/lib/upgrade/platform.sh rename to target/linux/imx/cortexa9/base-files/lib/upgrade/platform.sh index 79f2a5078b..e18d59c771 100755 --- a/target/linux/imx6/base-files/lib/upgrade/platform.sh +++ b/target/linux/imx/cortexa9/base-files/lib/upgrade/platform.sh @@ -2,7 +2,7 @@ # Copyright (C) 2010-2015 OpenWrt.org # -. /lib/imx6.sh +. /lib/imx.sh RAMFS_COPY_BIN='blkid jffs2reset' diff --git a/target/linux/imx/cortexa9/config-default b/target/linux/imx/cortexa9/config-default new file mode 100644 index 0000000000..3136def5bf --- /dev/null +++ b/target/linux/imx/cortexa9/config-default @@ -0,0 +1,60 @@ +CONFIG_AHCI_IMX=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_GIC=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_ATA_SFF=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CLK_IMX6Q=y +CONFIG_CLK_IMX6SL=y +CONFIG_CLK_IMX6SX=y +CONFIG_CMDLINE="pci=nomsi" +CONFIG_CMDLINE_EXTEND=y +CONFIG_E1000E=y +CONFIG_FEC=y +CONFIG_FSL_GUTS=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_HW_RANDOM_IMX_RNGC=y +# CONFIG_INITRAMFS_FORCE is not set +CONFIG_MARVELL_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_OF_ESDHC=y +# CONFIG_MMC_SDHCI_PCI is not set +# CONFIG_NET_DSA_MSCC_FELIX is not set +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_PME=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_IMX6=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PINCTRL_IMX=y +CONFIG_PINCTRL_IMX6Q=y +CONFIG_PINCTRL_IMX6SL=y +CONFIG_PINCTRL_IMX6SX=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_REGMAP_I2C=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_LTC3676=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_DS1672=y +CONFIG_SATA_HOST=y +CONFIG_SENSORS_AD7418=y +CONFIG_SOC_IMX6=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y diff --git a/target/linux/imx/cortexa9/target.mk b/target/linux/imx/cortexa9/target.mk new file mode 100644 index 0000000000..9bd63c7be1 --- /dev/null +++ b/target/linux/imx/cortexa9/target.mk @@ -0,0 +1,7 @@ +BOARDNAME:=NXP i.MX with Cortex-A9 +CPU_TYPE:=cortex-a9 +CPU_SUBTYPE:=neon + +define Target/Description + Build firmware images for NXP i.MX (Cortex-A9) based boards. +endef diff --git a/target/linux/imx6/files/firmware/imx/sdma/sdma-imx6q.bin b/target/linux/imx/files/firmware/imx/sdma/sdma-imx6q.bin similarity index 100% rename from target/linux/imx6/files/firmware/imx/sdma/sdma-imx6q.bin rename to target/linux/imx/files/firmware/imx/sdma/sdma-imx6q.bin diff --git a/target/linux/imx/image/Makefile b/target/linux/imx/image/Makefile new file mode 100644 index 0000000000..895fb7a6b7 --- /dev/null +++ b/target/linux/imx/image/Makefile @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2013 OpenWrt.org + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +include $(SUBTARGET).mk + +$(eval $(call BuildImage)) diff --git a/target/linux/imx6/image/bootscript-solidrun_cubox-i b/target/linux/imx/image/bootscript-solidrun_cubox-i similarity index 100% rename from target/linux/imx6/image/bootscript-solidrun_cubox-i rename to target/linux/imx/image/bootscript-solidrun_cubox-i diff --git a/target/linux/imx6/image/bootscript-toradex_apalis b/target/linux/imx/image/bootscript-toradex_apalis similarity index 100% rename from target/linux/imx6/image/bootscript-toradex_apalis rename to target/linux/imx/image/bootscript-toradex_apalis diff --git a/target/linux/imx6/image/bootscript-gateworks_ventana b/target/linux/imx/image/bootscript-ventana similarity index 100% rename from target/linux/imx6/image/bootscript-gateworks_ventana rename to target/linux/imx/image/bootscript-ventana diff --git a/target/linux/imx/image/cortexa7.mk b/target/linux/imx/image/cortexa7.mk new file mode 100644 index 0000000000..063b89fdd6 --- /dev/null +++ b/target/linux/imx/image/cortexa7.mk @@ -0,0 +1,10 @@ +define Device/Default + PROFILES := Default + FILESYSTEMS := squashfs ext4 + KERNEL_INSTALL := 1 + KERNEL_SUFFIX := -uImage + KERNEL_NAME := zImage + KERNEL := kernel-bin | uImage none + KERNEL_LOADADDR := 0x80008000 + IMAGES := +endef diff --git a/target/linux/imx6/image/Makefile b/target/linux/imx/image/cortexa9.mk similarity index 91% rename from target/linux/imx6/image/Makefile rename to target/linux/imx/image/cortexa9.mk index 948694381e..75e19dc694 100644 --- a/target/linux/imx6/image/Makefile +++ b/target/linux/imx/image/cortexa9.mk @@ -1,14 +1,3 @@ -# SPDX-License-Identifier: GPL-2.0-only -# -# Copyright (C) 2013 OpenWrt.org - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -################################################# -# Images -################################################# - DEVICE_VARS += MKUBIFS_OPTS UBOOT define Build/boot-overlay @@ -104,19 +93,15 @@ define Build/apalis-emmc $(Build/imx6-combined-image-clean) endef -################################################# -# Devices -################################################# - -KERNEL_LOADADDR=0x10008000 define Device/Default - PROFILES := Generic + PROFILES := Default FILESYSTEMS := squashfs ext4 KERNEL_INSTALL := 1 KERNEL_SUFFIX := -uImage KERNEL_NAME := zImage KERNEL := kernel-bin | uImage none + KERNEL_LOADADDR := 0x10008000 IMAGES := endef @@ -124,7 +109,7 @@ define Device/gateworks_ventana DEVICE_VENDOR := Gateworks DEVICE_MODEL := Ventana family DEVICE_VARIANT := normal NAND flash - DEVICE_NAME := gateworks_ventana + DEVICE_NAME := ventana DEVICE_DTS:= \ imx6dl-gw51xx \ imx6dl-gw52xx \ @@ -223,5 +208,3 @@ define Device/wandboard_dual DEVICE_DTS := imx6dl-wandboard endef TARGET_DEVICES += wandboard_dual - -$(eval $(call BuildImage)) diff --git a/target/linux/imx6/image/recovery-toradex_apalis b/target/linux/imx/image/recovery-toradex_apalis similarity index 100% rename from target/linux/imx6/image/recovery-toradex_apalis rename to target/linux/imx/image/recovery-toradex_apalis diff --git a/target/linux/imx6/patches-5.10/100-bootargs.patch b/target/linux/imx/patches-5.10/100-bootargs.patch similarity index 100% rename from target/linux/imx6/patches-5.10/100-bootargs.patch rename to target/linux/imx/patches-5.10/100-bootargs.patch diff --git a/target/linux/imx6/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch b/target/linux/imx/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch similarity index 100% rename from target/linux/imx6/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch rename to target/linux/imx/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch diff --git a/target/linux/imx6/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch b/target/linux/imx/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch similarity index 100% rename from target/linux/imx6/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch rename to target/linux/imx/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch diff --git a/target/linux/imx6/profiles/100-default.mk b/target/linux/imx/profiles/100-default.mk similarity index 78% rename from target/linux/imx6/profiles/100-default.mk rename to target/linux/imx/profiles/100-default.mk index a025b88888..5e90724a58 100644 --- a/target/linux/imx6/profiles/100-default.mk +++ b/target/linux/imx/profiles/100-default.mk @@ -8,7 +8,7 @@ define Profile/Default endef define Profile/Default/Description - Package set compatible with most NXP i.MX 6 based boards. + Package set compatible with most NXP i.MX based boards. endef $(eval $(call Profile,Default)) diff --git a/target/linux/imx6/config-5.10 b/target/linux/imx6/config-5.10 deleted file mode 100644 index 126652cf98..0000000000 --- a/target/linux/imx6/config-5.10 +++ /dev/null @@ -1,496 +0,0 @@ -CONFIG_AHCI_IMX=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MXC=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_ERRATA_814220=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_IMX6Q_CPUFREQ=y -# CONFIG_ARM_IMX_CPUFREQ_DT is not set -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASN1=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_IMX_GPT=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_IMX6Q=y -# CONFIG_CLK_IMX6SL is not set -# CONFIG_CLK_IMX6SX is not set -# CONFIG_CLK_IMX6UL is not set -# CONFIG_CLK_IMX8MM is not set -# CONFIG_CLK_IMX8MN is not set -# CONFIG_CLK_IMX8MP is not set -# CONFIG_CLK_IMX8MQ is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="pci=nomsi" -CONFIG_CMDLINE_EXTEND=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CHACHA20=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32_ARM_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_FSL_CAAM=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y -CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y -# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set -CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y -CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 -CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ENGINE=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_POLY1305_ARM is not set -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MISC=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_E1000E=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENCRYPTED_KEYS=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_EXTCON=y -CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" -CONFIG_EXTRA_FIRMWARE_DIR="firmware" -CONFIG_F2FS_FS=y -CONFIG_FEC=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FSL_IMX8_DDR_PMU is not set -CONFIG_FSL_GUTS=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_VDSO_32=y -# CONFIG_GIANFAR is not set -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MXC=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_SMP=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IMX_RNGC=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -# CONFIG_I2C_IMX_LPI2C is not set -CONFIG_IMX2_WDT=y -# CONFIG_IMX7ULP_WDT is not set -# CONFIG_IMX8MM_THERMAL is not set -CONFIG_IMX_DMA=y -# CONFIG_IMX_GPCV2_PM_DOMAINS is not set -CONFIG_IMX_INTMUX=y -CONFIG_IMX_IRQSTEER=y -CONFIG_IMX_SDMA=y -CONFIG_IMX_THERMAL=y -# CONFIG_IMX_WEIM is not set -# CONFIG_INITRAMFS_FORCE is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IO_URING=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -# CONFIG_JFFS2_FS is not set -CONFIG_KEYS=y -CONFIG_LIBFDT=y -CONFIG_LLD_VERSION=0 -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MICREL_PHY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_MXC is not set -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MPILIB=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MX3_IPU is not set -CONFIG_MXC_CLK=y -CONFIG_MXS_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MSCC_FELIX is not set -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -# CONFIG_NVMEM_IMX_IIM is not set -CONFIG_NVMEM_IMX_OCOTP=y -# CONFIG_NVMEM_SNVS_LPGPR is not set -CONFIG_NVMEM_SYSFS=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_IMX6=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX=y -CONFIG_PINCTRL_IMX6Q=y -CONFIG_PINCTRL_IMX6SL=y -CONFIG_PINCTRL_IMX6SX=y -CONFIG_PINCTRL_IMX6UL=y -# CONFIG_PINCTRL_IMX8MM is not set -# CONFIG_PINCTRL_IMX8MN is not set -# CONFIG_PINCTRL_IMX8MP is not set -# CONFIG_PINCTRL_IMX8MQ is not set -CONFIG_PL310_ERRATA_769419=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_PPS=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PWM=y -# CONFIG_PWM_IMX1 is not set -# CONFIG_PWM_IMX27 is not set -# CONFIG_PWM_IMX_TPM is not set -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_LTC3676=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_DS1672=y -# CONFIG_RTC_DRV_IMXDI is not set -# CONFIG_RTC_DRV_MXC is not set -# CONFIG_RTC_DRV_MXC_V2 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SATA_HOST=y -CONFIG_SCSI=y -CONFIG_SENSORS_AD7418=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_IMX_EARLYCON=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX50 is not set -# CONFIG_SOC_IMX51 is not set -# CONFIG_SOC_IMX53 is not set -CONFIG_SOC_IMX6=y -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -# CONFIG_SOC_IMX6SLL is not set -CONFIG_SOC_IMX6SX=y -CONFIG_SOC_IMX6UL=y -# CONFIG_SOC_IMX7D is not set -# CONFIG_SOC_IMX7ULP is not set -# CONFIG_SOC_IMX8M is not set -# CONFIG_SOC_LS1021A is not set -# CONFIG_SOC_VF610 is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_FSL_LPSPI is not set -# CONFIG_SPI_FSL_QUADSPI is not set -CONFIG_SPI_IMX=y -CONFIG_SPI_MASTER=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_STMP_DEVICE=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_EHCI_MXC is not set -CONFIG_USB_GADGET=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_OTG=y -CONFIG_USB_PHY=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/imx6/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch b/target/linux/imx6/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch deleted file mode 100644 index e830897704..0000000000 --- a/target/linux/imx6/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch +++ /dev/null @@ -1,481 +0,0 @@ -From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:21 -0800 -Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support - -The Gateworks GW5907 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE Phy - - bi-color front-panel LED - - 256MB NAND boot device - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - Digital IO expander (pca9555) - - Joystick 12bit adc (ads1015) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++ - arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++ - arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++ - 4 files changed, 429 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -418,6 +418,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw560x.dtb \ - imx6dl-gw5903.dtb \ - imx6dl-gw5904.dtb \ -+ imx6dl-gw5907.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -489,6 +490,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw560x.dtb \ - imx6q-gw5903.dtb \ - imx6q-gw5904.dtb \ -+ imx6q-gw5907.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5907.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5907.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907"; -+ compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5907.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5907.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5907"; -+ compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi -@@ -0,0 +1,398 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator-usb-otg-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c3>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ gpio@20 { -+ compatible = "nxp,pca9555"; -+ reg = <0x20>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ adc@48 { -+ compatible = "ti,ads1015"; -+ reg = <0x48>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel@4 { -+ reg = <4>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ -+ channel@5 { -+ reg = <5>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ -+ channel@6 { -+ reg = <6>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch b/target/linux/imx6/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch deleted file mode 100644 index 5c52bde70d..0000000000 --- a/target/linux/imx6/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch +++ /dev/null @@ -1,581 +0,0 @@ -From a1fb69366bb16753f0fba6a891fbef5cdd97cfbe Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Wed, 8 Jan 2020 07:44:22 -0800 -Subject: [PATCH 2/4] ARM: dts: imx: Add GW5910 board support - -The Gateworks GW5910 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE RJ45 front-panel - - 1x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM - - 5V to 60V DC input barrel jack - - 3axis accelerometer (lis2de12) - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - microSD socket (with UHS-I support) - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6) - - WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6) - - RS232 transceiver (1x UART with flow-control or 2x UART (build option) - - off-board SPI connector (1x chip-select) - -Signed-off-by: Tim Harvey -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5910.dts | 14 + - arch/arm/boot/dts/imx6q-gw5910.dts | 14 + - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 491 ++++++++++++++++++++++++++++++++++ - 4 files changed, 521 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5910.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5910.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5910.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -419,6 +419,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5903.dtb \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ -+ imx6dl-gw5910.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -491,6 +492,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5903.dtb \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ -+ imx6q-gw5910.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5910.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5910.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910"; -+ compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5910.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5910.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5910"; -+ compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -0,0 +1,489 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ -+ }; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_wl: regulator-wl { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_wl>; -+ compatible = "regulator-fixed"; -+ regulator-name = "wl"; -+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_bt: regulator-bt { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_bt>; -+ compatible = "regulator-fixed"; -+ regulator-name = "bt"; -+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+}; -+ -+ -+&ecspi3 { -+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi3>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accel@19 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_accel>; -+ compatible = "st,lis2de12"; -+ reg = <0x19>; -+ st,drdy-int-pin = <1>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 0>; -+ interrupt-names = "INT1"; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+/* off-board RS232 */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+/* serial console */ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+/* Sterling-LWB Bluetooth */ -+&uart4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ uart-has-rtscts; -+ status = "okay"; -+}; -+ -+/* GPS */ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_5p0v>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+/* Sterling-LWB SDIO WiFi */ -+&usdhc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc2>; -+ vmmc-supply = <®_3p3v>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_accel: accelmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_ecspi3: escpi3grp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 -+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 -+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_reg_bt: regbtgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_reg_wl: regwlgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 -+ >; -+ }; -+ -+ pinctrl_usdhc2: usdhc2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 -+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 -+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 -+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 -+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 -+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch b/target/linux/imx6/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch deleted file mode 100644 index 32f344c588..0000000000 --- a/target/linux/imx6/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch +++ /dev/null @@ -1,434 +0,0 @@ -From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:23 -0800 -Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support - -The Gateworks GW5913 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE RJ45 front-panel - - 1x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM - - 6V to 60V DC input connector - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - nanoSIM socket - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5913.dts | 14 ++ - arch/arm/boot/dts/imx6q-gw5913.dts | 14 ++ - arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++ - 4 files changed, 378 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ - imx6dl-gw5910.dtb \ -+ imx6dl-gw5913.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ - imx6q-gw5910.dtb \ -+ imx6q-gw5913.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5913.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5913.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913"; -+ compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5913.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5913.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5913"; -+ compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi -@@ -0,0 +1,347 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch b/target/linux/imx6/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch deleted file mode 100644 index da733ff357..0000000000 --- a/target/linux/imx6/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch +++ /dev/null @@ -1,549 +0,0 @@ -From 9a820b55817011f53771e6bfebae5fe059f0a534 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:24 -0800 -Subject: [PATCH 4/4] ARM: dts: imx: Add GW5912 board support - -The Gateworks GW5912 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - GbE RJ45 front-panel - - 4x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, mSATA - - 1x miniPCIe socket with PCI Gen2, USB2, mezzanine - - 10V to 60V DC input barrel jack - - 3axis accelerometer (lis2de12) - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - nanoSIM/microSD socket (with UHS-I support) - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - CAN Bus transceiver (mcp2562) - - RS232 transceiver (1x UART with flow-control or 2x UART (build option) - - off-board SPI connector (1x chip-select) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5912.dts | 13 + - arch/arm/boot/dts/imx6q-gw5912.dts | 13 + - arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 461 ++++++++++++++++++++++++++++++++++ - 4 files changed, 489 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5912.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5912.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5912.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ - imx6dl-gw5910.dtb \ -+ imx6dl-gw5912.dtb \ - imx6dl-gw5913.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ -@@ -494,6 +495,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ - imx6q-gw5910.dtb \ -+ imx6q-gw5912.dtb \ - imx6q-gw5913.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5912.dts -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5912.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912"; -+ compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5912.dts -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5912.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5912"; -+ compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi -@@ -0,0 +1,459 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x40000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_vbus: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&can1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1>; -+ status = "okay"; -+}; -+ -+&ecspi2 { -+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi2>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accel@19 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_accel>; -+ compatible = "st,lis2de12"; -+ reg = <0x19>; -+ st,drdy-int-pin = <1>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 0>; -+ interrupt-names = "INT1"; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */ -+ status = "disabled"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_vbus>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ no-1-8-v; /* firmware will remove if board revision supports */ -+ status = "okay"; -+}; -+ -+&wdog1 { -+ status = "disabled"; -+}; -+ -+&wdog2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ pinctrl_accel: accelmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_ecspi2: escpi2grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 -+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 -+ >; -+ }; -+ -+ pinctrl_flexcan1: flexcan1grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm1: pwm1grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx6/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch deleted file mode 100644 index f05c1f1ec1..0000000000 --- a/target/linux/imx6/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 62e7f0b553038e3a1a1b2b067dd1fbdacd634e37 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Fri, 14 Feb 2020 13:02:41 -0800 -Subject: [PATCH] ARM: dts: imx6qdl-gw553x: add lsm9ds1 iio imu/magn support - -Add one node for the accel/gyro i2c device and another for the separate -magnetometer device in the lsm9ds1. - -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw553x.dtsi | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi -@@ -173,6 +173,25 @@ - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - -+ magn@1c { -+ compatible = "st,lsm9ds1-magn"; -+ reg = <0x1c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_mag>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <2 IRQ_TYPE_EDGE_RISING>; -+ }; -+ -+ imu@6a { -+ compatible = "st,lsm9ds1-imu"; -+ reg = <0x6a>; -+ st,drdy-int-pin = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_imu>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; -+ }; -+ - ltc3676: pmic@3c { - compatible = "lltc,ltc3676"; - reg = <0x3c>; -@@ -426,6 +445,12 @@ - >; - }; - -+ pinctrl_imu: imugrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 -+ >; -+ }; -+ - pinctrl_ipu1_csi0: ipu1csi0grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 -@@ -449,6 +474,12 @@ - >; - }; - -+ pinctrl_mag: maggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 -+ >; -+ }; -+ - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 diff --git a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch b/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch deleted file mode 100644 index 1d8844fb0d..0000000000 --- a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 66d19a4f8d0fa7539f90cad64d793b4dac6f6e5d Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Fri, 14 Feb 2020 13:01:55 -0800 -Subject: [PATCH] ARM: dts: imx: ventana: add fxos8700 on gateworks boards - -Add fxos8700 iio imu entries for Gateworks ventana SBCs. - -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 5 +++++ - arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 5 +++++ - arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 5 +++++ - 3 files changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi -@@ -313,6 +313,11 @@ - interrupts = <12 2>; - wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; - }; -+ -+ accel@1e { -+ compatible = "nxp,fxos8700"; -+ reg = <0x1e>; -+ }; - }; - - &ldb { ---- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi -@@ -304,6 +304,11 @@ - interrupts = <11 2>; - wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; - }; -+ -+ accel@1e { -+ compatible = "nxp,fxos8700"; -+ reg = <0x1e>; -+ }; - }; - - &ldb { ---- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi -@@ -361,6 +361,11 @@ - interrupts = <12 2>; - wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; - }; -+ -+ accel@1e { -+ compatible = "nxp,fxos8700"; -+ reg = <0x1e>; -+ }; - }; - - &ldb { diff --git a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch b/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch deleted file mode 100644 index 72a98a2b15..0000000000 --- a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch +++ /dev/null @@ -1,54 +0,0 @@ -From d2cf2f91ba5b6d7696b1870e28017a3e1a7a1bb8 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Fri, 28 Feb 2020 11:46:07 -0800 -Subject: [PATCH] ARM: dts: imx6qdl-gw5910: add CC1352 UART - -The GW5910-C revision adds a TI CC1352 connected to IMX UART4 - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -218,6 +218,14 @@ - status = "okay"; - }; - -+/* cc1352 */ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ uart-has-rtscts; -+ status = "okay"; -+}; -+ - /* Sterling-LWB Bluetooth */ - &uart4 { - pinctrl-names = "default"; -@@ -409,6 +417,23 @@ - >; - }; - -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x4001b0b1 /* DIO20 */ -+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x4001b0b1 /* DIO14 */ -+ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x4001b0b1 /* DIO15 */ -+ MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b1 /* TMS */ -+ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b1 /* TCK */ -+ MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b1 /* TDO */ -+ MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b1 /* TDI */ -+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x4001b0b1 /* RST# */ -+ >; -+ }; -+ - pinctrl_uart4: uart4grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 diff --git a/target/linux/imx6/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch b/target/linux/imx6/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch deleted file mode 100644 index 8d436be631..0000000000 --- a/target/linux/imx6/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 957743b79b1ebb710f5498b61a212cebc302e685 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Wed, 29 Apr 2020 08:22:35 -0700 -Subject: [PATCH 01/20] ARM: dts: imx6qdl-gw552x: add USB OTG support - -The GW552x-B board revision adds USB OTG support. - -Enable the device-tree node and configure the OTG_ID pin. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi -@@ -258,6 +258,14 @@ - status = "okay"; - }; - -+&usbotg { -+ vbus-supply = <®_5p0v>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ - &wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; -@@ -359,6 +367,12 @@ - >; - }; - -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059 -+ >; -+ }; -+ - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 diff --git a/target/linux/imx6/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx6/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch deleted file mode 100644 index 537b6f4d67..0000000000 --- a/target/linux/imx6/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 9e72702a3d9a967edac02d8e937bce2b68b77814 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 13:59:37 -0700 -Subject: [PATCH 05/20] ARM: dts: imx6qdl-gw560x: add lsm9ds1 iio imu/magn - support - -Add one node for the accel/gyro i2c device and another for the separate -magnetometer device in the lsm9ds1. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw560x.dtsi | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi -@@ -295,6 +295,15 @@ - VDDIO-supply = <®_3p3v>; - }; - -+ magn@1c { -+ compatible = "st,lsm9ds1-magn"; -+ reg = <0x1c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_mag>; -+ interrupt-parent = <&gpio5>; -+ interrupts = <9 IRQ_TYPE_EDGE_RISING>; -+ }; -+ - tca8418: keypad@34 { - compatible = "ti,tca8418"; - pinctrl-names = "default"; -@@ -389,6 +398,16 @@ - }; - }; - }; -+ -+ imu@6a { -+ compatible = "st,lsm9ds1-imu"; -+ reg = <0x6a>; -+ st,drdy-int-pin = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_imu>; -+ interrupt-parent = <&gpio5>; -+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; -+ }; - }; - - &i2c3 { -@@ -609,6 +628,12 @@ - >; - }; - -+ pinctrl_imu: imugrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0 -+ >; -+ }; -+ - pinctrl_keypad: keypadgrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ -@@ -616,6 +641,12 @@ - >; - }; - -+ pinctrl_mag: maggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0 -+ >; -+ }; -+ - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ diff --git a/target/linux/imx6/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx6/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch deleted file mode 100644 index 4d24b40535..0000000000 --- a/target/linux/imx6/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch +++ /dev/null @@ -1,69 +0,0 @@ -From c8756cbad816954be912ba32277ccd55fe7acc01 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 13:59:56 -0700 -Subject: [PATCH 06/20] ARM: dts: imx6qdl-gw5904: add lsm9ds1 iio imu/magn - support - -Add one node for the accel/gyro i2c device and another for the separate -magnetometer device in the lsm9ds1. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi -@@ -248,6 +248,15 @@ - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - -+ magn@1c { -+ compatible = "st,lsm9ds1-magn"; -+ reg = <0x1c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_mag>; -+ interrupt-parent = <&gpio5>; -+ interrupts = <17 IRQ_TYPE_EDGE_RISING>; -+ }; -+ - ltc3676: pmic@3c { - compatible = "lltc,ltc3676"; - reg = <0x3c>; -@@ -320,6 +329,16 @@ - }; - }; - }; -+ -+ imu@6a { -+ compatible = "st,lsm9ds1-imu"; -+ reg = <0x6a>; -+ st,drdy-int-pin = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_imu>; -+ interrupt-parent = <&gpio4>; -+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; -+ }; - }; - - &i2c3 { -@@ -501,6 +520,18 @@ - >; - }; - -+ pinctrl_imu: imugrp { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_mag: maggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 -+ >; -+ }; -+ - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ diff --git a/target/linux/imx6/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch b/target/linux/imx6/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch deleted file mode 100644 index 545a6fddd5..0000000000 --- a/target/linux/imx6/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch +++ /dev/null @@ -1,82 +0,0 @@ -From d40edafe80569c5b4d8893c1cdd1060c54ef433c Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 14:54:15 -0700 -Subject: [PATCH 07/20] ARM: dts: imx6qdl-gw5910: add support for bcm4330-bt - -The Sterling-LWB has a BCM4330 which has a UART based bluetooth -HCI. Add support for binding to the bcm_hci driver to take care -of handling the shutdown gpio and loading firmware. - -Because the shutdown gpio is more of an enable than a regulator -go ahead and replace the regulator with a shutdown-gpio. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 32 ++++++++++++-------------------- - 1 file changed, 12 insertions(+), 20 deletions(-) - ---- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -81,19 +81,6 @@ - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; -- -- reg_bt: regulator-bt { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_reg_bt>; -- compatible = "regulator-fixed"; -- regulator-name = "bt"; -- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; -- startup-delay-us = <100>; -- enable-active-high; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; - }; - - -@@ -229,9 +216,14 @@ - /* Sterling-LWB Bluetooth */ - &uart4 { - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart4>; -+ pinctrl-0 = <&pinctrl_uart4>,<&pinctrl_bten>; - uart-has-rtscts; - status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4330-bt"; -+ shutdown-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; -+ }; - }; - - /* GPS */ -@@ -286,6 +278,12 @@ - >; - }; - -+ pinctrl_bten: btengrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -+ >; -+ }; -+ - pinctrl_ecspi3: escpi3grp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -@@ -391,12 +389,6 @@ - >; - }; - -- pinctrl_reg_bt: regbtgrp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -- >; -- }; -- - pinctrl_reg_wl: regwlgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 diff --git a/target/linux/imx6/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch b/target/linux/imx6/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch deleted file mode 100644 index ce2fa2ee90..0000000000 --- a/target/linux/imx6/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 4792ff641cc8993606013d27d84cda59d8cc76c5 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 15:02:34 -0700 -Subject: [PATCH 08/20] ARM: dts: imx6qdl-gw5910: fix wlan regulator - -Connect the wl_reg regulator to usdhc2 such that it can be enabled -and disabled as needed. There is no need for this to be always-on. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -79,7 +79,6 @@ - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; -- regulator-always-on; - }; - }; - -@@ -249,7 +248,7 @@ - &usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; -- vmmc-supply = <®_3p3v>; -+ vmmc-supply = <®_wl>; - non-removable; - bus-width = <4>; - status = "okay"; diff --git a/target/linux/imx6/patches-5.4/100-bootargs.patch b/target/linux/imx6/patches-5.4/100-bootargs.patch deleted file mode 100644 index cf63a3bdb1..0000000000 --- a/target/linux/imx6/patches-5.4/100-bootargs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -16,4 +16,8 @@ - device_type = "memory"; - reg = <0x10000000 0x40000000>; - }; -+ -+ chosen { -+ bootargs = "console=ttymxc0,115200"; -+ }; - }; diff --git a/target/linux/imx6/patches-5.4/301-apalis-ixora-dts-leds.patch b/target/linux/imx6/patches-5.4/301-apalis-ixora-dts-leds.patch deleted file mode 100644 index bae9df1734..0000000000 --- a/target/linux/imx6/patches-5.4/301-apalis-ixora-dts-leds.patch +++ /dev/null @@ -1,86 +0,0 @@ -arm: dts: apalis-ixora: Add status LEDs aliases - -Signed-off-by: Petr Štetiar - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -60,6 +60,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -127,22 +131,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; - gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -61,6 +61,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -128,22 +132,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; -- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; -- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/imx6/patches-5.4/302-apalis-ixora-dts-reset-button.patch b/target/linux/imx6/patches-5.4/302-apalis-ixora-dts-reset-button.patch deleted file mode 100644 index f5afb66371..0000000000 --- a/target/linux/imx6/patches-5.4/302-apalis-ixora-dts-reset-button.patch +++ /dev/null @@ -1,76 +0,0 @@ -arm: dts: apalis-ixora: Add switch3 as reset button - -Signed-off-by: Petr Štetiar - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -74,7 +74,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -83,6 +83,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -298,4 +305,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -73,7 +73,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -82,6 +82,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -299,4 +306,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; diff --git a/target/linux/ipq40xx/Makefile b/target/linux/ipq40xx/Makefile index 0f41198e1b..fe0bdec5e6 100644 --- a/target/linux/ipq40xx/Makefile +++ b/target/linux/ipq40xx/Makefile @@ -8,7 +8,7 @@ CPU_TYPE:=cortex-a7 CPU_SUBTYPE:=neon-vfpv4 SUBTARGETS:=generic mikrotik -KERNEL_PATCHVER:=5.4 +KERNEL_PATCHVER:=5.10 KERNEL_TESTING_PATCHVER:=5.10 KERNELNAME:=zImage Image dtbs diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk index 278a762270..1135c21061 100644 --- a/target/linux/ipq40xx/image/generic.mk +++ b/target/linux/ipq40xx/image/generic.mk @@ -270,6 +270,7 @@ define Device/cellc_rtl30vw BLOCKSIZE := 128k PAGESIZE := 2048 DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi ipq-wifi-cellc_rtl30vw + DEFAULT := n endef TARGET_DEVICES += cellc_rtl30vw @@ -308,6 +309,7 @@ define Device/compex_wpj428 IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata IMAGE/cpximg-6a04.bin := append-kernel | append-rootfs | pad-rootfs | mkmylofw_32m 0x8A2 3 DEVICE_PACKAGES := kmod-gpio-beeper + DEFAULT := n endef TARGET_DEVICES += compex_wpj428 @@ -327,6 +329,7 @@ define Device/devolo_magic-2-wifi-next IMAGES := sysupgrade.bin IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata DEVICE_PACKAGES := ipq-wifi-devolo_magic-2-wifi-next + DEFAULT := n endef TARGET_DEVICES += devolo_magic-2-wifi-next @@ -435,6 +438,7 @@ define Device/engenius_emr3500 IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size DEVICE_PACKAGES := ipq-wifi-engenius_emr3500 + DEFAULT := n endef TARGET_DEVICES += engenius_emr3500 @@ -823,6 +827,7 @@ define Device/qcom_ap-dk01.1-c1 IMAGE_SIZE := 26624k $(call Device/FitImage) IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata + DEFAULT := n endef TARGET_DEVICES += qcom_ap-dk01.1-c1 @@ -839,6 +844,7 @@ define Device/qcom_ap-dk04.1-c1 BLOCKSIZE := 128k PAGESIZE := 2048 BOARD_NAME := ap-dk04.1-c1 + DEFAULT := n endef TARGET_DEVICES += qcom_ap-dk04.1-c1 @@ -853,6 +859,7 @@ define Device/qxwlan_e2600ac-c1 IMAGE_SIZE := 31232k IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata DEVICE_PACKAGES := ipq-wifi-qxwlan_e2600ac + DEFAULT := n endef TARGET_DEVICES += qxwlan_e2600ac-c1 @@ -880,6 +887,7 @@ define Device/unielec_u4019-32m KERNEL_SIZE := 4096k IMAGE_SIZE := 31232k IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata + DEFAULT := n endef TARGET_DEVICES += unielec_u4019-32m @@ -902,6 +910,7 @@ define Device/zyxel_nbg6617 IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 64k | check-size $$$$(ROOTFS_SIZE) | zyxel-ras-image separate-kernel IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | check-size $$$$(ROOTFS_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata DEVICE_PACKAGES := kmod-usb-ledtrig-usbport + DEFAULT := n endef TARGET_DEVICES += zyxel_nbg6617 diff --git a/target/sdk/Config.in b/target/sdk/Config.in index 0c8a61d247..1984e242e7 100644 --- a/target/sdk/Config.in +++ b/target/sdk/Config.in @@ -7,4 +7,11 @@ config SDK with a precompiled toolchain. It can be used to develop and test packages for OpenWrt before including them in the buildroot - +config SDK_LLVM_BPF + bool "Build the LLVM-BPF toolchain tarball" + depends on BPF_TOOLCHAIN_BUILD_LLVM + default BUILDBOT + help + This is a tarball of the precompiled LLVM toolchain suitable + for unpacking into the buildroot/SDK. It is used to build packages + that ship with eBPF kernel modules diff --git a/target/sdk/Makefile b/target/sdk/Makefile index 4c6f2167e0..00c4b09720 100644 --- a/target/sdk/Makefile +++ b/target/sdk/Makefile @@ -34,7 +34,8 @@ EXCLUDE_DIRS:= \ *.install.flags \ *.install \ */doc \ - */share/locale + */share/locale \ + */llvm-bpf* SDK_DIRS = \ $(STAGING_SUBDIR_HOST) \ diff --git a/toolchain/Config.in b/toolchain/Config.in index b8b4cfeb88..366f5c8b48 100644 --- a/toolchain/Config.in +++ b/toolchain/Config.in @@ -40,11 +40,18 @@ menuconfig TARGET_OPTIONS choice BPF_TOOLCHAIN prompt "BPF toolchain" if DEVEL + default BPF_TOOLCHAIN_BUILD_LLVM if BUILDBOT + default BPF_TOOLCHAIN_PREBUILT if HAS_PREBUILT_LLVM_TOOLCHAIN default BPF_TOOLCHAIN_NONE config BPF_TOOLCHAIN_NONE bool "None" + config BPF_TOOLCHAIN_PREBUILT + bool "Use prebuilt LLVM toolchain" + depends on HAS_PREBUILT_LLVM_TOOLCHAIN + select USE_LLVM_PREBUILT + config BPF_TOOLCHAIN_HOST select USE_LLVM_HOST bool "Use host LLVM toolchain" @@ -297,11 +304,20 @@ config GDB_PYTHON config HAS_BPF_TOOLCHAIN bool +config HAS_PREBUILT_LLVM_TOOLCHAIN + def_bool $(shell, [ -f llvm-bpf/.llvm-version ] && echo y || echo n) + config USE_LLVM_HOST select HAS_BPF_TOOLCHAIN bool +config USE_LLVM_PREBUILT + select HAS_BPF_TOOLCHAIN + default y if !DEVEL && !BUILDBOT && HAS_PREBUILT_LLVM_TOOLCHAIN + bool + config USE_LLVM_BUILD + default y if !DEVEL && BUILDBOT select HAS_BPF_TOOLCHAIN bool diff --git a/toolchain/gdb/Makefile b/toolchain/gdb/Makefile index e769a3be3e..2adb7d165a 100644 --- a/toolchain/gdb/Makefile +++ b/toolchain/gdb/Makefile @@ -7,12 +7,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=gdb -PKG_VERSION:=10.1 +PKG_VERSION:=11.1 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@GNU/gdb -PKG_HASH:=f82f1eceeec14a3afa2de8d9b0d3c91d5a3820e23e0a01bbb70ef9f0276b62c0 +PKG_HASH:=cccfcc407b20d343fb320d4a9a2110776dd3165118ffd41f4b1b162340333f94 GDB_DIR:=$(PKG_NAME)-$(PKG_VERSION) HOST_BUILD_DIR:=$(BUILD_DIR_TOOLCHAIN)/$(GDB_DIR) @@ -30,6 +30,9 @@ HOST_CONFIGURE_ARGS = \ --build=$(GNU_HOST_NAME) \ --host=$(GNU_HOST_NAME) \ --target=$(REAL_GNU_TARGET_NAME) \ + --with-gmp=$(TOPDIR)/staging_dir/host \ + --with-mpfr=$(TOPDIR)/staging_dir/host \ + --with-mpc=$(TOPDIR)/staging_dir/host \ --disable-werror \ --without-uiout \ --enable-tui --disable-gdbtk --without-x \ diff --git a/toolchain/gdb/patches/100-fix-elf-support-check.patch b/toolchain/gdb/patches/100-fix-elf-support-check.patch deleted file mode 100644 index fe612c38db..0000000000 --- a/toolchain/gdb/patches/100-fix-elf-support-check.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/gdb/configure -+++ b/gdb/configure -@@ -16818,6 +16818,7 @@ else - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - #include -+#include - #include "bfd.h" - #include "elf-bfd.h" - ---- a/gdb/acinclude.m4 -+++ b/gdb/acinclude.m4 -@@ -362,6 +362,7 @@ AC_DEFUN([GDB_AC_CHECK_BFD], [ - AC_CACHE_CHECK([$1], [$2], - [AC_TRY_LINK( - [#include -+ #include - #include "bfd.h" - #include "$4" - ], diff --git a/tools/Makefile b/tools/Makefile index 53cb9e5dc6..55c666f134 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -128,6 +128,9 @@ define PrepareStaging ); done endef +$(BIN_DIR): + mkdir -p $@ + # preparatory work $(STAGING_DIR)/.prepared: $(TMP_DIR)/.build $(call PrepareStaging,$(STAGING_DIR)) @@ -148,8 +151,8 @@ endif endif -$(curdir)//prepare = $(STAGING_DIR)/.prepared $(STAGING_DIR_HOST)/.prepared -$(curdir)//compile = $(STAGING_DIR)/.prepared $(STAGING_DIR_HOST)/.prepared +$(curdir)//prepare = $(STAGING_DIR)/.prepared $(STAGING_DIR_HOST)/.prepared $(BIN_DIR) +$(curdir)//compile = $(STAGING_DIR)/.prepared $(STAGING_DIR_HOST)/.prepared $(BIN_DIR) # prerequisites for the individual targets $(curdir)/ := .config prereq diff --git a/tools/llvm-bpf/Makefile b/tools/llvm-bpf/Makefile index a5ba2a4cb7..a9fcc04495 100644 --- a/tools/llvm-bpf/Makefile +++ b/tools/llvm-bpf/Makefile @@ -24,6 +24,10 @@ CMAKE_SOURCE_SUBDIR := llvm include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/cmake.mk +LLVM_BPF_PREFIX = llvm-bpf-$(PKG_VERSION).$(HOST_OS)-$(HOST_ARCH) + +CMAKE_HOST_INSTALL_PREFIX = $(STAGING_DIR_HOST)/$(LLVM_BPF_PREFIX) + CMAKE_HOST_OPTIONS += \ -DLLVM_ENABLE_BINDINGS=OFF \ -DLLVM_INCLUDE_DOCS=OFF \ @@ -31,6 +35,31 @@ CMAKE_HOST_OPTIONS += \ -DLLVM_INCLUDE_TESTS=OFF \ -DLLVM_ENABLE_PROJECTS="clang;lld" \ -DLLVM_TARGETS_TO_BUILD=BPF \ - -DCLANG_BUILD_EXAMPLES=OFF + -DCLANG_BUILD_EXAMPLES=OFF \ + -DLLVM_INSTALL_TOOLCHAIN_ONLY=ON \ + -DLLVM_LINK_LLVM_DYLIB=ON \ + -DLLVM_TOOLCHAIN_TOOLS="llvm-objcopy;llvm-objdump;llvm-readelf;llvm-strip;llvm-ar;llvm-as;llvm-dis;llvm-link;llvm-nm;llvm-ranlib;llc;opt" \ + -DCMAKE_SKIP_RPATH=OFF + +ifneq ($(CONFIG_SDK_LLVM_BPF),) + define Host/Install/Bin + echo "$(PKG_VERSION)" > $(CMAKE_HOST_INSTALL_PREFIX)/.llvm-version + STRIP_KMOD= PATCHELF= STRIP=strip $(SCRIPT_DIR)/rstrip.sh $(STAGING_DIR_HOST)/llvm-bpf + tar -C $(STAGING_DIR_HOST) \ + -I '$(STAGING_DIR_HOST)/bin/xz -7e -T$(if $(filter 1,$(NPROC)),2,0)' \ + -cf $(BIN_DIR)/llvm-bpf-$(PKG_VERSION).tar.xz llvm-bpf $(LLVM_BPF_PREFIX) + endef +endif + +define Host/Install + rm -rf $(STAGING_DIR_HOST)/llvm-bpf* + $(Host/Install/Default) + ln -s $(LLVM_BPF_PREFIX) $(STAGING_DIR_HOST)/llvm-bpf + $(Host/Install/Bin) +endef + +define Host/Uninstall + rm -rf $(STAGING_DIR_HOST)/llvm-bpf* +endef $(eval $(call HostBuild))