From e7a9ee0580b5aea42f821816ada53911ce5e4c09 Mon Sep 17 00:00:00 2001 From: Eneas U de Queiroz Date: Fri, 26 Mar 2021 14:46:29 -0300 Subject: [PATCH 1/4] openssl: bump to 1.1.1k This version fixes 2 security vulnerabilities, among other changes: - CVE-2021-3450: problem with verifying a certificate chain when using the X509_V_FLAG_X509_STRICT flag. - CVE-2021-3449: OpenSSL TLS server may crash if sent a maliciously crafted renegotiation ClientHello message from a client. Signed-off-by: Eneas U de Queiroz (cherry picked from commit 0bd0de7d43b3846ad0d7006294e1daaadfa7b532) --- package/libs/openssl/Makefile | 4 +- ...o-make-the-dev-crypto-engine-dynamic.patch | 43 +++++++++---------- 2 files changed, 23 insertions(+), 24 deletions(-) diff --git a/package/libs/openssl/Makefile b/package/libs/openssl/Makefile index 7dbbd65026..5a20db660a 100644 --- a/package/libs/openssl/Makefile +++ b/package/libs/openssl/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=openssl PKG_BASE:=1.1.1 -PKG_BUGFIX:=j +PKG_BUGFIX:=k PKG_VERSION:=$(PKG_BASE)$(PKG_BUGFIX) PKG_RELEASE:=1 PKG_USE_MIPS16:=0 @@ -26,7 +26,7 @@ PKG_SOURCE_URL:= \ ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \ ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/old/$(PKG_BASE)/ -PKG_HASH:=aaf2fcb575cdf6491b98ab4829abf78a3dec8402b8b81efc8f23c00d443981bf +PKG_HASH:=892a0875b9872acd04a9fde79b1f943075d5ea162415de3047c327df33fbaee5 PKG_LICENSE:=OpenSSL PKG_LICENSE_FILES:=LICENSE diff --git a/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch b/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch index 71dc5bf99b..ea3f8fb8a7 100644 --- a/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch +++ b/package/libs/openssl/patches/430-e_devcrypto-make-the-dev-crypto-engine-dynamic.patch @@ -116,7 +116,7 @@ diff --git a/crypto/engine/eng_devcrypto.c b/engines/e_devcrypto.c similarity index 95% rename from crypto/engine/eng_devcrypto.c rename to engines/e_devcrypto.c -index 0d420e50aa..3fcd81de7a 100644 +index 2c1b52d572..eff1ed3a7d 100644 --- a/crypto/engine/eng_devcrypto.c +++ b/engines/e_devcrypto.c @@ -7,7 +7,7 @@ @@ -152,22 +152,6 @@ index 0d420e50aa..3fcd81de7a 100644 /* * cipher/digest status & acceleration definitions -@@ -341,6 +343,7 @@ static int cipher_ctrl(EVP_CIPHER_CTX *ctx, int type, int p1, void* p2) - struct cipher_ctx *to_cipher_ctx; - - switch (type) { -+ - case EVP_CTRL_COPY: - if (cipher_ctx == NULL) - return 1; -@@ -702,7 +705,6 @@ static int digest_init(EVP_MD_CTX *ctx) - SYSerr(SYS_F_IOCTL, errno); - return 0; - } -- - return 1; - } - @@ -1058,7 +1060,7 @@ static const ENGINE_CMD_DEFN devcrypto_cmds[] = { OPENSSL_MSTR(DEVCRYPTO_USE_SOFTWARE) "=allow all drivers, " OPENSSL_MSTR(DEVCRYPTO_REJECT_SOFTWARE) @@ -177,7 +161,7 @@ index 0d420e50aa..3fcd81de7a 100644 ENGINE_CMD_FLAG_NUMERIC}, #endif -@@ -1166,55 +1168,70 @@ static int devcrypto_ctrl(ENGINE *e, int cmd, long i, void *p, void (*f) (void)) +@@ -1166,32 +1168,22 @@ static int devcrypto_ctrl(ENGINE *e, int cmd, long i, void *p, void (*f) (void)) * *****/ @@ -201,10 +185,12 @@ index 0d420e50aa..3fcd81de7a 100644 +static int open_devcrypto(void) { - ENGINE *e = NULL; + int fd; + + if (cfd >= 0) + return 1; - - if ((cfd = open("/dev/crypto", O_RDWR, 0)) < 0) { ++ + if ((fd = open("/dev/crypto", O_RDWR, 0)) < 0) { #ifndef ENGINE_DEVCRYPTO_DEBUG if (errno != ENOENT) #endif @@ -213,6 +199,19 @@ index 0d420e50aa..3fcd81de7a 100644 + return 0; } + #ifdef CRIOGET +@@ -1199,35 +1191,61 @@ void engine_load_devcrypto_int() + fprintf(stderr, "Could not create crypto fd: %s\n", strerror(errno)); + close(fd); + cfd = -1; +- return; ++ return 0; + } + close(fd); + #else + cfd = fd; + #endif + - if ((e = ENGINE_new()) == NULL - || !ENGINE_set_destroy_function(e, devcrypto_unload)) { - ENGINE_free(e); @@ -278,7 +277,7 @@ index 0d420e50aa..3fcd81de7a 100644 /* * Asymmetric ciphers aren't well supported with /dev/crypto. Among the BSD * implementations, it seems to only exist in FreeBSD, and regarding the -@@ -1237,23 +1254,36 @@ void engine_load_devcrypto_int() +@@ -1250,23 +1268,36 @@ void engine_load_devcrypto_int() */ #if 0 # ifndef OPENSSL_NO_RSA @@ -324,7 +323,7 @@ index 0d420e50aa..3fcd81de7a 100644 ENGINE_free(e); return; } -@@ -1262,3 +1292,22 @@ void engine_load_devcrypto_int() +@@ -1275,3 +1306,22 @@ void engine_load_devcrypto_int() ENGINE_free(e); /* Loose our local reference */ ERR_clear_error(); } From b526fbb1ce100c248c8e89b84afc101103e94d7d Mon Sep 17 00:00:00 2001 From: Mauri Sandberg Date: Thu, 21 May 2020 09:59:52 +0300 Subject: [PATCH 2/4] packages: kernel: add gpio-nxp-74hc153 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit NXP 74HC153 is a GPIO expander. Its original source cide sits in ar71xx architecture tree. It has been slightly modified to get GPIO pin configuration from the device tree rather than a MACH file. Changes to the source file: - Remove struct nxp_74hc153_config - in nxp_74hc153_probe(), fetch GPIO configuration from device tree - allow GPIO framework decide the base number by passing -1 to it - remove support for kernel versions below 4.5.0 - add OF device compatibility string Create a package for inclusion in image. References: https://lore.kernel.org/linux-gpio/545111184.50061.1615922388276@ichabod.co-bxl/ Signed-off-by: Mauri Sandberg [added link to driver usptreaming work in progress] Signed-off-by: Petr Štetiar (cherry picked from commit 6a6f9e73dd65f9201bee911d2fae8595f86c093b) --- package/kernel/gpio-nxp-74hc153/Makefile | 35 +++ package/kernel/gpio-nxp-74hc153/src/Makefile | 1 + .../gpio-nxp-74hc153/src/gpio-nxp-74hc153.c | 291 ++++++++++++++++++ 3 files changed, 327 insertions(+) create mode 100644 package/kernel/gpio-nxp-74hc153/Makefile create mode 100644 package/kernel/gpio-nxp-74hc153/src/Makefile create mode 100644 package/kernel/gpio-nxp-74hc153/src/gpio-nxp-74hc153.c diff --git a/package/kernel/gpio-nxp-74hc153/Makefile b/package/kernel/gpio-nxp-74hc153/Makefile new file mode 100644 index 0000000000..e275a9a856 --- /dev/null +++ b/package/kernel/gpio-nxp-74hc153/Makefile @@ -0,0 +1,35 @@ +# +# Copyright (C) 2020 Mauri Sandberg +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=gpio-nxp-74hc153 +PKG_RELEASE:=1 +PKG_LICENSE:=GPL-2.0 + +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/gpio-nxp-74hc153 + SUBMENU:=Other modules + TITLE:= NXP 74HC153 GPIO expander + FILES:=$(PKG_BUILD_DIR)/gpio-nxp-74hc153.ko + AUTOLOAD:=$(call AutoLoad,30,gpio-nxp-74hc153,1) + KCONFIG:= + DEPENDS:= @GPIO_SUPPORT @TARGET_ath79 +endef + +define KernelPackage/gpio-nxp-74hc153/description + Platform driver for NXP 74HC153 Dual 4-input Multiplexer. + This provides a GPIO interface supporting input mode only. +endef + +define Build/Compile + $(KERNEL_MAKE) M=$(PKG_BUILD_DIR) modules +endef + +$(eval $(call KernelPackage,gpio-nxp-74hc153)) diff --git a/package/kernel/gpio-nxp-74hc153/src/Makefile b/package/kernel/gpio-nxp-74hc153/src/Makefile new file mode 100644 index 0000000000..0a5cc2fdda --- /dev/null +++ b/package/kernel/gpio-nxp-74hc153/src/Makefile @@ -0,0 +1 @@ +obj-m += gpio-nxp-74hc153.o diff --git a/package/kernel/gpio-nxp-74hc153/src/gpio-nxp-74hc153.c b/package/kernel/gpio-nxp-74hc153/src/gpio-nxp-74hc153.c new file mode 100644 index 0000000000..f683547cfd --- /dev/null +++ b/package/kernel/gpio-nxp-74hc153/src/gpio-nxp-74hc153.c @@ -0,0 +1,291 @@ +/* + * NXP 74HC153 - Dual 4-input multiplexer GPIO driver + * + * Copyright (C) 2010 Gabor Juhos + * Copyright (C) 2020 Mauri Sandberg + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Example device tree definition: + * + * gpio-extender { + * compatible = "nxp,74hc153-gpio"; + * gpio-controller; + * #gpio-cells = <2>; + * + * // GPIOs used by this node + * gpio-s0 = <&gpio 9 GPIO_ACTIVE_HIGH>; + * gpio-s1 = <&gpio 11 GPIO_ACTIVE_HIGH>; + * gpio-1y = <&gpio 12 GPIO_ACTIVE_HIGH>; + * gpio-2y = <&gpio 14 GPIO_ACTIVE_HIGH>; + * }; + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#define NXP_74HC153_NUM_GPIOS 8 +#define NXP_74HC153_S0_MASK 0x1 +#define NXP_74HC153_S1_MASK 0x2 +#define NXP_74HC153_BANK_MASK 0x4 + +#define NXP_74HC153_DRIVER_NAME "nxp-74hc153" + +struct nxp_74hc153_config { + unsigned gpio_pin_s0; + unsigned gpio_pin_s1; + unsigned gpio_pin_1y; + unsigned gpio_pin_2y; +}; + +struct nxp_74hc153_chip { + struct device *parent; + struct gpio_chip gpio_chip; + struct mutex lock; + struct nxp_74hc153_config config; +}; + +static struct nxp_74hc153_chip *gpio_to_nxp(struct gpio_chip *gc) +{ + return container_of(gc, struct nxp_74hc153_chip, gpio_chip); +} + +static int nxp_74hc153_direction_input(struct gpio_chip *gc, unsigned offset) +{ + return 0; +} + +static int nxp_74hc153_direction_output(struct gpio_chip *gc, + unsigned offset, int val) +{ + return -EINVAL; +} + +static int nxp_74hc153_get_value(struct gpio_chip *gc, unsigned offset) +{ + struct nxp_74hc153_chip *nxp; + struct nxp_74hc153_platform_data *pdata; + unsigned s0; + unsigned s1; + unsigned pin; + int ret; + + nxp = gpio_to_nxp(gc); + pdata = nxp->parent->platform_data; + + s0 = !!(offset & NXP_74HC153_S0_MASK); + s1 = !!(offset & NXP_74HC153_S1_MASK); + pin = (offset & NXP_74HC153_BANK_MASK) ? nxp->config.gpio_pin_2y + : nxp->config.gpio_pin_1y; + + mutex_lock(&nxp->lock); + gpio_set_value(nxp->config.gpio_pin_s0, s0); + gpio_set_value(nxp->config.gpio_pin_s1, s1); + ret = gpio_get_value(pin); + mutex_unlock(&nxp->lock); + + return ret; +} + +static void nxp_74hc153_set_value(struct gpio_chip *gc, + unsigned offset, int val) +{ + /* not supported */ +} + +static int nxp_74hc153_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct nxp_74hc153_chip *nxp; + struct gpio_chip *gc; + int err; + unsigned gpio_s0; + unsigned gpio_s1; + unsigned gpio_1y; + unsigned gpio_2y; + + nxp = kzalloc(sizeof(struct nxp_74hc153_chip), GFP_KERNEL); + if (nxp == NULL) { + dev_err(&pdev->dev, "no memory for private data\n"); + return -ENOMEM; + } + + gpio_s0 = of_get_named_gpio(np, "gpio-s0", 0); + gpio_s1 = of_get_named_gpio(np, "gpio-s1", 0); + gpio_1y = of_get_named_gpio(np, "gpio-1y", 0); + gpio_2y = of_get_named_gpio(np, "gpio-2y", 0); + + if (!gpio_is_valid(gpio_s0) || !gpio_is_valid(gpio_s1) || + !gpio_is_valid(gpio_1y) || !gpio_is_valid(gpio_2y)) { + + dev_err(&pdev->dev, "control GPIO(s) are missing\n"); + err = -EINVAL; + goto err_free_nxp; + } else { + nxp->config.gpio_pin_s0 = gpio_s0; + nxp->config.gpio_pin_s1 = gpio_s1; + nxp->config.gpio_pin_1y = gpio_1y; + nxp->config.gpio_pin_2y = gpio_2y; + } + + // apply pin configuration + err = gpio_request(nxp->config.gpio_pin_s0, dev_name(&pdev->dev)); + if (err) { + dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", + nxp->config.gpio_pin_s0, err); + goto err_free_nxp; + } + + err = gpio_request(nxp->config.gpio_pin_s1, dev_name(&pdev->dev)); + if (err) { + dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", + nxp->config.gpio_pin_s1, err); + goto err_free_s0; + } + + err = gpio_request(nxp->config.gpio_pin_1y, dev_name(&pdev->dev)); + if (err) { + dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", + nxp->config.gpio_pin_1y, err); + goto err_free_s1; + } + + err = gpio_request(nxp->config.gpio_pin_2y, dev_name(&pdev->dev)); + if (err) { + dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", + nxp->config.gpio_pin_2y, err); + goto err_free_1y; + } + + err = gpio_direction_output(nxp->config.gpio_pin_s0, 0); + if (err) { + dev_err(&pdev->dev, + "unable to set direction of gpio %u, err=%d\n", + nxp->config.gpio_pin_s0, err); + goto err_free_2y; + } + + err = gpio_direction_output(nxp->config.gpio_pin_s1, 0); + if (err) { + dev_err(&pdev->dev, + "unable to set direction of gpio %u, err=%d\n", + nxp->config.gpio_pin_s1, err); + goto err_free_2y; + } + + err = gpio_direction_input(nxp->config.gpio_pin_1y); + if (err) { + dev_err(&pdev->dev, + "unable to set direction of gpio %u, err=%d\n", + nxp->config.gpio_pin_1y, err); + goto err_free_2y; + } + + err = gpio_direction_input(nxp->config.gpio_pin_2y); + if (err) { + dev_err(&pdev->dev, + "unable to set direction of gpio %u, err=%d\n", + nxp->config.gpio_pin_2y, err); + goto err_free_2y; + } + + nxp->parent = &pdev->dev; + mutex_init(&nxp->lock); + + gc = &nxp->gpio_chip; + + gc->direction_input = nxp_74hc153_direction_input; + gc->direction_output = nxp_74hc153_direction_output; + gc->get = nxp_74hc153_get_value; + gc->set = nxp_74hc153_set_value; + gc->can_sleep = 1; + + gc->base = -1; + gc->ngpio = NXP_74HC153_NUM_GPIOS; + gc->label = dev_name(nxp->parent); + gc->parent = nxp->parent; + gc->owner = THIS_MODULE; + gc->of_node = np; + + err = gpiochip_add(&nxp->gpio_chip); + if (err) { + dev_err(&pdev->dev, "unable to add gpio chip, err=%d\n", err); + goto err_free_2y; + } + + platform_set_drvdata(pdev, nxp); + return 0; + +err_free_2y: + gpio_free(nxp->config.gpio_pin_2y); +err_free_1y: + gpio_free(nxp->config.gpio_pin_1y); +err_free_s1: + gpio_free(nxp->config.gpio_pin_s1); +err_free_s0: + gpio_free(nxp->config.gpio_pin_s0); +err_free_nxp: + kfree(nxp); + return err; +} + +static int nxp_74hc153_remove(struct platform_device *pdev) +{ + struct nxp_74hc153_chip *nxp = platform_get_drvdata(pdev); + + if (nxp) { + gpiochip_remove(&nxp->gpio_chip); + gpio_free(nxp->config.gpio_pin_2y); + gpio_free(nxp->config.gpio_pin_1y); + gpio_free(nxp->config.gpio_pin_s1); + gpio_free(nxp->config.gpio_pin_s0); + + kfree(nxp); + platform_set_drvdata(pdev, NULL); + } + + return 0; +} + +static struct of_device_id nxp_74hc153_id[] = { + { + .compatible = "nxp,74hc153-gpio", + .data = NULL, + }, { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, nxp_74hc153_id); + +static struct platform_driver nxp_74hc153_driver = { + .probe = nxp_74hc153_probe, + .remove = nxp_74hc153_remove, + .driver = { + .name = NXP_74HC153_DRIVER_NAME, + .owner = THIS_MODULE, + .of_match_table = nxp_74hc153_id, + }, +}; + +static int __init nxp_74hc153_init(void) +{ + return platform_driver_register(&nxp_74hc153_driver); +} +subsys_initcall(nxp_74hc153_init); + +static void __exit nxp_74hc153_exit(void) +{ + platform_driver_unregister(&nxp_74hc153_driver); +} +module_exit(nxp_74hc153_exit); + +MODULE_AUTHOR("Gabor Juhos "); +MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC153"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" NXP_74HC153_DRIVER_NAME); From 8e8fe69a8ef118476def263da11ee0d3c3a7ee19 Mon Sep 17 00:00:00 2001 From: Mauri Sandberg Date: Mon, 14 Sep 2020 22:45:15 +0300 Subject: [PATCH 3/4] ath79: cfi: cmdset_0002: amd chip 0x2201 - write words MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Generally, in upstream CFI flash memory driver uses buffers for write operations. That does not work with AMD chip with id 0x2201 and we must resort to writing word sized chunks only. That is, to not apply general buffer write functionality for this given chip. Without the patch kernel logs will be flooded with entries like below: MTD do_erase_oneblock(): ERASE 0x01fa0000 MTD do_write_buffer(): WRITE 0x01fa0000(0x00001985) MTD do_erase_oneblock(): ERASE 0x01f80000 MTD do_write_buffer(): WRITE 0x01f80000(0x00001985) MTD do_write_buffer_wait(): software timeout, address:0x01f8000a. jffs2: Write clean marker to block at 0x01a60000 failed: -5 MTD do_erase_oneblock(): ERASE 0x01f60000 MTD do_write_buffer(): WRITE 0x01f60000(0x00001985) MTD do_write_buffer_wait(): software timeout, address:0x01f6000a. jffs2: Write clean marker to block at 0x01a40000 failed: -5 References: http://patchwork.ozlabs.org/project/linux-mtd/patch/20210309174859.362060-1-sandberg@mailfence.com/ Signed-off-by: Mauri Sandberg [added link to usptream fix submission] Signed-off-by: Petr Štetiar (cherry picked from commit 8cc0fa8faceadac85353bb1a96e074518ef124e2) --- ...set_0002-AMD-chip-0x2201-write-words.patch | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 target/linux/ath79/patches-5.4/471-mtd-cfi_cmdset_0002-AMD-chip-0x2201-write-words.patch diff --git a/target/linux/ath79/patches-5.4/471-mtd-cfi_cmdset_0002-AMD-chip-0x2201-write-words.patch b/target/linux/ath79/patches-5.4/471-mtd-cfi_cmdset_0002-AMD-chip-0x2201-write-words.patch new file mode 100644 index 0000000000..3c80872ef4 --- /dev/null +++ b/target/linux/ath79/patches-5.4/471-mtd-cfi_cmdset_0002-AMD-chip-0x2201-write-words.patch @@ -0,0 +1,58 @@ +From f1f811410af297c848e9ec17eaa280d190fdce10 Mon Sep 17 00:00:00 2001 +From: Mauri Sandberg +Date: Tue, 23 Feb 2021 18:09:31 +0200 +Subject: [PATCH] mtd: cfi_cmdset_0002: AMD chip 0x2201 - write words + +Buffer writes do not work with AMD chip 0x2201. The chip in question +is a AMD/Spansion/Cypress Semiconductor S29GL256N and datasheet [1] +talks about writing buffers being possible. While waiting for a neater +solution resort to writing word-sized chunks only. + +Without the patch kernel logs will be flooded with entries like below: + +jffs2_scan_eraseblock(): End of filesystem marker found at 0x0 +jffs2_build_filesystem(): unlocking the mtd device... +done. +jffs2_build_filesystem(): erasing all blocks after the end marker... +MTD do_write_buffer_wait(): software timeout, address:0x01ec000a. +jffs2: Write clean marker to block at 0x01920000 failed: -5 +MTD do_write_buffer_wait(): software timeout, address:0x01e2000a. +jffs2: Write clean marker to block at 0x01880000 failed: -5 +MTD do_write_buffer_wait(): software timeout, address:0x01e0000a. +jffs2: Write clean marker to block at 0x01860000 failed: -5 +MTD do_write_buffer_wait(): software timeout, address:0x01dc000a. +jffs2: Write clean marker to block at 0x01820000 failed: -5 +MTD do_write_buffer_wait(): software timeout, address:0x01da000a. +jffs2: Write clean marker to block at 0x01800000 failed: -5 +... + +Tested on a Buffalo wzr-hp-g300nh running kernel 5.10.16. + +[1] https://www.cypress.com/file/219941/download +or https://datasheetspdf.com/pdf-file/565708/SPANSION/S29GL256N/1 + +Signed-off-by: Mauri Sandberg +--- + drivers/mtd/chips/cfi_cmdset_0002.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c +index a1f3e1031c3d..28b6f3583f8a 100644 +--- a/drivers/mtd/chips/cfi_cmdset_0002.c ++++ b/drivers/mtd/chips/cfi_cmdset_0002.c +@@ -272,6 +272,10 @@ static void fixup_use_write_buffers(struct mtd_info *mtd) + { + struct map_info *map = mtd->priv; + struct cfi_private *cfi = map->fldrv_priv; ++ ++ if ((cfi->mfr == CFI_MFR_AMD) && (cfi->id == 0x2201)) ++ return; ++ + if (cfi->cfiq->BufWriteTimeoutTyp) { + pr_debug("Using buffer write method\n"); + mtd->_write = cfi_amdstd_write_buffers; + +base-commit: 5de15b610f785f0e188fefb707f0b19de156968a +-- +2.25.1 + From e8cbdbbe97d55b77062a3d80f42c87cb761e9729 Mon Sep 17 00:00:00 2001 From: Mauri Sandberg Date: Mon, 7 Sep 2020 22:04:26 +0300 Subject: [PATCH 4/4] ath79: Add support for Buffalo WZR-HP-G300NH This device is a wireless router working on 2.4GHz band based on Qualcom/Atheros AR9132 rev 2 SoC and is accompanied by Atheros AR9103 wireless chip and Realtek RTL8366RB/S switches. Due to two different switches being used also two different devices are provided. Specification: - 400 MHz CPU - 64 MB of RAM - 32 MB of FLASH (NOR) - 3x3:2 2.4 GHz 802.11bgn - 5x 10/100/1000 Mbps Ethernet - 4x LED, 3x button, On/Off slider, Auto/On/Off slider - 1x USB 2.0 - bare UART header place on PCB Flash instruction: - NOTE: Pay attention to the switch variant and choose the image to flash accordingly. (dmesg / kernel logs can tell it) - Methods for flashing - Apply factory image in OEM firmware web-gui. - Sysupgrade on top of existing OpenWRT image - U-Boot TFPT recovery for both stock or OpenWRT images: The device U-boot contains a TFTP server that by default has an address 192.168.11.1 (MAC 02:AA:BB:CC:DD:1A). During the boot there is a time window, during which the device allows an image to be uploaded from a client with address 192.168.11.2. The image will be written on flash automatically. 1) Have a computer with static IP address 192.168.11.2 and the router device switched off. 2) Connect the LAN port next to the WAN port in the device and the computer using a network switch. 3) Assign IP 192.168.11.1 the MAC address 02:AA:BB:CC:DD:1A arp -s 192.168.11.1 02:AA:BB:CC:DD:1A 4) Initiate an upload using TFTP image variant curl -T tftp://192.168.11.1 5) Switch on the device. The image will be uploaded subsequently. You can keep an eye on the diag light on the device, it should keep on blinking for a while indicating the writing of the image. General notes: - In the stock firmware the MAC address is the same among all interfaces so it is left here that way too. Recovery: - TFTP method - U-boot serial console Differences to ar71xx platform - This device is split in two different targets now due to hardware being a bit different under the hood. Dynamic solution within the same image is left for later time. - GPIOs for a sliding On/Off switch, marked 'Movie engine' on the device cover, were the wrong way around and were renamed qos_on -> movie_off, qos_off -> movie_on. Associated key codes remained the same they were. The device tree source code is mostly based on musashino's work Signed-off-by: Mauri Sandberg (cherry picked from commit bc356de2850f14629cb1301be719772fa1212e72) --- .../dts/ar9132_buffalo_wzr-hp-g300nh-rb.dts | 26 ++ .../dts/ar9132_buffalo_wzr-hp-g300nh-s.dts | 26 ++ .../dts/ar9132_buffalo_wzr-hp-g300nh.dtsi | 249 ++++++++++++++++++ .../generic/base-files/etc/board.d/01_leds | 4 + .../generic/base-files/etc/board.d/02_network | 12 +- target/linux/ath79/image/generic.mk | 23 ++ 6 files changed, 335 insertions(+), 5 deletions(-) create mode 100644 target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-rb.dts create mode 100644 target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-s.dts create mode 100644 target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi diff --git a/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-rb.dts b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-rb.dts new file mode 100644 index 0000000000..52b0c86d65 --- /dev/null +++ b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-rb.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9132_buffalo_wzr-hp-g300nh.dtsi" + +/ { + compatible = "buffalo,wzr-hp-g300nh-rb", "qca,ar9132"; + model = "Buffalo WZR-HP-G300NH (rtl8366rb)"; +}; + +&switch { + status = "okay"; + + compatible = "realtek,rtl8366rb"; +}; + +ð0 { + status = "okay"; + + pll-data = <0x1f000000 0x13000a44 0x00441099>; +}; + +ð1 { + status = "okay"; + + pll-data = <0x100 0x13000a44 0x00441099>; +}; diff --git a/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-s.dts b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-s.dts new file mode 100644 index 0000000000..1c4da1ed67 --- /dev/null +++ b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh-s.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9132_buffalo_wzr-hp-g300nh.dtsi" + +/ { + compatible = "buffalo,wzr-hp-g300nh-s", "qca,ar9132"; + model = "Buffalo WZR-HP-G300NH (rtl8366s)"; +}; + +&switch { + status = "okay"; + + compatible = "realtek,rtl8366s"; +}; + +ð0 { + status = "okay"; + + pll-data = <0x1e000100 0x13000a44 0x00441099>; +}; + +ð1 { + status = "okay"; + + pll-data = <0x1e000100 0x13000a44 0x00441099>; +}; diff --git a/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi new file mode 100644 index 0000000000..9bd4656d85 --- /dev/null +++ b/target/linux/ath79/dts/ar9132_buffalo_wzr-hp-g300nh.dtsi @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9132.dtsi" +#include +#include + +/ { + aliases { + led-boot = &led_diag; + led-failsafe = &led_security; + led-upgrade = &led_diag; + }; + + clock40mhz: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + + gpio2: gpio-extender { + compatible = "nxp,74hc153-gpio"; + gpio-controller; + #gpio-cells = <2>; + + // GPIOs used by this node + gpio-s0 = <&gpio 9 GPIO_ACTIVE_HIGH>; + gpio-s1 = <&gpio 11 GPIO_ACTIVE_HIGH>; + gpio-1y = <&gpio 12 GPIO_ACTIVE_HIGH>; + gpio-2y = <&gpio 14 GPIO_ACTIVE_HIGH>; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + aoss { + label = "aoss"; + linux,code = ; + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + router_on { + label = "router_on"; + linux,code = ; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + debounce-interval = <60>; + }; + + movie_off { + label = "movie_off"; + linux,code = ; + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + debounce-interval = <60>; + }; + + usb { + label = "usb"; + linux,code = ; + gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + router_auto { + label = "router_auto"; + linux,code = ; + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; + debounce-interval = <60>; + }; + + movie_on { + label = "movie_on"; + linux,code = ; + gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + debounce-interval = <60>; + }; + }; + + flash@1e000000 { + compatible = "cfi-flash"; + reg = <0x1e000000 0x2000000>; + bank-width = <2>; + device-width = <2>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x0040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x0040000 0x0020000>; + read-only; + }; + + partition@60000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x0060000 0x1f60000>; + }; + + partition@1fc0000 { + label = "user_property"; + reg = <0x1fc0000 0x0020000>; + read-only; + }; + + art: partition@1fe0000 { + label = "art"; + reg = <0x1fe0000 0x020000>; + read-only; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + usb { + label = "blue:usb"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + trigger-sources = <&hub_port>; + linux,default-trigger = "usbport"; + }; + + led_diag: diag { + label = "red:diag"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + + wireless { + label = "green:wireless"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led_security: security { + label = "amber:security"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + + router { + label = "green:router"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + }; + }; + + switch: switch { + status = "disabled"; + + gpio-sda = <&gpio 19 GPIO_ACTIVE_HIGH>; + gpio-sck = <&gpio 20 GPIO_ACTIVE_HIGH>; + mii-bus = <&mdio0>; + + mdio-bus { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + phy-mask = <0x10>; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; +}; + +ð0 { + status = "disabled"; + + phy-mode = "rgmii"; + mtd-mac-address = <&art 0x1120c>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&mdio1 { + status = "okay"; +}; + +ð1 { + status = "disabled"; + + compatible = "qca,ar9130-eth", "syscon"; + reg = <0x1a000000 0x200 + 0x18070004 0x4>; + + pll-reg = <0x4 0x18 22>; + pll-handle = <&pll>; + + phy-mode = "rgmii"; + phy-handle = <&phy4>; + resets = <&rst 13>; + reset-names = "mac"; + qca,mac-idx = <1>; + mtd-mac-address = <&art 0x1120c>; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x11000>; +}; + +&uart { + status = "okay"; +}; + +&pll { + clocks = <&clock40mhz>; +}; + +&usb { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + hub_port: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&usb_phy { + status = "okay"; +}; diff --git a/target/linux/ath79/generic/base-files/etc/board.d/01_leds b/target/linux/ath79/generic/base-files/etc/board.d/01_leds index f7d8ec0f85..fae5ac7c92 100755 --- a/target/linux/ath79/generic/base-files/etc/board.d/01_leds +++ b/target/linux/ath79/generic/base-files/etc/board.d/01_leds @@ -84,6 +84,10 @@ avm,fritzdvbc) ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "green:rssimediumhigh" "wlan1" "60" "100" ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "green:rssihigh" "wlan1" "80" "100" ;; +buffalo,wzr-hp-g300nh-rb|\ +buffalo,wzr-hp-g300nh-s) + ucidef_set_led_netdev "router" "Router" "green:router" "eth1" + ;; comfast,cf-e110n-v2) ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth1" ucidef_set_led_switch "wan" "WAN" "green:wan" "switch0" "0x02" diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network index e9822d5fca..084e8536dd 100755 --- a/target/linux/ath79/generic/base-files/etc/board.d/02_network +++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network @@ -156,6 +156,13 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" ;; + buffalo,wzr-hp-g300nh-rb|\ + buffalo,wzr-hp-g300nh-s|\ + dlink,dir-825-b1) + ucidef_set_interface_wan "eth1" + ucidef_add_switch "switch0" \ + "0:lan" "1:lan" "2:lan" "3:lan" "5@eth0" + ;; buffalo,wzr-hp-g302h-a1a0) ucidef_add_switch "switch0" \ "0@eth0" "1:lan:1" "3:lan:4" "4:lan:3" "5:lan:2" "2:wan" @@ -212,11 +219,6 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "1:lan:2" "2:lan:1" ;; - dlink,dir-825-b1) - ucidef_set_interface_wan "eth1" - ucidef_add_switch "switch0" \ - "0:lan" "1:lan" "2:lan" "3:lan" "5@eth0" - ;; dlink,dir-825-c1|\ dlink,dir-835-a1|\ dlink,dir-842-c1|\ diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index 6eda757445..d93ebbaeba 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -453,6 +453,29 @@ define Device/buffalo_wzr-hp-ag300h endef TARGET_DEVICES += buffalo_wzr-hp-ag300h +define Device/buffalo_wzr-hp-g300nh + $(Device/buffalo_common) + SOC := ar9132 + BUFFALO_PRODUCT := WZR-HP-G300NH + BUFFALO_HWVER := 1 + DEVICE_PACKAGES := kmod-usb2 kmod-usb-ledtrig-usbport kmod-gpio-nxp-74hc153 + BLOCKSIZE := 128k + IMAGE_SIZE := 32128k + SUPPORTED_DEVICES += wzr-hp-g300nh +endef + +define Device/buffalo_wzr-hp-g300nh-rb + $(Device/buffalo_wzr-hp-g300nh) + DEVICE_MODEL := WZR-HP-G300NH (RTL8366RB switch) +endef +TARGET_DEVICES += buffalo_wzr-hp-g300nh-rb + +define Device/buffalo_wzr-hp-g300nh-s + $(Device/buffalo_wzr-hp-g300nh) + DEVICE_MODEL := WZR-HP-G300NH (RTL8366S switch) +endef +TARGET_DEVICES += buffalo_wzr-hp-g300nh-s + define Device/buffalo_wzr-hp-g302h-a1a0 $(Device/buffalo_common) SOC := ar7242