From cd2bc98b544ce245de21b02f0901a1a5f1e330e5 Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Sat, 23 Sep 2023 14:59:52 +0800 Subject: [PATCH] mediatek: create shared dtsi for cmcc rax3000m Prepare for next mainline support. Signed-off-by: Tianling Shen --- .../mt7981b-cmcc-rax3000m-nand-ubootmod.dts | 150 +---------------- .../mediatek/dts/mt7981b-cmcc-rax3000m.dts | 156 ++++++++++++++++++ 2 files changed, 164 insertions(+), 142 deletions(-) create mode 100644 target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts index 19d7dbc6fe..06b9f47453 100644 --- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand-ubootmod.dts @@ -1,107 +1,25 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; -#include -#include - -#include "mt7981.dtsi" +#include "mt7981b-cmcc-rax3000m.dts" / { model = "CMCC RAX3000M NAND version (custom U-Boot layout)"; compatible = "cmcc,rax3000m-nand-ubootmod", "mediatek,mt7981"; aliases { - led-boot = &red_led; - led-failsafe = &red_led; - led-running = &green_led; - led-upgrade = &green_led; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - reg = <0 0x40000000 0 0x10000000>; - }; - - gpio-keys { - compatible = "gpio-keys"; - - button-reset { - label = "reset"; - linux,code = ; - gpios = <&pio 1 GPIO_ACTIVE_LOW>; - }; - - button-mesh { - label = "mesh"; - linux,code = ; - linux,input-type = ; - gpios = <&pio 0 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - green_led: led-0 { - label = "green:status"; - gpios = <&pio 9 GPIO_ACTIVE_LOW>; - }; - - led-1 { - label = "blue:status"; - gpios = <&pio 12 GPIO_ACTIVE_LOW>; - }; - - red_led: led-2 { - label = "red:status"; - gpios = <&pio 35 GPIO_ACTIVE_LOW>; - }; + label-mac-device = &gmac1; }; }; -ð { - status = "okay"; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "2500base-x"; - - nvmem-cells = <&macaddr_factory_2a 0>; - nvmem-cell-names = "mac-address"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "gmii"; - phy-handle = <&int_gbe_phy>; - - nvmem-cells = <&macaddr_factory_24 0>; - nvmem-cell-names = "mac-address"; - }; +&gmac0 { + nvmem-cells = <&macaddr_factory_2a 0>; + nvmem-cell-names = "mac-address"; }; -&mdio_bus { - switch: switch@0 { - compatible = "mediatek,mt7531"; - reg = <31>; - reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&pio>; - interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; - }; +&gmac1 { + nvmem-cells = <&macaddr_factory_24 0>; + nvmem-cell-names = "mac-address"; }; &spi0 { @@ -175,40 +93,6 @@ }; }; -&switch { - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "lan3"; - }; - - port@1 { - reg = <1>; - label = "lan2"; - }; - - port@2 { - reg = <2>; - label = "lan1"; - }; - - port@6 { - reg = <6>; - ethernet = <&gmac0>; - phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; - }; -}; - &pio { spi0_flash_pins: spi0-pins { mux { @@ -230,24 +114,6 @@ }; }; -&uart0 { - status = "okay"; -}; - -&usb_phy { - status = "okay"; -}; - -&watchdog { - status = "okay"; -}; - &wifi { - status = "okay"; - mediatek,mtd-eeprom = <&factory 0x0>; }; - -&xhci { - status = "okay"; -}; diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts new file mode 100644 index 0000000000..e9c850e85b --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2023 Tianling Shen + */ + +/dts-v1/; +#include +#include + +#include "mt7981.dtsi" + +/ { + model = "CMCC RAX3000M"; + compatible = "cmcc,rax3000m", "mediatek,mt7981"; + + aliases { + led-boot = &red_led; + led-failsafe = &red_led; + led-running = &green_led; + led-upgrade = &green_led; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x20000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + button-mesh { + label = "mesh"; + linux,code = ; + linux,input-type = ; + gpios = <&pio 0 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + green_led: led-0 { + label = "green:status"; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + led-1 { + label = "blue:status"; + gpios = <&pio 12 GPIO_ACTIVE_LOW>; + }; + + red_led: led-2 { + label = "red:status"; + gpios = <&pio 35 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&int_gbe_phy>; + }; +}; + +&mdio_bus { + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan3"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; + +&xhci { + status = "okay"; +};