From de37b56cdb21df164a32ffda0ee4383c9ab6d13e Mon Sep 17 00:00:00 2001 From: David Bauer Date: Sun, 3 Dec 2023 08:03:57 +0100 Subject: [PATCH 01/12] mpc85xx: increase available RAM on Extreme Networks WS-AP3825i The system-mamory size was page-aligned prior to this commit, only enabling to use 192MB of system memory of the 256 available. This was due to the system-memory being manually shrinked to reserve the upper 1MB for the second-core bootpage in the loader as well as the OS. Fix this properly in the loader and in Linux using reserved-memory definitions. This enables the device to use 250MB of system memory. Signed-off-by: David Bauer (cherry picked from commit 57d7382cb159dbb15b8e281cad90a65d4c0201f6) --- .../arch/powerpc/boot/dts/ws-ap3825i.dts | 18 +++++++- ...pleboot-prevent-overwrite-of-CPU1-sp.patch | 41 +++++++++++++++++++ 2 files changed, 57 insertions(+), 2 deletions(-) create mode 100644 target/linux/mpc85xx/patches-5.15/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts index a347900e5d..3cff69c689 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts @@ -9,6 +9,9 @@ model = "Extreme Networks WS-AP3825i"; compatible = "extreme-networks,ws-ap3825i"; + #address-cells = <2>; + #size-cells = <2>; + aliases { ethernet0 = &enet0; ethernet1 = &enet2; @@ -301,8 +304,19 @@ }; memory { - /* Reserve upper MB for second-core-bootpage */ - reg = <0x0 0x0 0x0 0xff00000>; + reg = <0x0 0x0 0x0 0x10000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cpu1-bootpage@e000000 { + /* Reserve upper 1 MB for second-core-bootpage */ + reg = <0x0 0xff00000 0x0 0x100000>; + no-map; + }; }; soc@ffe00000 { diff --git a/target/linux/mpc85xx/patches-5.15/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch b/target/linux/mpc85xx/patches-5.15/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch new file mode 100644 index 0000000000..1ff80a5016 --- /dev/null +++ b/target/linux/mpc85xx/patches-5.15/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch @@ -0,0 +1,41 @@ +From 5f856ccc34df25060d36a5a81b7b45b574d86e35 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Sun, 3 Dec 2023 20:09:24 +0100 +Subject: [PATCH] arch: powerpc: simpleboot: prevent overwrite of CPU1 + spin-table + +Don't overwrite the spin-table of additional CPU cores with loader-heap. + +U-Boot places the spin-table for CPU1 on P1020 SoCs in the top 1MB of +system-memory. Instead of parsing reserved-memory (which would be +considerable more work), reduce the available system-memory for the +loader by 1MB. + +This prevents the loader from overwriting the spin-table of +additional CPU cores on these platforms. + +Linux itself needs to be made aware by this using reserved-memory +definitions. + +This patch is required for using CPU1 on the Extreme Networks +WS-AP3825i. + +Signed-off-by: David Bauer +--- + arch/powerpc/boot/simpleboot.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/powerpc/boot/simpleboot.c ++++ b/arch/powerpc/boot/simpleboot.c +@@ -65,6 +65,11 @@ void platform_init(unsigned long r3, uns + if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL) + memsize64 = 0xffffffff; + ++ /* Reserve upper 1 MB of memory for CPU1 spin-table */ ++ if (memsize64 > 0x100000) { ++ memsize64 = memsize64 - 0x100000; ++ } ++ + /* finally, setup the timebase */ + node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", + "cpu", sizeof("cpu")); From 6261ae12e1161ebefa94f61a1c96f9febd7ed985 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Mon, 4 Dec 2023 13:54:56 +0100 Subject: [PATCH 02/12] mpc85xx: allow mapping of cpu1 spin-table page The no-map property was incorrectly added, which kept the system-memory available on the WS-AP3825 limited to 190MB. We are allowed to map the page containing the CPU1 spin-table, we are just not allowed to write to it. Fixes: 57d7382cb159 ("mpc85xx: increase available RAM on Extreme Networks WS-AP3825i") Signed-off-by: David Bauer (cherry picked from commit d9271aa5b7ddcef20ebe64d1d80c8ddcd6cd7fb7) --- target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts index 3cff69c689..f3c8a4fe5c 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts @@ -315,7 +315,6 @@ cpu1-bootpage@e000000 { /* Reserve upper 1 MB for second-core-bootpage */ reg = <0x0 0xff00000 0x0 0x100000>; - no-map; }; }; From 7606dac661f60d378d2cf42c6434811e6234f252 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Tue, 31 Oct 2023 18:47:49 +0800 Subject: [PATCH 03/12] base-files: support parse DT LED color and function The 'label' property in led node has been deprecated and we'd better to avoid using it. This patch allows us to extract DT OF LED name from the newly introduced LED properties "color", "function" and "function-enumerator". Signed-off-by: Shiji Yang (cherry picked from commit e814acc59948943c776ac319a348f72c0d19f33c) --- .../base-files/files/lib/functions/leds.sh | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/package/base-files/files/lib/functions/leds.sh b/package/base-files/files/lib/functions/leds.sh index a7532faa2f..333d900df0 100644 --- a/package/base-files/files/lib/functions/leds.sh +++ b/package/base-files/files/lib/functions/leds.sh @@ -11,6 +11,36 @@ get_dt_led_path() { echo "$ledpath" } +get_dt_led_color_func() { + local enum + local func + local idx + local label + + [ -e "$1/function" ] && func=$(cat "$1/function") + [ -e "$1/color" ] && idx=$((0x$(hexdump -n 4 -e '4/1 "%02x"' "$1/color"))) + [ -e "$1/function-enumerator" ] && \ + enum=$((0x$(hexdump -n 4 -e '4/1 "%02x"' "$1/function-enumerator"))) + + [ -z "$idx" ] && [ -z "$func" ] && return 2 + + if [ -n "$idx" ]; then + for color in "white" "red" "green" "blue" "amber" \ + "violet" "yellow" "ir" "multicolor" "rgb" \ + "purple" "orange" "pink" "cyan" "lime" + do + [ $idx -eq 0 ] && label="$color" && break + idx=$((idx-1)) + done + fi + + label="$label:$func" + [ -n "$enum" ] && label="$label-$enum" + echo "$label" + + return 0 +} + get_dt_led() { local label local ledpath=$(get_dt_led_path $1) @@ -18,6 +48,7 @@ get_dt_led() { [ -n "$ledpath" ] && \ label=$(cat "$ledpath/label" 2>/dev/null) || \ label=$(cat "$ledpath/chan-name" 2>/dev/null) || \ + label=$(get_dt_led_color_func "$ledpath") || \ label=$(basename "$ledpath") echo "$label" From 3846b6eb49e75cae52fd82a601238aa75cf82270 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= Date: Tue, 28 Mar 2023 15:04:21 +0200 Subject: [PATCH 04/12] filogic: support Telenor branded ZyXEL EX5700 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Telenor quirks -------------- The operator specific firmware running on the Telenor branded ZyXEL EX5700 includes U-Boot modifications affecting the OpenWrt installation. Notable changes to U-Boot include - environment is stored in RAM and reset to defaults when power cycled - dual partition scheme with "nomimal" or "rescue" systems, falling back to "rescue" unless the OS signals success in 3 attempts - several runtime additions to the device-tree Some of these modifications have side effects requiring workarounds - U-Boot modifies /chosen/bootargs in an unsafe manner, and will crash unless this node exists - U-Boot verifies that the selected rootfs UBI volume exists, and refuses to boot if it doesn't. The chosen "rootfs" volume must contain a squashfs signature even for tftp or initramfs booting. - U-Boot parses the "factoryparams" UBI volume, setting the "ethaddr" variable to the label mac. But "factoryparams" does not always exist. Instead there is a "RIP" volume containing all the factory data. Copying the "RIP" volume to "factoryparams" will fix this Hardware -------- SOC: MediaTek MT7986 RAM: 1GB DDR4 FLASH: 512MB SPI-NAND (Mikron xxx) WIFI: Mediatek MT7986 802.11ax 5 GHz Mediatek MT7916 DBDC 802.11ax 2.4 + 6 GHz ETH: MediaTek MT7531 Switch + SoC 3 x builtin 1G phy (lan1, lan2, lan3) 2 x MaxLinear GPY211C 2.5 N-Base-T phy (lan4, wan) USB: 1 x USB 3.2 Enhanced SuperSpeed port UART: 3V3 115200 8N1 (Pinout: GND KEY RX TX VCC) Installation ------------ 1. Download the OpenWrt initramfs image. Copy the image to a TFTP server reachable at 192.168.1.2/24. Rename the image to C0A80101.img. 2. Connect the TFTP server to lan1, lan2 or lan3. Connect to the serial console, Interrupt the autoboot process by pressing ESC when prompted. 3. Download and boot the OpenWrt initramfs image. $ env set uboot_bootcount 0 $ env set firmware nominal $ tftpboot $ bootm 4. Wait for OpenWrt to boot. Transfer the sysupgrade image to the device using scp and install using sysupgrade. $ sysupgrade -n Missing features ---------------- - The "lan1", "lan2" and "lan3" port LEDs are driven by the switch but OpenWrt does not correctly configure the output. - The "lan4" and "wan" port LEDs are driven by the GPH211C phys and not configured by OpenWrt. Signed-off-by: Bjørn Mork (cherry picked from commit 6cc14bf66aa924962b926ea9702b6153ae418a7d) --- .../uboot-envtools/files/mediatek_filogic | 3 + .../dts/mt7986a-zyxel-ex5700-telenor.dts | 374 ++++++++++++++++++ .../filogic/base-files/etc/init.d/bootcount | 12 + target/linux/mediatek/image/filogic.mk | 14 + 4 files changed, 403 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7986a-zyxel-ex5700-telenor.dts create mode 100644 target/linux/mediatek/filogic/base-files/etc/init.d/bootcount diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 6e39fac657..7bfdee24f3 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -88,6 +88,9 @@ zyxel,ex5601-t0) local envdev=/dev/mtd$(find_mtd_index "u-boot-env") ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x40000" "2" ;; +zyxel,ex5700-telenor) + ubootenv_add_uci_config "/dev/ubootenv" "0x0" "0x4000" "0x4000" "1" + ;; esac config_load ubootenv diff --git a/target/linux/mediatek/dts/mt7986a-zyxel-ex5700-telenor.dts b/target/linux/mediatek/dts/mt7986a-zyxel-ex5700-telenor.dts new file mode 100644 index 0000000000..b6bd746ef3 --- /dev/null +++ b/target/linux/mediatek/dts/mt7986a-zyxel-ex5700-telenor.dts @@ -0,0 +1,374 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/dts-v1/; +#include +#include + +#include "mt7986a.dtsi" + +/ { + model = "ZyXEL EX5700 (Telenor)"; + compatible = "zyxel,ex5700-telenor", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + led-boot = &led_status_green; + led-failsafe = &led_status_green; + led-running = &led_status_green; + led-upgrade = &led_status_amber; + }; + + chosen { + stdout-path = "serial0:115200n8"; + + // Stock U-Boot crashes unless /chosen/bootargs exists + bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x40000000>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; + + + keys { + compatible = "gpio-keys"; + poll-interval = <20>; + + reset-button { + label = "reset"; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps-button { + label = "wps"; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + red1 { + label = "red:net"; + gpios = <&pio 23 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + green1 { + label = "green:net"; + gpios = <&pio 25 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + amber1 { + label = "amber:net"; + gpios = <&pio 29 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + white2 { + label = "white:status"; + gpios = <&pio 16 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + red2 { + label = "red:status"; + gpios = <&pio 17 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led_status_green: green2 { + label = "green:status"; + gpios = <&pio 31 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led_status_amber: amber2 { + label = "amber:status"; + gpios = <&pio 18 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + +}; + +ð { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <ð_pins>; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + label = "wan"; + phy-mode = "2500base-x"; + phy-handle = <&phy6>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&mdio { + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; + reset-delay-us = <50000>; + reset-post-delay-us = <20000>; + + phy5: phy@5 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <5>; + }; + + phy6: phy@6 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <6>; + }; + + switch: switch@1f { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan3"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "2500base-x"; + phy-handle = <&phy5>; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&crypto { + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; + + pcie@0,0 { + reg = <0x0000 0 0 0 0>; + + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0xa0000>; + }; + }; +}; + +&pcie_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&wf_5g_pins>; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; + +&pio { + eth_pins: eth-pins { + mux { + function = "eth"; + groups = "switch_int", "mdc_mdio"; + }; + }; + + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_pereset"; // "pcie_clk" and "pcie_wake" is unused? + }; + }; + + spi_flash_pins: spi-flash-pins-33-to-38 { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + conf-pu { + pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + conf-pd { + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; + drive-strength = <8>; + mediatek,pull-down-adv = <0>; /* bias-disable */ + }; + }; + + wf_5g_pins: wf_5g-pins { + mux { + function = "wifi"; + groups = "wf_5g"; + }; + conf { + pins = "WF1_HB1", "WF1_HB2", "WF1_HB3", "WF1_HB4", + "WF1_HB0", "WF1_HB5", "WF1_HB6", "WF1_HB7", + "WF1_HB8", "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + }; + + flash@1 { + compatible = "spi-nand"; + reg = <1>; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + spi-max-frequency = <20000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x000000 0x100000>; + read-only; + }; + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x80000>; + }; + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x200000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + }; + partition@380000 { + label = "FIP"; + reg = <0x380000 0x200000>; + read-only; + }; + partition@580000 { + label = "ubi"; + reg = <0x580000 0x1da80000>; + }; + }; + }; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_5v>; + status = "okay"; +}; + +&trng { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount new file mode 100644 index 0000000000..c52d004c63 --- /dev/null +++ b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount @@ -0,0 +1,12 @@ +#!/bin/sh /etc/rc.common +# SPDX-License-Identifier: GPL-2.0-only + +START=99 + +boot() { + case $(board_name) in + zyxel,ex5700-telenor) + fw_setenv uboot_bootcount 0 + ;; + esac +} diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 06cf3d7883..bf3ef599cf 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -653,6 +653,20 @@ define Device/zyxel_ex5601-t0-stock endef TARGET_DEVICES += zyxel_ex5601-t0-stock +define Device/zyxel_ex5700-telenor + DEVICE_VENDOR := ZyXEL + DEVICE_MODEL := EX5700 (Telenor) + DEVICE_DTS := mt7986a-zyxel-ex5700-telenor + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7916-firmware kmod-ubootenv-nvram kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 65536k + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += zyxel_ex5700-telenor + define Device/zyxel_nwa50ax-pro DEVICE_VENDOR := ZyXEL DEVICE_MODEL := NWA50AX Pro From e1d1c26c0fa28d7ce18cf4931a3351e51434a27e Mon Sep 17 00:00:00 2001 From: Patricia Lee Date: Wed, 30 Aug 2023 19:50:54 +0800 Subject: [PATCH 05/12] mediatek: add support for Cetron CT3003 **Hardware specification:** - SoC: MediaTek MT7981B 2x A53 - Flash: ESMT F50L1G41LB 128MB - RAM: Nanya NT5CC128M16JR-EK 256MB - Ethernet: 4 x 10/100/1000 Mbps - Switch: MediaTek MT7531AE - WiFi: MediaTek MT7976C - Button: Reset, Mesh - Power: DC 12V 1A - UART: 3.3v, 115200n8 | Layout: | | :-------- | | | | VCC | | GND | | Tx | | Rx | **Flash instructions:** 1. Rename `openwrt-mediatek-filogic-cetron_ct3003-squashfs-factory.bin` to `factory.bin`. 2. Upload the `factory.bin` using the device's Web interface. 3. Click the upgrade button and wait for the process to finish. 4. Access the OpenWrt interface using the same password. 5. Use the 'Restore' function to reset the firmware to its initial state. **Notes:** If you plan to recovery the stock firmware in the future, it's advisable to connect the device via the serial port and enter failsafe mode to back up all the MTD partitions before proceeding the steps above. Signed-off-by: Patricia Lee (cherry picked from commit 907e9e0bd3df456b32921893cf6ef1b54117d983) --- .../uboot-envtools/files/mediatek_filogic | 1 + .../mediatek/dts/mt7981b-cetron-ct3003.dts | 242 ++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 6 + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 + target/linux/mediatek/image/filogic.mk | 32 +++ 5 files changed, 286 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 7bfdee24f3..3c68b15442 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -61,6 +61,7 @@ mercusys,mr90x-v1) local envdev=/dev/mtd$(find_mtd_index "u-boot-env") ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1" ;; +cetron,ct3003|\ netgear,wax220) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" ;; diff --git a/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts new file mode 100644 index 0000000000..d39083ffb0 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts @@ -0,0 +1,242 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include + +#include "mt7981.dtsi" + +/ { + model = "Cetron CT3003"; + compatible = "cetron,ct3003", "mediatek,mt7981"; + + aliases { + serial0 = &uart0; + led-boot = &led_status_red; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_green; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: led_status_red { + label = "red:status"; + gpios = <&pio 3 GPIO_ACTIVE_LOW>; + }; + + led_status_green: led_status_green { + label = "green:status"; + gpios = <&pio 7 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; +}; + +&mdio_bus { + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand@0 { + compatible = "spi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partition@0 { + label = "BL2"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + partition@180000 { + label = "art"; + reg = <0x0180000 0x0100000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + }; + + factory: partition@280000 { + label = "Factory"; + reg = <0x0280000 0x0100000>; + read-only; + }; + + partition@380000 { + label = "FIP"; + reg = <0x0380000 0x0200000>; + read-only; + }; + + partition@580000 { + label = "ubi"; + reg = <0x0580000 0x2000000>; + }; + + partition@2580000 { + label = "ubi_backup"; + reg = <0x2580000 0x2000000>; + }; + + partition@4580000 { + label = "Config_backup"; + reg = <0x4580000 0x0400000>; + }; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 93e69e5c85..a1eb3865a7 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -44,6 +44,7 @@ mediatek_setup_interfaces() mercusys,mr90x-v1) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2" eth1 ;; + cetron,ct3003|\ qihoo,360t7) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan ;; @@ -84,6 +85,11 @@ mediatek_setup_macs() bananapi,bpi-r3) wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1) ;; + cetron,ct3003) + lan_mac=$(mtd_get_mac_binary "art" 0) + wan_mac=$(macaddr_add "$lan_mac" 3) + label_mac=$lan_mac + ;; cmcc,rax3000m) case "$(cmdline_get_var root)" in /dev/mmc*) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index a1d51a548e..27675dc97e 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -30,6 +30,11 @@ case "$board" in [ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress ;; + cetron,ct3003) + addr=$(mtd_get_mac_binary "art" 0) + [ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress + ;; cmcc,rax3000m) case "$(cmdline_get_var root)" in /dev/mmc*) diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index bf3ef599cf..5befe88982 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -90,6 +90,21 @@ define Build/zyxel-nwa-fit-filogic @mv $@.new $@ endef +define Build/cetron-header + $(eval magic=$(word 1,$(1))) + $(eval model=$(word 2,$(1))) + ( \ + dd if=/dev/zero bs=856 count=1 2>/dev/null; \ + printf "$(model)," | dd bs=128 count=1 conv=sync 2>/dev/null; \ + md5sum $@ | cut -f1 -d" " | dd bs=32 count=1 2>/dev/null; \ + printf "$(magic)" | dd bs=4 count=1 conv=sync 2>/dev/null; \ + cat $@; \ + ) > $@.tmp + fw_crc=$$(gzip -c $@.tmp | tail -c 8 | od -An -N4 -tx4 --endian little | tr -d ' \n'); \ + printf "$$(echo $$fw_crc | sed 's/../\\x&/g')" | cat - $@.tmp > $@ + rm $@.tmp +endef + define Device/asus_tuf-ax4200 DEVICE_VENDOR := ASUS DEVICE_MODEL := TUF-AX4200 @@ -174,6 +189,23 @@ endif endef TARGET_DEVICES += bananapi_bpi-r3 +define Device/cetron_ct3003 + DEVICE_VENDOR := Cetron + DEVICE_MODEL := CT3003 + DEVICE_DTS := mt7981b-cetron-ct3003 + DEVICE_DTS_DIR := ../dts + SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_IN_UBI := 1 + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + IMAGES += factory.bin + IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | cetron-header rd30 CT3003 +endef +TARGET_DEVICES += cetron_ct3003 + define Device/cmcc_rax3000m DEVICE_VENDOR := CMCC DEVICE_MODEL := RAX3000M From 28d15e2040971bdf7c8d2d40bbd406d6ba00a94e Mon Sep 17 00:00:00 2001 From: Elbert Mai Date: Sun, 17 Sep 2023 07:59:48 -0700 Subject: [PATCH 06/12] mediatek: filogic: add support for Ubiquiti UniFi 6 Plus (U6+) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Ubiquiti U6+ is a dual-band WiFi 6 PoE access point. It is a drop-in upgrade of the U6 lite. Specifications --- - SoC: MediaTek MT7981A dual-core ARM Cortex-A53 1.3 GHz - RAM: 256 MB DDR3-2133 RAM - Flash: 16 MB SPI NOR and 4 GB eMMC - LAN: 1x Gigabit Ethernet with 802.3af/at support - WLAN: MediaTek MT7976C 2x2 MIMO dual-band WiFi 6 - LEDs: 1x blue and 1x white - Buttons: 1x reset button Installation --- 1. Power device using a PoE injector or switch 2. Connect via Ethernet to the device with static IP 192.168.1.2 3. SSH into the device with password: ubnt $ ssh ubnt@192.168.1.20 4. Unlock kernel partitions for writing $ echo 5edfacbf > /proc/ubnthal/.uf 5. Confirm correct partitions $ grep PARTNAME /sys/block/mmcblk0/mmcblk0p6/uevent PARTNAME=kernel0 $ grep PARTNAME /sys/block/mmcblk0/mmcblk0p7/uevent PARTNAME=kernel1 $ grep PARTNAME /sys/block/mmcblk0/mmcblk0p8/uevent PARTNAME=bs 6. Set and confirm bootloader environment $ fw_setenv boot_openwrt "fdt addr \$(fdtcontroladdr); fdt rm /signature; bootubnt" $ fw_setenv bootcmd_real "run boot_openwrt" $ fw_printenv 7. Copy sysupgrade image to /tmp/openwrt.bin via scp 8. Copy kernel and rootfs to mmcblk0p6 and mmcblk0p7, respectively $ tar xf /tmp/openwrt.bin sysupgrade-ubnt_unifi-6-plus/kernel -O | dd of=/dev/mmcblk0p6 $ tar xf /tmp/openwrt.bin sysupgrade-ubnt_unifi-6-plus/root -O | dd of=/dev/mmcblk0p7 9. Ensure device boots from mmcblk0p6 $ echo -ne "\x00\x00\x00\x00\x2b\xe8\x4d\xa3" > /dev/mmcblk0p8 10. Reboot the device $ reboot Signed-off-by: Elbert Mai Signed-off-by: Bjørn Mork (cherry picked from commit 75ee5546e9b7cfa5bbfd6f844ab8c5fffd5bb594) --- .../uboot-envtools/files/mediatek_filogic | 3 + .../dts/mt7981a-ubnt-unifi-6-plus.dts | 168 ++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 1 + .../etc/hotplug.d/firmware/11-mt76-caldata | 3 + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 + .../base-files/lib/upgrade/platform.sh | 8 + target/linux/mediatek/image/filogic.mk | 10 ++ 7 files changed, 198 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7981a-ubnt-unifi-6-plus.dts diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 3c68b15442..ddd663325f 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -65,6 +65,9 @@ cetron,ct3003|\ netgear,wax220) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" ;; +ubnt,unifi-6-plus) + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x10000" + ;; xiaomi,mi-router-wr30u-112m-nmbm|\ xiaomi,mi-router-wr30u-stock|\ xiaomi,redmi-router-ax6000-stock) diff --git a/target/linux/mediatek/dts/mt7981a-ubnt-unifi-6-plus.dts b/target/linux/mediatek/dts/mt7981a-ubnt-unifi-6-plus.dts new file mode 100644 index 0000000000..ece78ee50e --- /dev/null +++ b/target/linux/mediatek/dts/mt7981a-ubnt-unifi-6-plus.dts @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include "mt7981.dtsi" + +/ { + model = "Ubiquiti UniFi 6 Plus"; + compatible = "ubnt,unifi-6-plus", "mediatek,mt7981"; + + aliases { + serial0 = &uart0; + led-boot = &led_white; + led-failsafe = &led_white; + led-running = &led_blue; + led-upgrade = &led_blue; + label-mac-device = &gmac1; + }; + + chosen { + bootargs-override = "console=ttyS0,115200n8 rootwait root=/dev/mmcblk0p7"; + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + }; + + + leds { + compatible = "gpio-leds"; + + led_blue: dome-blue { + label = "blue:dome"; + gpios = <&pio 9 GPIO_ACTIVE_HIGH>; + }; + + led_white: dome-white { + label = "white:dome"; + gpios = <&pio 34 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&pio { + spi2_flash_pins: spi2-pins { + mux { + function = "spi"; + groups = "spi2", "spi2_wp_hold"; + }; + + conf-pu { + pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; + drive-strength = <8>; + bias-pull-up = <103>; + }; + + conf-pd { + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; + drive-strength = <8>; + bias-pull-down = <103>; + }; + }; + + mmc0_pins_default: mmc0-pins-default { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; + + mmc0_pins_uhs: mmc0-pins-uhs { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_flash_pins>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom: partition@00000 { + label = "EEPROM"; + reg = <0x00000 0x10000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_eeprom_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_eeprom_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; + + partition@10000 { + label = "u-boot-env"; + reg = <0x10000 0x80000>; + }; + }; + }; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <52000000>; + cap-mmc-highspeed; + vmmc-supply = <®_3p3v>; + non-removable; + status = "okay"; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + status = "okay"; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&int_gbe_phy>; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_eeprom_0>; + }; +}; + +&wifi { + status = "okay"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index a1eb3865a7..ef46bcdd6a 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -16,6 +16,7 @@ mediatek_setup_interfaces() ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1 ;; netgear,wax220|\ + ubnt,unifi-6-plus|\ zyxel,nwa50ax-pro) ucidef_set_interface_lan "eth0" ;; diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata index 57e5670543..b168294960 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata @@ -23,6 +23,9 @@ case "$FIRMWARE" in ;; esac ;; + ubnt,unifi-6-plus) + caldata_extract_mmc "factory" 0x0 0x1000 + ;; esac ;; "mediatek/mt7986_eeprom_mt7976.bin") diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index 27675dc97e..12f16e6027 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -69,6 +69,11 @@ case "$board" in [ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress ;; + ubnt,unifi-6-plus) + addr=$(mtd_get_mac_binary EEPROM 0x6) + [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress + ;; qihoo,360t7) addr=$(mtd_get_mac_ascii factory lanMac) [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 201fd0cb5e..a9ec171a1b 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -100,6 +100,11 @@ platform_do_upgrade() { CI_UBIPART="ubi0" nand_do_upgrade "$1" ;; + ubnt,unifi-6-plus) + CI_KERNPART="kernel0" + EMMC_ROOT_DEV="$(cmdline_get_var root)" + emmc_do_upgrade "$1" + ;; h3c,magic-nx30-pro|\ mediatek,mt7981-rfb|\ qihoo,360t7|\ @@ -160,6 +165,9 @@ platform_copy_config() { ;; esac ;; + ubnt,unifi-6-plus) + emmc_copy_config + ;; esac } diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 5befe88982..067b5f13b0 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -556,6 +556,16 @@ define Device/tplink_tl-xdr6088 endef TARGET_DEVICES += tplink_tl-xdr6088 +define Device/ubnt_unifi-6-plus + DEVICE_VENDOR := Ubiquiti + DEVICE_MODEL := UniFi 6 Plus + DEVICE_DTS := mt7981a-ubnt-unifi-6-plus + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware e2fsprogs f2fsck mkf2fs fdisk partx-utils + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += ubnt_unifi-6-plus + define Device/xiaomi_mi-router-wr30u-112m-nmbm DEVICE_VENDOR := Xiaomi DEVICE_MODEL := Mi Router WR30U (112M UBI with NMBM-Enabled layout) From b530d492a9d933ca8fc4838a6ec65822c63258ab Mon Sep 17 00:00:00 2001 From: Jianhui Zhao Date: Sun, 24 Sep 2023 22:34:12 +0800 Subject: [PATCH 07/12] filogic: add support for GL.iNet GL-MT6000 Hardware specification: * SoC: MediaTek MT7986A 4x A53 * Flash: 8GB EMMC * RAM: 1GB DDR4 * Ethernet: * 2x2.5G RJ45 port (RTL8221B) * 4x1G RJ45 ports (MT7531AE) * WLAN: * 2.4GHz: MT7976GN 4T4R * 5GHz: MT7976AN 4T4R * Button: Reset * LED: 1 x dual color LED * USB: 1 x USB 3.0 * Power: DC 12V 4A * UART: 3V3 115200 8N1 (Pinout: GND TX RX VCC) * JTAG: 9 PIN If you want to use u-boot from OpenWrt, you can upgrade it safely. * bl2: openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin * fip: openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip `openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin` is used in OpenWrt's u-boot. Signed-off-by: Jianhui Zhao (cherry picked from commit fe10f9743935d6986e80e7cb082469e6bc5a03f0) --- .../uboot-envtools/files/mediatek_filogic | 4 + package/boot/uboot-mediatek/Makefile | 13 + .../patches/436-add-glinet-mt6000.patch | 274 ++++++++++++++++ .../mediatek/dts/mt7986a-glinet-gl-mt6000.dts | 306 ++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 6 + .../etc/hotplug.d/firmware/11-mt76-caldata | 7 + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 + .../base-files/lib/upgrade/platform.sh | 6 + target/linux/mediatek/image/filogic.mk | 15 + 9 files changed, 636 insertions(+) create mode 100644 package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch create mode 100644 target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index ddd663325f..d4d0969b7a 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -57,6 +57,10 @@ cmcc,rax3000m) glinet,gl-mt3000) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000" ;; +glinet,gl-mt6000) + local envdev=$(find_mmc_part "u-boot-env") + ubootenv_add_uci_config "$envdev" "0x0" "0x80000" + ;; mercusys,mr90x-v1) local envdev=/dev/mtd$(find_mtd_index "u-boot-env") ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1" diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index d566714bb4..ad25d051fe 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -381,6 +381,18 @@ define U-Boot/mt7986_bananapi_bpi-r3-nor FIP_COMPRESS:=1 endef +define U-Boot/mt7986_glinet_gl-mt6000 + NAME:=GL.iNet GL-MT6000 + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=glinet_gl-mt6000 + UBOOT_CONFIG:=mt7986a_glinet_gl-mt6000 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=emmc + BL2_SOC:=mt7986 + BL2_DDRTYPE:=ddr4 + DEPENDS:=+trusted-firmware-a-mt7986-emmc-ddr4 +endef + define U-Boot/mt7986_tplink_tl-xdr4288 NAME:=TP-LINK TL-XDR4288 BUILD_SUBTARGET:=filogic @@ -522,6 +534,7 @@ UBOOT_TARGETS := \ mt7986_bananapi_bpi-r3-sdmmc \ mt7986_bananapi_bpi-r3-snand \ mt7986_bananapi_bpi-r3-nor \ + mt7986_glinet_gl-mt6000 \ mt7986_tplink_tl-xdr4288 \ mt7986_tplink_tl-xdr6086 \ mt7986_tplink_tl-xdr6088 \ diff --git a/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch new file mode 100644 index 0000000000..ad138acfd9 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch @@ -0,0 +1,274 @@ +--- /dev/null ++++ b/arch/arm/dts/mt7986a-glinet-gl-mt6000.dts +@@ -0,0 +1,135 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++/dts-v1/; ++#include ++#include ++ ++#include "mt7986.dtsi" ++ ++/ { ++ model = "GL.iNet GL-MT6000"; ++ compatible = "glinet,gl-mt6000", "mediatek,mt7986-emmc-rfb", "mediatek,mt7986"; ++ ++ chosen { ++ stdout-path = &uart0; ++ tick-timer = &timer0; ++ }; ++ ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x40000000>; ++ }; ++ ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-1.8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ wps { ++ label = "reset"; ++ gpios = <&gpio 9 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_status_blue: green { ++ label = "blue:status"; ++ gpios = <&gpio 28 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led_status_white: blue { ++ label = "white:status"; ++ gpios = <&gpio 27 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++}; ++ ++&uart0 { ++ mediatek,force-highspeed; ++ status = "okay"; ++}; ++ ++ð { ++ status = "okay"; ++ mediatek,gmac-id = <0>; ++ phy-mode = "2500base-x"; ++ mediatek,switch = "mt7531"; ++ reset-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ }; ++}; ++ ++&pinctrl { ++ mmc0_pins_default: mmc0default { ++ mux { ++ function = "flash"; ++ groups = "emmc_51"; ++ }; ++ ++ conf-cmd-dat { ++ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", ++ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", ++ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; ++ input-enable; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ conf-clk { ++ pins = "EMMC_CK"; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ ++ conf-dsl { ++ pins = "EMMC_DSL"; ++ bias-pull-down = ; ++ }; ++ ++ conf-rst { ++ pins = "EMMC_RSTB"; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_default>; ++ bus-width = <8>; ++ max-frequency = <200000000>; ++ cap-mmc-highspeed; ++ cap-mmc-hw-reset; ++ vmmc-supply = <®_3p3v>; ++ vqmmc-supply = <®_1p8v>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&wmcpu_emi { ++ status = "disabled"; ++}; +--- /dev/null ++++ b/configs/mt7986a_glinet_gl-mt6000_defconfig +@@ -0,0 +1,105 @@ ++CONFIG_ARM=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x80000 ++CONFIG_ENV_OFFSET=0x400000 ++CONFIG_DEFAULT_DEVICE_TREE="mt7986a-glinet-gl-mt6000" ++CONFIG_SYS_PROMPT="MT7986> " ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TARGET_MT7986=y ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-glinet-gl-mt6000.dtb" ++CONFIG_LOGLEVEL=7 ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_LOG=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_CMD_CPU=y ++CONFIG_CMD_LICENSE=y ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_UUID=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_SMC=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_DEFAULT_ENV_FILE="glinet_gl-mt6000_env" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_NETCONSOLE=y ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_CLK=y ++CONFIG_GPIO_HOG=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_SUPPORT_EMMC_BOOT=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_MMC_MTK=y ++CONFIG_PHY_FIXED=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7986=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_RAM=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_MTK=y ++CONFIG_USB_STORAGE=y ++CONFIG_HEXDUMP=y ++CONFIG_LMB_MAX_REGIONS=64 +--- /dev/null ++++ b/glinet_gl-mt6000_env +@@ -0,0 +1,25 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++bootdelay=3 ++bootfile_bl2=openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin ++bootfile_fip=openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip ++bootfile_firmware=openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_title= *** U-Boot Boot Menu for GL-iNet GL-MT6000 *** ++bootmenu_0=Startup system (Default).=run boot_system ++bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return ++bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_3=mLoad BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_4=Reboot.=reset ++bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset ++filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200 ++mmc_read_kernel=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr $part_addr $image_size ++boot_system=part start mmc 0 kernel part_addr && part size mmc 0 kernel part_size && run mmc_read_kernel && bootm ++boot_tftp_firmware=tftpboot $loadaddr $bootfile_firmware && run emmc_write_firmware ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2 ++emmc_write_firmware=part start mmc 0 kernel part_addr && run filesize_to_blk && mmc write $loadaddr $part_addr $cnt ++emmc_write_bl2=run filesize_to_blk && test 0x$cnt -le 0x800 && mmc partconf 0 1 1 1 && && mmc write $loadaddr 0x0 0x800 ; mmc partconf 0 1 1 0 ++emmc_write_fip=part start mmc 0 fip part_addr && part size mmc 0 fip part_size && run filesize_to_blk && test 0x$cnt -le 0x$part_size && mmc write $loadaddr $part_addr $cnt ++reset_factory=eraseenv && reset diff --git a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts new file mode 100644 index 0000000000..2be1907f63 --- /dev/null +++ b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts @@ -0,0 +1,306 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include +#include + +#include "mt7986a.dtsi" + +/ { + model = "GL.iNet GL-MT6000"; + compatible = "glinet,gl-mt6000", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=PARTLABEL=rootfs rootwait"; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1.8vd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_run: led@0 { + label = "blue:run"; + gpios = <&pio 38 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + led@1 { + label = "white:system"; + gpios = <&pio 37 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpios = <&pio 24 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "2500base-x"; + phy-handle = <&phy1>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + phy1: phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <1>; + reset-assert-us = <100000>; + reset-deassert-us = <100000>; + reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>; + interrupt-parent = <&pio>; + interrupts = <46 IRQ_TYPE_LEVEL_LOW>; + realtek,aldps-enable; + }; + + phy7: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + reset-assert-us = <100000>; + reset-deassert-us = <100000>; + reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>; + interrupt-parent = <&pio>; + interrupts = <47 IRQ_TYPE_LEVEL_LOW>; + realtek,aldps-enable; + }; + + switch: switch@31 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan2"; + }; + + port@1 { + reg = <1>; + label = "lan3"; + }; + + port@2 { + reg = <2>; + label = "lan4"; + }; + + port@3 { + reg = <3>; + label = "lan5"; + }; + + port@5 { + reg = <5>; + label = "lan1"; + phy-handle = <&phy7>; + phy-mode = "2500base-x"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; + }; +}; + +&pio { + wf_2g_5g_pins: wf_2g_5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + }; +}; + +&crypto { + status = "okay"; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <&usb_vbus>; + status = "okay"; +}; + +&trng { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi { + pinctrl-names = "default"; + pinctrl-0 = <&wf_2g_5g_pins>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index ef46bcdd6a..d9fa477353 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -49,6 +49,7 @@ mediatek_setup_interfaces() qihoo,360t7) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan ;; + glinet,gl-mt6000|\ tplink,tl-xdr4288|\ tplink,tl-xdr6088) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" eth1 @@ -100,6 +101,11 @@ mediatek_setup_macs() ;; esac ;; + glinet,gl-mt6000) + label_mac=$(mmc_get_mac_binary factory 0x0a) + wan_mac=$label_mac + lan_mac=$(macaddr_add "$label_mac" 2) + ;; h3c,magic-nx30-pro) wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr) lan_mac=$(macaddr_add "$wan_mac" 1) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata index b168294960..4f9b4dc170 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata @@ -43,6 +43,13 @@ case "$FIRMWARE" in ;; esac ;; +"mediatek/mt7986_eeprom_mt7976_dual.bin") + case "$board" in + glinet,gl-mt6000) + caldata_extract_mmc "factory" 0x0 0x1000 + ;; + esac + ;; *) exit 1 ;; diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index 12f16e6027..5de4061c94 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -54,6 +54,11 @@ case "$board" in [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 1) > /sys${DEVPATH}/macaddress ;; + glinet,gl-mt6000) + addr=$(mmc_get_mac_binary factory 0x04) + [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress + ;; h3c,magic-nx30-pro) addr=$(mtd_get_mac_ascii pdt_data_1 ethaddr) [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index a9ec171a1b..c2a9c8f3b0 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -96,6 +96,11 @@ platform_do_upgrade() { cudy,wr3000-v1) default_do_upgrade "$1" ;; + glinet,gl-mt6000) + CI_KERNPART="kernel" + CI_ROOTPART="rootfs" + emmc_do_upgrade "$1" + ;; mercusys,mr90x-v1) CI_UBIPART="ubi0" nand_do_upgrade "$1" @@ -165,6 +170,7 @@ platform_copy_config() { ;; esac ;; + glinet,gl-mt6000|\ ubnt,unifi-6-plus) emmc_copy_config ;; diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 067b5f13b0..226908cd12 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -274,6 +274,21 @@ define Device/glinet_gl-mt3000 endef TARGET_DEVICES += glinet_gl-mt3000 +define Device/glinet_gl-mt6000 + DEVICE_VENDOR := GL.iNet + DEVICE_MODEL := GL-MT6000 + DEVICE_DTS := mt7986a-glinet-gl-mt6000 + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-usb2 kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs + IMAGES += factory.bin + IMAGE/factory.bin := append-kernel | pad-to 32M | append-rootfs + IMAGE/sysupgrade.bin := sysupgrade-tar | append-gl-metadata + ARTIFACTS := preloader.bin bl31-uboot.fip + ARTIFACT/preloader.bin := mt7986-bl2 emmc-ddr4 + ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot glinet_gl-mt6000 +endef +TARGET_DEVICES += glinet_gl-mt6000 + define Device/h3c_magic-nx30-pro DEVICE_VENDOR := H3C DEVICE_MODEL := Magic NX30 Pro From f3a8820959d1ae1361541a490507aae38348f954 Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Fri, 17 Nov 2023 23:27:03 +0800 Subject: [PATCH 08/12] mediatek: filogic: remove kmod-usb2 for GL-MT6000 The usb driver requires kmod-usb3, not kmod-usb2. Remove the useless kmod-usb2 from default package. Signed-off-by: Chukun Pan (cherry picked from commit b74ae695967942849b9f68c68d05217e1420dc1d) --- target/linux/mediatek/image/filogic.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 226908cd12..932bf616c3 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -279,7 +279,7 @@ define Device/glinet_gl-mt6000 DEVICE_MODEL := GL-MT6000 DEVICE_DTS := mt7986a-glinet-gl-mt6000 DEVICE_DTS_DIR := ../dts - DEVICE_PACKAGES := kmod-usb2 kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs + DEVICE_PACKAGES := e2fsprogs f2fsck mkf2fs kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware IMAGES += factory.bin IMAGE/factory.bin := append-kernel | pad-to 32M | append-rootfs IMAGE/sysupgrade.bin := sysupgrade-tar | append-gl-metadata From 6143b730fce6e27a1fd7c93b5300d752f5d13bee Mon Sep 17 00:00:00 2001 From: Jianhui Zhao Date: Tue, 10 Oct 2023 14:09:38 +0800 Subject: [PATCH 09/12] uboot-mediatek: fix typo in bootmenu for GL-MT6000 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes: b530d492a9d9 ("filogic: add support for GL.iNet GL-MT6000") Signed-off-by: Jianhui Zhao (cherry picked from commit 4536fb4c5c7b3564dae301529bb0ac4a3ce914b8) [rmilecki: fix commit hash in Fixes] Signed-off-by: Rafał Miłecki --- package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch index ad138acfd9..e0a059eb7b 100644 --- a/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch +++ b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch @@ -259,7 +259,7 @@ +bootmenu_0=Startup system (Default).=run boot_system +bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return +bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return -+bootmenu_3=mLoad BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_3=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return +bootmenu_4=Reboot.=reset +bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset +filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200 From cc285dc2b6f7699b689f8f9cb7ba582f176d921c Mon Sep 17 00:00:00 2001 From: Jianhui Zhao Date: Sun, 24 Sep 2023 22:15:00 +0800 Subject: [PATCH 10/12] generic: net: phy: realtek: add interrupt support for RTL8221B This commit introduces interrupt support for RTL8221B. Signed-off-by: Jianhui Zhao (cherry picked from commit 1db949a632607aa1df2987b7701da0be3e473260) --- ...ealtek-support-interrupt-of-RTL8221B.patch | 63 +++++++++++++++++++ ...ealtek-support-interrupt-of-RTL8221B.patch | 63 +++++++++++++++++++ 2 files changed, 126 insertions(+) create mode 100644 target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch create mode 100644 target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch diff --git a/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch new file mode 100644 index 0000000000..b2b41d9c61 --- /dev/null +++ b/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch @@ -0,0 +1,63 @@ +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -971,6 +971,51 @@ static int rtl8221b_config_init(struct p + return 0; + } + ++static int rtl8221b_ack_interrupt(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = phy_read_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d4); ++ ++ return (err < 0) ? err : 0; ++} ++ ++static int rtl8221b_config_intr(struct phy_device *phydev) ++{ ++ int err; ++ ++ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { ++ err = rtl8221b_ack_interrupt(phydev); ++ if (err) ++ return err; ++ ++ err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x7ff); ++ } else { ++ err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x0); ++ if (err) ++ return err; ++ ++ err = rtl8221b_ack_interrupt(phydev); ++ } ++ ++ return err; ++} ++ ++static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = rtl8221b_ack_interrupt(phydev); ++ if (err) { ++ phy_error(phydev); ++ return IRQ_NONE; ++ } ++ ++ phy_trigger_machine(phydev); ++ ++ return IRQ_HANDLED; ++} ++ + static struct phy_driver realtek_drvs[] = { + { + PHY_ID_MATCH_EXACT(0x00008201), +@@ -1119,6 +1164,8 @@ static struct phy_driver realtek_drvs[] + .get_features = rtl822x_get_features, + .config_init = rtl8221b_config_init, + .config_aneg = rtl822x_config_aneg, ++ .config_intr = rtl8221b_config_intr, ++ .handle_interrupt = rtl8221b_handle_interrupt, + .probe = rtl822x_probe, + .read_status = rtl822x_read_status, + .suspend = genphy_suspend, diff --git a/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch new file mode 100644 index 0000000000..55a9e3529d --- /dev/null +++ b/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch @@ -0,0 +1,63 @@ +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -979,6 +979,51 @@ static int rtl8221b_config_init(struct p + return 0; + } + ++static int rtl8221b_ack_interrupt(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = phy_read_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d4); ++ ++ return (err < 0) ? err : 0; ++} ++ ++static int rtl8221b_config_intr(struct phy_device *phydev) ++{ ++ int err; ++ ++ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { ++ err = rtl8221b_ack_interrupt(phydev); ++ if (err) ++ return err; ++ ++ err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x7ff); ++ } else { ++ err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x0); ++ if (err) ++ return err; ++ ++ err = rtl8221b_ack_interrupt(phydev); ++ } ++ ++ return err; ++} ++ ++static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = rtl8221b_ack_interrupt(phydev); ++ if (err) { ++ phy_error(phydev); ++ return IRQ_NONE; ++ } ++ ++ phy_trigger_machine(phydev); ++ ++ return IRQ_HANDLED; ++} ++ + static struct phy_driver realtek_drvs[] = { + { + PHY_ID_MATCH_EXACT(0x00008201), +@@ -1139,6 +1184,8 @@ static struct phy_driver realtek_drvs[] + .get_features = rtl822x_get_features, + .config_init = rtl8221b_config_init, + .config_aneg = rtl822x_config_aneg, ++ .config_intr = rtl8221b_config_intr, ++ .handle_interrupt = rtl8221b_handle_interrupt, + .probe = rtl822x_probe, + .read_status = rtl822x_read_status, + .suspend = genphy_suspend, From 5a0bdab24c0ff1e577669bc89cb8a277229780b8 Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Thu, 4 May 2023 23:10:03 +0800 Subject: [PATCH 11/12] mt76: drop default eeprom file for mt7986-firmware The mt76 driver usually reads the eeprom on the mtd partition at dts. For emmc device we need to use caldata_extract script to read the eeprom. However, the default eeprom file breaks the caldata script execution, so remove it. Signed-off-by: Chukun Pan (cherry picked from commit e3aa645b267ca4f08773b5366583e9b0020fc3e9) --- package/kernel/mt76/Makefile | 2 -- 1 file changed, 2 deletions(-) diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile index 78f01c119f..42075daecd 100644 --- a/package/kernel/mt76/Makefile +++ b/package/kernel/mt76/Makefile @@ -542,8 +542,6 @@ define KernelPackage/mt7986-firmware/install $(PKG_BUILD_DIR)/firmware/mt7986_wm.bin \ $(PKG_BUILD_DIR)/firmware/mt7986_rom_patch_mt7975.bin \ $(PKG_BUILD_DIR)/firmware/mt7986_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7975_dual.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7976_dual.bin \ $(1)/lib/firmware/mediatek endef From f8c149dcbd038f922c58050b9e7bbbf30edf7b41 Mon Sep 17 00:00:00 2001 From: Mikhail Zhilkin Date: Sat, 30 Sep 2023 14:07:15 +0000 Subject: [PATCH 12/12] mediatek: fix eeprom loading (Mercusys MR90X v1) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit mt76: drop default eeprom file for mt7986-firmware (e3aa645b267ca4f08773b5366583e9b0020fc3e9) breaks eeprom loading for Mercusys MR90X v1. As a result WiFi is not working at all. This commit adds Mercusus MR90x to the caldata script (it works after the commit mentioned above). And we can safely drop "81_fix_eeprom" script as it's no longer required. Fixes: 5a0bdab24c0f ("mt76: drop default eeprom file for mt7986-firmware") Signed-off-by: Mikhail Zhilkin (cherry picked from commit 85b0d7592c454f2e4e02be043a1e433c67df4e41) [rmilecki: fix commit hash in Fixes] Signed-off-by: Rafał Miłecki --- .../etc/hotplug.d/firmware/11-mt76-caldata | 8 ++++++++ .../filogic/base-files/lib/preinit/81_fix_eeprom | 16 ---------------- 2 files changed, 8 insertions(+), 16 deletions(-) delete mode 100644 target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata index 4f9b4dc170..e782637348 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata @@ -28,6 +28,14 @@ case "$FIRMWARE" in ;; esac ;; +"mediatek/mt7986_eeprom_mt7975_dual.bin") + case "$board" in + mercusys,mr90x-v1) + ln -sf /tmp/tp_data/MT7986_EEPROM.bin \ + /lib/firmware/$FIRMWARE + ;; + esac + ;; "mediatek/mt7986_eeprom_mt7976.bin") case "$board" in acer,predator-w6) diff --git a/target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom b/target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom deleted file mode 100644 index 0a842facca..0000000000 --- a/target/linux/mediatek/filogic/base-files/lib/preinit/81_fix_eeprom +++ /dev/null @@ -1,16 +0,0 @@ -. /lib/functions/system.sh - -preinit_fix_eeprom() { - case $(board_name) in - mercusys,mr90x-v1) - eeprom="/lib/firmware/mediatek/mt7986_eeprom_mt7975_dual.bin" - oem="/tmp/tp_data/MT7986_EEPROM.bin" - [ ! -L $eeprom -a -e $oem ] && \ - mv -f $eeprom $eeprom.bak && ln -s $oem $eeprom - ;; - *) - ;; - esac -} - -boot_hook_add preinit_main preinit_fix_eeprom