The rt305x series SOC have two UART devices, and the one at bus address 0x500 is disabled by default. Some boards do not even have a pinout for the first one, so use the same one that the kernel uses at 0xc00 instead. This allows the lzma-loader printing to be visible alongside the kernel log in the same console. Tested-by: Lech Perczak <lech.perczak@gmail.com> # zte,mf283plus Signed-off-by: Michael Pratt <mcpratt@pm.me>
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
/*
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* Arch specific code for ramips based boards
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*
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* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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* Copyright (C) 2018 Tobias Schramm <tobleminer@gmail.com>
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* Copyright (C) 2023 Antonio Vázquez <antoniovazquezblanco@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <stdint.h>
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#include <stddef.h>
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#define KSEG0 0x80000000
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#define KSEG1 0xa0000000
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#define _ATYPE_ __PTRDIFF_TYPE__
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#define _ATYPE32_ int
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#define _ACAST32_ (_ATYPE_)(_ATYPE32_)
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#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
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#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
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#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
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#define UART_LSR_THRE 0x20
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#define UART_LSR_TEMT 0x40
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#if defined(SOC_MT7620) || defined(SOC_RT3883)
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#define UART_BASE KSEG1ADDR(0x10000c00)
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#define UART_THR (UART_BASE + 0x04)
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#define UART_LSR (UART_BASE + 0x1c)
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#define UART_LSR_MASK UART_LSR_TEMT
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#elif defined(SOC_MT7621)
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#define UART_BASE KSEG1ADDR(0x1e000c00)
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#define UART_THR (UART_BASE + 0x00)
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#define UART_LSR (UART_BASE + 0x14)
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#define UART_LSR_MASK UART_LSR_THRE
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#elif defined(SOC_RT305X)
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#define UART_BASE KSEG1ADDR(0x10000c00)
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#define UART_THR (UART_BASE + 0x04)
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#define UART_LSR (UART_BASE + 0x1c)
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#define UART_LSR_MASK UART_LSR_THRE
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#else
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#error "Unsupported SOC..."
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#endif
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// Helper functions
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#define READREG(r) (*(volatile uint32_t *)(r))
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#define WRITEREG(r,v) (*(volatile uint32_t *)(r)) = v
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void board_init(void)
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{
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}
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void board_putc(int ch)
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{
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while ((READREG(UART_LSR) & UART_LSR_MASK) == 0);
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WRITEREG(UART_THR, ch);
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while ((READREG(UART_LSR) & UART_LSR_MASK) == 0);
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}
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