Files
openwrt/target/linux
Shiji Yang 8d4c22a956 ath79: add missing clock name strings in SoC dtsi
For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2022-11-09 22:55:33 +01:00
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