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rockchip: backport latest rk3588 dt patches

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2024-05-01 13:55:23 +08:00
parent f379a45efc
commit 1b53b6d0d2
30 changed files with 658 additions and 36 deletions
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27
target/linux/rockchip/patches-6.6/050-07-v6.7-arm64-dts-rockchip-drop-interrupt-names-property-from.patch Normal file
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@@ -0,0 +1,27 @@
From 815f986f33eeb06652d59d8a4d405d4fdb4e59a8 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko.stuebner@cherry.de>
Date: Fri, 1 Dec 2023 14:48:59 +0100
Subject: [PATCH] arm64: dts: rockchip: drop interrupt-names property from
rk3588s dfi
The dfi binding does not specify interrupt names, with the interrupts
just specifying channels 0-x. So drop the unspecified property.
Fixes: 5a6976b1040a ("arm64: dts: rockchip: Add DFI to rk3588s")
Reported-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Link: https://lore.kernel.org/r/20231201134859.322491-1-heiko@sntech.de
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1 -
1 file changed, 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1363,7 +1363,6 @@
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "ch0", "ch1", "ch2", "ch3";
rockchip,pmu = <&pmu1grf>;
};

0
target/linux/rockchip/patches-6.6/050-07-v6.8-arm64-dts-rockchip-move-rk3588-serial-aliases-to-soc-dtsi.patch → target/linux/rockchip/patches-6.6/050-08-v6.8-arm64-dts-rockchip-move-rk3588-serial-aliases-to-soc-dtsi.patch
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0
target/linux/rockchip/patches-6.6/050-08-v6.8-arm64-dts-rockchip-add-rk3588-i2c-aliases-to-soc-dtsi.patch → target/linux/rockchip/patches-6.6/050-09-v6.8-arm64-dts-rockchip-add-rk3588-i2c-aliases-to-soc-dtsi.patch
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0
target/linux/rockchip/patches-6.6/050-09-v6.8-arm64-dts-rockchip-add-rk3588-gpio-aliases-to-soc-dtsi.patch → target/linux/rockchip/patches-6.6/050-10-v6.8-arm64-dts-rockchip-add-rk3588-gpio-aliases-to-soc-dtsi.patch
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0
target/linux/rockchip/patches-6.6/050-10-v6.8-arm64-dts-rockchip-add-rk3588-spi-aliases-to-soc-dtsi.patch → target/linux/rockchip/patches-6.6/050-11-v6.8-arm64-dts-rockchip-add-rk3588-spi-aliases-to-soc-dtsi.patch
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0
target/linux/rockchip/patches-6.6/050-11-v6.8-arm64-dts-rockchip-Add-vop-on-rk3588.patch → target/linux/rockchip/patches-6.6/050-12-v6.8-arm64-dts-rockchip-Add-vop-on-rk3588.patch
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51
target/linux/rockchip/patches-6.6/050-13-v6.9-arm64-dts-rockchip-Add-HDMI0-PHY-to-rk3588.patch Normal file
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@@ -0,0 +1,51 @@
From 11d28971aaaf5de6f50790fb21f1113fee21d320 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 19 Feb 2024 22:46:25 +0200
Subject: [PATCH] arm64: dts: rockchip: Add HDMI0 PHY to rk3588
Add DT nodes for HDMI0 PHY and related syscon found on RK3588 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240219204626.284399-1-cristian.ciocaltea@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -586,6 +586,11 @@
};
};
+ hdptxphy0_grf: syscon@fd5e0000 {
+ compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";
+ reg = <0x0 0xfd5e0000 0x0 0x100>;
+ };
+
ioc: syscon@fd5f0000 {
compatible = "rockchip,rk3588-ioc", "syscon";
reg = <0x0 0xfd5f0000 0x0 0x10000>;
@@ -2358,6 +2363,22 @@
#dma-cells = <1>;
};
+ hdptxphy_hdmi0: phy@fed60000 {
+ compatible = "rockchip,rk3588-hdptx-phy";
+ reg = <0x0 0xfed60000 0x0 0x2000>;
+ clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
+ clock-names = "ref", "apb";
+ #phy-cells = <0>;
+ resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>,
+ <&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>,
+ <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,
+ <&cru SRST_HDPTX0_LCPLL>;
+ reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
+ "lcpll";
+ rockchip,grf = <&hdptxphy0_grf>;
+ status = "disabled";
+ };
+
combphy0_ps: phy@fee00000 {
compatible = "rockchip,rk3588-naneng-combphy";
reg = <0x0 0xfee00000 0x0 0x100>;

0
target/linux/rockchip/patches-6.6/050-12-v6.9-arm64-dts-rockchip-add-clock-to-vo1-grf-syscon-on-rk3588.patch → target/linux/rockchip/patches-6.6/050-14-v6.9-arm64-dts-rockchip-add-clock-to-vo1-grf-syscon-on-rk3588.patch
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81
target/linux/rockchip/patches-6.6/050-15-v6.10-arm64-dts-rockchip-Add-rk3588-GPU-node.patch Normal file
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@@ -0,0 +1,81 @@
From 6fca4edb93d335f29f81e484936f38a5eed6a9b1 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Tue, 26 Mar 2024 17:52:06 +0100
Subject: [PATCH] arm64: dts: rockchip: Add rk3588 GPU node
Add Mali GPU Node to the RK3588 SoC DT including GPU clock
operating points
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240326165232.73585-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 56 +++++++++++++++++++++++
1 file changed, 56 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -480,6 +480,62 @@
status = "disabled";
};
+ gpu: gpu@fb000000 {
+ compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
+ reg = <0x0 0xfb000000 0x0 0x200000>;
+ #cooling-cells = <2>;
+ assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
+ assigned-clock-rates = <200000000>;
+ clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
+ <&cru CLK_GPU_STACKS>;
+ clock-names = "core", "coregroup", "stacks";
+ dynamic-power-coefficient = <2982>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "job", "mmu", "gpu";
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power RK3588_PD_GPU>;
+ status = "disabled";
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <675000 675000 850000>;
+ };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <675000 675000 850000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <675000 675000 850000>;
+ };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <675000 675000 850000>;
+ };
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <700000 700000 850000>;
+ };
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <750000 750000 850000>;
+ };
+ opp-900000000 {
+ opp-hz = /bits/ 64 <900000000>;
+ opp-microvolt = <800000 800000 850000>;
+ };
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <850000 850000 850000>;
+ };
+ };
+ };
+
pmu1grf: syscon@fd58a000 {
compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfd58a000 0x0 0x10000>;

360
target/linux/rockchip/patches-6.6/050-16-v6.10-arm64-dts-rockchip-Fix-ordering-of-nodes-on-rk3588s.patch Normal file
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@@ -0,0 +1,360 @@
From cbb97fe18e299ece1c0074924c630de6a19b320f Mon Sep 17 00:00:00 2001
From: Diederik de Haas <didi.debian@cknow.org>
Date: Sat, 6 Apr 2024 19:28:04 +0200
Subject: [PATCH] arm64: dts: rockchip: Fix ordering of nodes on rk3588s
Fix the ordering of the main nodes by sorting them alphabetically and
then the ones with a memory address sequentially by that address.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20240406172821.34173-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 304 +++++++++++-----------
1 file changed, 152 insertions(+), 152 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -347,6 +347,11 @@
};
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop_out>;
+ };
+
firmware {
optee: optee {
compatible = "linaro,optee-tz";
@@ -394,11 +399,6 @@
#clock-cells = <0>;
};
- display_subsystem: display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vop_out>;
- };
-
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -436,50 +436,6 @@
};
};
- usb_host0_ehci: usb@fc800000 {
- compatible = "rockchip,rk3588-ehci", "generic-ehci";
- reg = <0x0 0xfc800000 0x0 0x40000>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
- phys = <&u2phy2_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host0_ohci: usb@fc840000 {
- compatible = "rockchip,rk3588-ohci", "generic-ohci";
- reg = <0x0 0xfc840000 0x0 0x40000>;
- interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
- phys = <&u2phy2_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host1_ehci: usb@fc880000 {
- compatible = "rockchip,rk3588-ehci", "generic-ehci";
- reg = <0x0 0xfc880000 0x0 0x40000>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
- phys = <&u2phy3_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host1_ohci: usb@fc8c0000 {
- compatible = "rockchip,rk3588-ohci", "generic-ohci";
- reg = <0x0 0xfc8c0000 0x0 0x40000>;
- interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
- phys = <&u2phy3_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
gpu: gpu@fb000000 {
compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
reg = <0x0 0xfb000000 0x0 0x200000>;
@@ -536,6 +492,50 @@
};
};
+ usb_host0_ehci: usb@fc800000 {
+ compatible = "rockchip,rk3588-ehci", "generic-ehci";
+ reg = <0x0 0xfc800000 0x0 0x40000>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
+ phys = <&u2phy2_host>;
+ phy-names = "usb";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
+ usb_host0_ohci: usb@fc840000 {
+ compatible = "rockchip,rk3588-ohci", "generic-ohci";
+ reg = <0x0 0xfc840000 0x0 0x40000>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
+ phys = <&u2phy2_host>;
+ phy-names = "usb";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
+ usb_host1_ehci: usb@fc880000 {
+ compatible = "rockchip,rk3588-ehci", "generic-ehci";
+ reg = <0x0 0xfc880000 0x0 0x40000>;
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
+ phys = <&u2phy3_host>;
+ phy-names = "usb";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
+ usb_host1_ohci: usb@fc8c0000 {
+ compatible = "rockchip,rk3588-ohci", "generic-ohci";
+ reg = <0x0 0xfc8c0000 0x0 0x40000>;
+ interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
+ phys = <&u2phy3_host>;
+ phy-names = "usb";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
pmu1grf: syscon@fd58a000 {
compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfd58a000 0x0 0x10000>;
@@ -702,74 +702,6 @@
status = "disabled";
};
- vop: vop@fdd90000 {
- compatible = "rockchip,rk3588-vop";
- reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;
- reg-names = "vop", "gamma-lut";
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_VOP>,
- <&cru HCLK_VOP>,
- <&cru DCLK_VOP0>,
- <&cru DCLK_VOP1>,
- <&cru DCLK_VOP2>,
- <&cru DCLK_VOP3>,
- <&cru PCLK_VOP_ROOT>;
- clock-names = "aclk",
- "hclk",
- "dclk_vp0",
- "dclk_vp1",
- "dclk_vp2",
- "dclk_vp3",
- "pclk_vop";
- iommus = <&vop_mmu>;
- power-domains = <&power RK3588_PD_VOP>;
- rockchip,grf = <&sys_grf>;
- rockchip,vop-grf = <&vop_grf>;
- rockchip,vo1-grf = <&vo1_grf>;
- rockchip,pmu = <&pmu>;
- status = "disabled";
-
- vop_out: ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- vp0: port@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- };
-
- vp1: port@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- };
-
- vp2: port@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <2>;
- };
-
- vp3: port@3 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <3>;
- };
- };
- };
-
- vop_mmu: iommu@fdd97e00 {
- compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
- reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3588_PD_VOP>;
- status = "disabled";
- };
-
uart0: serial@fd890000 {
compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
reg = <0x0 0xfd890000 0x0 0x100>;
@@ -1140,6 +1072,87 @@
};
};
+ av1d: video-codec@fdc70000 {
+ compatible = "rockchip,rk3588-av1-vpu";
+ reg = <0x0 0xfdc70000 0x0 0x800>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "vdpu";
+ assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
+ assigned-clock-rates = <400000000>, <400000000>;
+ clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3588_PD_AV1>;
+ resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
+ };
+
+ vop: vop@fdd90000 {
+ compatible = "rockchip,rk3588-vop";
+ reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;
+ reg-names = "vop", "gamma-lut";
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP>,
+ <&cru HCLK_VOP>,
+ <&cru DCLK_VOP0>,
+ <&cru DCLK_VOP1>,
+ <&cru DCLK_VOP2>,
+ <&cru DCLK_VOP3>,
+ <&cru PCLK_VOP_ROOT>;
+ clock-names = "aclk",
+ "hclk",
+ "dclk_vp0",
+ "dclk_vp1",
+ "dclk_vp2",
+ "dclk_vp3",
+ "pclk_vop";
+ iommus = <&vop_mmu>;
+ power-domains = <&power RK3588_PD_VOP>;
+ rockchip,grf = <&sys_grf>;
+ rockchip,vop-grf = <&vop_grf>;
+ rockchip,vo1-grf = <&vo1_grf>;
+ rockchip,pmu = <&pmu>;
+ status = "disabled";
+
+ vop_out: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vp0: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ vp1: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ vp2: port@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ vp3: port@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+ };
+
+ vop_mmu: iommu@fdd97e00 {
+ compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
+ reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+ clock-names = "aclk", "iface";
+ #iommu-cells = <0>;
+ power-domains = <&power RK3588_PD_VOP>;
+ status = "disabled";
+ };
+
i2s4_8ch: i2s@fddc0000 {
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddc0000 0x0 0x1000>;
@@ -1431,6 +1444,16 @@
reg = <0x0 0xfdf82200 0x0 0x20>;
};
+ dfi: dfi@fe060000 {
+ reg = <0x00 0xfe060000 0x00 0x10000>;
+ compatible = "rockchip,rk3588-dfi";
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
+ rockchip,pmu = <&pmu1grf>;
+ };
+
pcie2x1l1: pcie@fe180000 {
compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
bus-range = <0x30 0x3f>;
@@ -1533,16 +1556,6 @@
};
};
- dfi: dfi@fe060000 {
- reg = <0x00 0xfe060000 0x00 0x10000>;
- compatible = "rockchip,rk3588-dfi";
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
- rockchip,pmu = <&pmu1grf>;
- };
-
gmac1: ethernet@fe1c0000 {
compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
reg = <0x0 0xfe1c0000 0x0 0x10000>;
@@ -2543,19 +2556,6 @@
#interrupt-cells = <2>;
};
};
-
- av1d: video-codec@fdc70000 {
- compatible = "rockchip,rk3588-av1-vpu";
- reg = <0x0 0xfdc70000 0x0 0x800>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vdpu";
- assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
- assigned-clock-rates = <400000000>, <400000000>;
- clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
- clock-names = "aclk", "hclk";
- power-domains = <&power RK3588_PD_AV1>;
- resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
- };
};
#include "rk3588s-pinctrl.dtsi"

4
target/linux/rockchip/patches-6.6/050-13-v6.10-arm64-dts-rockchip-fix-usb2phy-nodename-for-rk3588.patch → target/linux/rockchip/patches-6.6/050-17-v6.10-arm64-dts-rockchip-fix-usb2phy-nodename-for-rk3588.patch
View File

@@ -15,7 +15,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -543,7 +543,7 @@
@@ -599,7 +599,7 @@
#address-cells = <1>;
#size-cells = <1>;
@@ -24,7 +24,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
compatible = "rockchip,rk3588-usb2phy";
reg = <0x8000 0x10>;
interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -568,7 +568,7 @@
@@ -624,7 +624,7 @@
#address-cells = <1>;
#size-cells = <1>;

4
target/linux/rockchip/patches-6.6/050-14-v6.10-arm64-dts-rockchip-reorder-usb2phy-properties-for-rk3588.patch → target/linux/rockchip/patches-6.6/050-18-v6.10-arm64-dts-rockchip-reorder-usb2phy-properties-for-rk3588.patch
View File

@@ -15,7 +15,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -546,13 +546,13 @@
@@ -602,13 +602,13 @@
u2phy2: usb2phy@8000 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0x8000 0x10>;
@@ -33,7 +33,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
status = "disabled";
u2phy2_host: host-port {
@@ -571,13 +571,13 @@
@@ -627,13 +627,13 @@
u2phy3: usb2phy@c000 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0xc000 0x10>;

8
target/linux/rockchip/patches-6.6/050-15-v6.10-arm64-dts-rockchip-add-USBDP-phys-on-rk3588.patch → target/linux/rockchip/patches-6.6/050-19-v6.10-arm64-dts-rockchip-add-USBDP-phys-on-rk3588.patch
View File

@@ -83,7 +83,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
reg = <0x0 0xfee10000 0x0 0x100>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -516,12 +516,23 @@
@@ -572,12 +572,23 @@
reg = <0x0 0xfd5a4000 0x0 0x2000>;
};
@@ -107,7 +107,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
php_grf: syscon@fd5b0000 {
compatible = "rockchip,rk3588-php-grf", "syscon";
reg = <0x0 0xfd5b0000 0x0 0x1000>;
@@ -537,6 +548,36 @@
@@ -593,6 +604,36 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
@@ -144,8 +144,8 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
usb2phy2_grf: syscon@fd5d8000 {
compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5d8000 0x0 0x4000>;
@@ -2360,6 +2401,28 @@
#dma-cells = <1>;
@@ -2449,6 +2490,28 @@
status = "disabled";
};
+ usbdp_phy0: phy@fed80000 {

2
target/linux/rockchip/patches-6.6/050-16-v6.10-arm64-dts-rockchip-add-USB3-DRD-controllers-on-rk3588.patch → target/linux/rockchip/patches-6.6/050-20-v6.10-arm64-dts-rockchip-add-USB3-DRD-controllers-on-rk3588.patch
View File

@@ -44,7 +44,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
reg = <0x0 0xfd5b8000 0x0 0x10000>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -436,6 +436,28 @@
@@ -492,6 +492,28 @@
};
};

74
target/linux/rockchip/patches-6.6/051-05-v6.10-arm64-dts-rockchip-Enable-GPU-on-rk3588-evb1.patch Normal file
View File

@@ -0,0 +1,74 @@
From 75a287219a782951e671026ed4fbe611e4629c83 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Tue, 26 Mar 2024 17:52:08 +0100
Subject: [PATCH] arm64: dts: rockchip: Enable GPU on rk3588-evb1
Enable the Mali GPU in the RK3588 EVB1.
This marks the GPU regulators as always-on, because the generic
coupler regulator logic from the kernel can only handle them
when they are marked as always-on. Technically it's okay to
disable the regulators, when the GPU is not used.
Considering the RK3588 EVB1 is not battery powered, the slightly
increased power consumption for keeping the regulator always
enabled is not a big deal. Thus it's better to enable GPU support
than wait for a better solution.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240326165232.73585-5-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -223,6 +223,12 @@
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ sram-supply = <&vdd_gpu_mem_s0>;
+ status = "okay";
+};
+
&i2c2 {
status = "okay";
@@ -386,12 +392,16 @@
regulators {
vdd_gpu_s0: dcdc-reg1 {
+ /* regulator coupling requires always-on */
+ regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_gpu_s0";
regulator-enable-ramp-delay = <400>;
+ regulator-coupled-with = <&vdd_gpu_mem_s0>;
+ regulator-coupled-max-spread = <10000>;
regulator-state-mem {
regulator-off-in-suspend;
};
@@ -436,12 +446,16 @@
};
vdd_gpu_mem_s0: dcdc-reg5 {
+ /* regulator coupling requires always-on */
+ regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-enable-ramp-delay = <400>;
regulator-name = "vdd_gpu_mem_s0";
+ regulator-coupled-with = <&vdd_gpu_s0>;
+ regulator-coupled-max-spread = <10000>;
regulator-state-mem {
regulator-off-in-suspend;
};

8
target/linux/rockchip/patches-6.6/051-05-v6.10-arm64-dts-rockchip-add-USB3-to-rk3588-evb1.patch → target/linux/rockchip/patches-6.6/051-06-v6.10-arm64-dts-rockchip-add-USB3-to-rk3588-evb1.patch
View File

@@ -42,7 +42,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -226,6 +239,59 @@
@@ -232,6 +245,59 @@
&i2c2 {
status = "okay";
@@ -102,7 +102,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
@@ -312,6 +378,16 @@
@@ -318,6 +384,16 @@
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -119,7 +119,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
};
&pwm2 {
@@ -944,6 +1020,22 @@
@@ -958,6 +1034,22 @@
status = "okay";
};
@@ -142,7 +142,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
&u2phy2 {
status = "okay";
};
@@ -982,3 +1074,58 @@
@@ -996,3 +1088,58 @@
&usb_host1_ohci {
status = "okay";
};

29
target/linux/rockchip/patches-6.6/053-12-v6.10-arm64-dts-rockchip-Enable-GPU-on-rk3588-rock5b.patch Normal file
View File

@@ -0,0 +1,29 @@
From 038347286941148b6fd0cc2c40afcd540315aa6f Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Tue, 26 Mar 2024 17:52:07 +0100
Subject: [PATCH] arm64: dts: rockchip: Enable GPU on rk3588-rock5b
Enable the Mali GPU in the Rock 5B.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240326165232.73585-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -180,6 +180,11 @@
cpu-supply = <&vdd_cpu_lit_s0>;
};
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;

6
target/linux/rockchip/patches-6.6/053-12-v6.10-arm64-dts-rockchip-add-lower-USB3-port-to-rock-5b.patch → target/linux/rockchip/patches-6.6/053-13-v6.10-arm64-dts-rockchip-add-lower-USB3-port-to-rock-5b.patch
View File

@@ -15,7 +15,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -743,6 +743,14 @@
@@ -748,6 +748,14 @@
status = "okay";
};
@@ -30,7 +30,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
&u2phy2 {
status = "okay";
};
@@ -762,6 +770,10 @@
@@ -767,6 +775,10 @@
status = "okay";
};
@@ -41,7 +41,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
&usb_host0_ehci {
status = "okay";
};
@@ -778,6 +790,11 @@
@@ -783,6 +795,11 @@
status = "okay";
};

2
target/linux/rockchip/patches-6.6/056-02-v6.9-arm64-dts-rockchip-remove-redundant-cd-gpios-from-rk3588.patch
View File

@@ -35,7 +35,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
no-sdio;
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -378,7 +378,6 @@
@@ -383,7 +383,6 @@
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;

4
target/linux/rockchip/patches-6.6/103-arm64-dts-rockchip-lower-mmc-speed.patch
View File

@@ -57,7 +57,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -370,8 +370,7 @@
@@ -375,8 +375,7 @@
no-sdio;
no-sd;
non-removable;
@@ -67,7 +67,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
};
@@ -383,7 +382,7 @@
@@ -388,7 +387,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;

4
target/linux/rockchip/patches-6.6/120-01-arm64-dts-rockchip-rk3588-add-cpu-frequency-scaling.patch
View File

@@ -306,7 +306,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
i-cache-size = <65536>;
i-cache-line-size = <64>;
@@ -399,6 +617,230 @@
ports = <&vop_out>;
#clock-cells = <0>;
};
+ thermal_zones: thermal-zones {
@@ -536,7 +536,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -555,6 +997,16 @@
@@ -611,6 +1053,16 @@
reg = <0x0 0xfd5ac000 0x0 0x4000>;
};

2
target/linux/rockchip/patches-6.6/120-06-arm64-dts-rockchip-enable-RK3588-tsadc-by-default.patch
View File

@@ -12,7 +12,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2740,7 +2740,6 @@
@@ -2813,7 +2813,6 @@
pinctrl-1 = <&tsadc_shut>;
pinctrl-names = "gpio", "otpout";
#thermal-sensor-cells = <1>;

2
target/linux/rockchip/patches-6.6/121-01-arm64-dts-rockchip-rk3588-evb1-add-cpu-regulator-info.patch
View File

@@ -35,7 +35,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
@@ -1054,6 +1069,10 @@
@@ -1068,6 +1083,10 @@
status = "okay";
};

2
target/linux/rockchip/patches-6.6/123-05-arm64-dts-rockchip-rock5b-add-cpu-mem-regulator-info.patch
View File

@@ -55,4 +55,4 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
};
&i2c0 {
&gpu {

10
target/linux/rockchip/patches-6.6/123-07-arm64-dts-rockchip-rk3588-rock5b-add-USB-C-support.patch
View File

@@ -51,7 +51,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
@@ -232,6 +243,61 @@
@@ -237,6 +248,61 @@
};
};
@@ -113,7 +113,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&i2c6 {
status = "okay";
@@ -361,6 +427,10 @@
@@ -366,6 +432,10 @@
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -124,7 +124,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
};
@@ -753,6 +823,14 @@
@@ -758,6 +828,14 @@
status = "okay";
};
@@ -139,7 +139,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&u2phy1 {
status = "okay";
};
@@ -784,6 +862,29 @@
@@ -789,6 +867,29 @@
status = "okay";
};
@@ -169,7 +169,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&usb_host0_ehci {
status = "okay";
};
@@ -792,6 +897,20 @@
@@ -797,6 +898,20 @@
status = "okay";
};

4
target/linux/rockchip/patches-6.6/124-02-arm64-dts-rockchip-nanopc-t6-add-lower-USB3-port.patch
View File

@@ -63,7 +63,7 @@
&u2phy2 {
status = "okay";
};
@@ -939,6 +974,10@@
@@ -939,6 +974,10 @@
status = "okay";
};
@@ -74,7 +74,7 @@
&usb_host0_ehci {
status = "okay";
};
@@ -954,3 +997,7 @@
@@ -954,3 +993,7 @@
&usb_host1_ohci {
status = "okay";
};

2
target/linux/rockchip/patches-6.6/124-03-arm64-dts-rockchip-nanopc-t6-add-USB-C-support.patch
View File

@@ -101,7 +101,7 @@
&usbdp_phy1 {
status = "okay";
};
@@ -990,6 +1067,21 @@
@@ -986,6 +1059,21 @@
status = "okay";
};

4
target/linux/rockchip/patches-6.6/603-net-ethernet-stmmac-add-devname-configuration-from-OF.patch
View File

@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7361,6 +7361,7 @@ int stmmac_dvr_probe(struct device *devi
@@ -7354,6 +7354,7 @@ int stmmac_dvr_probe(struct device *devi
{
struct net_device *ndev = NULL;
struct stmmac_priv *priv;
@@ -8,7 +8,7 @@
u32 rxq;
int i, ret = 0;
@@ -7369,6 +7370,9 @@ int stmmac_dvr_probe(struct device *devi
@@ -7362,6 +7363,9 @@ int stmmac_dvr_probe(struct device *devi
if (!ndev)
return -ENOMEM;

2
target/linux/rockchip/patches-6.6/801-05-arm64-dts-rockchip-rk3588s-add-rng-node.patch
View File

@@ -11,7 +11,7 @@ Change-Id: Ifb8964053daa6b593dd2c2c6a3b8caab8526e56d
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2155,6 +2155,16 @@
@@ -2228,6 +2228,16 @@
status = "disabled";
};

2
target/linux/rockchip/patches-6.6/801-06-arm64-dts-rockchip-rk3588s-rng-use-scmi_clk.patch
View File

@@ -14,7 +14,7 @@ Change-Id: I49994529fcc209c2bc173c1abc497536fb920302
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2159,7 +2159,7 @@
@@ -2232,7 +2232,7 @@
compatible = "rockchip,trngv1";
reg = <0x0 0xfe378000 0x0 0x200>;
interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;