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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-02-02 19:45:33 +08:00
parent 0f2088d9ab 69890e16b3
commit 2d97143148
57 changed files with 1285 additions and 368 deletions
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6
include/version.mk
View File

@@ -18,6 +18,7 @@ PKG_CONFIG_DEPENDS += \
CONFIG_VERSION_MANUFACTURER_URL \
CONFIG_VERSION_PRODUCT \
CONFIG_VERSION_SUPPORT_URL \
CONFIG_VERSION_FIRMWARE_URL \
CONFIG_VERSION_HWREV \
sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
@@ -50,6 +51,9 @@ VERSION_HOME_URL:=$(if $(VERSION_HOME_URL),$(VERSION_HOME_URL),https://immortalw
VERSION_SUPPORT_URL:=$(call qstrip,$(CONFIG_VERSION_SUPPORT_URL))
VERSION_SUPPORT_URL:=$(if $(VERSION_SUPPORT_URL),$(VERSION_SUPPORT_URL),https://github.com/immortalwrt/immortalwrt/discussions)
VERSION_FIRMWARE_URL:=$(call qstrip,$(CONFIG_VERSION_FIRMWARE_URL))
VERSION_FIRMWARE_URL:=$(if $(VERSION_FIRMWARE_URL),$(VERSION_FIRMWARE_URL),https://downloads.immortalwrt.org/)
VERSION_PRODUCT:=$(call qstrip,$(CONFIG_VERSION_PRODUCT))
VERSION_PRODUCT:=$(if $(VERSION_PRODUCT),$(VERSION_PRODUCT),Generic)
@@ -103,7 +107,7 @@ VERSION_SED_SCRIPT:=$(SED) 's,%U,$(call sed_escape,$(VERSION_REPO)),g' \
-e 's,%b,$(call sed_escape,$(VERSION_BUG_URL)),g' \
-e 's,%u,$(call sed_escape,$(VERSION_HOME_URL)),g' \
-e 's,%s,$(call sed_escape,$(VERSION_SUPPORT_URL)),g' \
-e 's,%f,$(call sed_escape,$(VERSION_FIRMWARE_URL)),g' \
-e 's,%P,$(call sed_escape,$(VERSION_PRODUCT)),g' \
-e 's,%h,$(call sed_escape,$(VERSION_HWREV)),g' \
-e 's,%B,$(call sed_escape,$(SOURCE_DATE_EPOCH)),g'

4
package/base-files/files/sbin/sysupgrade
View File

@@ -20,6 +20,7 @@ CONF_IMAGE=
CONF_BACKUP_LIST=0
CONF_BACKUP=
CONF_RESTORE=
USE_CURR_PART=0
NEED_IMAGE=
HELP=0
TEST=0
@@ -50,6 +51,7 @@ while [ -n "$1" ]; do
-r|--restore-backup) CONF_RESTORE="$2" NEED_IMAGE=1; shift;;
-l|--list-backup) CONF_BACKUP_LIST=1;;
-f) CONF_IMAGE="$2"; shift;;
-s) USE_CURR_PART=1;;
-F|--force) export FORCE=1;;
-T|--test) TEST=1;;
-h|--help) HELP=1; break;;
@@ -79,6 +81,7 @@ upgrade-option:
-p do not attempt to restore the partition table after flash.
-k include in backup a list of current installed packages at
$INSTALLED_PACKAGES
-s stay on current partition (for dual firmware devices)
-T | --test
Verify image and config .tar.gz but do not actually flash.
-F | --force
@@ -424,6 +427,7 @@ else
json_add_string command "$COMMAND"
json_add_object options
json_add_int save_partitions "$SAVE_PARTITIONS"
[ $USE_CURR_PART -eq 1 ] && json_add_boolean use_curr_part 1
json_close_object
ubus call system sysupgrade "$(json_dump)"

1
package/base-files/files/usr/lib/os-release
View File

@@ -7,6 +7,7 @@ VERSION_ID="%v"
HOME_URL="%u"
BUG_URL="%b"
SUPPORT_URL="%s"
FIRMWARE_URL="%f"
BUILD_ID="%R"
OPENWRT_BOARD="%S"
OPENWRT_ARCH="%A"

6
package/base-files/image-config.in
View File

@@ -241,6 +241,12 @@ if VERSIONOPT
help
This an URL to provide users seeking support
config VERSION_FIRMWARE_URL
string
prompt "Firmware URL"
help
This is an URL to provide users for downloading firmware
config VERSION_PRODUCT
string
prompt "Product name"

2
package/boot/kexec-tools/Makefile
View File

@@ -24,7 +24,7 @@ include $(INCLUDE_DIR)/package.mk
define Package/kexec-tools/Default
SECTION:=utils
CATEGORY:=Utilities
URL:=http://kernel.org/pub/linux/kernel/people/horms/kexec-tools/
URL:=https://github.com/horms/kexec-tools
endef
define Package/kexec-tools

1
package/boot/uboot-envtools/files/qualcommax_ipq60xx
View File

@@ -29,6 +29,7 @@ tplink,eap610-outdoor)
idx="$(find_mtd_index 0:appsblenv)"
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
;;
yuncore,fap650)
idx="$(find_mtd_index 0:appsblenv)"
[ -n "$idx" ] && \

4
package/libs/wolfssl/Makefile
View File

@@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=wolfssl
PKG_VERSION:=5.7.2
PKG_VERSION:=5.7.6
PKG_REAL_VERSION:=$(PKG_VERSION)-stable
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
PKG_HASH:=52b1e439e30d1ed8162a16308a8525a862183b67aa30373b11166ecbab000d63
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)

2
package/libs/wolfssl/patches/100-disable-hardening-check.patch
View File

@@ -1,6 +1,6 @@
--- a/wolfssl/wolfcrypt/settings.h
+++ b/wolfssl/wolfcrypt/settings.h
@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
@@ -3722,7 +3722,7 @@ extern void uITRON4_free(void *p) ;
/* warning for not using harden build options (default with ./configure) */
/* do not warn if big integer support is disabled */

2
package/network/services/dnsmasq/Makefile
View File

@@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=dnsmasq
PKG_UPSTREAM_VERSION:=2.90
PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/

98
package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch Normal file
View File

@@ -0,0 +1,98 @@
From 8ce27433f8b2e17c557cb55e4f16941d309deeac Mon Sep 17 00:00:00 2001
From: Simon Kelley <simon@thekelleys.org.uk>
Date: Fri, 17 Jan 2025 17:49:29 +0000
Subject: [PATCH] Handle DS queries to auth zones.
Origin: upstream, v2.91test8
When dnsmasq is configured to act as an authoritative server and has
an authoritative zone configured, and recieves a query for
that zone _as_forwarder_ it answers the query directly rather
than forwarding it. This doesn't affect the answer, but it
saves dnsmasq forwarding the query to the recusor upstream,
whch then bounces it back to dnsmasq in auth mode. The
exception should be when the query is for the root of zone, for a DS
RR. The answer to that has to come from the parent, via the
recursor, and will typically be a proof-of-nonexistence since
dnsmasq doesn't support signed zones. This patch suppresses
local answers and forces forwarding to the upstream recursor
for such queries. It stops breakage when a DNSSEC validating
client makes queries to dnsmasq acting as forwarder for a zone
for which it is authoritative.
[ukleinek: drop changes to CHANGELOG to prevent conflicts]
---
src/forward.c | 52 +++++++++++++++++++++++++++++++++++++--------------
1 file changed, 38 insertions(+), 14 deletions(-)
--- a/src/forward.c
+++ b/src/forward.c
@@ -1744,15 +1744,27 @@ void receive_query(struct listener *list
#endif
#ifdef HAVE_AUTH
- /* find queries for zones we're authoritative for, and answer them directly */
+ /* Find queries for zones we're authoritative for, and answer them directly.
+ The exception to this is DS queries for the zone route. They
+ have to come from the parent zone. Since dnsmasq's auth server
+ can't do DNSSEC, the zone will be unsigned, and anything using
+ dnsmasq as a forwarder and doing validation will be expecting to
+ see the proof of non-existence from the parent. */
if (!auth_dns && !option_bool(OPT_LOCALISE))
for (zone = daemon->auth_zones; zone; zone = zone->next)
- if (in_zone(zone, daemon->namebuff, NULL))
- {
- auth_dns = 1;
- local_auth = 1;
- break;
- }
+ {
+ char *cut;
+
+ if (in_zone(zone, daemon->namebuff, &cut))
+ {
+ if (type != T_DS || cut)
+ {
+ auth_dns = 1;
+ local_auth = 1;
+ }
+ break;
+ }
+ }
#endif
#ifdef HAVE_LOOP
@@ -2268,15 +2280,27 @@ unsigned char *tcp_request(int confd, ti
&peer_addr, auth_dns ? "auth" : "query", qtype);
#ifdef HAVE_AUTH
- /* find queries for zones we're authoritative for, and answer them directly */
+ /* Find queries for zones we're authoritative for, and answer them directly.
+ The exception to this is DS queries for the zone route. They
+ have to come from the parent zone. Since dnsmasq's auth server
+ can't do DNSSEC, the zone will be unsigned, and anything using
+ dnsmasq as a forwarder and doing validation will be expecting to
+ see the proof of non-existence from the parent. */
if (!auth_dns && !option_bool(OPT_LOCALISE))
for (zone = daemon->auth_zones; zone; zone = zone->next)
- if (in_zone(zone, daemon->namebuff, NULL))
- {
- auth_dns = 1;
- local_auth = 1;
- break;
- }
+ {
+ char *cut;
+
+ if (in_zone(zone, daemon->namebuff, &cut))
+ {
+ if (qtype != T_DS || cut)
+ {
+ auth_dns = 1;
+ local_auth = 1;
+ }
+ break;
+ }
+ }
#endif
}
}

6
package/network/services/unetd/Makefile
View File

@@ -10,9 +10,9 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=unetd
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/unetd.git
PKG_SOURCE_DATE:=2025-01-26
PKG_SOURCE_VERSION:=d13752814651c70d2afc71383612fafc835b631b
PKG_MIRROR_HASH:=c9de65ae92af2498fcd9d55f9cd2017cb9ac79b03ed5816da21161aa24f226b9
PKG_SOURCE_DATE:=2025-01-29
PKG_SOURCE_VERSION:=082b5482b97f20dc4745bc3d645e33b584cc28e4
PKG_MIRROR_HASH:=090e7dab3b9a3358706dcee4f1889b7a1f0bdf535f2d6a0580f4160e23ccf9cb
PKG_LICENSE:=GPL-2.0
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

27
package/network/services/unetd/files/unetd.sh
View File

@@ -18,6 +18,7 @@ proto_unet_init_config() {
proto_config_add_string domain
proto_config_add_boolean dht
proto_config_add_array "tunnels:list(string)"
proto_config_add_array "local_network:list(string)"
proto_config_add_array "connect:list(string)"
proto_config_add_array "peer_data:list(string)"
no_device=1
@@ -25,6 +26,17 @@ proto_unet_init_config() {
no_proto_task=1
}
add_array() {
local name="$1"
local val="$2"
json_add_array "$name"
for c in $val; do
json_add_string "" "$c"
done
json_close_array
}
proto_unet_setup() {
local config="$1"
@@ -33,6 +45,7 @@ proto_unet_setup() {
json_get_values tunnels tunnels
json_get_values connect connect
json_get_values peer_data peer_data
json_get_values local_network local_network
device="${device:-$config}"
[ -n "$auth_key" ] && type="${type:-dynamic}"
@@ -58,17 +71,9 @@ proto_unet_setup() {
done
json_close_object
json_add_array auth_connect
for c in $connect; do
json_add_string "" "$c"
done
json_close_array
json_add_array peer_data
for c in $peer_data; do
json_add_string "" "$c"
done
json_close_array
add_array local_network "$local_network"
add_array auth_connect "$connect"
add_array peer_data "$peer_data"
ip link del dev "$device" >/dev/null 2>&1
ip link add dev "$device" type wireguard || {

6
package/system/procd/Makefile
View File

@@ -12,9 +12,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_MIRROR_HASH:=41dbb5352eff931ecc78c4ce9a081645c26a7fb8dc57cdd6521a2f8d3a142567
PKG_SOURCE_DATE:=2024-12-22
PKG_SOURCE_VERSION:=42d3937654508b04da64969f9d764ac2ec411904
PKG_MIRROR_HASH:=cad8681f04922a3ba05363330a2896a598572a2beee980692f1cd7c8d7136b5e
PKG_SOURCE_DATE:=2025-01-30
PKG_SOURCE_VERSION:=7fcb5a275fcff5ab697357c86ce568c71128b982
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

2
target/linux/airoha/an7581/config-6.6
View File

@@ -496,6 +496,8 @@ CONFIG_RATIONAL=y
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RELOCATABLE=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y

3
target/linux/airoha/dts/an7581-evb-emmc.dts
View File

@@ -100,8 +100,9 @@
};
&mmc0 {
pinctrl-names = "default";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc_pins>;
pinctrl-1 = <&mmc_pins>;
status = "okay";
#address-cells = <1>;

23
target/linux/airoha/dts/an7581.dtsi
View File

@@ -332,6 +332,21 @@
};
};
clk25m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "clkxtal";
};
vmmc_3v3: regulator-vmmc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -535,13 +550,15 @@
};
mmc0: mmc@1fa0e000 {
compatible = "airoha,an7581-mmc";
compatible = "mediatek,mt7622-mmc";
reg = <0x0 0x1fa0e000 0x0 0x1000>,
<0x0 0x1fa0c000 0x0 0x60>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scuclk EN7581_CLK_EMMC>;
clock-names = "source"; bus-width = <4>;
clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
clock-names = "source", "hclk";
bus-width = <4>;
max-frequency = <52000000>;
vmmc-supply = <&vmmc_3v3>;
disable-wp;
cap-mmc-highspeed;
non-removable;

13
target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch → target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
View File

@@ -1,6 +1,6 @@
From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 18 Dec 2024 10:03:45 +0100
Date: Tue, 14 Jan 2025 00:10:02 +0100
Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
numbers
@@ -12,6 +12,8 @@ clocks number in match_data and alloca clk_data based on the compatible
match_data.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/clk-en7523.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
@@ -44,7 +46,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
}
static int en7523_reset_update(struct reset_controller_dev *rcdev,
@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
struct clk_hw_onecell_data *clk_data;
int r;
@@ -58,12 +60,11 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
return -ENOMEM;
- soc_data = device_get_match_data(&pdev->dev);
+ clk_data->num = soc_data->num_clocks;
r = soc_data->hw_init(pdev, clk_data);
if (r)
return r;
+ clk_data->num = soc_data->num_clocks;
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
}
static const struct en_clk_soc_data en7523_data = {

7
target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch → target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
View File

@@ -1,6 +1,6 @@
From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Thu, 19 Dec 2024 13:13:37 +0100
Date: Tue, 14 Jan 2025 00:10:03 +0100
Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
@@ -8,6 +8,9 @@ should not be placed here. Value is derived internally in the user
driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
include/dt-bindings/clock/en7523-clk.h | 2 --
1 file changed, 2 deletions(-)

6
target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch → target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
View File

@@ -1,6 +1,6 @@
From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 11 Dec 2024 12:22:37 +0100
Date: Tue, 14 Jan 2025 00:10:04 +0100
Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
Add ID for eMMC for EN7581. This is to control clock selection of eMMC
@@ -8,6 +8,8 @@ between 200MHz and 150MHz.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
include/dt-bindings/clock/en7523-clk.h | 2 ++
1 file changed, 2 insertions(+)

6
target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch → target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
View File

@@ -1,12 +1,14 @@
From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 11 Dec 2024 12:22:38 +0100
Date: Tue, 14 Jan 2025 00:10:05 +0100
Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
Add clock for eMMC for EN7581. This is used to give info of the current
eMMC source clock and to switch it from 200MHz or 150MHz.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/clk-en7523.c | 10 ++++++++++
1 file changed, 10 insertions(+)

136
target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
View File

@@ -1,136 +0,0 @@
From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 11 Dec 2024 11:27:10 +0100
Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
Add support for AN7581 MMC Host. The MMC Host controller is based on
mt7622 with the difference of not having regulator supply and state_uhs
pins and hclk clock.
Some minor fixes are applied to check if the state_uhs pins are defined
and make hclk optional for the new airoha compatible.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
1 file changed, 46 insertions(+), 9 deletions(-)
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
.stop_clk_fix = true,
};
+static const struct mtk_mmc_compatible an7581_compat = {
+ .clk_div_bits = 12,
+ .recheck_sdio_irq = true,
+ .hs400_tune = false,
+ .pad_tune_reg = MSDC_PAD_TUNE0,
+ .async_fifo = true,
+ .data_tune = true,
+ .busy_check = true,
+ .stop_clk_fix = true,
+ .enhance_rx = true,
+ .support_64g = false,
+};
+
static const struct of_device_id msdc_of_ids[] = {
{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
-
+ { .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
{}
};
MODULE_DEVICE_TABLE(of, msdc_of_ids);
@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
struct msdc_host *host = mmc_priv(mmc);
int ret;
+ /* Skip setting supply if not supported */
+ if (!mmc->supply.vqmmc)
+ return 0;
+
if (!IS_ERR(mmc->supply.vqmmc)) {
if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
}
- pinctrl_select_state(host->pinctrl, host->pins_uhs);
+ /* Skip setting uhs pins if not supported */
+ if (host->pins_uhs)
+ pinctrl_select_state(host->pinctrl, host->pins_uhs);
} else {
dev_pm_clear_wake_irq(host->dev);
}
@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
msdc_set_buswidth(host, ios->bus_width);
+ /* Skip regulator if not supported */
+ if (!mmc->supply.vmmc)
+ goto skip_regulator;
+
/* Suspend/Resume will do power off/on */
switch (ios->power_mode) {
case MMC_POWER_UP:
@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
break;
}
+skip_regulator:
if (host->mclk != ios->clock || host->timing != ios->timing)
msdc_set_mclk(host, ios->timing, ios->clock);
}
@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
if (IS_ERR(host->src_clk))
return PTR_ERR(host->src_clk);
- host->h_clk = devm_clk_get(&pdev->dev, "hclk");
- if (IS_ERR(host->h_clk))
- return PTR_ERR(host->h_clk);
+ /* AN7581 SoC doesn't have hclk */
+ if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
+ host->h_clk = devm_clk_get(&pdev->dev, "hclk");
+ if (IS_ERR(host->h_clk))
+ return PTR_ERR(host->h_clk);
+ }
host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
if (IS_ERR(host->bus_clk))
@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
return PTR_ERR(host->pins_default);
}
- host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
- if (IS_ERR(host->pins_uhs)) {
- dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
- return PTR_ERR(host->pins_uhs);
+ /* AN7581 doesn't have state_uhs pins */
+ if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
+ host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
+ if (IS_ERR(host->pins_uhs)) {
+ dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
+ return PTR_ERR(host->pins_uhs);
+ }
}
/* Support for SDIO eint irq ? */
@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
dev_err(&pdev->dev, "Cannot ungate clocks!\n");
goto release_clk;
}
+
+ /* AN7581 without regulator require tune to OCR values */
+ if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
+ !mmc->ocr_avail)
+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+
msdc_init_hw(host);
if (mmc->caps2 & MMC_CAP2_CQE) {

6
target/linux/apm821xx/image/nand.mk
View File

@@ -89,9 +89,6 @@ endef
TARGET_DEVICES += netgear_wndap660
define Device/netgear_wndr4700
DEVICE_COMPAT_VERSION := 3.0
DEVICE_COMPAT_MESSAGE := Network swconfig configuration cannot be upgraded to DSA. \
Upgrade via sysupgrade mechanism is not possible.
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := Centria N900 WNDR4700
DEVICE_ALT0_VENDOR := NETGEAR
@@ -123,8 +120,9 @@ define Device/netgear_wndr4700
NETGEAR_HW_ID := 29763875+128+256
UBINIZE_OPTS := -E 5
SUPPORTED_DEVICES += wndr4700
DEVICE_COMPAT_VERSION := 2.0
DEVICE_COMPAT_VERSION := 3.0
DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \
Network swconfig configuration cannot be upgraded to DSA. \
Upgrade via sysupgrade mechanism is not possible.
endef
TARGET_DEVICES += netgear_wndr4700

2
target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
View File

@@ -68,6 +68,8 @@
status = "okay";
led-controller@1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "sercomm,msp430-leds";
reg = <1>;
spi-max-frequency = <500000>;

82
target/linux/generic/backport-6.6/780-44-v6.13-r8169-copy-vendor-driver-2.5G-5G-EEE-advertisement-c.patch Normal file
View File

@@ -0,0 +1,82 @@
From e340bff27e63ed61a1e9895bed546107859e48a7 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 8 Nov 2024 08:08:24 +0100
Subject: [PATCH] r8169: copy vendor driver 2.5G/5G EEE advertisement
constraints
Vendor driver r8125 doesn't advertise 2.5G EEE on RTL8125A, and r8126
doesn't advertise 5G EEE. Likely there are compatibility issues,
therefore do the same in r8169.
With this change we don't have to disable 2.5G EEE advertisement in
rtl8125a_config_eee_phy() any longer.
We use new phylib accessor phy_set_eee_broken() to mark the respective
EEE modes as broken.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/ce185e10-8a2f-4cf8-a49b-fd8fb3c3c8a1@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
drivers/net/ethernet/realtek/r8169_phy_config.c | 16 ++++------------
2 files changed, 10 insertions(+), 12 deletions(-)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5236,6 +5236,11 @@ static int r8169_mdio_register(struct rt
tp->phydev->supported_eee);
phy_support_asym_pause(tp->phydev);
+ /* mimic behavior of r8125/r8126 vendor drivers */
+ if (tp->mac_version == RTL_GIGA_MAC_VER_61)
+ tp->phydev->eee_broken_modes |= MDIO_EEE_2_5GT;
+ tp->phydev->eee_broken_modes |= MDIO_EEE_5GT;
+
/* PHY will be woken up in rtl_open() */
phy_suspend(tp->phydev);
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
@@ -96,15 +96,7 @@ static void rtl8125_common_config_eee_ph
phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
}
-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
-{
- rtl8168g_config_eee_phy(phydev);
- /* disable EEE at 2.5Gbps */
- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
- rtl8125_common_config_eee_phy(phydev);
-}
-
-static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+static void rtl8125_config_eee_phy(struct phy_device *phydev)
{
rtl8168g_config_eee_phy(phydev);
rtl8125_common_config_eee_phy(phydev);
@@ -1066,7 +1058,7 @@ static void rtl8125a_2_hw_phy_config(str
rtl8168g_enable_gphy_10m(phydev);
rtl8168g_disable_aldps(phydev);
- rtl8125a_config_eee_phy(phydev);
+ rtl8125_config_eee_phy(phydev);
}
static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,
@@ -1106,7 +1098,7 @@ static void rtl8125b_hw_phy_config(struc
rtl8125_legacy_force_mode(phydev);
rtl8168g_disable_aldps(phydev);
- rtl8125b_config_eee_phy(phydev);
+ rtl8125_config_eee_phy(phydev);
}
static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
@@ -1116,7 +1108,7 @@ static void rtl8125d_hw_phy_config(struc
rtl8168g_enable_gphy_10m(phydev);
rtl8125_legacy_force_mode(phydev);
rtl8168g_disable_aldps(phydev);
- rtl8125b_config_eee_phy(phydev);
+ rtl8125_config_eee_phy(phydev);
}
static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,

35
target/linux/generic/backport-6.6/780-45-v6.14-r8169-remove-unused-flag-RTL_FLAG_TASK_RESET_NO_QUEU.patch Normal file
View File

@@ -0,0 +1,35 @@
From 2e20bf8cc05766dcd0357cdfcada49e1bc45512b Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 2 Dec 2024 21:14:35 +0100
Subject: [PATCH] r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE
After 854d71c555dfc3 ("r8169: remove original workaround for RTL8125
broken rx issue") this flag isn't used any longer. So remove it.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
Link: https://patch.msgid.link/d9dd214b-3027-4f60-b0e8-6f34a0c76582@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 3 ---
1 file changed, 3 deletions(-)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -623,7 +623,6 @@ struct rtl8169_tc_offsets {
enum rtl_flag {
RTL_FLAG_TASK_ENABLED = 0,
RTL_FLAG_TASK_RESET_PENDING,
- RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
RTL_FLAG_TASK_TX_TIMEOUT,
RTL_FLAG_MAX
};
@@ -4729,8 +4728,6 @@ static void rtl_task(struct work_struct
reset:
rtl_reset_work(tp);
netif_wake_queue(tp->dev);
- } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
- rtl_reset_work(tp);
}
}

114
target/linux/generic/backport-6.6/780-46-v6.14-r8169-remove-support-for-chip-version-11.patch Normal file
View File

@@ -0,0 +1,114 @@
From bb18265c3aba92b91a1355609769f3e967b65dee Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 2 Dec 2024 21:20:02 +0100
Subject: [PATCH] r8169: remove support for chip version 11
This is a follow-up to 982300c115d2 ("r8169: remove detection of chip
version 11 (early RTL8168b)"). Nobody complained yet, so remove
support for this chip version.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/b689ab6d-20b5-4b64-bd7e-531a0a972ba3@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169.h | 2 +-
drivers/net/ethernet/realtek/r8169_main.c | 14 +-------------
drivers/net/ethernet/realtek/r8169_phy_config.c | 10 ----------
3 files changed, 2 insertions(+), 24 deletions(-)
--- a/drivers/net/ethernet/realtek/r8169.h
+++ b/drivers/net/ethernet/realtek/r8169.h
@@ -23,7 +23,7 @@ enum mac_version {
RTL_GIGA_MAC_VER_08,
RTL_GIGA_MAC_VER_09,
RTL_GIGA_MAC_VER_10,
- RTL_GIGA_MAC_VER_11,
+ /* support for RTL_GIGA_MAC_VER_11 has been removed */
/* RTL_GIGA_MAC_VER_12 was handled the same as VER_17 */
/* RTL_GIGA_MAC_VER_13 was merged with VER_10 */
RTL_GIGA_MAC_VER_14,
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -103,7 +103,6 @@ static const struct {
[RTL_GIGA_MAC_VER_08] = {"RTL8102e" },
[RTL_GIGA_MAC_VER_09] = {"RTL8102e/RTL8103e" },
[RTL_GIGA_MAC_VER_10] = {"RTL8101e/RTL8100e" },
- [RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b" },
[RTL_GIGA_MAC_VER_14] = {"RTL8401" },
[RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b" },
[RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp" },
@@ -2336,7 +2335,7 @@ static enum mac_version rtl8169_get_mac_
/* 8168B family. */
{ 0x7c8, 0x380, RTL_GIGA_MAC_VER_17 },
- /* This one is very old and rare, let's see if anybody complains.
+ /* This one is very old and rare, support has been removed.
* { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11 },
*/
@@ -3806,7 +3805,6 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
[RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
[RTL_GIGA_MAC_VER_10] = NULL,
- [RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,
[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
@@ -4682,12 +4680,6 @@ static irqreturn_t rtl8169_interrupt(int
if (status & LinkChg)
phy_mac_interrupt(tp->phydev);
- if (unlikely(status & RxFIFOOver &&
- tp->mac_version == RTL_GIGA_MAC_VER_11)) {
- netif_stop_queue(tp->dev);
- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
- }
-
rtl_irq_disable(tp);
napi_schedule(&tp->napi);
out:
@@ -5107,9 +5099,6 @@ static void rtl_set_irq_mask(struct rtl8
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
tp->irq_mask |= SYSErr | RxFIFOOver;
- else if (tp->mac_version == RTL_GIGA_MAC_VER_11)
- /* special workaround needed */
- tp->irq_mask |= RxFIFOOver;
}
static int rtl_alloc_irq(struct rtl8169_private *tp)
@@ -5304,7 +5293,6 @@ static int rtl_jumbo_max(struct rtl8169_
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
return JUMBO_7K;
/* RTL8168b */
- case RTL_GIGA_MAC_VER_11:
case RTL_GIGA_MAC_VER_17:
return JUMBO_4K;
/* RTL8168c */
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
@@ -276,15 +276,6 @@ static void rtl8169sce_hw_phy_config(str
rtl_writephy_batch(phydev, phy_reg_init);
}
-static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp,
- struct phy_device *phydev)
-{
- phy_write(phydev, 0x1f, 0x0001);
- phy_set_bits(phydev, 0x16, BIT(0));
- phy_write(phydev, 0x10, 0xf41b);
- phy_write(phydev, 0x1f, 0x0000);
-}
-
static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev)
{
@@ -1136,7 +1127,6 @@ void r8169_hw_phy_config(struct rtl8169_
[RTL_GIGA_MAC_VER_08] = rtl8102e_hw_phy_config,
[RTL_GIGA_MAC_VER_09] = rtl8102e_hw_phy_config,
[RTL_GIGA_MAC_VER_10] = NULL,
- [RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,
[RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,
[RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,
[RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,

257
target/linux/generic/backport-6.6/780-47-v6.14-r8169-adjust-version-numbering-for-RTL8126.patch Normal file
View File

@@ -0,0 +1,257 @@
From b299ea0069284186b0d3d54aebe87f0d195d457a Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 13 Dec 2024 20:01:41 +0100
Subject: [PATCH] r8169: adjust version numbering for RTL8126
Adjust version numbering for RTL8126, so that it doesn't overlap with
new RTL8125 versions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/6a354364-20e9-48ad-a198-468264288757@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169.h | 4 +-
drivers/net/ethernet/realtek/r8169_main.c | 62 +++++++++----------
.../net/ethernet/realtek/r8169_phy_config.c | 4 +-
3 files changed, 35 insertions(+), 35 deletions(-)
--- a/drivers/net/ethernet/realtek/r8169.h
+++ b/drivers/net/ethernet/realtek/r8169.h
@@ -69,8 +69,8 @@ enum mac_version {
RTL_GIGA_MAC_VER_61,
RTL_GIGA_MAC_VER_63,
RTL_GIGA_MAC_VER_64,
- RTL_GIGA_MAC_VER_65,
- RTL_GIGA_MAC_VER_66,
+ RTL_GIGA_MAC_VER_70,
+ RTL_GIGA_MAC_VER_71,
RTL_GIGA_MAC_NONE
};
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -139,8 +139,8 @@ static const struct {
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
- [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
- [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
+ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
+ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
};
static const struct pci_device_id rtl8169_pci_tbl[] = {
@@ -1228,7 +1228,7 @@ static void rtl_writephy(struct rtl8169_
case RTL_GIGA_MAC_VER_31:
r8168dp_2_mdio_write(tp, location, val);
break;
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
r8168g_mdio_write(tp, location, val);
break;
default:
@@ -1243,7 +1243,7 @@ static int rtl_readphy(struct rtl8169_pr
case RTL_GIGA_MAC_VER_28:
case RTL_GIGA_MAC_VER_31:
return r8168dp_2_mdio_read(tp, location);
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
return r8168g_mdio_read(tp, location);
default:
return r8169_mdio_read(tp, location);
@@ -1574,7 +1574,7 @@ static void __rtl8169_set_wol(struct rtl
break;
case RTL_GIGA_MAC_VER_34:
case RTL_GIGA_MAC_VER_37:
- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
break;
default:
@@ -2047,7 +2047,7 @@ static void rtl_set_eee_txidle_timer(str
tp->tx_lpi_timer = timer_val;
r8168_mac_ocp_write(tp, 0xe048, timer_val);
break;
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
tp->tx_lpi_timer = timer_val;
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
break;
@@ -2256,8 +2256,8 @@ static enum mac_version rtl8169_get_mac_
enum mac_version ver;
} mac_info[] = {
/* 8126A family. */
- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
+ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
/* 8125D family. */
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
@@ -2529,7 +2529,7 @@ static void rtl_init_rxcfg(struct rtl816
case RTL_GIGA_MAC_VER_61:
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
break;
- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
RX_PAUSE_SLOT_ON);
break;
@@ -2661,7 +2661,7 @@ static void rtl_wait_txrx_fifo_empty(str
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
break;
- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
@@ -2904,7 +2904,7 @@ static void rtl_enable_exit_l1(struct rt
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
rtl_eri_set_bits(tp, 0xd4, 0x0c00);
break;
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
break;
default:
@@ -2918,7 +2918,7 @@ static void rtl_disable_exit_l1(struct r
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
break;
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
break;
default:
@@ -2944,8 +2944,8 @@ static void rtl_hw_aspm_clkreq_enable(st
rtl_mod_config5(tp, 0, ASPM_en);
switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_65:
- case RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_70:
+ case RTL_GIGA_MAC_VER_71:
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
@@ -2956,7 +2956,7 @@ static void rtl_hw_aspm_clkreq_enable(st
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
/* reset ephy tx/rx disable timer */
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
/* chip can trigger L1.2 */
@@ -2968,7 +2968,7 @@ static void rtl_hw_aspm_clkreq_enable(st
} else {
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
break;
default:
@@ -2976,8 +2976,8 @@ static void rtl_hw_aspm_clkreq_enable(st
}
switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_65:
- case RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_70:
+ case RTL_GIGA_MAC_VER_71:
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
@@ -3697,12 +3697,12 @@ static void rtl_hw_start_8125_common(str
/* disable new tx descriptor format */
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
- tp->mac_version == RTL_GIGA_MAC_VER_66)
+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
+ tp->mac_version == RTL_GIGA_MAC_VER_71)
RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
- tp->mac_version == RTL_GIGA_MAC_VER_66)
+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
+ tp->mac_version == RTL_GIGA_MAC_VER_71)
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
@@ -3720,8 +3720,8 @@ static void rtl_hw_start_8125_common(str
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
- tp->mac_version == RTL_GIGA_MAC_VER_66)
+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
+ tp->mac_version == RTL_GIGA_MAC_VER_71)
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
else
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
@@ -3840,8 +3840,8 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
- [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
+ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
+ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
if (hw_configs[tp->mac_version])
@@ -3862,8 +3862,8 @@ static void rtl_hw_start_8125(struct rtl
RTL_W32(tp, i, 0);
break;
case RTL_GIGA_MAC_VER_63:
- case RTL_GIGA_MAC_VER_65:
- case RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_70:
+ case RTL_GIGA_MAC_VER_71:
for (i = 0xa00; i < 0xa80; i += 4)
RTL_W32(tp, i, 0);
RTL_W16(tp, INT_CFG1_8125, 0x0000);
@@ -4095,7 +4095,7 @@ static void rtl8169_cleanup(struct rtl81
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
break;
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
rtl_enable_rxdvgate(tp);
fsleep(2000);
break;
@@ -4252,7 +4252,7 @@ static unsigned int rtl_quirk_packet_pad
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_34:
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
padto = max_t(unsigned int, padto, ETH_ZLEN);
break;
default:
@@ -5274,7 +5274,7 @@ static void rtl_hw_initialize(struct rtl
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
rtl_hw_init_8168g(tp);
break;
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
rtl_hw_init_8125(tp);
break;
default:
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
@@ -1162,8 +1162,8 @@ void r8169_hw_phy_config(struct rtl8169_
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
- [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
- [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
+ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
+ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
};
if (phy_configs[ver])

90
target/linux/generic/backport-6.6/780-48-v6.14-r8169-add-support-for-RTL8125D-rev.b.patch Normal file
View File

@@ -0,0 +1,90 @@
From b3593df26ab19f114d613693fa8a92ab202803d0 Mon Sep 17 00:00:00 2001
From: ChunHao Lin <hau@realtek.com>
Date: Fri, 13 Dec 2024 20:02:58 +0100
Subject: [PATCH] r8169: add support for RTL8125D rev.b
Add support for RTL8125D rev.b. Its XID is 0x689. It is basically
based on the one with XID 0x688, but with different firmware file.
Signed-off-by: ChunHao Lin <hau@realtek.com>
[hkallweit1@gmail.com: rebased after adjusted version numbering]
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/75e5e9ec-d01f-43ac-b0f4-e7456baf18d1@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169.h | 1 +
drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
3 files changed, 8 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169.h
+++ b/drivers/net/ethernet/realtek/r8169.h
@@ -69,6 +69,7 @@ enum mac_version {
RTL_GIGA_MAC_VER_61,
RTL_GIGA_MAC_VER_63,
RTL_GIGA_MAC_VER_64,
+ RTL_GIGA_MAC_VER_65,
RTL_GIGA_MAC_VER_70,
RTL_GIGA_MAC_VER_71,
RTL_GIGA_MAC_NONE
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -56,6 +56,7 @@
#define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
+#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
@@ -139,6 +140,7 @@ static const struct {
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
+ [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
[RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
[RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
};
@@ -706,6 +708,7 @@ MODULE_FIRMWARE(FIRMWARE_8107E_2);
MODULE_FIRMWARE(FIRMWARE_8125A_3);
MODULE_FIRMWARE(FIRMWARE_8125B_2);
MODULE_FIRMWARE(FIRMWARE_8125D_1);
+MODULE_FIRMWARE(FIRMWARE_8125D_2);
MODULE_FIRMWARE(FIRMWARE_8126A_2);
MODULE_FIRMWARE(FIRMWARE_8126A_3);
@@ -2260,6 +2263,7 @@ static enum mac_version rtl8169_get_mac_
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
/* 8125D family. */
+ { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
/* 8125B family. */
@@ -3840,6 +3844,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
@@ -3858,6 +3863,7 @@ static void rtl_hw_start_8125(struct rtl
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
+ case RTL_GIGA_MAC_VER_65:
for (i = 0xa00; i < 0xb00; i += 4)
RTL_W32(tp, i, 0);
break;
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
@@ -1162,6 +1162,7 @@ void r8169_hw_phy_config(struct rtl8169_
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+ [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
};

184
target/linux/generic/backport-6.6/780-49-v6.14-r8169-add-support-for-RTL8125BP-rev.b.patch Normal file
View File

@@ -0,0 +1,184 @@
From b11bff90f2ad52c5c55c822ecd20326619a73898 Mon Sep 17 00:00:00 2001
From: ChunHao Lin <hau@realtek.com>
Date: Tue, 7 Jan 2025 14:43:55 +0800
Subject: [PATCH] r8169: add support for RTL8125BP rev.b
Add support for RTL8125BP rev.b. Its XID is 0x689. This chip supports
DASH and its dash type is "RTL_DASH_25_BP".
Signed-off-by: ChunHao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250107064355.104711-1-hau@realtek.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/ethernet/realtek/r8169.h | 1 +
drivers/net/ethernet/realtek/r8169_main.c | 30 +++++++++++++++++++
.../net/ethernet/realtek/r8169_phy_config.c | 23 ++++++++++++++
3 files changed, 54 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169.h
+++ b/drivers/net/ethernet/realtek/r8169.h
@@ -70,6 +70,7 @@ enum mac_version {
RTL_GIGA_MAC_VER_63,
RTL_GIGA_MAC_VER_64,
RTL_GIGA_MAC_VER_65,
+ RTL_GIGA_MAC_VER_66,
RTL_GIGA_MAC_VER_70,
RTL_GIGA_MAC_VER_71,
RTL_GIGA_MAC_NONE
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -57,6 +57,7 @@
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
+#define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
@@ -141,6 +142,7 @@ static const struct {
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
[RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
+ [RTL_GIGA_MAC_VER_66] = {"RTL8125BP", FIRMWARE_8125BP_2},
[RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
[RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
};
@@ -632,6 +634,7 @@ enum rtl_dash_type {
RTL_DASH_NONE,
RTL_DASH_DP,
RTL_DASH_EP,
+ RTL_DASH_25_BP,
};
struct rtl8169_private {
@@ -709,6 +712,7 @@ MODULE_FIRMWARE(FIRMWARE_8125A_3);
MODULE_FIRMWARE(FIRMWARE_8125B_2);
MODULE_FIRMWARE(FIRMWARE_8125D_1);
MODULE_FIRMWARE(FIRMWARE_8125D_2);
+MODULE_FIRMWARE(FIRMWARE_8125BP_2);
MODULE_FIRMWARE(FIRMWARE_8126A_2);
MODULE_FIRMWARE(FIRMWARE_8126A_3);
@@ -1361,10 +1365,19 @@ static void rtl8168ep_driver_start(struc
rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
}
+static void rtl8125bp_driver_start(struct rtl8169_private *tp)
+{
+ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);
+ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
+ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
+}
+
static void rtl8168_driver_start(struct rtl8169_private *tp)
{
if (tp->dash_type == RTL_DASH_DP)
rtl8168dp_driver_start(tp);
+ else if (tp->dash_type == RTL_DASH_25_BP)
+ rtl8125bp_driver_start(tp);
else
rtl8168ep_driver_start(tp);
}
@@ -1385,10 +1398,19 @@ static void rtl8168ep_driver_stop(struct
rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
}
+static void rtl8125bp_driver_stop(struct rtl8169_private *tp)
+{
+ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);
+ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
+ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
+}
+
static void rtl8168_driver_stop(struct rtl8169_private *tp)
{
if (tp->dash_type == RTL_DASH_DP)
rtl8168dp_driver_stop(tp);
+ else if (tp->dash_type == RTL_DASH_25_BP)
+ rtl8125bp_driver_stop(tp);
else
rtl8168ep_driver_stop(tp);
}
@@ -1411,6 +1433,7 @@ static bool rtl_dash_is_enabled(struct r
case RTL_DASH_DP:
return r8168dp_check_dash(tp);
case RTL_DASH_EP:
+ case RTL_DASH_25_BP:
return r8168ep_check_dash(tp);
default:
return false;
@@ -1425,6 +1448,8 @@ static enum rtl_dash_type rtl_get_dash_t
return RTL_DASH_DP;
case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
return RTL_DASH_EP;
+ case RTL_GIGA_MAC_VER_66:
+ return RTL_DASH_25_BP;
default:
return RTL_DASH_NONE;
}
@@ -2262,6 +2287,9 @@ static enum mac_version rtl8169_get_mac_
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
+ /* 8125BP family. */
+ { 0x7cf, 0x681, RTL_GIGA_MAC_VER_66 },
+
/* 8125D family. */
{ 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
@@ -3845,6 +3873,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
+ [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
@@ -3864,6 +3893,7 @@ static void rtl_hw_start_8125(struct rtl
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
case RTL_GIGA_MAC_VER_65:
+ case RTL_GIGA_MAC_VER_66:
for (i = 0xa00; i < 0xb00; i += 4)
RTL_W32(tp, i, 0);
break;
--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
@@ -1102,6 +1102,28 @@ static void rtl8125d_hw_phy_config(struc
rtl8125_config_eee_phy(phydev);
}
+static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
+ struct phy_device *phydev)
+{
+ r8169_apply_firmware(tp);
+ rtl8168g_enable_gphy_10m(phydev);
+
+ r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);
+
+ phy_write(phydev, 0x1f, 0x0b87);
+ phy_write(phydev, 0x16, 0x8088);
+ phy_modify(phydev, 0x17, 0xff00, 0x9000);
+ phy_write(phydev, 0x16, 0x808f);
+ phy_modify(phydev, 0x17, 0xff00, 0x9000);
+ phy_write(phydev, 0x1f, 0x0000);
+
+ r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);
+
+ rtl8125_legacy_force_mode(phydev);
+ rtl8168g_disable_aldps(phydev);
+ rtl8125_config_eee_phy(phydev);
+}
+
static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev)
{
@@ -1163,6 +1185,7 @@ void r8169_hw_phy_config(struct rtl8169_
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
[RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
+ [RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
};

1
target/linux/generic/config-6.6
View File

@@ -3100,6 +3100,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y
# CONFIG_LEDS_PWM_MULTICOLOR is not set
# CONFIG_LEDS_REGULATOR is not set
# CONFIG_LEDS_SPI_BYTE is not set
# CONFIG_LEDS_ST1202 is not set
# CONFIG_LEDS_SYSCON is not set
# CONFIG_LEDS_TCA6507 is not set
# CONFIG_LEDS_TI_LMU_COMMON is not set

104
target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
View File

@@ -1,104 +0,0 @@
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 22 Apr 2023 03:26:01 +0100
Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
return rtlgen_is_c45_match(phydev, RTL_8251B, true);
}
+static int rtl822x_aldps_probe(struct phy_device *phydev)
+{
+ struct device *dev = &phydev->mdio.dev;
+ int val;
+
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
+ if (val < 0)
+ return val;
+
+ if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
+ val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
+ else
+ val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
+
+ return rtl822x_probe(phydev);
+}
+
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
+ .probe = rtl822x_aldps_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+ .probe = rtl822x_aldps_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,

42
target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch Normal file
View File

@@ -0,0 +1,42 @@
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 22 Apr 2023 03:26:01 +0100
Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
+ if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
+ ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ else
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ if (ret < 0)
+ return ret;
+
/* Disable SGMII AN */
ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
if (ret < 0)

2
target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
View File

@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{

18
target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
View File

@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
@@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,

2
target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
View File

@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);

58
target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch Normal file
View File

@@ -0,0 +1,58 @@
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 Jan 2025 05:33:12 +0000
Subject: [PATCH] net: phy: realtek: work around broken SerDes
For still unknown reasons the SerDes init sequence may sometimes
time out because a self-clearing bit never clears, indicating the
PHY has entered an unrecoverable error state.
Work-around the issue by triggering a hardware reset and retry the
setup sequence while warning the user that this has happened.
This is really more of a work-around than a fix, and should be
replaced by a better actual fix in future (hopefully).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
return 0;
}
+static int rtl822xb_config_init_war(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = rtl822xb_config_init(phydev);
+
+ if (ret == -ETIMEDOUT) {
+ phydev_warn(phydev, "SerDes setup timed out, retrying\n");
+ phy_device_reset(phydev, 1);
+ phy_device_reset(phydev, 0);
+ ret = rtl822xb_config_init(phydev);
+ }
+
+ return ret;
+}
+
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
phy_interface_t iface)
{
@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
- .config_init = rtl822xb_config_init,
+ .config_init = rtl822xb_config_init_war,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
- .config_init = rtl822xb_config_init,
+ .config_init = rtl822xb_config_init_war,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,

27
target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch Normal file
View File

@@ -0,0 +1,27 @@
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 Jan 2025 05:38:31 +0000
Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
RealTek's PHYs by default also listen on MDIO address 0 which is defined
as broadcast address. This can lead to problems if there is an actual PHY
(such as MT7981 built-in PHY) present at this address, as accessing that
PHY may then confuse the RealTek PHY.
Disabled listening on the MDIO broadcast address to avoid such problems.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
phydev->host_interfaces) ||
phydev->interface == PHY_INTERFACE_MODE_SGMII;
+ /* disable listening on MDIO broadcast address (0) */
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, 0xa430, BIT(13));
+ if (ret < 0)
+ return ret;
+
/* fill in possible interfaces */
__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
has_2500);

2
target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
View File

@@ -160,7 +160,7 @@
};
phy6: ethernet-phy@6 {
compatible = "ethernet-phy-ieee802.3-c22";
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
reset-assert-us = <100000>;
reset-deassert-us = <100000>;

12
target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts
View File

@@ -136,8 +136,16 @@
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
/* LED0: CONN (WAN white) */
mxl,led-config = <0x03f0 0x0 0x0 0x0>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_WAN;
};
};
};
switch: switch@1f {

3
target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
View File

@@ -11,6 +11,9 @@ abt,asr3000)
ucidef_set_led_netdev "wlan2g" "WLAN2G" "green:wlan-2ghz" "phy0-ap0"
ucidef_set_led_netdev "wlan5g" "WLAN5G" "green:wlan-5ghz" "phy1-ap0"
;;
asus,tuf-ax4200)
ucidef_set_led_netdev "wan" "WAN" "mdio-bus:06:white:wan" "eth1" "link tx rx"
;;
bananapi,bpi-r3-mini)
ucidef_set_led_netdev "lan1" "LAN" "mdio-bus:0e:green:lan" "eth0" "link_2500 link_1000 tx rx"
ucidef_set_led_netdev "lan2" "LAN" "mdio-bus:0e:yellow:lan" "eth0" "link_2500 link_100 tx rx"

33
target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch Normal file
View File

@@ -0,0 +1,33 @@
From 4c4baed29b168e9bf39545a945a9523ea280cb44 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 1 Feb 2025 04:24:17 +0000
Subject: [PATCH 1/2] Revert "arm64: dts: mediatek: fix t-phy unit name"
This reverts commit 963c3b0c47ec29b4c49c9f45965cd066f419d17f.
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -908,7 +908,7 @@
status = "disabled";
};
- sata_phy: t-phy {
+ sata_phy: t-phy@1a243000 {
compatible = "mediatek,mt7622-tphy",
"mediatek,generic-tphy-v1";
#address-cells = <2>;
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -428,7 +428,7 @@
};
};
- pcie_phy: t-phy {
+ pcie_phy: t-phy@11c00000 {
compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2";
ranges;

33
target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch Normal file
View File

@@ -0,0 +1,33 @@
From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Fri, 28 Jun 2024 12:55:40 +0200
Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
node
Sata node reference the pciesys with the property mediatek,phy-node
and that is used as a syscon to access the pciesys regs.
Readd the syscon compatible to pciesys node to restore correct
functionality of the SATA interface.
Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Co-developed-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -798,7 +798,7 @@
};
pciesys: clock-controller@1a100800 {
- compatible = "mediatek,mt7622-pciesys";
+ compatible = "mediatek,mt7622-pciesys", "syscon";
reg = <0 0x1a100800 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;

4
target/linux/mediatek/patches-6.6/790-net-phy-realtek-add-led-link-select-for-RTL8221.patch
View File

@@ -77,7 +77,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@@ -911,7 +956,7 @@ static int rtl822xb_config_init(struct p
@@ -925,7 +970,7 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
@@ -85,4 +85,4 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
+ return rtl8221b_config_led(phydev);
}
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
static int rtl822xb_config_init_war(struct phy_device *phydev)

3
target/linux/mvebu/image/cortexa9.mk
View File

@@ -319,7 +319,8 @@ define Device/linksys_wrt32x
DEVICE_ALT0_VENDOR := Linksys
DEVICE_ALT0_MODEL := Venom
DEVICE_DTS := armada-385-linksys-venom
DEVICE_PACKAGES += kmod-btmrvl kmod-mwifiex-sdio mwlwifi-firmware-88w8964
DEVICE_PACKAGES += kmod-btmrvl kmod-mwifiex-sdio mwlwifi-firmware-88w8964 \
kmod-dsa-mv88e6xxx
KERNEL_SIZE := 6144k
KERNEL := kernel-bin | append-dtb
SUPPORTED_DEVICES += armada-385-linksys-venom linksys,venom

58
target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
View File

@@ -108,6 +108,45 @@ tplink_do_upgrade() {
nand_do_upgrade "$1"
}
linksys_mx_do_upgrade() {
local setenv_script="/tmp/fw_env_upgrade"
CI_UBIPART="rootfs"
boot_part="$(fw_printenv -n boot_part)"
if [ -n "$UPGRADE_OPT_USE_CURR_PART" ]; then
if [ "$boot_part" -eq "2" ]; then
CI_KERNPART="alt_kernel"
CI_UBIPART="alt_rootfs"
fi
else
if [ "$boot_part" -eq "1" ]; then
echo "boot_part 2" >> $setenv_script
CI_KERNPART="alt_kernel"
CI_UBIPART="alt_rootfs"
else
echo "boot_part 1" >> $setenv_script
fi
fi
boot_part_ready="$(fw_printenv -n boot_part_ready)"
if [ "$boot_part_ready" -ne "3" ]; then
echo "boot_part_ready 3" >> $setenv_script
fi
auto_recovery="$(fw_printenv -n auto_recovery)"
if [ "$auto_recovery" != "yes" ]; then
echo "auto_recovery yes" >> $setenv_script
fi
if [ -f "$setenv_script" ]; then
fw_setenv -s $setenv_script || {
echo "failed to update U-Boot environment"
return 1
}
fi
nand_do_upgrade "$1"
}
platform_check_image() {
return 0;
}
@@ -173,21 +212,14 @@ platform_do_upgrade() {
;;
linksys,mx4200v1|\
linksys,mx4200v2|\
linksys,mx4300|\
linksys,mx4300)
remove_oem_ubi_volume squashfs
linksys_mx_do_upgrade "$1"
;;
linksys,mx5300|\
linksys,mx8500)
boot_part="$(fw_printenv -n boot_part)"
if [ "$boot_part" -eq "1" ]; then
fw_setenv boot_part 2
CI_KERNPART="alt_kernel"
CI_UBIPART="alt_rootfs"
else
fw_setenv boot_part 1
CI_UBIPART="rootfs"
fi
fw_setenv boot_part_ready 3
fw_setenv auto_recovery yes
nand_do_upgrade "$1"
remove_oem_ubi_volume ubifs
linksys_mx_do_upgrade "$1"
;;
prpl,haze|\
qnap,301w)

9
target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
View File

@@ -37,6 +37,15 @@
};
};
&gpio1 {
poe-enable {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "poe-enable";
};
};
&firmware {
openwrt,ih-magic = <0x4e474520>;
};

32
target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
View File

@@ -61,13 +61,6 @@
open-source;
};
gpio1: rtl8231-gpio {
compatible = "realtek,rtl8231-gpio";
#gpio-cells = <2>;
gpio-controller;
indirect-access-bus-id = <0>;
};
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@@ -134,12 +127,25 @@
};
};
&gpio0 {
rtl8231_reset {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "rtl8231-reset";
&mdio_aux {
status = "okay";
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
reset-post-delay-us = <10000>;
gpio1: expander@0 {
compatible = "realtek,rtl8231";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio1 0 0 37>;
led-controller {
compatible = "realtek,rtl8231-leds";
status = "disabled";
};
};
};

29
target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
View File

@@ -2,6 +2,7 @@
#include "rtl838x.dtsi"
#include "rtl83xx_d-link_dgs-1210_common.dtsi"
#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
/ {
compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
@@ -43,23 +44,6 @@
tx-disable-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
mode {
label = "mode";
gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
linux,code = <KEY_LIGHTS_TOGGLE>;
};
reset {
label = "reset";
gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
link_act {
label = "green:link_act";
@@ -76,12 +60,13 @@
gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
};
};
};
gpio1: rtl8231-gpio {
compatible = "realtek,rtl8231-gpio";
#gpio-cells = <2>;
gpio-controller;
indirect-access-bus-id = <0>;
&keys {
mode {
label = "mode";
gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
linux,code = <KEY_LIGHTS_TOGGLE>;
};
};

4
target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_common.dtsi
View File

@@ -30,10 +30,6 @@
};
};
&gpio0 {
indirect-access-bus-id = <0>;
};
&spi0 {
status = "okay";
flash@0 {

19
target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_gpio.dtsi
View File

@@ -17,11 +17,22 @@
linux,code = <KEY_RESTART>;
};
};
};
&mdio_aux {
status = "okay";
gpio1: expander@0 {
compatible = "realtek,rtl8231";
reg = <0>;
gpio1: rtl8231-gpio {
compatible = "realtek,rtl8231-gpio";
#gpio-cells = <2>;
gpio-controller;
indirect-access-bus-id = <0>;
#gpio-cells = <2>;
gpio-ranges = <&gpio1 0 0 37>;
led-controller {
compatible = "realtek,rtl8231-leds";
status = "disabled";
};
};
};

12
target/linux/rockchip/patches-6.6/034-21-v6.8-drm-sched-Add-drm_sched_wqueue_-helpers.patch
View File

@@ -92,7 +92,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4652,7 +4652,7 @@ bool amdgpu_device_has_job_running(struc
@@ -4615,7 +4615,7 @@ bool amdgpu_device_has_job_running(struc
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
@@ -101,7 +101,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
spin_lock(&ring->sched.job_list_lock);
@@ -4794,7 +4794,7 @@ int amdgpu_device_pre_asic_reset(struct
@@ -4757,7 +4757,7 @@ int amdgpu_device_pre_asic_reset(struct
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
@@ -110,7 +110,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
/* Clear job fence from fence drv to avoid force_completion
@@ -5338,7 +5338,7 @@ int amdgpu_device_gpu_recover(struct amd
@@ -5297,7 +5297,7 @@ int amdgpu_device_gpu_recover(struct amd
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = tmp_adev->rings[i];
@@ -119,7 +119,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
drm_sched_stop(&ring->sched, job ? &job->base : NULL);
@@ -5413,7 +5413,7 @@ skip_hw_reset:
@@ -5372,7 +5372,7 @@ skip_hw_reset:
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = tmp_adev->rings[i];
@@ -128,7 +128,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
drm_sched_start(&ring->sched, true);
@@ -5739,7 +5739,7 @@ pci_ers_result_t amdgpu_pci_error_detect
@@ -5698,7 +5698,7 @@ pci_ers_result_t amdgpu_pci_error_detect
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
@@ -137,7 +137,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
drm_sched_stop(&ring->sched, NULL);
@@ -5867,7 +5867,7 @@ void amdgpu_pci_resume(struct pci_dev *p
@@ -5826,7 +5826,7 @@ void amdgpu_pci_resume(struct pci_dev *p
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];

4
target/linux/rockchip/patches-6.6/602-net-ethernet-r8169-add-devname-configuration-from-OF.patch
View File

@@ -8,7 +8,7 @@
#include <linux/tcp.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
@@ -5355,6 +5356,7 @@ static int rtl_init_one(struct pci_dev *
@@ -5381,6 +5382,7 @@ static int rtl_init_one(struct pci_dev *
int jumbo_max, region, rc;
enum mac_version chipset;
struct net_device *dev;
@@ -16,7 +16,7 @@
u32 txconfig;
u16 xid;
@@ -5362,6 +5364,9 @@ static int rtl_init_one(struct pci_dev *
@@ -5388,6 +5390,9 @@ static int rtl_init_one(struct pci_dev *
if (!dev)
return -ENOMEM;

2
target/linux/rockchip/patches-6.6/805-arm64-dts-rockchip-add-rk3328-ddr-relate-node.patch
View File

@@ -28,7 +28,7 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
/ {
compatible = "rockchip,rk3328";
@@ -1039,6 +1040,78 @@
@@ -1040,6 +1041,78 @@
status = "disabled";
};

1
target/linux/stm32/stm32mp1/config-6.6
View File

@@ -423,6 +423,7 @@ CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y

3
target/linux/x86/image/64.mk
View File

@@ -3,7 +3,8 @@ define Device/generic
DEVICE_MODEL := x86/64
DEVICE_PACKAGES += \
kmod-amazon-ena kmod-amd-xgbe kmod-bnx2 kmod-e1000 \
kmod-dwmac-intel kmod-forcedeth kmod-fs-vfat kmod-tg3
kmod-dwmac-intel kmod-forcedeth kmod-fs-vfat kmod-tg3 \
kmod-drm-i915
GRUB2_VARIANT := generic
endef
TARGET_DEVICES += generic

2
target/linux/x86/image/generic.mk
View File

@@ -3,7 +3,7 @@ define Device/generic
DEVICE_MODEL := x86
DEVICE_PACKAGES += kmod-3c59x kmod-e100 kmod-e1000 kmod-natsemi \
kmod-ne2k-pci kmod-pcnet32 kmod-sis900 kmod-tg3 kmod-via-rhine \
kmod-via-velocity kmod-forcedeth kmod-fs-vfat
kmod-via-velocity kmod-forcedeth kmod-fs-vfat kmod-drm-i915
GRUB2_VARIANT := generic
endef
TARGET_DEVICES += generic

3
target/linux/x86/image/legacy.mk
View File

@@ -3,7 +3,8 @@ define Device/generic
DEVICE_MODEL := x86/legacy
DEVICE_PACKAGES += kmod-3c59x kmod-e100 kmod-e1000 \
kmod-natsemi kmod-ne2k-pci kmod-pcnet32 kmod-sis900 \
kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth
kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth \
kmod-drm-i915
GRUB2_VARIANT := legacy
endef
TARGET_DEVICES += generic