rockchip: add Station P2 support
Hardware -------- RockChip RK3568 ARM64 (4 cores) 2/4/8GB LPDDR4 RAM 2x 1000 Base-T Bluetooth 5.0 Dual-band Wi-Fi6 2 LEDs (POWER / USER) 32/64/128GB eMMC on-board Micro-SD Slot M.2 Slot SATA 3.0 interfaces HDMI 2.0 Headphone 2x USB 2.0 Port USB 3.0 Port DC 12V Installation ------------ Uncompress the ImmortalWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
@@ -24,6 +24,21 @@ define Device/firefly_roc-rk3328-cc
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endef
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TARGET_DEVICES += firefly_roc-rk3328-cc
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define Device/firefly_roc-rk3568-pc
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DEVICE_VENDOR := Firefly
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DEVICE_MODEL := Station P2
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DEVICE_ALT0_VENDOR := Firefly
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DEVICE_ALT0_MODEL := ROC-RK3568-PC
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SOC := rk3568
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DEVICE_DTS := rockchip/rk3568-roc-pc
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SUPPORTED_DEVICES := firefly,rk3568-roc-pc
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UBOOT_DEVICE_NAME := roc-pc-rk3568
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BOOT_FLOW := pine64-img
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DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-brcmfmac wpad-basic-openssl \
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brcmfmac-firmware-43752-sdio brcmfmac-nvram-43752-sdio
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endef
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TARGET_DEVICES += firefly_roc-rk3568-pc
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define Device/friendlyarm_nanopi-r2c
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DEVICE_VENDOR := FriendlyARM
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DEVICE_MODEL := NanoPi R2C
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@@ -0,0 +1,680 @@
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From 007b4bb47f44ad1f2290b3bebfd1fac3822c9b23 Mon Sep 17 00:00:00 2001
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From: Furkan Kardame <f.kardame@manjaro.org>
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Date: Tue, 20 Jun 2023 21:47:46 +0300
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Subject: [PATCH] arm64: dts: rockchip: add dts for Firefly Station P2 aka
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rk3568-roc-pc
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Add dts for Firefly Station P2.
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Working IO:
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* eMMC
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* HDMI
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* LAN
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* LED
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* SD Card
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* UART
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* USB2
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* USB3
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Signed-off-by: Furkan Kardame <f.kardame@manjaro.org>
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Link: https://lore.kernel.org/r/20230620184746.55391-3-f.kardame@manjaro.org
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../arm64/boot/dts/rockchip/rk3568-roc-pc.dts | 643 ++++++++++++++++++
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2 files changed, 644 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -79,4 +79,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fa
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
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@@ -0,0 +1,643 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ model = "Firefly Station P2";
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+ compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568";
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+
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+ aliases {
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+ ethernet0 = &gmac0;
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+ ethernet1 = &gmac1;
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+ mmc0 = &sdmmc0;
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+ mmc1 = &sdhci;
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+ };
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+
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+ chosen: chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ dc_12v: dc-12v-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "dc_12v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ };
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+
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+ gmac0_clkin: external-gmac0-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac0_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ gmac1_clkin: external-gmac1-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac1_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led-user {
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+ label = "user-led";
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+ default-state = "on";
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+ gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&user_led_enable_h>;
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+ retain-state-suspended;
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+ };
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&dc_12v>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_pcie";
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+ enable-active-high;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc3v3_pcie_en_pin>;
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+ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ startup-delay-us = <5000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&dc_12v>;
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+ };
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+
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+ vcc5v0_usb: vcc5v0-usb-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_usb";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_host";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ regulator-always-on;
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+ vin-supply = <&vcc5v0_usb>;
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+ };
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+
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+ vcc5v0_otg: vcc5v0-otg-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_otg";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_otg_en>;
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+ vin-supply = <&vcc5v0_usb>;
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+ };
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+};
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+
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+&combphy0 {
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+ /* used for USB3 */
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+ status = "okay";
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+};
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+
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+&combphy1 {
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+ /* used for USB3 */
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ /* used for SATA */
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+ status = "okay";
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+};
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+
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+&gmac0 {
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+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
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+ clock_in_out = "input";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac0_miim
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+ &gmac0_tx_bus2
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+ &gmac0_rx_bus2
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+ &gmac0_rgmii_clk
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+ &gmac0_rgmii_bus
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+ &gmac0_clkinout>;
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+ phy-handle = <&rgmii_phy0>;
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+ phy-mode = "rgmii";
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+ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ /* Reset time is 20ms, 100ms for rtl8211f */
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+ snps,reset-delays-us = <0 20000 100000>;
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+ tx_delay = <0x3c>;
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+ rx_delay = <0x2f>;
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+ status = "okay";
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+};
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+
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+&gmac1 {
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+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
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+ clock_in_out = "input";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac1m1_miim
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+ &gmac1m1_tx_bus2
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+ &gmac1m1_rx_bus2
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+ &gmac1m1_rgmii_clk
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+ &gmac1m1_rgmii_bus
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+ &gmac1m1_clkinout>;
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+ phy-handle = <&rgmii_phy1>;
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+ phy-mode = "rgmii";
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+ snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ /* Reset time is 20ms, 100ms for rtl8211f */
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+ snps,reset-delays-us = <0 20000 100000>;
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+ tx_delay = <0x4f>;
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+ rx_delay = <0x26>;
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ avdd-0v9-supply = <&vdda0v9_image>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ rk809: pmic@20 {
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int>;
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+ rockchip,system-power-controller;
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+ wakeup-source;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
|
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
|
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+ };
|
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+ };
|
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
|
||||
+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
|
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+ regulator-min-microvolt = <500000>;
|
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+ regulator-max-microvolt = <1350000>;
|
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
|
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+ };
|
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+ };
|
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+
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+ vcc_ddr: DCDC_REG3 {
|
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+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
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+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu: DCDC_REG4 {
|
||||
+ regulator-name = "vdd_npu";
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG5 {
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_image: LDO_REG1 {
|
||||
+ regulator-name = "vdda0v9_image";
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG7 {
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pmu: LDO_REG8 {
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio0 {
|
||||
+ rgmii_phy0: phy@0 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: phy@0 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie30phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie3x2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_reset_pin>;
|
||||
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ user_led_enable_h: user-led-enable-h {
|
||||
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_host_en: vcc5v0-host-en {
|
||||
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_otg_en: vcc5v0-otg-en {
|
||||
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ pcie_reset_pin: pcie-reset-pin {
|
||||
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
|
||||
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic-int {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_1v8>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_1v8>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sata2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc3v3_sd>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_host {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_otg {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
@@ -23,9 +23,9 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -80,3 +80,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fa
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
|
||||
@@ -81,3 +81,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-na
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
|
||||
--- /dev/null
|
||||
|
||||
@@ -21,8 +21,8 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -81,3 +81,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-na
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
|
||||
@@ -82,3 +82,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-na
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
|
||||
|
||||
@@ -23,8 +23,8 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -81,4 +81,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-na
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
|
||||
@@ -82,4 +82,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-na
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
|
||||
|
||||
@@ -269,6 +269,58 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
|
||||
};
|
||||
|
||||
chosen: chosen {
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
|
||||
@@ -19,6 +19,11 @@
|
||||
ethernet1 = &gmac1;
|
||||
mmc0 = &sdmmc0;
|
||||
mmc1 = &sdhci;
|
||||
+
|
||||
+ led-boot = &power_led;
|
||||
+ led-failsafe = &power_led;
|
||||
+ led-running = &power_led;
|
||||
+ led-upgrade = &power_led;
|
||||
};
|
||||
|
||||
chosen: chosen {
|
||||
@@ -50,15 +55,17 @@
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&power_led_pin>, <&user_led_pin>;
|
||||
|
||||
- led-user {
|
||||
- label = "user-led";
|
||||
- default-state = "on";
|
||||
+ power_led: led-power {
|
||||
+ label = "blue:power";
|
||||
gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
- linux,default-trigger = "heartbeat";
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&user_led_enable_h>;
|
||||
- retain-state-suspended;
|
||||
+ };
|
||||
+
|
||||
+ led-user {
|
||||
+ label = "yellow:user";
|
||||
+ gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -490,7 +497,11 @@
|
||||
|
||||
&pinctrl {
|
||||
leds {
|
||||
- user_led_enable_h: user-led-enable-h {
|
||||
+ power_led_pin: power-led-pin {
|
||||
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ user_led_pin: user-led-pin {
|
||||
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
||||
@@ -3,6 +3,8 @@
|
||||
|
||||
@@ -30,6 +30,19 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&rng {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&saradc {
|
||||
vref-supply = <&vcca_1v8>;
|
||||
status = "okay";
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts
|
||||
@@ -546,6 +546,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&rng {
|
||||
+ status = "okay";
|
||||
+};
|
||||
|
||||
@@ -16,13 +16,14 @@
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s-enterprise.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
|
||||
@@ -77,9 +79,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp
|
||||
@@ -77,10 +79,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
|
||||
|
||||
Reference in New Issue
Block a user