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rockchip: refresh upstreamed rk3588 patches

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2023-06-17 14:37:12 +08:00
parent b0063446b8
commit 44832c677b
22 changed files with 174 additions and 519 deletions
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0
target/linux/rockchip/patches-6.1/037-01-v6.5-iio-adc-rockchip_saradc-Add-callback-functions.patch → target/linux/rockchip/patches-6.1/036-01-v6.5-iio-adc-rockchip_saradc-Add-callback-functions.patch
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177
target/linux/rockchip/patches-6.1/036-01-v6.5-nvmem-rockchip-otp-Add-clks-and-reg_read-to-rockchip_data.patch
View File

@@ -1,177 +0,0 @@
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Shreeya Patel <shreeya.patel@collabora.com>,
Kever Yang <kever.yang@rock-chips.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Vincent Legoll <vincent.legoll@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: [PATCH v2 3/8] nvmem: rockchip-otp: Add clks and reg_read to rockchip_data
Date: Thu, 4 May 2023 23:06:43 +0300 [thread overview]
Message-ID: <20230504200648.1119866-4-cristian.ciocaltea@collabora.com> (raw)
In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com>
In preparation to support new Rockchip OTP memory devices with different
clock configurations and register layout, extend rockchip_data struct
with the related members: clks, num_clks, reg_read.
Additionally, to avoid managing redundant driver data, drop num_clks
member from rockchip_otp struct and update all references to point to
the equivalent member in rockchip_data.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/nvmem/rockchip-otp.c | 79 ++++++++++++++++++++++--------------
1 file changed, 49 insertions(+), 30 deletions(-)
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -54,21 +54,19 @@
#define OTPC_TIMEOUT 10000
+struct rockchip_data {
+ int size;
+ const char * const *clks;
+ int num_clks;
+ nvmem_reg_read_t reg_read;
+};
+
struct rockchip_otp {
struct device *dev;
void __iomem *base;
- struct clk_bulk_data *clks;
- int num_clks;
+ struct clk_bulk_data *clks;
struct reset_control *rst;
-};
-
-/* list of required clocks */
-static const char * const rockchip_otp_clocks[] = {
- "otp", "apb_pclk", "phy",
-};
-
-struct rockchip_data {
- int size;
+ const struct rockchip_data *data;
};
static int rockchip_otp_reset(struct rockchip_otp *otp)
@@ -132,29 +130,23 @@ static int rockchip_otp_ecc_enable(struc
return ret;
}
-static int rockchip_otp_read(void *context, unsigned int offset,
- void *val, size_t bytes)
+static int px30_otp_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
{
struct rockchip_otp *otp = context;
u8 *buf = val;
- int ret = 0;
-
- ret = clk_bulk_prepare_enable(otp->num_clks, otp->clks);
- if (ret < 0) {
- dev_err(otp->dev, "failed to prepare/enable clks\n");
- return ret;
- }
+ int ret;
ret = rockchip_otp_reset(otp);
if (ret) {
dev_err(otp->dev, "failed to reset otp phy\n");
- goto disable_clks;
+ return ret;
}
ret = rockchip_otp_ecc_enable(otp, false);
if (ret < 0) {
dev_err(otp->dev, "rockchip_otp_ecc_enable err\n");
- goto disable_clks;
+ return ret;
}
writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
@@ -174,8 +166,28 @@ static int rockchip_otp_read(void *conte
read_end:
writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
-disable_clks:
- clk_bulk_disable_unprepare(otp->num_clks, otp->clks);
+
+ return ret;
+}
+
+static int rockchip_otp_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_otp *otp = context;
+ int ret;
+
+ if (!otp->data || !otp->data->reg_read)
+ return -EINVAL;
+
+ ret = clk_bulk_prepare_enable(otp->data->num_clks, otp->clks);
+ if (ret < 0) {
+ dev_err(otp->dev, "failed to prepare/enable clks\n");
+ return ret;
+ }
+
+ ret = otp->data->reg_read(context, offset, val, bytes);
+
+ clk_bulk_disable_unprepare(otp->data->num_clks, otp->clks);
return ret;
}
@@ -189,8 +201,15 @@ static struct nvmem_config otp_config =
.reg_read = rockchip_otp_read,
};
+static const char * const px30_otp_clocks[] = {
+ "otp", "apb_pclk", "phy",
+};
+
static const struct rockchip_data px30_data = {
.size = 0x40,
+ .clks = px30_otp_clocks,
+ .num_clks = ARRAY_SIZE(px30_otp_clocks),
+ .reg_read = px30_otp_read,
};
static const struct of_device_id rockchip_otp_match[] = {
@@ -225,21 +244,21 @@ static int rockchip_otp_probe(struct pla
if (!otp)
return -ENOMEM;
+ otp->data = data;
otp->dev = dev;
otp->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(otp->base))
return PTR_ERR(otp->base);
- otp->num_clks = ARRAY_SIZE(rockchip_otp_clocks);
- otp->clks = devm_kcalloc(dev, otp->num_clks,
- sizeof(*otp->clks), GFP_KERNEL);
+ otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks),
+ GFP_KERNEL);
if (!otp->clks)
return -ENOMEM;
- for (i = 0; i < otp->num_clks; ++i)
- otp->clks[i].id = rockchip_otp_clocks[i];
+ for (i = 0; i < data->num_clks; ++i)
+ otp->clks[i].id = data->clks[i];
- ret = devm_clk_bulk_get(dev, otp->num_clks, otp->clks);
+ ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks);
if (ret)
return ret;

0
target/linux/rockchip/patches-6.1/037-02-v6.5-iio-adc-rockchip_saradc-Add-support-for-RK3588.patch → target/linux/rockchip/patches-6.1/036-02-v6.5-iio-adc-rockchip_saradc-Add-support-for-RK3588.patch
View File

73
target/linux/rockchip/patches-6.1/036-02-v6.5-nvmem-rockchip-otp-Generalize-rockchip_otp_wait_status.patch
View File

@@ -1,73 +0,0 @@
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Shreeya Patel <shreeya.patel@collabora.com>,
Kever Yang <kever.yang@rock-chips.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Vincent Legoll <vincent.legoll@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: [PATCH v2 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status()
Date: Thu, 4 May 2023 23:06:44 +0300 [thread overview]
Message-ID: <20230504200648.1119866-5-cristian.ciocaltea@collabora.com> (raw)
In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com>
In preparation to support additional Rockchip OTP memory devices with
different register layout, generalize rockchip_otp_wait_status() to
accept a new parameter for specifying the offset of the status register.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/nvmem/rockchip-otp.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -90,18 +90,19 @@ static int rockchip_otp_reset(struct roc
return 0;
}
-static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag)
+static int rockchip_otp_wait_status(struct rockchip_otp *otp,
+ unsigned int reg, u32 flag)
{
u32 status = 0;
int ret;
- ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status,
+ ret = readl_poll_timeout_atomic(otp->base + reg, status,
(status & flag), 1, OTPC_TIMEOUT);
if (ret)
return ret;
/* clean int status */
- writel(flag, otp->base + OTPC_INT_STATUS);
+ writel(flag, otp->base + reg);
return 0;
}
@@ -123,7 +124,7 @@ static int rockchip_otp_ecc_enable(struc
writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
- ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
+ ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE);
if (ret < 0)
dev_err(otp->dev, "timeout during ecc_enable\n");
@@ -156,7 +157,7 @@ static int px30_otp_read(void *context,
otp->base + OTPC_USER_ADDR);
writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
otp->base + OTPC_USER_ENABLE);
- ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
+ ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE);
if (ret < 0) {
dev_err(otp->dev, "timeout during read setup\n");
goto read_end;

0
target/linux/rockchip/patches-6.1/037-03-v6.5-iio-adc-rockchip_saradc-Make-use-of-devm_clk_get_enabled.patch → target/linux/rockchip/patches-6.1/036-03-v6.5-iio-adc-rockchip_saradc-Make-use-of-devm_clk_get_enabled.patch
View File

41
target/linux/rockchip/patches-6.1/036-03-v6.5-nvmem-rockchip-otp-Use-devm_reset_control_array_get_exclu.patch
View File

@@ -1,41 +0,0 @@
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Shreeya Patel <shreeya.patel@collabora.com>,
Kever Yang <kever.yang@rock-chips.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Vincent Legoll <vincent.legoll@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: [PATCH v2 5/8] nvmem: rockchip-otp: Use devm_reset_control_array_get_exclusive()
Date: Thu, 4 May 2023 23:06:45 +0300 [thread overview]
Message-ID: <20230504200648.1119866-6-cristian.ciocaltea@collabora.com> (raw)
In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com>
In preparation to support new Rockchip OTP memory devices having
specific reset configurations, switch devm_reset_control_get() to
devm_reset_control_array_get_exclusive().
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/nvmem/rockchip-otp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -263,7 +263,7 @@ static int rockchip_otp_probe(struct pla
if (ret)
return ret;
- otp->rst = devm_reset_control_get(dev, "phy");
+ otp->rst = devm_reset_control_array_get_exclusive(dev);
if (IS_ERR(otp->rst))
return PTR_ERR(otp->rst);

0
target/linux/rockchip/patches-6.1/037-04-v6.5-iio-adc-rockchip_saradc-Use-of_device_get_match_data.patch → target/linux/rockchip/patches-6.1/036-04-v6.5-iio-adc-rockchip_saradc-Use-of_device_get_match_data.patch
View File

82
target/linux/rockchip/patches-6.1/036-04-v6.5-nvmem-rockchip-otp-Improve-probe-error-handling.patch
View File

@@ -1,82 +0,0 @@
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Shreeya Patel <shreeya.patel@collabora.com>,
Kever Yang <kever.yang@rock-chips.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Vincent Legoll <vincent.legoll@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: [PATCH v2 6/8] nvmem: rockchip-otp: Improve probe error handling
Date: Thu, 4 May 2023 23:06:46 +0300 [thread overview]
Message-ID: <20230504200648.1119866-7-cristian.ciocaltea@collabora.com> (raw)
In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com>
Enhance error handling in the probe function by making use of
dev_err_probe(), which ensures the error code is always printed, in
addition to the specified error message.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/nvmem/rockchip-otp.c | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -235,10 +235,8 @@ static int rockchip_otp_probe(struct pla
int ret, i;
data = of_device_get_match_data(dev);
- if (!data) {
- dev_err(dev, "failed to get match data\n");
- return -EINVAL;
- }
+ if (!data)
+ return dev_err_probe(dev, -EINVAL, "failed to get match data\n");
otp = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_otp),
GFP_KERNEL);
@@ -249,7 +247,8 @@ static int rockchip_otp_probe(struct pla
otp->dev = dev;
otp->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(otp->base))
- return PTR_ERR(otp->base);
+ return dev_err_probe(dev, PTR_ERR(otp->base),
+ "failed to ioremap resource\n");
otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks),
GFP_KERNEL);
@@ -261,18 +260,22 @@ static int rockchip_otp_probe(struct pla
ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks);
if (ret)
- return ret;
+ return dev_err_probe(dev, ret, "failed to get clocks\n");
otp->rst = devm_reset_control_array_get_exclusive(dev);
if (IS_ERR(otp->rst))
- return PTR_ERR(otp->rst);
+ return dev_err_probe(dev, PTR_ERR(otp->rst),
+ "failed to get resets\n");
otp_config.size = data->size;
otp_config.priv = otp;
otp_config.dev = dev;
- nvmem = devm_nvmem_register(dev, &otp_config);
- return PTR_ERR_OR_ZERO(nvmem);
+ nvmem = devm_nvmem_register(dev, &otp_config);
+ if (IS_ERR(nvmem))
+ return dev_err_probe(dev, PTR_ERR(nvmem),
+ "failed to register nvmem device\n");
+ return 0;
}
static struct platform_driver rockchip_otp_driver = {

0
target/linux/rockchip/patches-6.1/037-05-v6.5-iio-adc-rockchip_saradc-Match-alignment-with-open-parenth.patch → target/linux/rockchip/patches-6.1/036-05-v6.5-iio-adc-rockchip_saradc-Match-alignment-with-open-parenth.patch
View File

140
target/linux/rockchip/patches-6.1/036-05-v6.5-nvmem-rockchip-otp-Add-support-for-RK3588.patch
View File

@@ -1,140 +0,0 @@
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Shreeya Patel <shreeya.patel@collabora.com>,
Kever Yang <kever.yang@rock-chips.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Vincent Legoll <vincent.legoll@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: [PATCH v2 7/8] nvmem: rockchip-otp: Add support for RK3588
Date: Thu, 4 May 2023 23:06:47 +0300 [thread overview]
Message-ID: <20230504200648.1119866-8-cristian.ciocaltea@collabora.com> (raw)
In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com>
Add support for the OTP memory device found on the Rockchip RK3588 SoC.
While here, remove the unnecessary 'void *' casts in the OF device ID
table.
Co-developed-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/nvmem/rockchip-otp.c | 78 +++++++++++++++++++++++++++++++++++-
1 file changed, 76 insertions(+), 2 deletions(-)
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -54,6 +54,19 @@
#define OTPC_TIMEOUT 10000
+/* RK3588 Register */
+#define RK3588_OTPC_AUTO_CTRL 0x04
+#define RK3588_OTPC_AUTO_EN 0x08
+#define RK3588_OTPC_INT_ST 0x84
+#define RK3588_OTPC_DOUT0 0x20
+#define RK3588_NO_SECURE_OFFSET 0x300
+#define RK3588_NBYTES 4
+#define RK3588_BURST_NUM 1
+#define RK3588_BURST_SHIFT 8
+#define RK3588_ADDR_SHIFT 16
+#define RK3588_AUTO_EN BIT(0)
+#define RK3588_RD_DONE BIT(1)
+
struct rockchip_data {
int size;
const char * const *clks;
@@ -171,6 +184,52 @@ read_end:
return ret;
}
+static int rk3588_otp_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_otp *otp = context;
+ unsigned int addr_start, addr_end, addr_len;
+ int ret, i = 0;
+ u32 data;
+ u8 *buf;
+
+ addr_start = round_down(offset, RK3588_NBYTES) / RK3588_NBYTES;
+ addr_end = round_up(offset + bytes, RK3588_NBYTES) / RK3588_NBYTES;
+ addr_len = addr_end - addr_start;
+ addr_start += RK3588_NO_SECURE_OFFSET;
+
+ buf = kzalloc(array_size(addr_len, RK3588_NBYTES), GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ while (addr_len--) {
+ writel((addr_start << RK3588_ADDR_SHIFT) |
+ (RK3588_BURST_NUM << RK3588_BURST_SHIFT),
+ otp->base + RK3588_OTPC_AUTO_CTRL);
+ writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN);
+
+ ret = rockchip_otp_wait_status(otp, RK3588_OTPC_INT_ST,
+ RK3588_RD_DONE);
+ if (ret < 0) {
+ dev_err(otp->dev, "timeout during read setup\n");
+ goto read_end;
+ }
+
+ data = readl(otp->base + RK3588_OTPC_DOUT0);
+ memcpy(&buf[i], &data, RK3588_NBYTES);
+
+ i += RK3588_NBYTES;
+ addr_start++;
+ }
+
+ memcpy(val, buf + offset % RK3588_NBYTES, bytes);
+
+read_end:
+ kfree(buf);
+
+ return ret;
+}
+
static int rockchip_otp_read(void *context, unsigned int offset,
void *val, size_t bytes)
{
@@ -213,14 +272,29 @@ static const struct rockchip_data px30_d
.reg_read = px30_otp_read,
};
+static const char * const rk3588_otp_clocks[] = {
+ "otp", "apb_pclk", "phy", "arb",
+};
+
+static const struct rockchip_data rk3588_data = {
+ .size = 0x400,
+ .clks = rk3588_otp_clocks,
+ .num_clks = ARRAY_SIZE(rk3588_otp_clocks),
+ .reg_read = rk3588_otp_read,
+};
+
static const struct of_device_id rockchip_otp_match[] = {
{
.compatible = "rockchip,px30-otp",
- .data = (void *)&px30_data,
+ .data = &px30_data,
},
{
.compatible = "rockchip,rk3308-otp",
- .data = (void *)&px30_data,
+ .data = &px30_data,
+ },
+ {
+ .compatible = "rockchip,rk3588-otp",
+ .data = &rk3588_data,
},
{ /* sentinel */ },
};

0
target/linux/rockchip/patches-6.1/037-06-v6.5-iio-adc-rockchip_saradc-Use-dev_err_probe.patch → target/linux/rockchip/patches-6.1/036-06-v6.5-iio-adc-rockchip_saradc-Use-dev_err_probe.patch
View File

0
target/linux/rockchip/patches-6.1/038-01-v6.3-mmc-sdhci-of-dwcmshc-Update-DLL-and-pre-change-delay-for.patch → target/linux/rockchip/patches-6.1/037-01-v6.3-mmc-sdhci-of-dwcmshc-Update-DLL-and-pre-change-delay-for.patch
View File

0
target/linux/rockchip/patches-6.1/038-02-v6.4-mmc-sdhci-of-dwcmshc-properly-determine-max-clock-on.patch → target/linux/rockchip/patches-6.1/037-02-v6.4-mmc-sdhci-of-dwcmshc-properly-determine-max-clock-on.patch
View File

6
target/linux/rockchip/patches-6.1/110-03-soc-rockchip-power-domain-add-rk3588-mem-module-support.patch → target/linux/rockchip/patches-6.1/038-01-v6.5-soc-rockchip-power-domain-add-rk3588-mem-module-support.patch
View File

@@ -1,6 +1,6 @@
From 80299d07e63d41bffcf6bb38b0339e22e3ad87da Mon Sep 17 00:00:00 2001
From 814f5a42520ebf0bf26a06e2d0ddd1c7d08f32c2 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Tue, 12 Jul 2022 09:20:43 +0200
Date: Mon, 3 Apr 2023 21:32:50 +0200
Subject: [PATCH] soc: rockchip: power-domain: add rk3588 mem module support
On RK3588 it's also possible to power down the memory used by the
@@ -12,6 +12,8 @@ Co-Developed-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230403193250.108693-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/soc/rockchip/pm_domains.c | 160 +++++++++++++++++++++++-------
1 file changed, 125 insertions(+), 35 deletions(-)

93
target/linux/rockchip/patches-6.1/038-02-v6.5-soc-rockchip-dtpm-use-C99-array-init-syntax.patch Normal file
View File

@@ -0,0 +1,93 @@
From a10b3841f901714dbe16a8f9b0f2bbe1034e6454 Mon Sep 17 00:00:00 2001
From: Randy Dunlap <rdunlap@infradead.org>
Date: Sun, 30 Apr 2023 19:49:50 -0700
Subject: [PATCH] soc: rockchip: dtpm: use C99 array init syntax
Eliminate sparse warnings in soc/rockchip/dtpm.c:
drivers/soc/rockchip/dtpm.c:15:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:17:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:20:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:23:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:26:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:29:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:32:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:35:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:38:12: sparse: warning: obsolete array initializer, use C99 syntax
drivers/soc/rockchip/dtpm.c:41:12: sparse: warning: obsolete array initializer, use C99 syntax
Fixes: b9d6c47a2be8 ("rockchip/soc/drivers: Add DTPM description for rk3399")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230501024950.31518-1-rdunlap@infradead.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/soc/rockchip/dtpm.c | 54 ++++++++++++++++++-------------------
1 file changed, 27 insertions(+), 27 deletions(-)
--- a/drivers/soc/rockchip/dtpm.c
+++ b/drivers/soc/rockchip/dtpm.c
@@ -12,33 +12,33 @@
#include <linux/platform_device.h>
static struct dtpm_node __initdata rk3399_hierarchy[] = {
- [0]{ .name = "rk3399",
- .type = DTPM_NODE_VIRTUAL },
- [1]{ .name = "package",
- .type = DTPM_NODE_VIRTUAL,
- .parent = &rk3399_hierarchy[0] },
- [2]{ .name = "/cpus/cpu@0",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [3]{ .name = "/cpus/cpu@1",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [4]{ .name = "/cpus/cpu@2",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [5]{ .name = "/cpus/cpu@3",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [6]{ .name = "/cpus/cpu@100",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [7]{ .name = "/cpus/cpu@101",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [8]{ .name = "/gpu@ff9a0000",
- .type = DTPM_NODE_DT,
- .parent = &rk3399_hierarchy[1] },
- [9]{ /* sentinel */ }
+ [0] = { .name = "rk3399",
+ .type = DTPM_NODE_VIRTUAL },
+ [1] = { .name = "package",
+ .type = DTPM_NODE_VIRTUAL,
+ .parent = &rk3399_hierarchy[0] },
+ [2] = { .name = "/cpus/cpu@0",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [3] = { .name = "/cpus/cpu@1",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [4] = { .name = "/cpus/cpu@2",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [5] = { .name = "/cpus/cpu@3",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [6] = { .name = "/cpus/cpu@100",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [7] = { .name = "/cpus/cpu@101",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [8] = { .name = "/gpu@ff9a0000",
+ .type = DTPM_NODE_DT,
+ .parent = &rk3399_hierarchy[1] },
+ [9] = { /* sentinel */ }
};
static struct of_device_id __initdata rockchip_dtpm_match_table[] = {

45
target/linux/rockchip/patches-6.1/053-09-v6.5-arm64-dts-rockchip-Assign-ES8316-MCLK-rate-on.patch Normal file
View File

@@ -0,0 +1,45 @@
From 28ee08cef4f838c343013330a3cd12674c4dd113 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Tue, 30 May 2023 21:11:40 +0300
Subject: [PATCH] arm64: dts: rockchip: Assign ES8316 MCLK rate on
rk3588-rock-5b
The I2S0_8CH_MCLKOUT clock rate on Rock 5B board defaults to 12 MHz and
it is used to provide the master clock (MCLK) for the ES8316 audio
codec.
On sound card initialization, this limits the allowed sample rates
according to the MCLK/LRCK ratios supported by the codec, which results
in the following non-standard rates: 15625, 30000, 31250, 46875.
Hence, the very first access of the sound card fails:
Broken configuration for playback: no configurations available: Invalid argument
Setting of hwparams failed: Invalid argument
However, all subsequent attempts will succeed, as the audio graph card
will request a correct clock frequency, based on the stream sample rate
and the multiplication factor.
Assign MCLK to 12.288 MHz, which allows the codec to advertise most of
the standard sample rates.
Fixes: 55529fe3f32d ("arm64: dts: rockchip: Add rk3588-rock-5b analog audio")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20230530181140.483936-4-cristian.ciocaltea@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -133,6 +133,8 @@
reg = <0x11>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
#sound-dai-cells = <0>;
port {

2
target/linux/rockchip/patches-6.1/053-09-v6.5-arm64-dts-rockchip-add-PMIC-to-rock-5b.patch → target/linux/rockchip/patches-6.1/053-10-v6.5-arm64-dts-rockchip-add-PMIC-to-rock-5b.patch
View File

@@ -56,7 +56,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
@@ -190,6 +216,330 @@
@@ -192,6 +218,330 @@
status = "okay";
};

2
target/linux/rockchip/patches-6.1/053-10-v6.5-arm64-dts-rockchip-Add-SD-card-support-to-rock-5b.patch → target/linux/rockchip/patches-6.1/053-11-v6.5-arm64-dts-rockchip-Add-SD-card-support-to-rock-5b.patch
View File

@@ -15,7 +15,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -216,6 +216,20 @@
@@ -218,6 +218,20 @@
status = "okay";
};

28
target/linux/rockchip/patches-6.1/053-12-v6.5-arm64-dts-rockchip-Add-saradc-node-to-rock5b.patch Normal file
View File

@@ -0,0 +1,28 @@
From a68e1aec587a75a51496f1b207272b6034cca190 Mon Sep 17 00:00:00 2001
From: Shreeya Patel <shreeya.patel@collabora.com>
Date: Sat, 10 Jun 2023 19:18:41 +0530
Subject: [PATCH] arm64: dts: rockchip: Add saradc node to rock5b
Add ADC support for ROCK 5B.
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Link: https://lore.kernel.org/r/20230610134841.172313-1-shreeya.patel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -207,6 +207,11 @@
status = "okay";
};
+&saradc {
+ vref-supply = <&avcc_1v8_s0>;
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
no-sdio;

0
target/linux/rockchip/patches-6.1/110-05-arm64-dts-rockchip-rk3588-evb1-add-cpu-regulator-info.patch → target/linux/rockchip/patches-6.1/110-03-arm64-dts-rockchip-rk3588-evb1-add-cpu-regulator-info.patch
View File

2
target/linux/rockchip/patches-6.1/112-09-arm64-dts-rockchip-rk3588-rock5b-add-USB2.patch
View File

@@ -46,7 +46,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
&cpu_b0 {
@@ -558,3 +573,46 @@
@@ -565,3 +580,46 @@
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};

2
target/linux/rockchip/patches-6.1/115-03-arm64-dts-rockchip-RK3588s-Enable-PCIE2-0x1-fe190000.patch
View File

@@ -29,7 +29,7 @@ Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com>
};
&cpu_b0 {
@@ -616,3 +625,14 @@
@@ -623,3 +632,14 @@
};
};
};