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rockchip: 6.1: refresh kernel patches

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Refresh kernel patches for version 6.1.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2023-05-23 13:11:35 +08:00
parent 496436c0e0
commit 58da242f09
87 changed files with 78 additions and 4415 deletions
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2
target/linux/generic/hack-6.1/312-arm64-cpuinfo-Add-model-name-in-proc-cpuinfo-for-64bit-ta.patch
View File

@@ -24,7 +24,7 @@ Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -151,9 +151,8 @@ static int c_show(struct seq_file *m, vo
@@ -170,9 +170,8 @@ static int c_show(struct seq_file *m, vo
* "processor". Give glibc what it expects.
*/
seq_printf(m, "processor\t: %d\n", i);

60
target/linux/rockchip/patches-6.1/007-v6.1-arm64-dts-rockchip-Add-RK3399-NanoPi-R4S-Enterprise-.patch
View File

@@ -1,60 +0,0 @@
From fd573b2bf2d2cf61e835ea68bbaa34c71d4a70d7 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@gmail.com>
Date: Thu, 15 Sep 2022 10:25:11 +0800
Subject: [PATCH] arm64: dts: rockchip: Add RK3399 NanoPi R4S Enterprise
Edition
The only diffrence against the standrard edition is that the enterprise
one has a built-in EEPROM chip which stores a globally unique MAC address.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20220915022511.4267-2-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../rockchip/rk3399-nanopi-r4s-enterprise.dts | 29 +++++++++++++++++++
2 files changed, 30 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -37,6 +37,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-na
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s-enterprise.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include "rk3399-nanopi-r4s.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R4S Enterprise Edition";
+ compatible = "friendlyarm,nanopi-r4s-enterprise", "rockchip,rk3399";
+};
+
+&gmac {
+ nvmem-cells = <&mac_address>;
+ nvmem-cell-names = "mac-address";
+};
+
+&i2c2 {
+ eeprom@51 {
+ compatible = "microchip,24c02", "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ size = <256>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_address: mac-address@fa {
+ reg = <0xfa 0x06>;
+ };
+ };
+};

155
target/linux/rockchip/patches-6.1/008-0001-v5.16-ASoC-rockchip-Add-support-for-rv1126-pdm.patch
View File

@@ -1,155 +0,0 @@
From d269aa2ab975807764dc2509e4156bb9b6bd0d34 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 3 Sep 2021 21:23:24 +0800
Subject: [PATCH] ASoC: rockchip: Add support for rv1126 pdm
This patch adds support for rv1126 pdm controller which
redesign cic filiter for better performance.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1630675410-3354-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/rockchip/rockchip_pdm.c | 76 ++++++++++++++++++++++++++++---
sound/soc/rockchip/rockchip_pdm.h | 3 ++
2 files changed, 73 insertions(+), 6 deletions(-)
--- a/sound/soc/rockchip/rockchip_pdm.c
+++ b/sound/soc/rockchip/rockchip_pdm.c
@@ -24,6 +24,7 @@
enum rk_pdm_version {
RK_PDM_RK3229,
RK_PDM_RK3308,
+ RK_PDM_RV1126,
};
struct rk_pdm_dev {
@@ -121,6 +122,55 @@ static unsigned int get_pdm_ds_ratio(uns
return ratio;
}
+static unsigned int get_pdm_cic_ratio(unsigned int clk)
+{
+ switch (clk) {
+ case 4096000:
+ case 5644800:
+ case 6144000:
+ return 0;
+ case 2048000:
+ case 2822400:
+ case 3072000:
+ return 1;
+ case 1024000:
+ case 1411200:
+ case 1536000:
+ return 2;
+ default:
+ return 1;
+ }
+}
+
+static unsigned int samplerate_to_bit(unsigned int samplerate)
+{
+ switch (samplerate) {
+ case 8000:
+ case 11025:
+ case 12000:
+ return 0;
+ case 16000:
+ case 22050:
+ case 24000:
+ return 1;
+ case 32000:
+ return 2;
+ case 44100:
+ case 48000:
+ return 3;
+ case 64000:
+ case 88200:
+ case 96000:
+ return 4;
+ case 128000:
+ case 176400:
+ case 192000:
+ return 5;
+ default:
+ return 1;
+ }
+}
+
static inline struct rk_pdm_dev *to_info(struct snd_soc_dai *dai)
{
return snd_soc_dai_get_drvdata(dai);
@@ -166,7 +216,8 @@ static int rockchip_pdm_hw_params(struct
if (ret)
return -EINVAL;
- if (pdm->version == RK_PDM_RK3308) {
+ if (pdm->version == RK_PDM_RK3308 ||
+ pdm->version == RK_PDM_RV1126) {
rational_best_approximation(clk_out, clk_src,
GENMASK(16 - 1, 0),
GENMASK(16 - 1, 0),
@@ -194,8 +245,18 @@ static int rockchip_pdm_hw_params(struct
PDM_CLK_FD_RATIO_MSK,
val);
}
- val = get_pdm_ds_ratio(samplerate);
- regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_DS_RATIO_MSK, val);
+
+ if (pdm->version == RK_PDM_RV1126) {
+ val = get_pdm_cic_ratio(clk_out);
+ regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_CIC_RATIO_MSK, val);
+ val = samplerate_to_bit(samplerate);
+ regmap_update_bits(pdm->regmap, PDM_CTRL0,
+ PDM_SAMPLERATE_MSK, PDM_SAMPLERATE(val));
+ } else {
+ val = get_pdm_ds_ratio(samplerate);
+ regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_DS_RATIO_MSK, val);
+ }
+
regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
PDM_HPF_CF_MSK, PDM_HPF_60HZ);
regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
@@ -442,9 +503,10 @@ static bool rockchip_pdm_precious_reg(st
}
static const struct reg_default rockchip_pdm_reg_defaults[] = {
- {0x04, 0x78000017},
- {0x08, 0x0bb8ea60},
- {0x18, 0x0000001f},
+ { PDM_CTRL0, 0x78000017 },
+ { PDM_CTRL1, 0x0bb8ea60 },
+ { PDM_CLK_CTRL, 0x0000e401 },
+ { PDM_DMA_CTRL, 0x0000001f },
};
static const struct regmap_config rockchip_pdm_regmap_config = {
@@ -470,6 +532,8 @@ static const struct of_device_id rockchi
.data = (void *)RK_PDM_RK3308 },
{ .compatible = "rockchip,rk3308-pdm",
.data = (void *)RK_PDM_RK3308 },
+ { .compatible = "rockchip,rv1126-pdm",
+ .data = (void *)RK_PDM_RV1126 },
{},
};
MODULE_DEVICE_TABLE(of, rockchip_pdm_match);
--- a/sound/soc/rockchip/rockchip_pdm.h
+++ b/sound/soc/rockchip/rockchip_pdm.h
@@ -41,6 +41,8 @@
#define PDM_PATH1_EN BIT(28)
#define PDM_PATH0_EN BIT(27)
#define PDM_HWT_EN BIT(26)
+#define PDM_SAMPLERATE_MSK GENMASK(7, 5)
+#define PDM_SAMPLERATE(x) ((x) << 5)
#define PDM_VDW_MSK (0x1f << 0)
#define PDM_VDW(X) ((X - 1) << 0)
@@ -66,6 +68,7 @@
#define PDM_CLK_1280FS (0x2 << 0)
#define PDM_CLK_2560FS (0x3 << 0)
#define PDM_CLK_5120FS (0x4 << 0)
+#define PDM_CIC_RATIO_MSK (0x3 << 0)
/* PDM HPF CTRL */
#define PDM_HPF_LE BIT(3)

26
target/linux/rockchip/patches-6.1/008-0002-v5.16-ASoC-rockchip-pdm-Add-support-for-rk3568-pdm.patch
View File

@@ -1,26 +0,0 @@
From d00d1cd4ab42f92d4d871deb9cdea1d7c262a213 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 3 Sep 2021 21:23:26 +0800
Subject: [PATCH] ASoC: rockchip: pdm: Add support for rk3568 pdm
This patch adds compatible for rk3568 which is the same
with rv1126.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1630675410-3354-3-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/rockchip/rockchip_pdm.c | 2 ++
1 file changed, 2 insertions(+)
--- a/sound/soc/rockchip/rockchip_pdm.c
+++ b/sound/soc/rockchip/rockchip_pdm.c
@@ -532,6 +532,8 @@ static const struct of_device_id rockchi
.data = (void *)RK_PDM_RK3308 },
{ .compatible = "rockchip,rk3308-pdm",
.data = (void *)RK_PDM_RK3308 },
+ { .compatible = "rockchip,rk3568-pdm",
+ .data = (void *)RK_PDM_RV1126 },
{ .compatible = "rockchip,rv1126-pdm",
.data = (void *)RK_PDM_RV1126 },
{},

95
target/linux/rockchip/patches-6.1/008-0003-v5.16-ASoC-rockchip-pdm-Add-support-for-path-map.patch
View File

@@ -1,95 +0,0 @@
From 13e6e042a6f9c2be676f421935e026308de3303c Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Fri, 3 Sep 2021 21:23:28 +0800
Subject: [PATCH] ASoC: rockchip: pdm: Add support for path map
This patch adds property 'rockchip,path-map' for path mapping.
e.g.
"rockchip,path-map = <3 2 1 0>" means the mapping as follows:
path0 <-- sdi3
path1 <-- sdi2
path2 <-- sdi1
path3 <-- sdi0
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1630675410-3354-5-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/rockchip/rockchip_pdm.c | 34 +++++++++++++++++++++++++++++++
sound/soc/rockchip/rockchip_pdm.h | 3 +++
2 files changed, 37 insertions(+)
--- a/sound/soc/rockchip/rockchip_pdm.c
+++ b/sound/soc/rockchip/rockchip_pdm.c
@@ -20,6 +20,7 @@
#define PDM_DMA_BURST_SIZE (8) /* size * width: 8*4 = 32 bytes */
#define PDM_SIGNOFF_CLK_RATE (100000000)
+#define PDM_PATH_MAX (4)
enum rk_pdm_version {
RK_PDM_RK3229,
@@ -540,8 +541,36 @@ static const struct of_device_id rockchi
};
MODULE_DEVICE_TABLE(of, rockchip_pdm_match);
+static int rockchip_pdm_path_parse(struct rk_pdm_dev *pdm, struct device_node *node)
+{
+ unsigned int path[PDM_PATH_MAX];
+ int cnt = 0, ret = 0, i = 0, val = 0, msk = 0;
+
+ cnt = of_count_phandle_with_args(node, "rockchip,path-map",
+ NULL);
+ if (cnt != PDM_PATH_MAX)
+ return cnt;
+
+ ret = of_property_read_u32_array(node, "rockchip,path-map",
+ path, cnt);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < cnt; i++) {
+ if (path[i] >= PDM_PATH_MAX)
+ return -EINVAL;
+ msk |= PDM_PATH_MASK(i);
+ val |= PDM_PATH(i, path[i]);
+ }
+
+ regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, msk, val);
+
+ return 0;
+}
+
static int rockchip_pdm_probe(struct platform_device *pdev)
{
+ struct device_node *node = pdev->dev.of_node;
const struct of_device_id *match;
struct rk_pdm_dev *pdm;
struct resource *res;
@@ -607,6 +636,11 @@ static int rockchip_pdm_probe(struct pla
}
rockchip_pdm_rxctrl(pdm, 0);
+
+ ret = rockchip_pdm_path_parse(pdm, node);
+ if (ret != 0 && ret != -ENOENT)
+ goto err_suspend;
+
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
if (ret) {
dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
--- a/sound/soc/rockchip/rockchip_pdm.h
+++ b/sound/soc/rockchip/rockchip_pdm.h
@@ -53,6 +53,9 @@
#define PDM_FD_DENOMINATOR_MSK GENMASK(15, 0)
/* PDM CLK CTRL */
+#define PDM_PATH_SHIFT(x) (8 + (x) * 2)
+#define PDM_PATH_MASK(x) (0x3 << PDM_PATH_SHIFT(x))
+#define PDM_PATH(x, v) ((v) << PDM_PATH_SHIFT(x))
#define PDM_CLK_FD_RATIO_MSK BIT(6)
#define PDM_CLK_FD_RATIO_40 (0X0 << 6)
#define PDM_CLK_FD_RATIO_35 BIT(6)

32
target/linux/rockchip/patches-6.1/008-0004-v5.16-arm64-dts-rockchip-add-rk3568-tsadc-nodes.patch
View File

@@ -1,32 +0,0 @@
From 1330875dc2a3742fd41127e78d5036f2d8f261da Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Wed, 28 Jul 2021 14:00:31 -0400
Subject: [PATCH] arm64: dts: rockchip: add rk3568 tsadc nodes
Add the thermal and tsadc nodes to the rk3568 device tree.
There are two sensors, one for the cpu, one for the gpu.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-6-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-pinctrl.dtsi | 9 +++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 70 +++++++++++++++++++
2 files changed, 79 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
@@ -3108,4 +3108,13 @@
<4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
};
};
+
+ tsadc {
+ /omit-if-no-ref/
+ tsadc_pin: tsadc-pin {
+ rockchip,pins =
+ /* tsadc_pin */
+ <0 RK_PA1 0 &pcfg_pull_none>;
+ };
+ };
};

28
target/linux/rockchip/patches-6.1/008-0005-v5.16-thermal-drivers-rockchip_thermal-Allow-more-resets-for-ts.patch
View File

@@ -1,28 +0,0 @@
From 02832ed8ae2c8b130efea4e43d3ecac50b4b7933 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Thu, 30 Sep 2021 13:05:16 +0200
Subject: [PATCH] thermal/drivers/rockchip_thermal: Allow more resets for tsadc
node
The tsadc node in rk356x.dtsi has more resets then currently supported
by the rockchip_thermal.c driver, so use
devm_reset_control_array_get() to reset them all.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210930110517.14323-3-jbx6244@gmail.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/thermal/rockchip_thermal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -1383,7 +1383,7 @@ static int rockchip_thermal_probe(struct
if (IS_ERR(thermal->regs))
return PTR_ERR(thermal->regs);
- thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
+ thermal->reset = devm_reset_control_array_get(&pdev->dev, false, false);
if (IS_ERR(thermal->reset)) {
error = PTR_ERR(thermal->reset);
dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);

27
target/linux/rockchip/patches-6.1/008-0006-v5.16-mfd-rk808-Add-support-for-power-off-on-RK817.patch
View File

@@ -1,27 +0,0 @@
From 4d94b98f2e2407e3f053b2546f86c76179fea644 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megous@megous.com>
Date: Sun, 29 Aug 2021 04:51:53 +0200
Subject: [PATCH] mfd: rk808: Add support for power off on RK817
RK817 has a power-off bit in SYS_CFG3. Add support for powering
off the PMIC.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
drivers/mfd/rk808.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -543,6 +543,10 @@ static void rk808_pm_power_off(void)
reg = RK808_DEVCTRL_REG,
bit = DEV_OFF_RST;
break;
+ case RK817_ID:
+ reg = RK817_SYS_CFG(3);
+ bit = DEV_OFF;
+ break;
case RK818_ID:
reg = RK818_DEVCTRL_REG;
bit = DEV_OFF;

45
target/linux/rockchip/patches-6.1/008-0007-v5.17-phy-phy-rockchip-inno-usb2-support-address_cells-2.patch
View File

@@ -1,45 +0,0 @@
From 9c19c531dc98d7ba49b44802a607042e763ebe21 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Wed, 15 Dec 2021 16:02:47 -0500
Subject: [PATCH] phy: phy-rockchip-inno-usb2: support #address_cells = 2
New Rockchip devices have the usb phy nodes as standalone devices.
These nodes have register nodes with #address_cells = 2, but only use 32
bit addresses.
Adjust the driver to check if the returned address is "0", and adjust
the index in that case.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-4-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1100,12 +1100,21 @@ static int rockchip_usb2phy_probe(struct
rphy->usbgrf = NULL;
}
- if (of_property_read_u32(np, "reg", &reg)) {
+ if (of_property_read_u32_index(np, "reg", 0, &reg)) {
dev_err(dev, "the reg property is not assigned in %pOFn node\n",
np);
return -EINVAL;
}
+ /* support address_cells=2 */
+ if (reg == 0) {
+ if (of_property_read_u32_index(np, "reg", 1, &reg)) {
+ dev_err(dev, "the reg property is not assigned in %pOFn node\n",
+ np);
+ return -EINVAL;
+ }
+ }
+
rphy->dev = dev;
phy_cfgs = match->data;
rphy->chg_state = USB_CHG_STATE_UNDEFINED;

237
target/linux/rockchip/patches-6.1/008-0008-v5.17-phy-phy-rockchip-inno-usb2-support-muxed-interrupts.patch
View File

@@ -1,237 +0,0 @@
From ed2b5a8e6b98d042b323afbe177a5dc618921b31 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Wed, 15 Dec 2021 16:02:49 -0500
Subject: [PATCH] phy: phy-rockchip-inno-usb2: support muxed interrupts
The rk3568 usb2phy has a single muxed interrupt that handles all
interrupts.
Allow the driver to plug in only a single interrupt as necessary.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-6-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 168 +++++++++++++-----
1 file changed, 119 insertions(+), 49 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -204,6 +204,7 @@ struct rockchip_usb2phy_port {
* @dcd_retries: The retry count used to track Data contact
* detection process.
* @edev: extcon device for notification registration
+ * @irq: muxed interrupt for single irq configuration
* @phy_cfg: phy register configuration, assigned by driver data.
* @ports: phy port instance.
*/
@@ -218,6 +219,7 @@ struct rockchip_usb2phy {
enum power_supply_type chg_type;
u8 dcd_retries;
struct extcon_dev *edev;
+ int irq;
const struct rockchip_usb2phy_cfg *phy_cfg;
struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
};
@@ -936,6 +938,102 @@ static irqreturn_t rockchip_usb2phy_otg_
return IRQ_NONE;
}
+static irqreturn_t rockchip_usb2phy_irq(int irq, void *data)
+{
+ struct rockchip_usb2phy *rphy = data;
+ struct rockchip_usb2phy_port *rport;
+ irqreturn_t ret = IRQ_NONE;
+ unsigned int index;
+
+ for (index = 0; index < rphy->phy_cfg->num_ports; index++) {
+ rport = &rphy->ports[index];
+ if (!rport->phy)
+ continue;
+
+ /* Handle linestate irq for both otg port and host port */
+ ret = rockchip_usb2phy_linestate_irq(irq, rport);
+ }
+
+ return ret;
+}
+
+static int rockchip_usb2phy_port_irq_init(struct rockchip_usb2phy *rphy,
+ struct rockchip_usb2phy_port *rport,
+ struct device_node *child_np)
+{
+ int ret;
+
+ /*
+ * If the usb2 phy used combined irq for otg and host port,
+ * don't need to init otg and host port irq separately.
+ */
+ if (rphy->irq > 0)
+ return 0;
+
+ switch (rport->port_id) {
+ case USB2PHY_PORT_HOST:
+ rport->ls_irq = of_irq_get_byname(child_np, "linestate");
+ if (rport->ls_irq < 0) {
+ dev_err(rphy->dev, "no linestate irq provided\n");
+ return rport->ls_irq;
+ }
+
+ ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
+ rockchip_usb2phy_linestate_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy", rport);
+ if (ret) {
+ dev_err(rphy->dev, "failed to request linestate irq handle\n");
+ return ret;
+ }
+ break;
+ case USB2PHY_PORT_OTG:
+ /*
+ * Some SoCs use one interrupt with otg-id/otg-bvalid/linestate
+ * interrupts muxed together, so probe the otg-mux interrupt first,
+ * if not found, then look for the regular interrupts one by one.
+ */
+ rport->otg_mux_irq = of_irq_get_byname(child_np, "otg-mux");
+ if (rport->otg_mux_irq > 0) {
+ ret = devm_request_threaded_irq(rphy->dev, rport->otg_mux_irq,
+ NULL,
+ rockchip_usb2phy_otg_mux_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy_otg",
+ rport);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request otg-mux irq handle\n");
+ return ret;
+ }
+ } else {
+ rport->bvalid_irq = of_irq_get_byname(child_np, "otg-bvalid");
+ if (rport->bvalid_irq < 0) {
+ dev_err(rphy->dev, "no vbus valid irq provided\n");
+ ret = rport->bvalid_irq;
+ return ret;
+ }
+
+ ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq,
+ NULL,
+ rockchip_usb2phy_bvalid_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy_bvalid",
+ rport);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request otg-bvalid irq handle\n");
+ return ret;
+ }
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
struct rockchip_usb2phy_port *rport,
struct device_node *child_np)
@@ -949,18 +1047,9 @@ static int rockchip_usb2phy_host_port_in
mutex_init(&rport->mutex);
INIT_DELAYED_WORK(&rport->sm_work, rockchip_usb2phy_sm_work);
- rport->ls_irq = of_irq_get_byname(child_np, "linestate");
- if (rport->ls_irq < 0) {
- dev_err(rphy->dev, "no linestate irq provided\n");
- return rport->ls_irq;
- }
-
- ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
- rockchip_usb2phy_linestate_irq,
- IRQF_ONESHOT,
- "rockchip_usb2phy", rport);
+ ret = rockchip_usb2phy_port_irq_init(rphy, rport, child_np);
if (ret) {
- dev_err(rphy->dev, "failed to request linestate irq handle\n");
+ dev_err(rphy->dev, "failed to setup host irq\n");
return ret;
}
@@ -1009,44 +1098,10 @@ static int rockchip_usb2phy_otg_port_ini
INIT_DELAYED_WORK(&rport->chg_work, rockchip_chg_detect_work);
INIT_DELAYED_WORK(&rport->otg_sm_work, rockchip_usb2phy_otg_sm_work);
- /*
- * Some SoCs use one interrupt with otg-id/otg-bvalid/linestate
- * interrupts muxed together, so probe the otg-mux interrupt first,
- * if not found, then look for the regular interrupts one by one.
- */
- rport->otg_mux_irq = of_irq_get_byname(child_np, "otg-mux");
- if (rport->otg_mux_irq > 0) {
- ret = devm_request_threaded_irq(rphy->dev, rport->otg_mux_irq,
- NULL,
- rockchip_usb2phy_otg_mux_irq,
- IRQF_ONESHOT,
- "rockchip_usb2phy_otg",
- rport);
- if (ret) {
- dev_err(rphy->dev,
- "failed to request otg-mux irq handle\n");
- goto out;
- }
- } else {
- rport->bvalid_irq = of_irq_get_byname(child_np, "otg-bvalid");
- if (rport->bvalid_irq < 0) {
- dev_err(rphy->dev, "no vbus valid irq provided\n");
- ret = rport->bvalid_irq;
- goto out;
- }
-
- ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq,
- NULL,
- rockchip_usb2phy_bvalid_irq,
- IRQF_ONESHOT,
- "rockchip_usb2phy_bvalid",
- rport);
- if (ret) {
- dev_err(rphy->dev,
- "failed to request otg-bvalid irq handle\n");
- goto out;
- }
- }
+ ret = rockchip_usb2phy_port_irq_init(rphy, rport, child_np);
+ if (ret) {
+ dev_err(rphy->dev, "failed to init irq for host port\n");
+ goto out;
if (!IS_ERR(rphy->edev)) {
rport->event_nb.notifier_call = rockchip_otg_event;
@@ -1119,6 +1174,7 @@ static int rockchip_usb2phy_probe(struct
phy_cfgs = match->data;
rphy->chg_state = USB_CHG_STATE_UNDEFINED;
rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
+ rphy->irq = platform_get_irq_optional(pdev, 0);
platform_set_drvdata(pdev, rphy);
ret = rockchip_usb2phy_extcon_register(rphy);
@@ -1198,6 +1254,20 @@ next_child:
}
provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+ if (rphy->irq > 0) {
+ ret = devm_request_threaded_irq(rphy->dev, rphy->irq, NULL,
+ rockchip_usb2phy_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy",
+ rphy);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request usb2phy irq handle\n");
+ goto put_child;
+ }
+ }
+
return PTR_ERR_OR_ZERO(provider);
put_child:

44
target/linux/rockchip/patches-6.1/008-0009-v5.17-phy-phy-rockchip-inno-usb2-support-standalone-phy-nodes.patch
View File

@@ -1,44 +0,0 @@
From e6915e1acca57bc4fdb61dccd5cc2e49f72ef743 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Wed, 15 Dec 2021 16:02:48 -0500
Subject: [PATCH] phy: phy-rockchip-inno-usb2: support standalone phy nodes
New Rockchip devices have the usb2 phy devices as standalone nodes
instead of children of the grf node.
Allow the driver to find the grf node from a phandle.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-5-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1138,12 +1138,19 @@ static int rockchip_usb2phy_probe(struct
return -EINVAL;
}
- if (!dev->parent || !dev->parent->of_node)
- return -EINVAL;
+ if (!dev->parent || !dev->parent->of_node) {
+ rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
+ if (IS_ERR(rphy->grf)) {
+ dev_err(dev, "failed to locate usbgrf\n");
+ return PTR_ERR(rphy->grf);
+ }
+ }
- rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
- if (IS_ERR(rphy->grf))
- return PTR_ERR(rphy->grf);
+ else {
+ rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(rphy->grf))
+ return PTR_ERR(rphy->grf);
+ }
if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
rphy->usbgrf =

104
target/linux/rockchip/patches-6.1/008-0010-v5.17-phy-phy-rockchip-inno-usb2-add-rk3568-support.patch
View File

@@ -1,104 +0,0 @@
From 42b559727a45d79c811f493515eb9b7e56016421 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Wed, 15 Dec 2021 16:02:50 -0500
Subject: [PATCH] phy: phy-rockchip-inno-usb2: add rk3568 support
The rk3568 usb2phy is a standalone device with a single muxed interrupt.
Add support for the registers to the usb2phy driver.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20211215210252.120923-7-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 65 +++++++++++++++++++
1 file changed, 65 insertions(+)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1102,6 +1102,7 @@ static int rockchip_usb2phy_otg_port_ini
if (ret) {
dev_err(rphy->dev, "failed to init irq for host port\n");
goto out;
+ }
if (!IS_ERR(rphy->edev)) {
rport->event_nb.notifier_call = rockchip_otg_event;
@@ -1513,6 +1514,69 @@ static const struct rockchip_usb2phy_cfg
{ /* sentinel */ }
};
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+ {
+ .reg = 0xfe8a0000,
+ .num_ports = 2,
+ .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
+ .bvalid_det_en = { 0x0080, 2, 2, 0, 1 },
+ .bvalid_det_st = { 0x0084, 2, 2, 0, 1 },
+ .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+ .utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
+ .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
+ },
+ [USB2PHY_PORT_HOST] = {
+ /* Select suspend control from controller */
+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d2 },
+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
+ }
+ },
+ .chg_det = {
+ .opmode = { 0x0000, 3, 0, 5, 1 },
+ .cp_det = { 0x00c0, 24, 24, 0, 1 },
+ .dcp_det = { 0x00c0, 23, 23, 0, 1 },
+ .dp_det = { 0x00c0, 25, 25, 0, 1 },
+ .idm_sink_en = { 0x0008, 8, 8, 0, 1 },
+ .idp_sink_en = { 0x0008, 7, 7, 0, 1 },
+ .idp_src_en = { 0x0008, 9, 9, 0, 1 },
+ .rdm_pdwn_en = { 0x0008, 10, 10, 0, 1 },
+ .vdm_src_en = { 0x0008, 12, 12, 0, 1 },
+ .vdp_src_en = { 0x0008, 11, 11, 0, 1 },
+ },
+ },
+ {
+ .reg = 0xfe8b0000,
+ .num_ports = 2,
+ .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0080, 0, 0, 0, 1 },
+ .ls_det_st = { 0x0084, 0, 0, 0, 1 },
+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
+ .utmi_ls = { 0x00c0, 5, 4, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 }
+ },
+ [USB2PHY_PORT_HOST] = {
+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
+ }
+ },
+ },
+ { /* sentinel */ }
+};
+
static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
{
.reg = 0x100,
@@ -1562,6 +1626,7 @@ static const struct of_device_id rockchi
{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+ { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
{}
};

44
target/linux/rockchip/patches-6.1/008-0011-v5.18-clk-rockchip-Add-more-PLL-rates-for-rk3568.patch
View File

@@ -1,44 +0,0 @@
From 842f4cb7263953020f4e2f2f0005fc3e6fc56144 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed, 26 Jan 2022 15:55:33 +0100
Subject: [PATCH] clk: rockchip: Add more PLL rates for rk3568
This adds a few more PLL settings needed for some standard resolutions:
297MHz 3840x2160-30.00
241.5MHz 2560x1440-59.95
135MHz 1280x1024-75.02
119MHz 1680x1050-59.88
108MHz 1280x1024-60.02
78.75MHz 1024x768-75.03
Changes since v3:
- new patch
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220126145549.617165-12-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/clk/rockchip/clk-rk3568.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/clk/rockchip/clk-rk3568.c
+++ b/drivers/clk/rockchip/clk-rk3568.c
@@ -71,11 +71,17 @@ static struct rockchip_pll_rate_table rk
RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
RK3036_PLL_RATE(408000000, 1, 68, 2, 2, 1, 0),
RK3036_PLL_RATE(312000000, 1, 78, 6, 1, 1, 0),
+ RK3036_PLL_RATE(297000000, 2, 99, 4, 1, 1, 0),
+ RK3036_PLL_RATE(241500000, 2, 161, 4, 2, 1, 0),
RK3036_PLL_RATE(216000000, 1, 72, 4, 2, 1, 0),
RK3036_PLL_RATE(200000000, 1, 100, 3, 4, 1, 0),
RK3036_PLL_RATE(148500000, 1, 99, 4, 4, 1, 0),
+ RK3036_PLL_RATE(135000000, 2, 45, 4, 1, 1, 0),
+ RK3036_PLL_RATE(119000000, 3, 119, 4, 2, 1, 0),
+ RK3036_PLL_RATE(108000000, 2, 45, 5, 1, 1, 0),
RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
RK3036_PLL_RATE(96000000, 1, 96, 6, 4, 1, 0),
+ RK3036_PLL_RATE(78750000, 1, 96, 6, 4, 1, 0),
RK3036_PLL_RATE(74250000, 2, 99, 4, 4, 1, 0),
{ /* sentinel */ },
};

52
target/linux/rockchip/patches-6.1/008-0012-v5.18-clk-rockchip-Add-CLK_SET_RATE_PARENT-to-the-HDMI-referenc.patch
View File

@@ -1,52 +0,0 @@
From 6e69052f01d9131388cfcfaee929120118a267f4 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed, 26 Jan 2022 15:55:47 +0100
Subject: [PATCH] clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference
clock on rk3568
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
On the rk3568 we have this (simplified) situation:
.--------. .-----. .---------.
-| hpll |--.--| /n |----|dclk_vop0|-
`--------´ | `-----´ `---------´
| .-----. .---------.
`--| /m |----|dclk_vop1|-
| `-----´ `---------´
| .---------.
`-------------|hdmi_ref |-
`---------´
For the HDMI to work the HDMI reference clock needs to be the same as the
pixel clock which means the dividers have be set to one. The last patch removed
the CLK_SET_RATE_PARENT flag from the pixel clocks which means the hpll is not
changed on pixel clock changes. In order to allow the HDMI controller to
set a suitable PLL rate we now add the CLK_SET_RATE_PARENT flag to the
HDMI reference clock. With this the flow becomes:
1) HDMI controller driver sets the rate to its pixel clock which means
hpll is set to the pixel clock
2) VOP2 driver sets dclk_vop[012] to the pixel clock. As this can't change
the hpll clock anymore this means only the divider is adjusted to the
desired value of dividing by one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220126145549.617165-26-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/clk/rockchip/clk-rk3568.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/clk/rockchip/clk-rk3568.c
+++ b/drivers/clk/rockchip/clk-rk3568.c
@@ -1568,7 +1568,7 @@ static struct rockchip_clk_branch rk3568
RK3568_PMU_CLKGATE_CON(2), 14, GFLAGS),
GATE(XIN_OSC0_EDPPHY_G, "xin_osc0_edpphy_g", "xin24m", 0,
RK3568_PMU_CLKGATE_CON(2), 15, GFLAGS),
- MUX(CLK_HDMI_REF, "clk_hdmi_ref", clk_hdmi_ref_p, 0,
+ MUX(CLK_HDMI_REF, "clk_hdmi_ref", clk_hdmi_ref_p, CLK_SET_RATE_PARENT,
RK3568_PMU_CLKSEL_CON(8), 7, 1, MFLAGS),
};

49
target/linux/rockchip/patches-6.1/008-0013-v5.18-phy-rockchip-add-naneng-combo-phy-for-RK3568.patch
View File

@@ -1,49 +0,0 @@
From 7160820d742a16313f7802e33c2956c19548e488 Mon Sep 17 00:00:00 2001
From: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date: Tue, 8 Feb 2022 17:13:25 +0800
Subject: [PATCH] phy: rockchip: add naneng combo phy for RK3568
This patch implements a combo phy driver for Rockchip SoCs
with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
sata-phy or sgmii-phy.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220208091326.12495-4-yifeng.zhao@rock-chips.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/Kconfig | 8 +
drivers/phy/rockchip/Makefile | 1 +
.../rockchip/phy-rockchip-naneng-combphy.c | 581 ++++++++++++++++++
3 files changed, 590 insertions(+)
create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
--- a/drivers/phy/rockchip/Kconfig
+++ b/drivers/phy/rockchip/Kconfig
@@ -66,6 +66,14 @@ config PHY_ROCKCHIP_INNO_DSIDPHY
Enable this to support the Rockchip MIPI/LVDS/TTL PHY with
Innosilicon IP block.
+config PHY_ROCKCHIP_NANENG_COMBO_PHY
+ tristate "Rockchip NANENG COMBO PHY Driver"
+ depends on ARCH_ROCKCHIP && OF
+ select GENERIC_PHY
+ help
+ Enable this to support the Rockchip PCIe/USB3.0/SATA/QSGMII
+ combo PHY with NaNeng IP block.
+
config PHY_ROCKCHIP_PCIE
tristate "Rockchip PCIe PHY Driver"
depends on (ARCH_ROCKCHIP && OF) || COMPILE_TEST
--- a/drivers/phy/rockchip/Makefile
+++ b/drivers/phy/rockchip/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY)
obj-$(CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY) += phy-rockchip-inno-dsidphy.o
obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o
obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
+obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY) += phy-rockchip-naneng-combphy.o
obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o
obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o

54
target/linux/rockchip/patches-6.1/008-0014-v5.18-mmc-dw_mmc-Support-setting-f_min-from-host-drivers.patch
View File

@@ -1,54 +0,0 @@
From c4313e75001492f8a288d3ffd595544cbc880821 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Sat, 5 Mar 2022 16:58:34 -0500
Subject: [PATCH] mmc: dw_mmc: Support setting f_min from host drivers
Host drivers may not be able to support frequencies as low as dw-mmc
supports. Unfortunately f_min isn't available when the drv_data->init
function is called, as the mmc_host struct hasn't been set up yet.
Support the host drivers saving the requested minimum frequency, so we
can later set f_min when it is available.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220305215835.2210388-2-pgwipeout@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
drivers/mmc/host/dw_mmc.c | 7 ++++++-
drivers/mmc/host/dw_mmc.h | 2 ++
2 files changed, 8 insertions(+), 1 deletion(-)
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -2853,7 +2853,12 @@ static int dw_mci_init_slot_caps(struct
if (host->pdata->caps2)
mmc->caps2 = host->pdata->caps2;
- mmc->f_min = DW_MCI_FREQ_MIN;
+ /* if host has set a minimum_freq, we should respect it */
+ if (host->minimum_speed)
+ mmc->f_min = host->minimum_speed;
+ else
+ mmc->f_min = DW_MCI_FREQ_MIN;
+
if (!mmc->f_max)
mmc->f_max = DW_MCI_FREQ_MAX;
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -99,6 +99,7 @@ struct dw_mci_dma_slave {
* @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
* rate and timeout calculations.
* @current_speed: Configured rate of the controller.
+ * @minimum_speed: Stored minimum rate of the controller.
* @fifoth_val: The value of FIFOTH register.
* @verid: Denote Version ID.
* @dev: Device associated with the MMC controller.
@@ -200,6 +201,7 @@ struct dw_mci {
u32 bus_hz;
u32 current_speed;
+ u32 minimum_speed;
u32 fifoth_val;
u16 verid;
struct device *dev;

79
target/linux/rockchip/patches-6.1/008-0015-v5.18-mmc-dw-mmc-rockchip-Fix-handling-invalid-clock-rates.patch
View File

@@ -1,79 +0,0 @@
From 52c92286b71e28d88642a4a416f40fbdb6cbb46f Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Sat, 5 Mar 2022 16:58:35 -0500
Subject: [PATCH] mmc: dw-mmc-rockchip: Fix handling invalid clock rates
The Rockchip rk356x ciu clock cannot be set as low as the dw-mmc
hardware supports. This leads to a situation during card initialization
where the clock is set lower than the clock driver can support. The
dw-mmc-rockchip driver spews errors when this happens.
For normal operation this only happens a few times during boot, but when
cd-broken is enabled (in cases such as the SoQuartz module) this fires
multiple times each poll cycle.
Fix this by testing the lowest possible frequency that the clock driver
can support which is within the mmc specification. Divide that rate by
the internal divider and set f_min to this.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220305215835.2210388-3-pgwipeout@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
drivers/mmc/host/dw_mmc-rockchip.c | 27 +++++++++++++++++++++++----
1 file changed, 23 insertions(+), 4 deletions(-)
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -15,7 +15,9 @@
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
-#define RK3288_CLKGEN_DIV 2
+#define RK3288_CLKGEN_DIV 2
+
+static const unsigned int freqs[] = { 100000, 200000, 300000, 400000 };
struct dw_mci_rockchip_priv_data {
struct clk *drv_clk;
@@ -51,7 +53,7 @@ static void dw_mci_rk3288_set_ios(struct
ret = clk_set_rate(host->ciu_clk, cclkin);
if (ret)
- dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
+ dev_warn(host->dev, "failed to set rate %uHz err: %d\n", cclkin, ret);
bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV;
if (bus_hz != host->bus_hz) {
@@ -290,13 +292,30 @@ static int dw_mci_rk3288_parse_dt(struct
static int dw_mci_rockchip_init(struct dw_mci *host)
{
+ int ret, i;
+
/* It is slot 8 on Rockchip SoCs */
host->sdio_id0 = 8;
- if (of_device_is_compatible(host->dev->of_node,
- "rockchip,rk3288-dw-mshc"))
+ if (of_device_is_compatible(host->dev->of_node, "rockchip,rk3288-dw-mshc")) {
host->bus_hz /= RK3288_CLKGEN_DIV;
+ /* clock driver will fail if the clock is less than the lowest source clock
+ * divided by the internal clock divider. Test for the lowest available
+ * clock and set the minimum freq to clock / clock divider.
+ */
+
+ for (i = 0; i < ARRAY_SIZE(freqs); i++) {
+ ret = clk_round_rate(host->ciu_clk, freqs[i] * RK3288_CLKGEN_DIV);
+ if (ret > 0) {
+ host->minimum_speed = ret / RK3288_CLKGEN_DIV;
+ break;
+ }
+ }
+ if (ret < 0)
+ dev_warn(host->dev, "no valid minimum freq: %d\n", ret);
+ }
+
return 0;
}

110
target/linux/rockchip/patches-6.1/008-0016-v5.18-mfd-rk808-Add-reboot-support-to-rk808.c.patch
View File

@@ -1,110 +0,0 @@
From 56f216d8efbc1212bf5ff8a6ff5e29927965e8db Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Tue, 8 Feb 2022 14:40:23 -0500
Subject: [PATCH] mfd: rk808: Add reboot support to rk808.c
This adds reboot support to the rk808 pmic driver and enables it for
the rk809 and rk817 devices.
This only enables if the rockchip,system-power-controller flag is set.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220208194023.929720-1-pgwipeout@gmail.com
---
drivers/mfd/rk808.c | 44 +++++++++++++++++++++++++++++++++++++++
include/linux/mfd/rk808.h | 1 +
2 files changed, 45 insertions(+)
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -19,6 +19,7 @@
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
+#include <linux/reboot.h>
struct rk808_reg_data {
int addr;
@@ -543,6 +544,7 @@ static void rk808_pm_power_off(void)
reg = RK808_DEVCTRL_REG,
bit = DEV_OFF_RST;
break;
+ case RK809_ID:
case RK817_ID:
reg = RK817_SYS_CFG(3);
bit = DEV_OFF;
@@ -559,6 +561,34 @@ static void rk808_pm_power_off(void)
dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n");
}
+static int rk808_restart_notify(struct notifier_block *this, unsigned long mode, void *cmd)
+{
+ struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
+ unsigned int reg, bit;
+ int ret;
+
+ switch (rk808->variant) {
+ case RK809_ID:
+ case RK817_ID:
+ reg = RK817_SYS_CFG(3);
+ bit = DEV_RST;
+ break;
+
+ default:
+ return NOTIFY_DONE;
+ }
+ ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
+ if (ret)
+ dev_err(&rk808_i2c_client->dev, "Failed to restart device!\n");
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block rk808_restart_handler = {
+ .notifier_call = rk808_restart_notify,
+ .priority = 192,
+};
+
static void rk8xx_shutdown(struct i2c_client *client)
{
struct rk808 *rk808 = i2c_get_clientdata(client);
@@ -727,6 +757,18 @@ static int rk808_probe(struct i2c_client
if (of_property_read_bool(np, "rockchip,system-power-controller")) {
rk808_i2c_client = client;
pm_power_off = rk808_pm_power_off;
+
+ switch (rk808->variant) {
+ case RK809_ID:
+ case RK817_ID:
+ ret = register_restart_handler(&rk808_restart_handler);
+ if (ret)
+ dev_warn(&client->dev, "failed to register rst handler, %d\n", ret);
+ break;
+ default:
+ dev_dbg(&client->dev, "pmic controlled board reset not supported\n");
+ break;
+ }
}
return 0;
@@ -749,6 +791,8 @@ static int rk808_remove(struct i2c_clien
if (pm_power_off == rk808_pm_power_off)
pm_power_off = NULL;
+ unregister_restart_handler(&rk808_restart_handler);
+
return 0;
}
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -373,6 +373,7 @@ enum rk805_reg {
#define SWITCH2_EN BIT(6)
#define SWITCH1_EN BIT(5)
#define DEV_OFF_RST BIT(3)
+#define DEV_RST BIT(2)
#define DEV_OFF BIT(0)
#define RTC_STOP BIT(0)

46
target/linux/rockchip/patches-6.1/008-0017-v5.18-usb-dwc3-core-do-not-use-3.0-clock-when-operating-in-2.0.patch
View File

@@ -1,46 +0,0 @@
From 62b20e6e0dde8d5633e3d94b028f86fb24b31d22 Mon Sep 17 00:00:00 2001
From: Bin Yang <yangbin@rock-chips.com>
Date: Mon, 28 Feb 2022 08:56:56 -0500
Subject: [PATCH] usb: dwc3: core: do not use 3.0 clock when operating in 2.0
mode
In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
clock. Enabling this feature allows the pipe3 clock to be not-running
when forcibly operating in 2.0 device mode.
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220228135700.1089526-6-pgwipeout@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/usb/dwc3/core.c | 5 +++++
drivers/usb/dwc3/core.h | 1 +
2 files changed, 6 insertions(+)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1090,6 +1090,11 @@ static int dwc3_core_init(struct dwc3 *d
if (dwc->parkmode_disable_ss_quirk)
reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS;
+ if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) &&
+ (dwc->maximum_speed == USB_SPEED_HIGH ||
+ dwc->maximum_speed == USB_SPEED_FULL))
+ reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
+
dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
}
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -258,6 +258,7 @@
/* Global User Control 1 Register */
#define DWC3_GUCTL1_DEV_DECOUPLE_L1L2_EVT BIT(31)
#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28)
+#define DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK BIT(26)
#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24)
#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17)
#define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST BIT(10)

51
target/linux/rockchip/patches-6.1/008-0018-v5.19-soc-rockchip-set-dwc3-clock-for-rk3566.patch
View File

@@ -1,51 +0,0 @@
From 5c0bb71138770d85ea840acd379edc6471b867ee Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Fri, 8 Apr 2022 11:12:34 -0400
Subject: [PATCH] soc: rockchip: set dwc3 clock for rk3566
The rk3566 dwc3 otg port clock is unavailable at boot, as it defaults to
the combophy as the clock source. As combophy0 doesn't exist on rk3566,
we need to set the clock source to the usb2 phy instead.
Add handling to the grf driver to handle this on boot.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220408151237.3165046-3-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/soc/rockchip/grf.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
--- a/drivers/soc/rockchip/grf.c
+++ b/drivers/soc/rockchip/grf.c
@@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk
.num_values = ARRAY_SIZE(rk3399_defaults),
};
+#define RK3566_GRF_USB3OTG0_CON1 0x0104
+
+static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
+ { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
+ { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
+ { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
+};
+
+static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
+ .values = rk3566_defaults,
+ .num_values = ARRAY_SIZE(rk3566_defaults),
+};
+
+
static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
{
.compatible = "rockchip,rk3036-grf",
@@ -130,6 +144,9 @@ static const struct of_device_id rockchi
}, {
.compatible = "rockchip,rk3399-grf",
.data = (void *)&rk3399_grf,
+ }, {
+ .compatible = "rockchip,rk3566-pipe-grf",
+ .data = (void *)&rk3566_pipegrf,
},
{ /* sentinel */ },
};

71
target/linux/rockchip/patches-6.1/008-0019-v5.19-media-hantro-Add-support-for-Hantro-G1-on-RK356x.patch
View File

@@ -1,71 +0,0 @@
From 5f6bfab6da6531238e899fdf29efd6d0185adc3e Mon Sep 17 00:00:00 2001
From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Date: Mon, 14 Feb 2022 21:29:53 +0000
Subject: [PATCH] media: hantro: Add support for Hantro G1 on RK356x
RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8
video formats.
This patch adds support for RK356x family in existing Hantro
video decoder kernel driver.
Tested on [1] with FFmpeg v4l2_request code taken from [2]
with MPEG2, H.642 and VP8 samples with results [3].
[1] https://github.com/warpme/minimyth2
[2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
[3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt
Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
drivers/staging/media/hantro/hantro_drv.c | 1 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
drivers/staging/media/hantro/rockchip_vpu_hw.c | 14 ++++++++++++++
3 files changed, 16 insertions(+)
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -588,6 +588,7 @@ static const struct of_device_id of_hant
{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
+ { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
{ .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -215,6 +215,7 @@ extern const struct hantro_variant rk306
extern const struct hantro_variant rk3288_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3399_vpu_variant;
+extern const struct hantro_variant rk3568_vpu_variant;
extern const struct hantro_variant sama5d4_vdec_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
@@ -551,6 +551,20 @@ const struct hantro_variant rk3399_vpu_v
.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
};
+const struct hantro_variant rk3568_vpu_variant = {
+ .dec_offset = 0x400,
+ .dec_fmts = rk3399_vpu_dec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+ .codec = HANTRO_MPEG2_DECODER |
+ HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
+ .codec_ops = rk3399_vpu_codec_ops,
+ .irqs = rockchip_vdpu2_irqs,
+ .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs),
+ .init = rockchip_vpu_hw_init,
+ .clk_names = rockchip_vpu_clk_names,
+ .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+};
+
const struct hantro_variant px30_vpu_variant = {
.enc_offset = 0x0,
.enc_fmts = rockchip_vpu_enc_fmts,

42
target/linux/rockchip/patches-6.1/008-0020-v5.19-phy-rockchip-inno-usb2-Fix-muxed-interrupt-support.patch
View File

@@ -1,42 +0,0 @@
From 6a98df08ccd55e87947d253b19925691763e755c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 13 Apr 2022 22:22:52 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Fix muxed interrupt support
This commit fixes two issues with the muxed interrupt handler. First,
the OTG port has the "bvalid" interrupt enabled, not "linestate". Since
only the linestate interrupt was handled, and not the bvalid interrupt,
plugging in a cable to the OTG port caused an interrupt storm.
Second, the return values from the individual port IRQ handlers need to
be OR-ed together. Otherwise, the lack of an interrupt from the last
port would cause the handler to erroneously return IRQ_NONE.
Fixes: ed2b5a8e6b98 ("phy: phy-rockchip-inno-usb2: support muxed interrupts")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-2-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -950,8 +950,14 @@ static irqreturn_t rockchip_usb2phy_irq(
if (!rport->phy)
continue;
- /* Handle linestate irq for both otg port and host port */
- ret = rockchip_usb2phy_linestate_irq(irq, rport);
+ switch (rport->port_id) {
+ case USB2PHY_PORT_OTG:
+ ret |= rockchip_usb2phy_otg_mux_irq(irq, rport);
+ break;
+ case USB2PHY_PORT_HOST:
+ ret |= rockchip_usb2phy_linestate_irq(irq, rport);
+ break;
+ }
}
return ret;

37
target/linux/rockchip/patches-6.1/008-0021-v5.19-phy-rockchip-inno-usb2-Do-not-check-bvalid-twice.patch
View File

@@ -1,37 +0,0 @@
From 656f7fcb1272df590e10cb82e07cd2b79bbf60d1 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 13 Apr 2022 22:22:53 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Do not check bvalid twice
The bvalid interrupt handler already checks bvalid status. The muxed IRQ
handler just needs to call the other handler (plus any other handlers
that will be added).
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-3-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -929,13 +929,11 @@ static irqreturn_t rockchip_usb2phy_bval
static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data)
{
- struct rockchip_usb2phy_port *rport = data;
- struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
+ irqreturn_t ret = IRQ_NONE;
- if (property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st))
- return rockchip_usb2phy_bvalid_irq(irq, data);
- else
- return IRQ_NONE;
+ ret |= rockchip_usb2phy_bvalid_irq(irq, data);
+
+ return ret;
}
static irqreturn_t rockchip_usb2phy_irq(int irq, void *data)

31
target/linux/rockchip/patches-6.1/008-0022-v5.19-phy-rockchip-inno-usb2-Do-not-lock-in-bvalid-IRQ-handler.patch
View File

@@ -1,31 +0,0 @@
From 5a709a46e4270a6130877c052260d9a6d14ac685 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 13 Apr 2022 22:22:54 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Do not lock in bvalid IRQ handler
Clearing the IRQ is atomic, so there is no need to hold the mutex.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-4-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 ----
1 file changed, 4 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -915,13 +915,9 @@ static irqreturn_t rockchip_usb2phy_bval
if (!property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st))
return IRQ_NONE;
- mutex_lock(&rport->mutex);
-
/* clear bvalid detect irq pending status */
property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
- mutex_unlock(&rport->mutex);
-
rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work);
return IRQ_HANDLED;

29
target/linux/rockchip/patches-6.1/008-0023-v5.19-phy-rockchip-inno-usb2-Support-multi-bit-mask-properties.patch
View File

@@ -1,29 +0,0 @@
From ffe597d04db2b75d9c547a2d2e07c268c2a33117 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 13 Apr 2022 22:22:55 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Support multi-bit mask properties
The "bvalid" and "id" interrupts can trigger on either the rising edge
or the falling edge, so each interrupt has two enable bits and two
status bits. This change allows using a single property for both bits,
checking whether either bit is set.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-5-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -253,7 +253,7 @@ static inline bool property_enabled(stru
return false;
tmp = (orig & mask) >> reg->bitstart;
- return tmp == reg->enable;
+ return tmp != reg->disable;
}
static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)

58
target/linux/rockchip/patches-6.1/008-0024-v5.19-phy-rockchip-inno-usb2-Handle-bvalid-falling.patch
View File

@@ -1,58 +0,0 @@
From 21a470606ed5e8b14980f34cd360595d1cba737f Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 13 Apr 2022 22:22:56 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Handle bvalid falling
Some SoCs have a bvalid falling interrupt, in addition to bvalid rising.
This interrupt can detect OTG cable plugout immediately, so it can avoid
the delay until the next scheduled work.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-6-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1355,9 +1355,9 @@ static const struct rockchip_usb2phy_cfg
.port_cfgs = {
[USB2PHY_PORT_OTG] = {
.phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
- .bvalid_det_en = { 0x3020, 2, 2, 0, 1 },
- .bvalid_det_st = { 0x3024, 2, 2, 0, 1 },
- .bvalid_det_clr = { 0x3028, 2, 2, 0, 1 },
+ .bvalid_det_en = { 0x3020, 3, 2, 0, 3 },
+ .bvalid_det_st = { 0x3024, 3, 2, 0, 3 },
+ .bvalid_det_clr = { 0x3028, 3, 2, 0, 3 },
.ls_det_en = { 0x3020, 0, 0, 0, 1 },
.ls_det_st = { 0x3024, 0, 0, 0, 1 },
.ls_det_clr = { 0x3028, 0, 0, 0, 1 },
@@ -1398,9 +1398,9 @@ static const struct rockchip_usb2phy_cfg
.port_cfgs = {
[USB2PHY_PORT_OTG] = {
.phy_sus = { 0x0100, 15, 0, 0, 0x1d1 },
- .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
- .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
- .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+ .bvalid_det_en = { 0x0110, 3, 2, 0, 3 },
+ .bvalid_det_st = { 0x0114, 3, 2, 0, 3 },
+ .bvalid_det_clr = { 0x0118, 3, 2, 0, 3 },
.ls_det_en = { 0x0110, 0, 0, 0, 1 },
.ls_det_st = { 0x0114, 0, 0, 0, 1 },
.ls_det_clr = { 0x0118, 0, 0, 0, 1 },
@@ -1522,9 +1522,9 @@ static const struct rockchip_usb2phy_cfg
.port_cfgs = {
[USB2PHY_PORT_OTG] = {
.phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
- .bvalid_det_en = { 0x0080, 2, 2, 0, 1 },
- .bvalid_det_st = { 0x0084, 2, 2, 0, 1 },
- .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+ .bvalid_det_en = { 0x0080, 3, 2, 0, 3 },
+ .bvalid_det_st = { 0x0084, 3, 2, 0, 3 },
+ .bvalid_det_clr = { 0x0088, 3, 2, 0, 3 },
.utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
.utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
},

230
target/linux/rockchip/patches-6.1/008-0025-v5.19-phy-rockchip-inno-usb2-Handle-ID-IRQ.patch
View File

@@ -1,230 +0,0 @@
From 51a9b2c03dd3fddc56c2f68740fade2e38a066d0 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 13 Apr 2022 22:22:57 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Handle ID IRQ
This supports detecting host mode for the OTG port without an extcon.
The rv1108 properties are not updated due to lack of documentation.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220414032258.40984-7-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 85 +++++++++++++++++++
1 file changed, 85 insertions(+)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -116,11 +116,15 @@ struct rockchip_chg_det_reg {
* @bvalid_det_en: vbus valid rise detection enable register.
* @bvalid_det_st: vbus valid rise detection status register.
* @bvalid_det_clr: vbus valid rise detection clear register.
+ * @id_det_en: id detection enable register.
+ * @id_det_st: id detection state register.
+ * @id_det_clr: id detection clear register.
* @ls_det_en: linestate detection enable register.
* @ls_det_st: linestate detection state register.
* @ls_det_clr: linestate detection clear register.
* @utmi_avalid: utmi vbus avalid status register.
* @utmi_bvalid: utmi vbus bvalid status register.
+ * @utmi_id: utmi id state register.
* @utmi_ls: utmi linestate state register.
* @utmi_hstdet: utmi host disconnect register.
*/
@@ -129,11 +133,15 @@ struct rockchip_usb2phy_port_cfg {
struct usb2phy_reg bvalid_det_en;
struct usb2phy_reg bvalid_det_st;
struct usb2phy_reg bvalid_det_clr;
+ struct usb2phy_reg id_det_en;
+ struct usb2phy_reg id_det_st;
+ struct usb2phy_reg id_det_clr;
struct usb2phy_reg ls_det_en;
struct usb2phy_reg ls_det_st;
struct usb2phy_reg ls_det_clr;
struct usb2phy_reg utmi_avalid;
struct usb2phy_reg utmi_bvalid;
+ struct usb2phy_reg utmi_id;
struct usb2phy_reg utmi_ls;
struct usb2phy_reg utmi_hstdet;
};
@@ -161,6 +169,7 @@ struct rockchip_usb2phy_cfg {
* @suspended: phy suspended flag.
* @vbus_attached: otg device vbus status.
* @bvalid_irq: IRQ number assigned for vbus valid rise detection.
+ * @id_irq: IRQ number assigned for ID pin detection.
* @ls_irq: IRQ number assigned for linestate detection.
* @otg_mux_irq: IRQ number which multiplex otg-id/otg-bvalid/linestate
* irqs to one irq in otg-port.
@@ -179,6 +188,7 @@ struct rockchip_usb2phy_port {
bool suspended;
bool vbus_attached;
int bvalid_irq;
+ int id_irq;
int ls_irq;
int otg_mux_irq;
struct mutex mutex;
@@ -426,6 +436,19 @@ static int rockchip_usb2phy_init(struct
if (ret)
goto out;
+ /* clear id status and enable id detect irq */
+ ret = property_enable(rphy->grf,
+ &rport->port_cfg->id_det_clr,
+ true);
+ if (ret)
+ goto out;
+
+ ret = property_enable(rphy->grf,
+ &rport->port_cfg->id_det_en,
+ true);
+ if (ret)
+ goto out;
+
schedule_delayed_work(&rport->otg_sm_work,
OTG_SCHEDULE_DELAY * 3);
} else {
@@ -923,11 +946,30 @@ static irqreturn_t rockchip_usb2phy_bval
return IRQ_HANDLED;
}
+static irqreturn_t rockchip_usb2phy_id_irq(int irq, void *data)
+{
+ struct rockchip_usb2phy_port *rport = data;
+ struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
+ bool id;
+
+ if (!property_enabled(rphy->grf, &rport->port_cfg->id_det_st))
+ return IRQ_NONE;
+
+ /* clear id detect irq pending status */
+ property_enable(rphy->grf, &rport->port_cfg->id_det_clr, true);
+
+ id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
+ extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id);
+
+ return IRQ_HANDLED;
+}
+
static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data)
{
irqreturn_t ret = IRQ_NONE;
ret |= rockchip_usb2phy_bvalid_irq(irq, data);
+ ret |= rockchip_usb2phy_id_irq(irq, data);
return ret;
}
@@ -1025,6 +1067,25 @@ static int rockchip_usb2phy_port_irq_ini
"failed to request otg-bvalid irq handle\n");
return ret;
}
+
+ rport->id_irq = of_irq_get_byname(child_np, "otg-id");
+ if (rport->id_irq < 0) {
+ dev_err(rphy->dev, "no otg-id irq provided\n");
+ ret = rport->id_irq;
+ return ret;
+ }
+
+ ret = devm_request_threaded_irq(rphy->dev, rport->id_irq,
+ NULL,
+ rockchip_usb2phy_id_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy_id",
+ rport);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request otg-id irq handle\n");
+ return ret;
+ }
}
break;
default:
@@ -1299,10 +1360,14 @@ static const struct rockchip_usb2phy_cfg
.bvalid_det_en = { 0x0680, 3, 3, 0, 1 },
.bvalid_det_st = { 0x0690, 3, 3, 0, 1 },
.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
+ .id_det_en = { 0x0680, 6, 5, 0, 3 },
+ .id_det_st = { 0x0690, 6, 5, 0, 3 },
+ .id_det_clr = { 0x06a0, 6, 5, 0, 3 },
.ls_det_en = { 0x0680, 2, 2, 0, 1 },
.ls_det_st = { 0x0690, 2, 2, 0, 1 },
.ls_det_clr = { 0x06a0, 2, 2, 0, 1 },
.utmi_bvalid = { 0x0480, 4, 4, 0, 1 },
+ .utmi_id = { 0x0480, 1, 1, 0, 1 },
.utmi_ls = { 0x0480, 3, 2, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
@@ -1358,11 +1423,15 @@ static const struct rockchip_usb2phy_cfg
.bvalid_det_en = { 0x3020, 3, 2, 0, 3 },
.bvalid_det_st = { 0x3024, 3, 2, 0, 3 },
.bvalid_det_clr = { 0x3028, 3, 2, 0, 3 },
+ .id_det_en = { 0x3020, 5, 4, 0, 3 },
+ .id_det_st = { 0x3024, 5, 4, 0, 3 },
+ .id_det_clr = { 0x3028, 5, 4, 0, 3 },
.ls_det_en = { 0x3020, 0, 0, 0, 1 },
.ls_det_st = { 0x3024, 0, 0, 0, 1 },
.ls_det_clr = { 0x3028, 0, 0, 0, 1 },
.utmi_avalid = { 0x0120, 10, 10, 0, 1 },
.utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
+ .utmi_id = { 0x0120, 6, 6, 0, 1 },
.utmi_ls = { 0x0120, 5, 4, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
@@ -1401,11 +1470,15 @@ static const struct rockchip_usb2phy_cfg
.bvalid_det_en = { 0x0110, 3, 2, 0, 3 },
.bvalid_det_st = { 0x0114, 3, 2, 0, 3 },
.bvalid_det_clr = { 0x0118, 3, 2, 0, 3 },
+ .id_det_en = { 0x0110, 5, 4, 0, 3 },
+ .id_det_st = { 0x0114, 5, 4, 0, 3 },
+ .id_det_clr = { 0x0118, 5, 4, 0, 3 },
.ls_det_en = { 0x0110, 0, 0, 0, 1 },
.ls_det_st = { 0x0114, 0, 0, 0, 1 },
.ls_det_clr = { 0x0118, 0, 0, 0, 1 },
.utmi_avalid = { 0x0120, 10, 10, 0, 1 },
.utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
+ .utmi_id = { 0x0120, 6, 6, 0, 1 },
.utmi_ls = { 0x0120, 5, 4, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
@@ -1463,8 +1536,12 @@ static const struct rockchip_usb2phy_cfg
.bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 },
.bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 },
.bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 },
+ .id_det_en = { 0xe3c0, 5, 4, 0, 3 },
+ .id_det_st = { 0xe3e0, 5, 4, 0, 3 },
+ .id_det_clr = { 0xe3d0, 5, 4, 0, 3 },
.utmi_avalid = { 0xe2ac, 7, 7, 0, 1 },
.utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 },
+ .utmi_id = { 0xe2ac, 8, 8, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0xe458, 1, 0, 0x2, 0x1 },
@@ -1498,8 +1575,12 @@ static const struct rockchip_usb2phy_cfg
.bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 },
.bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 },
.bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
+ .id_det_en = { 0xe3c0, 10, 9, 0, 3 },
+ .id_det_st = { 0xe3e0, 10, 9, 0, 3 },
+ .id_det_clr = { 0xe3d0, 10, 9, 0, 3 },
.utmi_avalid = { 0xe2ac, 10, 10, 0, 1 },
.utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 },
+ .utmi_id = { 0xe2ac, 11, 11, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0xe468, 1, 0, 0x2, 0x1 },
@@ -1525,8 +1606,12 @@ static const struct rockchip_usb2phy_cfg
.bvalid_det_en = { 0x0080, 3, 2, 0, 3 },
.bvalid_det_st = { 0x0084, 3, 2, 0, 3 },
.bvalid_det_clr = { 0x0088, 3, 2, 0, 3 },
+ .id_det_en = { 0x0080, 5, 4, 0, 3 },
+ .id_det_st = { 0x0084, 5, 4, 0, 3 },
+ .id_det_clr = { 0x0088, 5, 4, 0, 3 },
.utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
.utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
+ .utmi_id = { 0x00c0, 6, 6, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
/* Select suspend control from controller */

66
target/linux/rockchip/patches-6.1/008-0026-v5.19-clk-rockchip-Mark-hclk_vo-as-critical-on-rk3568.patch
View File

@@ -1,66 +0,0 @@
From 6931f85c29d5a0261219cf8a73773d3165806d84 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:18 +0200
Subject: [PATCH] clk: rockchip: Mark hclk_vo as critical on rk3568
Whenever pclk_vo is enabled hclk_vo must be enabled as well. This is
described in the Reference Manual as:
| 2.8.6 NIU Clock gating reliance
|
| A part of niu clocks have a dependence on another niu clock in order to
| sharing the internal bus. When these clocks are in use, another niu
| clock must be opened, and cannot be gated. These clocks and the special
| clock on which they are relied are as following:
|
| Clocks which have dependency The clock which can not be gated
| -----------------------------------------------------------------
| ...
| pclk_vo_niu, hclk_vo_s_niu hclk_vo_niu
| ...
The clock framework doesn't offer a way to enable clock B whenever clock A is
enabled, at least not when B is not an ancestor of A. Workaround this by
marking hclk_vo as critical so it is never disabled. This is suboptimal in
terms of power consumption, but a stop gap solution until the clock framework
has a way to deal with this.
We have this clock tree:
| aclk_vo 2 2 0 300000000 0 0 50000 Y
| aclk_hdcp 0 0 0 300000000 0 0 50000 N
| pclk_vo 2 3 0 75000000 0 0 50000 Y
| pclk_edp_ctrl 0 0 0 75000000 0 0 50000 N
| pclk_dsitx_1 0 0 0 75000000 0 0 50000 N
| pclk_dsitx_0 1 2 0 75000000 0 0 50000 Y
| pclk_hdmi_host 1 2 0 75000000 0 0 50000 Y
| pclk_hdcp 0 0 0 75000000 0 0 50000 N
| hclk_vo 2 5 0 150000000 0 0 50000 Y
| hclk_hdcp 0 0 0 150000000 0 0 50000 N
| hclk_vop 0 2 0 150000000 0 0 50000 N
Without this patch the edp, dsitx, hdmi and hdcp driver would enable their
clocks which then enables pclk_vo, but hclk_vo stays disabled and register
accesses just hang. hclk_vo is enabled by the VOP2 driver, so reproducibility
of this issue depends on the probe order.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220422072841.2206452-2-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/clk/rockchip/clk-rk3568.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/clk/rockchip/clk-rk3568.c
+++ b/drivers/clk/rockchip/clk-rk3568.c
@@ -1591,6 +1591,7 @@ static const char *const rk3568_cru_crit
"hclk_php",
"pclk_php",
"hclk_usb",
+ "hclk_vo",
};
static const char *const rk3568_pmucru_critical_clocks[] __initconst = {

203
target/linux/rockchip/patches-6.1/008-0027-v5.19-drm-rockchip-Refactor-IOMMU-initialisation.patch
View File

@@ -1,203 +0,0 @@
From 421be3ee36a497949a4b564cd1e4f7f9fe755f57 Mon Sep 17 00:00:00 2001
From: Robin Murphy <robin.murphy@arm.com>
Date: Tue, 5 Apr 2022 15:32:50 +0100
Subject: [PATCH] drm/rockchip: Refactor IOMMU initialisation
Defer the IOMMU domain setup until after successfully binding
components, so we can figure out IOMMU support directly from the VOP
devices themselves, rather than manually inferring it from the DT (which
also fails to account for whether the IOMMU driver is actually loaded).
Although this is somewhat of a logical cleanup, the main motivation is
to prepare for a change in the iommu_domain_alloc() interface.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/94eee7ab434fe11eb0787f691e9f1ab03a2e91be.1649168685.git.robin.murphy@arm.com
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 60 +++++++++------------
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 3 ++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +
3 files changed, 31 insertions(+), 34 deletions(-)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -7,7 +7,6 @@
*/
#include <linux/dma-mapping.h>
-#include <linux/dma-iommu.h>
#include <linux/pm_runtime.h>
#include <linux/module.h>
#include <linux/of_graph.h>
@@ -35,7 +34,6 @@
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 0
-static bool is_support_iommu = true;
static const struct drm_driver rockchip_drm_driver;
/*
@@ -49,7 +47,7 @@ int rockchip_drm_dma_attach_device(struc
struct rockchip_drm_private *private = drm_dev->dev_private;
int ret;
- if (!is_support_iommu)
+ if (!private->domain)
return 0;
ret = iommu_attach_device(private->domain, dev);
@@ -65,12 +63,22 @@ void rockchip_drm_dma_detach_device(stru
struct device *dev)
{
struct rockchip_drm_private *private = drm_dev->dev_private;
- struct iommu_domain *domain = private->domain;
- if (!is_support_iommu)
+ if (!private->domain)
return;
- iommu_detach_device(domain, dev);
+ iommu_detach_device(private->domain, dev);
+}
+
+void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
+ struct device *dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+
+ if (!device_iommu_mapped(dev))
+ private->iommu_dev = ERR_PTR(-ENODEV);
+ else if (!private->iommu_dev)
+ private->iommu_dev = dev;
}
static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
@@ -79,10 +87,10 @@ static int rockchip_drm_init_iommu(struc
struct iommu_domain_geometry *geometry;
u64 start, end;
- if (!is_support_iommu)
+ if (IS_ERR_OR_NULL(private->iommu_dev))
return 0;
- private->domain = iommu_domain_alloc(&platform_bus_type);
+ private->domain = iommu_domain_alloc(private->iommu_dev->bus);
if (!private->domain)
return -ENOMEM;
@@ -102,7 +110,7 @@ static void rockchip_iommu_cleanup(struc
{
struct rockchip_drm_private *private = drm_dev->dev_private;
- if (!is_support_iommu)
+ if (!private->domain)
return;
drm_mm_takedown(&private->mm);
@@ -141,25 +149,25 @@ static int rockchip_drm_bind(struct devi
INIT_LIST_HEAD(&private->psr_list);
mutex_init(&private->psr_list_lock);
- ret = rockchip_drm_init_iommu(drm_dev);
- if (ret)
- goto err_free;
-
ret = drmm_mode_config_init(drm_dev);
if (ret)
- goto err_iommu_cleanup;
+ goto err_free;
rockchip_drm_mode_config_init(drm_dev);
/* Try to bind all sub drivers. */
ret = component_bind_all(dev, drm_dev);
if (ret)
- goto err_iommu_cleanup;
+ goto err_free;
- ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc);
+ ret = rockchip_drm_init_iommu(drm_dev);
if (ret)
goto err_unbind_all;
+ ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc);
+ if (ret)
+ goto err_iommu_cleanup;
+
drm_mode_config_reset(drm_dev);
ret = rockchip_drm_fbdev_init(drm_dev);
@@ -177,10 +185,10 @@ static int rockchip_drm_bind(struct devi
err_kms_helper_poll_fini:
drm_kms_helper_poll_fini(drm_dev);
rockchip_drm_fbdev_fini(drm_dev);
-err_unbind_all:
- component_unbind_all(dev, drm_dev);
err_iommu_cleanup:
rockchip_iommu_cleanup(drm_dev);
+err_unbind_all:
+ component_unbind_all(dev, drm_dev);
err_free:
drm_dev_put(drm_dev);
return ret;
@@ -358,8 +366,6 @@ static int rockchip_drm_platform_of_prob
return -ENODEV;
for (i = 0;; i++) {
- struct device_node *iommu;
-
port = of_parse_phandle(np, "ports", i);
if (!port)
break;
@@ -369,21 +375,7 @@ static int rockchip_drm_platform_of_prob
continue;
}
- iommu = of_parse_phandle(port->parent, "iommus", 0);
- if (!iommu || !of_device_is_available(iommu->parent)) {
- DRM_DEV_DEBUG(dev,
- "no iommu attached for %pOF, using non-iommu buffers\n",
- port->parent);
- /*
- * if there is a crtc not support iommu, force set all
- * crtc use non-iommu buffer.
- */
- is_support_iommu = false;
- }
-
found = true;
-
- of_node_put(iommu);
of_node_put(port);
}
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -46,6 +46,7 @@ struct rockchip_drm_private {
struct drm_fb_helper fbdev_helper;
struct drm_gem_object *fbdev_bo;
struct iommu_domain *domain;
+ struct device *iommu_dev;
struct mutex mm_lock;
struct drm_mm mm;
struct list_head psr_list;
@@ -56,6 +57,8 @@ int rockchip_drm_dma_attach_device(struc
struct device *dev);
void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
struct device *dev);
+void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
+ struct device *dev);
int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -2176,6 +2176,8 @@ static int vop_bind(struct device *dev,
}
}
+ rockchip_drm_dma_init_device(drm_dev, dev);
+
return 0;
err_disable_pm_runtime:

601
target/linux/rockchip/patches-6.1/008-0028-v5.19-drm-rockchip-Embed-drm_encoder-into-rockchip_decoder.patch
View File

@@ -1,601 +0,0 @@
From 540b8f271e53362a308f6bf288d38b630cf3fbd2 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:19 +0200
Subject: [PATCH] drm/rockchip: Embed drm_encoder into rockchip_decoder
The VOP2 driver needs rockchip specific information for a drm_encoder.
This patch creates a struct rockchip_encoder with a struct drm_encoder
embedded in it. This is used throughout the rockchip driver instead of
struct drm_encoder directly.
The information the VOP2 drivers needs is the of_graph endpoint node
of the encoder. To ease bisectability this is added here.
While at it convert the different encoder-to-driverdata macros to
static inline functions in order to gain type safety and readability.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-3-s.hauer@pengutronix.de
---
.../gpu/drm/rockchip/analogix_dp-rockchip.c | 32 +++++++++++------
drivers/gpu/drm/rockchip/cdn-dp-core.c | 18 ++++++----
drivers/gpu/drm/rockchip/cdn-dp-core.h | 2 +-
.../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 17 ++++++----
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 11 ++++--
drivers/gpu/drm/rockchip/inno_hdmi.c | 32 +++++++++++------
drivers/gpu/drm/rockchip/rk3066_hdmi.c | 34 ++++++++++++-------
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 10 ++++++
drivers/gpu/drm/rockchip/rockchip_lvds.c | 26 ++++++++------
9 files changed, 122 insertions(+), 60 deletions(-)
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -40,8 +40,6 @@
#define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100
-#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
-
/**
* struct rockchip_dp_chip_data - splite the grf setting of kind of chips
* @lcdsel_grf_reg: grf register offset of lcdc select
@@ -59,7 +57,7 @@ struct rockchip_dp_chip_data {
struct rockchip_dp_device {
struct drm_device *drm_dev;
struct device *dev;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
struct drm_display_mode mode;
struct clk *pclk;
@@ -73,6 +71,18 @@ struct rockchip_dp_device {
struct analogix_dp_plat_data plat_data;
};
+static struct rockchip_dp_device *encoder_to_dp(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct rockchip_dp_device, encoder);
+}
+
+static struct rockchip_dp_device *pdata_encoder_to_dp(struct analogix_dp_plat_data *plat_data)
+{
+ return container_of(plat_data, struct rockchip_dp_device, plat_data);
+}
+
static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
{
reset_control_assert(dp->rst);
@@ -84,7 +94,7 @@ static int rockchip_dp_pre_init(struct r
static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
{
- struct rockchip_dp_device *dp = to_dp(plat_data);
+ struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data);
int ret;
ret = clk_prepare_enable(dp->pclk);
@@ -105,7 +115,7 @@ static int rockchip_dp_poweron_start(str
static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
{
- struct rockchip_dp_device *dp = to_dp(plat_data);
+ struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data);
clk_disable_unprepare(dp->pclk);
@@ -166,7 +176,7 @@ struct drm_crtc *rockchip_dp_drm_get_new
static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
- struct rockchip_dp_device *dp = to_dp(encoder);
+ struct rockchip_dp_device *dp = encoder_to_dp(encoder);
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state;
int ret;
@@ -208,7 +218,7 @@ static void rockchip_dp_drm_encoder_enab
static void rockchip_dp_drm_encoder_disable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
- struct rockchip_dp_device *dp = to_dp(encoder);
+ struct rockchip_dp_device *dp = encoder_to_dp(encoder);
struct drm_crtc *crtc;
struct drm_crtc_state *new_crtc_state = NULL;
int ret;
@@ -297,7 +307,7 @@ static int rockchip_dp_of_probe(struct r
static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
{
- struct drm_encoder *encoder = &dp->encoder;
+ struct drm_encoder *encoder = &dp->encoder.encoder;
struct drm_device *drm_dev = dp->drm_dev;
struct device *dev = dp->dev;
int ret;
@@ -333,7 +343,7 @@ static int rockchip_dp_bind(struct devic
return ret;
}
- dp->plat_data.encoder = &dp->encoder;
+ dp->plat_data.encoder = &dp->encoder.encoder;
ret = analogix_dp_bind(dp->adp, drm_dev);
if (ret)
@@ -341,7 +351,7 @@ static int rockchip_dp_bind(struct devic
return 0;
err_cleanup_encoder:
- dp->encoder.funcs->destroy(&dp->encoder);
+ dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder);
return ret;
}
@@ -351,7 +361,7 @@ static void rockchip_dp_unbind(struct de
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
analogix_dp_unbind(dp->adp);
- dp->encoder.funcs->destroy(&dp->encoder);
+ dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder);
}
static const struct component_ops rockchip_dp_component_ops = {
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -26,11 +26,17 @@
#include "cdn-dp-reg.h"
#include "rockchip_drm_vop.h"
-#define connector_to_dp(c) \
- container_of(c, struct cdn_dp_device, connector)
+static inline struct cdn_dp_device *connector_to_dp(struct drm_connector *connector)
+{
+ return container_of(connector, struct cdn_dp_device, connector);
+}
-#define encoder_to_dp(c) \
- container_of(c, struct cdn_dp_device, encoder)
+static inline struct cdn_dp_device *encoder_to_dp(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct cdn_dp_device, encoder);
+}
#define GRF_SOC_CON9 0x6224
#define DP_SEL_VOP_LIT BIT(12)
@@ -1025,7 +1031,7 @@ static int cdn_dp_bind(struct device *de
INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
- encoder = &dp->encoder;
+ encoder = &dp->encoder.encoder;
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
dev->of_node);
@@ -1090,7 +1096,7 @@ err_free_encoder:
static void cdn_dp_unbind(struct device *dev, struct device *master, void *data)
{
struct cdn_dp_device *dp = dev_get_drvdata(dev);
- struct drm_encoder *encoder = &dp->encoder;
+ struct drm_encoder *encoder = &dp->encoder.encoder;
struct drm_connector *connector = &dp->connector;
cancel_work_sync(&dp->event_work);
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
@@ -65,7 +65,7 @@ struct cdn_dp_device {
struct device *dev;
struct drm_device *drm_dev;
struct drm_connector connector;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
struct drm_display_mode mode;
struct platform_device *audio_pdev;
struct work_struct event_work;
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -182,8 +182,6 @@
#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
-#define to_dsi(nm) container_of(nm, struct dw_mipi_dsi_rockchip, nm)
-
enum {
DW_DSI_USAGE_IDLE,
DW_DSI_USAGE_DSI,
@@ -237,7 +235,7 @@ struct rockchip_dw_dsi_chip_data {
struct dw_mipi_dsi_rockchip {
struct device *dev;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
void __iomem *base;
struct regmap *grf_regmap;
@@ -272,6 +270,13 @@ struct dw_mipi_dsi_rockchip {
bool dsi_bound;
};
+static struct dw_mipi_dsi_rockchip *to_dsi(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct dw_mipi_dsi_rockchip, encoder);
+}
+
struct dphy_pll_parameter_map {
unsigned int max_mbps;
u8 hsfreqrange;
@@ -771,7 +776,7 @@ static void dw_mipi_dsi_encoder_enable(s
int ret, mux;
mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node,
- &dsi->encoder);
+ &dsi->encoder.encoder);
if (mux < 0)
return;
@@ -802,7 +807,7 @@ dw_mipi_dsi_encoder_helper_funcs = {
static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi,
struct drm_device *drm_dev)
{
- struct drm_encoder *encoder = &dsi->encoder;
+ struct drm_encoder *encoder = &dsi->encoder.encoder;
int ret;
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
@@ -960,7 +965,7 @@ static int dw_mipi_dsi_rockchip_bind(str
goto out_pll_clk;
}
- ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder);
+ ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder.encoder);
if (ret) {
DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret);
goto out_pll_clk;
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -67,7 +67,7 @@ struct rockchip_hdmi_chip_data {
struct rockchip_hdmi {
struct device *dev;
struct regmap *regmap;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
const struct rockchip_hdmi_chip_data *chip_data;
struct clk *vpll_clk;
struct clk *grf_clk;
@@ -75,7 +75,12 @@ struct rockchip_hdmi {
struct phy *phy;
};
-#define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x)
+static struct rockchip_hdmi *to_rockchip_hdmi(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct rockchip_hdmi, encoder);
+}
static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
{
@@ -511,7 +516,7 @@ static int dw_hdmi_rockchip_bind(struct
hdmi->dev = &pdev->dev;
hdmi->chip_data = plat_data->phy_data;
plat_data->phy_data = hdmi;
- encoder = &hdmi->encoder;
+ encoder = &hdmi->encoder.encoder;
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
/*
--- a/drivers/gpu/drm/rockchip/inno_hdmi.c
+++ b/drivers/gpu/drm/rockchip/inno_hdmi.c
@@ -26,8 +26,6 @@
#include "inno_hdmi.h"
-#define to_inno_hdmi(x) container_of(x, struct inno_hdmi, x)
-
struct hdmi_data_info {
int vic;
bool sink_is_hdmi;
@@ -56,7 +54,7 @@ struct inno_hdmi {
void __iomem *regs;
struct drm_connector connector;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
struct inno_hdmi_i2c *i2c;
struct i2c_adapter *ddc;
@@ -67,6 +65,18 @@ struct inno_hdmi {
struct drm_display_mode previous_mode;
};
+static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct inno_hdmi, encoder);
+}
+
+static struct inno_hdmi *connector_to_inno_hdmi(struct drm_connector *connector)
+{
+ return container_of(connector, struct inno_hdmi, connector);
+}
+
enum {
CSC_ITU601_16_235_TO_RGB_0_255_8BIT,
CSC_ITU601_0_255_TO_RGB_0_255_8BIT,
@@ -483,7 +493,7 @@ static void inno_hdmi_encoder_mode_set(s
struct drm_display_mode *mode,
struct drm_display_mode *adj_mode)
{
- struct inno_hdmi *hdmi = to_inno_hdmi(encoder);
+ struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder);
inno_hdmi_setup(hdmi, adj_mode);
@@ -493,14 +503,14 @@ static void inno_hdmi_encoder_mode_set(s
static void inno_hdmi_encoder_enable(struct drm_encoder *encoder)
{
- struct inno_hdmi *hdmi = to_inno_hdmi(encoder);
+ struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder);
inno_hdmi_set_pwr_mode(hdmi, NORMAL);
}
static void inno_hdmi_encoder_disable(struct drm_encoder *encoder)
{
- struct inno_hdmi *hdmi = to_inno_hdmi(encoder);
+ struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder);
inno_hdmi_set_pwr_mode(hdmi, LOWER_PWR);
}
@@ -536,7 +546,7 @@ static struct drm_encoder_helper_funcs i
static enum drm_connector_status
inno_hdmi_connector_detect(struct drm_connector *connector, bool force)
{
- struct inno_hdmi *hdmi = to_inno_hdmi(connector);
+ struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector);
return (hdmi_readb(hdmi, HDMI_STATUS) & m_HOTPLUG) ?
connector_status_connected : connector_status_disconnected;
@@ -544,7 +554,7 @@ inno_hdmi_connector_detect(struct drm_co
static int inno_hdmi_connector_get_modes(struct drm_connector *connector)
{
- struct inno_hdmi *hdmi = to_inno_hdmi(connector);
+ struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector);
struct edid *edid;
int ret = 0;
@@ -599,7 +609,7 @@ static struct drm_connector_helper_funcs
static int inno_hdmi_register(struct drm_device *drm, struct inno_hdmi *hdmi)
{
- struct drm_encoder *encoder = &hdmi->encoder;
+ struct drm_encoder *encoder = &hdmi->encoder.encoder;
struct device *dev = hdmi->dev;
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
@@ -881,7 +891,7 @@ static int inno_hdmi_bind(struct device
return 0;
err_cleanup_hdmi:
hdmi->connector.funcs->destroy(&hdmi->connector);
- hdmi->encoder.funcs->destroy(&hdmi->encoder);
+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
err_put_adapter:
i2c_put_adapter(hdmi->ddc);
err_disable_clk:
@@ -895,7 +905,7 @@ static void inno_hdmi_unbind(struct devi
struct inno_hdmi *hdmi = dev_get_drvdata(dev);
hdmi->connector.funcs->destroy(&hdmi->connector);
- hdmi->encoder.funcs->destroy(&hdmi->encoder);
+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
i2c_put_adapter(hdmi->ddc);
clk_disable_unprepare(hdmi->pclk);
--- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c
+++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
@@ -47,7 +47,7 @@ struct rk3066_hdmi {
void __iomem *regs;
struct drm_connector connector;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
struct rk3066_hdmi_i2c *i2c;
struct i2c_adapter *ddc;
@@ -58,7 +58,17 @@ struct rk3066_hdmi {
struct drm_display_mode previous_mode;
};
-#define to_rk3066_hdmi(x) container_of(x, struct rk3066_hdmi, x)
+static struct rk3066_hdmi *encoder_to_rk3066_hdmi(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct rk3066_hdmi, encoder);
+}
+
+static struct rk3066_hdmi *connector_to_rk3066_hdmi(struct drm_connector *connector)
+{
+ return container_of(connector, struct rk3066_hdmi, connector);
+}
static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset)
{
@@ -380,7 +390,7 @@ rk3066_hdmi_encoder_mode_set(struct drm_
struct drm_display_mode *mode,
struct drm_display_mode *adj_mode)
{
- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
+ struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
/* Store the display mode for plugin/DPMS poweron events. */
drm_mode_copy(&hdmi->previous_mode, adj_mode);
@@ -388,7 +398,7 @@ rk3066_hdmi_encoder_mode_set(struct drm_
static void rk3066_hdmi_encoder_enable(struct drm_encoder *encoder)
{
- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
+ struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
int mux, val;
mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
@@ -407,7 +417,7 @@ static void rk3066_hdmi_encoder_enable(s
static void rk3066_hdmi_encoder_disable(struct drm_encoder *encoder)
{
- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
+ struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder disable\n");
@@ -455,7 +465,7 @@ struct drm_encoder_helper_funcs rk3066_h
static enum drm_connector_status
rk3066_hdmi_connector_detect(struct drm_connector *connector, bool force)
{
- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
+ struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
return (hdmi_readb(hdmi, HDMI_HPG_MENS_STA) & HDMI_HPG_IN_STATUS_HIGH) ?
connector_status_connected : connector_status_disconnected;
@@ -463,7 +473,7 @@ rk3066_hdmi_connector_detect(struct drm_
static int rk3066_hdmi_connector_get_modes(struct drm_connector *connector)
{
- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
+ struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
struct edid *edid;
int ret = 0;
@@ -496,9 +506,9 @@ rk3066_hdmi_connector_mode_valid(struct
static struct drm_encoder *
rk3066_hdmi_connector_best_encoder(struct drm_connector *connector)
{
- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
+ struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
- return &hdmi->encoder;
+ return &hdmi->encoder.encoder;
}
static int
@@ -538,7 +548,7 @@ struct drm_connector_helper_funcs rk3066
static int
rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi)
{
- struct drm_encoder *encoder = &hdmi->encoder;
+ struct drm_encoder *encoder = &hdmi->encoder.encoder;
struct device *dev = hdmi->dev;
encoder->possible_crtcs =
@@ -816,7 +826,7 @@ static int rk3066_hdmi_bind(struct devic
err_cleanup_hdmi:
hdmi->connector.funcs->destroy(&hdmi->connector);
- hdmi->encoder.funcs->destroy(&hdmi->encoder);
+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
err_disable_i2c:
i2c_put_adapter(hdmi->ddc);
err_disable_hclk:
@@ -831,7 +841,7 @@ static void rk3066_hdmi_unbind(struct de
struct rk3066_hdmi *hdmi = dev_get_drvdata(dev);
hdmi->connector.funcs->destroy(&hdmi->connector);
- hdmi->encoder.funcs->destroy(&hdmi->encoder);
+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
i2c_put_adapter(hdmi->ddc);
clk_disable_unprepare(hdmi->hclk);
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -53,6 +53,10 @@ struct rockchip_drm_private {
struct mutex psr_list_lock;
};
+struct rockchip_encoder {
+ struct drm_encoder encoder;
+};
+
int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
struct device *dev);
void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
@@ -70,4 +74,10 @@ extern struct platform_driver rockchip_d
extern struct platform_driver rockchip_lvds_driver;
extern struct platform_driver vop_platform_driver;
extern struct platform_driver rk3066_hdmi_driver;
+
+static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)
+{
+ return container_of(encoder, struct rockchip_encoder, encoder);
+}
+
#endif /* _ROCKCHIP_DRM_DRV_H_ */
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
@@ -35,12 +35,6 @@
struct rockchip_lvds;
-#define connector_to_lvds(c) \
- container_of(c, struct rockchip_lvds, connector)
-
-#define encoder_to_lvds(c) \
- container_of(c, struct rockchip_lvds, encoder)
-
/**
* struct rockchip_lvds_soc_data - rockchip lvds Soc private data
* @probe: LVDS platform probe function
@@ -64,10 +58,22 @@ struct rockchip_lvds {
struct drm_panel *panel;
struct drm_bridge *bridge;
struct drm_connector connector;
- struct drm_encoder encoder;
+ struct rockchip_encoder encoder;
struct dev_pin_info *pins;
};
+static inline struct rockchip_lvds *connector_to_lvds(struct drm_connector *connector)
+{
+ return container_of(connector, struct rockchip_lvds, connector);
+}
+
+static inline struct rockchip_lvds *encoder_to_lvds(struct drm_encoder *encoder)
+{
+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+ return container_of(rkencoder, struct rockchip_lvds, encoder);
+}
+
static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset,
u32 val)
{
@@ -604,7 +610,7 @@ static int rockchip_lvds_bind(struct dev
goto err_put_remote;
}
- encoder = &lvds->encoder;
+ encoder = &lvds->encoder.encoder;
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
dev->of_node);
@@ -669,10 +675,10 @@ static void rockchip_lvds_unbind(struct
const struct drm_encoder_helper_funcs *encoder_funcs;
encoder_funcs = lvds->soc_data->helper_funcs;
- encoder_funcs->disable(&lvds->encoder);
+ encoder_funcs->disable(&lvds->encoder.encoder);
pm_runtime_disable(dev);
drm_connector_cleanup(&lvds->connector);
- drm_encoder_cleanup(&lvds->encoder);
+ drm_encoder_cleanup(&lvds->encoder.encoder);
}
static const struct component_ops rockchip_lvds_component_ops = {

88
target/linux/rockchip/patches-6.1/008-0029-v5.19-drm-rockchip-Add-crtc_endpoint_id-to-rockchip_encoder.patch
View File

@@ -1,88 +0,0 @@
From cf544c6a885c52d79e4d8bf139fb8cb63a878512 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:20 +0200
Subject: [PATCH] drm/rockchip: Add crtc_endpoint_id to rockchip_encoder
The VOP2 has an interface mux which decides to which encoder(s) a CRTC
is routed to. The encoders and CRTCs are connected via of_graphs in the
device tree. When given an encoder the VOP2 driver needs to know to
which internal register setting this encoder matches. For this the VOP2
binding offers different endpoints, one for each possible encoder. The
endpoint ids of these endpoints are used as a key from an encoders
device tree description to the internal register setting.
This patch adds the key aka endpoint id to struct rockchip_encoder plus
a function to read the endpoint id starting from the encoders device
node.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-4-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 33 +++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 4 ++-
2 files changed, 36 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -263,6 +263,39 @@ static struct platform_driver *rockchip_
static int num_rockchip_sub_drivers;
/*
+ * Get the endpoint id of the remote endpoint of the given encoder. This
+ * information is used by the VOP2 driver to identify the encoder.
+ *
+ * @rkencoder: The encoder to get the remote endpoint id from
+ * @np: The encoder device node
+ * @port: The number of the port leading to the VOP2
+ * @reg: The endpoint number leading to the VOP2
+ */
+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rkencoder,
+ struct device_node *np, int port, int reg)
+{
+ struct of_endpoint ep;
+ struct device_node *en, *ren;
+ int ret;
+
+ en = of_graph_get_endpoint_by_regs(np, port, reg);
+ if (!en)
+ return -ENOENT;
+
+ ren = of_graph_get_remote_endpoint(en);
+ if (!ren)
+ return -ENOENT;
+
+ ret = of_graph_parse_endpoint(ren, &ep);
+ if (ret)
+ return ret;
+
+ rkencoder->crtc_endpoint_id = ep.id;
+
+ return 0;
+}
+
+/*
* Check if a vop endpoint is leading to a rockchip subdriver or bridge.
* Should be called from the component bind stage of the drivers
* to ensure that all subdrivers are probed.
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -54,6 +54,7 @@ struct rockchip_drm_private {
};
struct rockchip_encoder {
+ int crtc_endpoint_id;
struct drm_encoder encoder;
};
@@ -64,7 +65,8 @@ void rockchip_drm_dma_detach_device(stru
void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
struct device *dev);
int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
-
+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder,
+ struct device_node *np, int port, int reg);
int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
extern struct platform_driver cdn_dp_driver;
extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;

93
target/linux/rockchip/patches-6.1/008-0030-v5.19-drm-rockchip-dw_hdmi-rename-vpll-clock-to-reference-clock.patch
View File

@@ -1,93 +0,0 @@
From a9d37e684492ab5db1cce28b655e20c01191873f Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:21 +0200
Subject: [PATCH] drm/rockchip: dw_hdmi: rename vpll clock to reference clock
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
To fix that, this patch renames the vpll clock to ref clock. The clock
name "vpll" is left for compatibility to old device trees.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-5-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 27 +++++++++++----------
1 file changed, 14 insertions(+), 13 deletions(-)
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -69,7 +69,7 @@ struct rockchip_hdmi {
struct regmap *regmap;
struct rockchip_encoder encoder;
const struct rockchip_hdmi_chip_data *chip_data;
- struct clk *vpll_clk;
+ struct clk *ref_clk;
struct clk *grf_clk;
struct dw_hdmi *hdmi;
struct phy *phy;
@@ -201,14 +201,15 @@ static int rockchip_hdmi_parse_dt(struct
return PTR_ERR(hdmi->regmap);
}
- hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll");
- if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) {
- hdmi->vpll_clk = NULL;
- } else if (PTR_ERR(hdmi->vpll_clk) == -EPROBE_DEFER) {
+ hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "ref");
+ if (!hdmi->ref_clk)
+ hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "vpll");
+
+ if (PTR_ERR(hdmi->ref_clk) == -EPROBE_DEFER) {
return -EPROBE_DEFER;
- } else if (IS_ERR(hdmi->vpll_clk)) {
- DRM_DEV_ERROR(hdmi->dev, "failed to get vpll clock\n");
- return PTR_ERR(hdmi->vpll_clk);
+ } else if (IS_ERR(hdmi->ref_clk)) {
+ DRM_DEV_ERROR(hdmi->dev, "failed to get reference clock\n");
+ return PTR_ERR(hdmi->ref_clk);
}
hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");
@@ -262,7 +263,7 @@ static void dw_hdmi_rockchip_encoder_mod
{
struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
- clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000);
+ clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000);
}
static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
@@ -542,9 +543,9 @@ static int dw_hdmi_rockchip_bind(struct
return ret;
}
- ret = clk_prepare_enable(hdmi->vpll_clk);
+ ret = clk_prepare_enable(hdmi->ref_clk);
if (ret) {
- DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
+ DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference clock: %d\n",
ret);
return ret;
}
@@ -563,7 +564,7 @@ static int dw_hdmi_rockchip_bind(struct
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
drm_encoder_cleanup(encoder);
- clk_disable_unprepare(hdmi->vpll_clk);
+ clk_disable_unprepare(hdmi->ref_clk);
}
return ret;
@@ -575,7 +576,7 @@ static void dw_hdmi_rockchip_unbind(stru
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
dw_hdmi_unbind(hdmi->hdmi);
- clk_disable_unprepare(hdmi->vpll_clk);
+ clk_disable_unprepare(hdmi->ref_clk);
}
static const struct component_ops dw_hdmi_rockchip_ops = {

84
target/linux/rockchip/patches-6.1/008-0031-v5.19-drm-rockchip-dw_hdmi-add-rk3568-support.patch
View File

@@ -1,84 +0,0 @@
From 28bbb5ffbe32741e65d798070986d212cc11e1bb Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:24 +0200
Subject: [PATCH] drm/rockchip: dw_hdmi: add rk3568 support
Add a new dw_hdmi_plat_data struct and new compatible for rk3568.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-8-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 31 +++++++++++++++++++++
1 file changed, 31 insertions(+)
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -50,6 +50,10 @@
#define RK3399_GRF_SOC_CON20 0x6250
#define RK3399_HDMI_LCDC_SEL BIT(6)
+#define RK3568_GRF_VO_CON1 0x0364
+#define RK3568_HDMI_SDAIN_MSK BIT(15)
+#define RK3568_HDMI_SCLIN_MSK BIT(14)
+
#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
/**
@@ -473,6 +477,19 @@ static const struct dw_hdmi_plat_data rk
.use_drm_infoframe = true,
};
+static struct rockchip_hdmi_chip_data rk3568_chip_data = {
+ .lcdsel_grf_reg = -1,
+};
+
+static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
+ .mode_valid = dw_hdmi_rockchip_mode_valid,
+ .mpll_cfg = rockchip_mpll_cfg,
+ .cur_ctr = rockchip_cur_ctr,
+ .phy_config = rockchip_phy_config,
+ .phy_data = &rk3568_chip_data,
+ .use_drm_infoframe = true,
+};
+
static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = {
{ .compatible = "rockchip,rk3228-dw-hdmi",
.data = &rk3228_hdmi_drv_data
@@ -486,6 +503,9 @@ static const struct of_device_id dw_hdmi
{ .compatible = "rockchip,rk3399-dw-hdmi",
.data = &rk3399_hdmi_drv_data
},
+ { .compatible = "rockchip,rk3568-dw-hdmi",
+ .data = &rk3568_hdmi_drv_data
+ },
{},
};
MODULE_DEVICE_TABLE(of, dw_hdmi_rockchip_dt_ids);
@@ -520,6 +540,9 @@ static int dw_hdmi_rockchip_bind(struct
encoder = &hdmi->encoder.encoder;
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
+ rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder,
+ dev->of_node, 0, 0);
+
/*
* If we failed to find the CRTC(s) which this encoder is
* supposed to be connected to, it's because the CRTC has
@@ -550,6 +573,14 @@ static int dw_hdmi_rockchip_bind(struct
return ret;
}
+ if (hdmi->chip_data == &rk3568_chip_data) {
+ regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1,
+ HIWORD_UPDATE(RK3568_HDMI_SDAIN_MSK |
+ RK3568_HDMI_SCLIN_MSK,
+ RK3568_HDMI_SDAIN_MSK |
+ RK3568_HDMI_SCLIN_MSK));
+ }
+
drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs);
drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);

109
target/linux/rockchip/patches-6.1/008-0032-v5.19-drm-rockchip-dw_hdmi-add-regulator-support.patch
View File

@@ -1,109 +0,0 @@
From ca80c4eb4b01a7f1c2f333d0a329937ef9c7f03a Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:26 +0200
Subject: [PATCH] drm/rockchip: dw_hdmi: add regulator support
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs needed
for the HDMI port. add support for these to the driver for boards which
have them supplied by switchable regulators.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-10-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 41 +++++++++++++++++++--
1 file changed, 38 insertions(+), 3 deletions(-)
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -9,6 +9,7 @@
#include <linux/platform_device.h>
#include <linux/phy/phy.h>
#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
#include <drm/bridge/dw_hdmi.h>
#include <drm/drm_edid.h>
@@ -76,6 +77,8 @@ struct rockchip_hdmi {
struct clk *ref_clk;
struct clk *grf_clk;
struct dw_hdmi *hdmi;
+ struct regulator *avdd_0v9;
+ struct regulator *avdd_1v8;
struct phy *phy;
};
@@ -226,6 +229,14 @@ static int rockchip_hdmi_parse_dt(struct
return PTR_ERR(hdmi->grf_clk);
}
+ hdmi->avdd_0v9 = devm_regulator_get(hdmi->dev, "avdd-0v9");
+ if (IS_ERR(hdmi->avdd_0v9))
+ return PTR_ERR(hdmi->avdd_0v9);
+
+ hdmi->avdd_1v8 = devm_regulator_get(hdmi->dev, "avdd-1v8");
+ if (IS_ERR(hdmi->avdd_1v8))
+ return PTR_ERR(hdmi->avdd_1v8);
+
return 0;
}
@@ -566,11 +577,23 @@ static int dw_hdmi_rockchip_bind(struct
return ret;
}
+ ret = regulator_enable(hdmi->avdd_0v9);
+ if (ret) {
+ DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd0v9: %d\n", ret);
+ goto err_avdd_0v9;
+ }
+
+ ret = regulator_enable(hdmi->avdd_1v8);
+ if (ret) {
+ DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd1v8: %d\n", ret);
+ goto err_avdd_1v8;
+ }
+
ret = clk_prepare_enable(hdmi->ref_clk);
if (ret) {
DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference clock: %d\n",
ret);
- return ret;
+ goto err_clk;
}
if (hdmi->chip_data == &rk3568_chip_data) {
@@ -594,10 +617,19 @@ static int dw_hdmi_rockchip_bind(struct
*/
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
- drm_encoder_cleanup(encoder);
- clk_disable_unprepare(hdmi->ref_clk);
+ goto err_bind;
}
+ return 0;
+
+err_bind:
+ drm_encoder_cleanup(encoder);
+ clk_disable_unprepare(hdmi->ref_clk);
+err_clk:
+ regulator_disable(hdmi->avdd_1v8);
+err_avdd_1v8:
+ regulator_disable(hdmi->avdd_0v9);
+err_avdd_0v9:
return ret;
}
@@ -608,6 +640,9 @@ static void dw_hdmi_rockchip_unbind(stru
dw_hdmi_unbind(hdmi->hdmi);
clk_disable_unprepare(hdmi->ref_clk);
+
+ regulator_disable(hdmi->avdd_1v8);
+ regulator_disable(hdmi->avdd_0v9);
}
static const struct component_ops dw_hdmi_rockchip_ops = {

65
target/linux/rockchip/patches-6.1/008-0033-v5.19-drm-rockchip-Make-VOP-driver-optional.patch
View File

@@ -1,65 +0,0 @@
From b382406a2cf4afaa7320a7ad4b298ed6e2675437 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri, 22 Apr 2022 09:28:38 +0200
Subject: [PATCH] drm/rockchip: Make VOP driver optional
With upcoming VOP2 support VOP won't be the only choice anymore, so make
the VOP driver optional.
This also adds a dependency from ROCKCHIP_ANALOGIX_DP to ROCKCHIP_VOP,
because that driver currently only links and works with the VOP driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-22-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/Kconfig | 8 ++++++++
drivers/gpu/drm/rockchip/Makefile | 3 ++-
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 +-
3 files changed, 11 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -22,8 +22,16 @@ config DRM_ROCKCHIP
if DRM_ROCKCHIP
+config ROCKCHIP_VOP
+ bool "Rockchip VOP driver"
+ default y
+ help
+ This selects support for the VOP driver. You should enable it
+ on older SoCs.
+
config ROCKCHIP_ANALOGIX_DP
bool "Rockchip specific extensions for Analogix DP driver"
+ depends on ROCKCHIP_VOP
help
This selects support for Rockchip SoC specific extensions
for the Analogix Core DP driver. If you want to enable DP
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -4,9 +4,10 @@
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \
- rockchip_drm_gem.o rockchip_drm_vop.o rockchip_vop_reg.o
+ rockchip_drm_gem.o
rockchipdrm-$(CONFIG_DRM_FBDEV_EMULATION) += rockchip_drm_fbdev.o
+rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o
rockchipdrm-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o cdn-dp-reg.o
rockchipdrm-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -494,7 +494,7 @@ static int __init rockchip_drm_init(void
int ret;
num_rockchip_sub_drivers = 0;
- ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_DRM_ROCKCHIP);
+ ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP);
ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver,
CONFIG_ROCKCHIP_LVDS);
ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,

149
target/linux/rockchip/patches-6.1/008-0034-v5.19-drm-rockchip-Add-VOP2-driver.patch
View File

@@ -1,149 +0,0 @@
From 604be85547ce4d61b89292d2f9a78c721b778c16 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Fri, 22 Apr 2022 09:28:39 +0200
Subject: [PATCH] drm/rockchip: Add VOP2 driver
The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568.
It replaces the VOP unit found in the older Rockchip SoCs.
This driver has been derived from the downstream Rockchip Kernel and
heavily modified:
- All nonstandard DRM properties have been removed
- dropped struct vop2_plane_state and pass around less data between
functions
- Dropped all DRM_FORMAT_* not known on upstream
- rework register access to get rid of excessively used macros
- Drop all waiting for framesyncs
The driver is tested with HDMI and MIPI-DSI display on a RK3568-EVB
board. Overlay support is tested with the modetest utility. AFBC support
on the cluster windows is tested with weston-simple-dmabuf-egl on
weston using the (yet to be upstreamed) panfrost driver support.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Co-Developed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
[dt-binding-header:]
Acked-by: Rob Herring <robh@kernel.org>
[moved dt-binding header from dt-nodes patch to here
and made checkpatch --strict happier]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-23-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/Kconfig | 6 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 +
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 6 +-
drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 2 +
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 14 +
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2706 ++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 477 +++
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 281 ++
include/dt-bindings/soc/rockchip,vop2.h | 14 +
10 files changed, 3507 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_vop2.h
create mode 100644 drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
create mode 100644 include/dt-bindings/soc/rockchip,vop2.h
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -29,6 +29,12 @@ config ROCKCHIP_VOP
This selects support for the VOP driver. You should enable it
on older SoCs.
+config ROCKCHIP_VOP2
+ bool "Rockchip VOP2 driver"
+ help
+ This selects support for the VOP2 driver. The VOP2 hardware is
+ first found on the RK3568.
+
config ROCKCHIP_ANALOGIX_DP
bool "Rockchip specific extensions for Analogix DP driver"
depends on ROCKCHIP_VOP
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -7,6 +7,7 @@ rockchipdrm-y := rockchip_drm_drv.o rock
rockchip_drm_gem.o
rockchipdrm-$(CONFIG_DRM_FBDEV_EMULATION) += rockchip_drm_fbdev.o
+rockchipdrm-$(CONFIG_ROCKCHIP_VOP2) += rockchip_drm_vop2.o rockchip_vop2_reg.o
rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o
rockchipdrm-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o cdn-dp-reg.o
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -495,6 +495,7 @@ static int __init rockchip_drm_init(void
num_rockchip_sub_drivers = 0;
ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP);
+ ADD_ROCKCHIP_SUB_DRIVER(vop2_platform_driver, CONFIG_ROCKCHIP_VOP2);
ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver,
CONFIG_ROCKCHIP_LVDS);
ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -18,7 +18,7 @@
#define ROCKCHIP_MAX_FB_BUFFER 3
#define ROCKCHIP_MAX_CONNECTOR 2
-#define ROCKCHIP_MAX_CRTC 2
+#define ROCKCHIP_MAX_CRTC 4
struct drm_device;
struct drm_connector;
@@ -31,6 +31,9 @@ struct rockchip_crtc_state {
int output_bpc;
int output_flags;
bool enable_afbc;
+ u32 bus_format;
+ u32 bus_flags;
+ int color_space;
};
#define to_rockchip_crtc_state(s) \
container_of(s, struct rockchip_crtc_state, base)
@@ -76,6 +79,7 @@ extern struct platform_driver rockchip_d
extern struct platform_driver rockchip_lvds_driver;
extern struct platform_driver vop_platform_driver;
extern struct platform_driver rk3066_hdmi_driver;
+extern struct platform_driver vop2_platform_driver;
static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)
{
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -134,4 +134,6 @@ void rockchip_drm_mode_config_init(struc
dev->mode_config.funcs = &rockchip_drm_mode_config_funcs;
dev->mode_config.helper_private = &rockchip_mode_config_helpers;
+
+ dev->mode_config.normalize_zpos = true;
}
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -54,9 +54,23 @@ struct vop_afbc {
struct vop_reg enable;
struct vop_reg win_sel;
struct vop_reg format;
+ struct vop_reg rb_swap;
+ struct vop_reg uv_swap;
+ struct vop_reg auto_gating_en;
+ struct vop_reg block_split_en;
+ struct vop_reg pic_vir_width;
+ struct vop_reg tile_num;
struct vop_reg hreg_block_split;
+ struct vop_reg pic_offset;
struct vop_reg pic_size;
+ struct vop_reg dsp_offset;
+ struct vop_reg transform_offset;
struct vop_reg hdr_ptr;
+ struct vop_reg half_block_en;
+ struct vop_reg xmirror;
+ struct vop_reg ymirror;
+ struct vop_reg rotate_270;
+ struct vop_reg rotate_90;
struct vop_reg rstn;
};

36
target/linux/rockchip/patches-6.1/008-0035-v5.19-drm-rockchip-Change-register-space-names-in-vop2.patch
View File

@@ -1,36 +0,0 @@
From 5ee8c8f930ba7d20717c4fc2d9f1ce0e757d1155 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed, 11 May 2022 10:21:08 +0200
Subject: [PATCH] drm/rockchip: Change register space names in vop2
"regs" seems to generic when there are multiple register spaces, so
rename that one to "vop". Also change "gamma_lut" to better looking
"gamma-lut".
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220511082109.1110043-3-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -2620,7 +2620,7 @@ static int vop2_bind(struct device *dev,
dev_set_drvdata(dev, vop2);
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vop");
if (!res) {
drm_err(vop2->drm, "failed to get vop2 register byname\n");
return -EINVAL;
@@ -2637,7 +2637,7 @@ static int vop2_bind(struct device *dev,
if (ret)
return ret;
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gamma_lut");
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gamma-lut");
if (res) {
vop2->lut_regs = devm_ioremap_resource(dev, res);
if (IS_ERR(vop2->lut_regs))

72
target/linux/rockchip/patches-6.1/008-0036-v5.19-PCI-rockchip-dwc-Reset-core-at-driver-probe.patch
View File

@@ -1,72 +0,0 @@
From 431e7d2eece5b906578926d15ee22a70504c364d Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Fri, 29 Apr 2022 08:38:28 -0400
Subject: [PATCH] PCI: rockchip-dwc: Reset core at driver probe
The PCIe controller is in an unknown state at driver probe. This can
lead to undesireable effects when the driver attempts to configure the
controller.
Prevent issues in the future by resetting the core during probe.
Link: https://lore.kernel.org/r/20220429123832.2376381-3-pgwipeout@gmail.com
Tested-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 23 ++++++++-----------
1 file changed, 10 insertions(+), 13 deletions(-)
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -152,6 +152,11 @@ static int rockchip_pcie_resource_get(st
if (IS_ERR(rockchip->rst_gpio))
return PTR_ERR(rockchip->rst_gpio);
+ rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev);
+ if (IS_ERR(rockchip->rst))
+ return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst),
+ "failed to get reset lines\n");
+
return 0;
}
@@ -182,18 +187,6 @@ static void rockchip_pcie_phy_deinit(str
phy_power_off(rockchip->phy);
}
-static int rockchip_pcie_reset_control_release(struct rockchip_pcie *rockchip)
-{
- struct device *dev = rockchip->pci.dev;
-
- rockchip->rst = devm_reset_control_array_get_exclusive(dev);
- if (IS_ERR(rockchip->rst))
- return dev_err_probe(dev, PTR_ERR(rockchip->rst),
- "failed to get reset lines\n");
-
- return reset_control_deassert(rockchip->rst);
-}
-
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = rockchip_pcie_link_up,
.start_link = rockchip_pcie_start_link,
@@ -222,6 +215,10 @@ static int rockchip_pcie_probe(struct pl
if (ret)
return ret;
+ ret = reset_control_assert(rockchip->rst);
+ if (ret)
+ return ret;
+
/* DON'T MOVE ME: must be enable before PHY init */
rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");
if (IS_ERR(rockchip->vpcie3v3)) {
@@ -241,7 +238,7 @@ static int rockchip_pcie_probe(struct pl
if (ret)
goto disable_regulator;
- ret = rockchip_pcie_reset_control_release(rockchip);
+ ret = reset_control_deassert(rockchip->rst);
if (ret)
goto deinit_phy;

163
target/linux/rockchip/patches-6.1/008-0037-v5.19-PCI-rockchip-dwc-Add-legacy-interrupt-support.patch
View File

@@ -1,163 +0,0 @@
From e8aae154df6121167e5b4f156cfc2402e651d2b1 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Fri, 29 Apr 2022 08:38:29 -0400
Subject: [PATCH] PCI: rockchip-dwc: Add legacy interrupt support
The legacy interrupts on the rk356x PCIe controller are handled by a
single muxed interrupt. Add IRQ domain support to the pcie-dw-rockchip
driver to support the virtual domain.
Link: https://lore.kernel.org/r/20220429123832.2376381-4-pgwipeout@gmail.com
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 96 ++++++++++++++++++-
1 file changed, 94 insertions(+), 2 deletions(-)
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -10,9 +10,12 @@
#include <linux/clk.h>
#include <linux/gpio/consumer.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irqdomain.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_device.h>
+#include <linux/of_irq.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
@@ -26,6 +29,7 @@
*/
#define HIWORD_UPDATE(mask, val) (((mask) << 16) | (val))
#define HIWORD_UPDATE_BIT(val) HIWORD_UPDATE(val, val)
+#define HIWORD_DISABLE_BIT(val) HIWORD_UPDATE(val, ~val)
#define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
@@ -36,10 +40,12 @@
#define PCIE_LINKUP (PCIE_SMLH_LINKUP | PCIE_RDLH_LINKUP)
#define PCIE_L0S_ENTRY 0x11
#define PCIE_CLIENT_GENERAL_CONTROL 0x0
+#define PCIE_CLIENT_INTR_STATUS_LEGACY 0x8
+#define PCIE_CLIENT_INTR_MASK_LEGACY 0x1c
#define PCIE_CLIENT_GENERAL_DEBUG 0x104
-#define PCIE_CLIENT_HOT_RESET_CTRL 0x180
+#define PCIE_CLIENT_HOT_RESET_CTRL 0x180
#define PCIE_CLIENT_LTSSM_STATUS 0x300
-#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4)
+#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4)
#define PCIE_LTSSM_STATUS_MASK GENMASK(5, 0)
struct rockchip_pcie {
@@ -51,6 +57,7 @@ struct rockchip_pcie {
struct reset_control *rst;
struct gpio_desc *rst_gpio;
struct regulator *vpcie3v3;
+ struct irq_domain *irq_domain;
};
static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip,
@@ -65,6 +72,78 @@ static void rockchip_pcie_writel_apb(str
writel_relaxed(val, rockchip->apb_base + reg);
}
+static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc)
+{
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);
+ unsigned long reg, hwirq;
+
+ chained_irq_enter(chip, desc);
+
+ reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY);
+
+ for_each_set_bit(hwirq, &reg, 4)
+ generic_handle_domain_irq(rockchip->irq_domain, hwirq);
+
+ chained_irq_exit(chip, desc);
+}
+
+static void rockchip_intx_mask(struct irq_data *data)
+{
+ rockchip_pcie_writel_apb(irq_data_get_irq_chip_data(data),
+ HIWORD_UPDATE_BIT(BIT(data->hwirq)),
+ PCIE_CLIENT_INTR_MASK_LEGACY);
+};
+
+static void rockchip_intx_unmask(struct irq_data *data)
+{
+ rockchip_pcie_writel_apb(irq_data_get_irq_chip_data(data),
+ HIWORD_DISABLE_BIT(BIT(data->hwirq)),
+ PCIE_CLIENT_INTR_MASK_LEGACY);
+};
+
+static struct irq_chip rockchip_intx_irq_chip = {
+ .name = "INTx",
+ .irq_mask = rockchip_intx_mask,
+ .irq_unmask = rockchip_intx_unmask,
+ .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
+};
+
+static int rockchip_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
+ irq_hw_number_t hwirq)
+{
+ irq_set_chip_and_handler(irq, &rockchip_intx_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, domain->host_data);
+
+ return 0;
+}
+
+static const struct irq_domain_ops intx_domain_ops = {
+ .map = rockchip_pcie_intx_map,
+};
+
+static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)
+{
+ struct device *dev = rockchip->pci.dev;
+ struct device_node *intc;
+
+ intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller");
+ if (!intc) {
+ dev_err(dev, "missing child interrupt-controller node\n");
+ return -EINVAL;
+ }
+
+ rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX,
+ &intx_domain_ops, rockchip);
+ of_node_put(intc);
+ if (!rockchip->irq_domain) {
+ dev_err(dev, "failed to get a INTx IRQ domain\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip)
{
rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM,
@@ -111,7 +190,20 @@ static int rockchip_pcie_host_init(struc
{
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
+ struct device *dev = rockchip->pci.dev;
u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE);
+ int irq, ret;
+
+ irq = of_irq_get_byname(dev->of_node, "legacy");
+ if (irq < 0)
+ return irq;
+
+ ret = rockchip_pcie_init_irq_domain(rockchip);
+ if (ret < 0)
+ dev_err(dev, "failed to init irq domain\n");
+
+ irq_set_chained_handler_and_data(irq, rockchip_pcie_legacy_int_handler,
+ rockchip);
/* LTSSM enable control mode */
rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);

27
target/linux/rockchip/patches-6.1/008-0038-v6.0-drm-rockchip-vop2-unlock-on-error-path-in.patch
View File

@@ -1,27 +0,0 @@
From 98526c5bbe3267d447ddd076b685439e3e1396c6 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Mon, 9 May 2022 12:05:05 +0300
Subject: [PATCH] drm/rockchip: vop2: unlock on error path in
vop2_crtc_atomic_enable()
This error path needs an unlock before returning.
Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/YnjZQRV9lpub2ET8@kili
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1524,6 +1524,7 @@ static void vop2_crtc_atomic_enable(stru
if (ret < 0) {
drm_err(vop2->drm, "failed to enable dclk for video port%d - %d\n",
vp->id, ret);
+ vop2_unlock(vop2);
return;
}

96
target/linux/rockchip/patches-6.1/008-0039-v6.0-media-hantro-Add-support-for-RK356x-encoder.patch
View File

@@ -1,96 +0,0 @@
From 6f1ae821a6c4aa9d5b8f437b27ec86fb569219fd Mon Sep 17 00:00:00 2001
From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Date: Sun, 12 Jun 2022 16:53:45 +0100
Subject: [PATCH] media: hantro: Add support for RK356x encoder
The RK3566 and RK3568 SoCs come with a small Hantro instance which is
solely dedicated to encoding. This patch adds the necessary structs to
the Hantro driver to allow the JPEG encoder of it to function.
Through some sleuthing through the vendor's MPP source code and after
closer inspection of the TRM, it was determined that the hardware likely
supports VP8 and H.264 as well.
Tested with the following GStreamer command:
gst-launch-1.0 videotestsrc ! v4l2jpegenc ! matroskamux ! \
filesink location=foo.mkv
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
drivers/staging/media/hantro/hantro_drv.c | 1 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
.../staging/media/hantro/rockchip_vpu_hw.c | 25 +++++++++++++++++++
3 files changed, 27 insertions(+)
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -588,6 +588,7 @@ static const struct of_device_id of_hant
{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
+ { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
{ .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -215,6 +215,7 @@ extern const struct hantro_variant rk306
extern const struct hantro_variant rk3288_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3399_vpu_variant;
+extern const struct hantro_variant rk3568_vepu_variant;
extern const struct hantro_variant rk3568_vpu_variant;
extern const struct hantro_variant sama5d4_vdec_variant;
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
@@ -423,6 +423,14 @@ static const struct hantro_codec_ops rk3
},
};
+static const struct hantro_codec_ops rk3568_vepu_codec_ops[] = {
+ [HANTRO_MODE_JPEG_ENC] = {
+ .run = rockchip_vpu2_jpeg_enc_run,
+ .reset = rockchip_vpu2_enc_reset,
+ .done = rockchip_vpu2_jpeg_enc_done,
+ },
+};
+
/*
* VPU variant.
*/
@@ -445,6 +453,10 @@ static const struct hantro_irq rockchip_
{ "vdpu", rockchip_vpu2_vdpu_irq },
};
+static const struct hantro_irq rk3568_vepu_irqs[] = {
+ { "vepu", rockchip_vpu2_vepu_irq },
+};
+
static const char * const rk3066_vpu_clk_names[] = {
"aclk_vdpu", "hclk_vdpu",
"aclk_vepu", "hclk_vepu"
@@ -549,6 +561,19 @@ const struct hantro_variant rk3399_vpu_v
.init = rockchip_vpu_hw_init,
.clk_names = rockchip_vpu_clk_names,
.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+};
+
+const struct hantro_variant rk3568_vepu_variant = {
+ .enc_offset = 0x0,
+ .enc_fmts = rockchip_vpu_enc_fmts,
+ .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts),
+ .codec = HANTRO_JPEG_ENCODER,
+ .codec_ops = rk3568_vepu_codec_ops,
+ .irqs = rk3568_vepu_irqs,
+ .num_irqs = ARRAY_SIZE(rk3568_vepu_irqs),
+ .init = rockchip_vpu_hw_init,
+ .clk_names = rockchip_vpu_clk_names,
+ .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
};
const struct hantro_variant rk3568_vpu_variant = {

36
target/linux/rockchip/patches-6.1/008-0040-v6.0-phy-rockchip-inno-usb2-Ignore-OTG-IRQs-in-host-mode.patch
View File

@@ -1,36 +0,0 @@
From fd7d47484125c7d04578de9294faa7fec6e5df0a Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Fri, 8 Jul 2022 01:14:34 -0500
Subject: [PATCH] phy: rockchip-inno-usb2: Ignore OTG IRQs in host mode
When the OTG port is fixed to host mode, the driver does not request its
IRQs, nor does it enable those IRQs in hardware. Similarly, the driver
should ignore the OTG port IRQs when handling the shared interrupt.
Otherwise, it would update the extcon based on an ID pin which may be in
an undefined state, or try to queue a uninitialized work item.
Fixes: 6a98df08ccd5 ("phy: rockchip-inno-usb2: Fix muxed interrupt support")
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220708061434.38115-1-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -988,7 +988,9 @@ static irqreturn_t rockchip_usb2phy_irq(
switch (rport->port_id) {
case USB2PHY_PORT_OTG:
- ret |= rockchip_usb2phy_otg_mux_irq(irq, rport);
+ if (rport->mode != USB_DR_MODE_HOST &&
+ rport->mode != USB_DR_MODE_UNKNOWN)
+ ret |= rockchip_usb2phy_otg_mux_irq(irq, rport);
break;
case USB2PHY_PORT_HOST:
ret |= rockchip_usb2phy_linestate_irq(irq, rport);

126
target/linux/rockchip/patches-6.1/008-0041-v6.0-media-hantro-Fix-RK3399-H.264-format-advertising.patch
View File

@@ -1,126 +0,0 @@
From 177d841fa19542eb35aa5ec9579c4abb989c9255 Mon Sep 17 00:00:00 2001
From: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Date: Wed, 29 Jun 2022 20:56:23 +0100
Subject: [PATCH] media: hantro: Fix RK3399 H.264 format advertising
Commit 1f82f2df523cb ("media: hantro: Enable H.264 on Rockchip VDPU2")
enabled H.264 on some SoCs with VDPU2 cores. This had the side-effect
of exposing H.264 coded format as supported on RK3399.
Fix this and clarify how the codec is explicitly disabled on RK3399 on
this driver.
Fixes: 1f82f2df523cb ("media: hantro: Enable H.264 on Rockchip VDPU2")
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
.../staging/media/hantro/rockchip_vpu_hw.c | 60 ++++++++++++++++---
1 file changed, 53 insertions(+), 7 deletions(-)
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
@@ -158,7 +158,7 @@ static const struct hantro_fmt rk3288_vp
},
};
-static const struct hantro_fmt rk3399_vpu_dec_fmts[] = {
+static const struct hantro_fmt rockchip_vdpu2_dec_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
.codec_mode = HANTRO_MODE_NONE,
@@ -204,6 +204,47 @@ static const struct hantro_fmt rk3399_vp
},
};
+static const struct hantro_fmt rk3399_vpu_dec_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .codec_mode = HANTRO_MODE_NONE,
+ .frmsize = {
+ .min_width = FMT_MIN_WIDTH,
+ .max_width = FMT_FHD_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = FMT_MIN_HEIGHT,
+ .max_height = FMT_FHD_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
+ .codec_mode = HANTRO_MODE_MPEG2_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = FMT_MIN_WIDTH,
+ .max_width = FMT_FHD_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = FMT_MIN_HEIGHT,
+ .max_height = FMT_FHD_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_VP8_FRAME,
+ .codec_mode = HANTRO_MODE_VP8_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = FMT_MIN_WIDTH,
+ .max_width = FMT_UHD_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = FMT_MIN_HEIGHT,
+ .max_height = FMT_UHD_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
static irqreturn_t rockchip_vpu1_vepu_irq(int irq, void *dev_id)
{
struct hantro_dev *vpu = dev_id;
@@ -534,8 +575,8 @@ const struct hantro_variant rk3288_vpu_v
const struct hantro_variant rk3328_vpu_variant = {
.dec_offset = 0x400,
- .dec_fmts = rk3399_vpu_dec_fmts,
- .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+ .dec_fmts = rockchip_vdpu2_dec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts),
.codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
HANTRO_H264_DECODER,
.codec_ops = rk3399_vpu_codec_ops,
@@ -546,6 +587,11 @@ const struct hantro_variant rk3328_vpu_v
.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names),
};
+/*
+ * H.264 decoding explicitly disabled in RK3399.
+ * This ensures userspace applications use the Rockchip VDEC core,
+ * which has better performance.
+ */
const struct hantro_variant rk3399_vpu_variant = {
.enc_offset = 0x0,
.enc_fmts = rockchip_vpu_enc_fmts,
@@ -578,8 +624,8 @@ const struct hantro_variant rk3568_vepu_
const struct hantro_variant rk3568_vpu_variant = {
.dec_offset = 0x400,
- .dec_fmts = rk3399_vpu_dec_fmts,
- .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+ .dec_fmts = rockchip_vdpu2_dec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts),
.codec = HANTRO_MPEG2_DECODER |
HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
.codec_ops = rk3399_vpu_codec_ops,
@@ -595,8 +641,8 @@ const struct hantro_variant px30_vpu_var
.enc_fmts = rockchip_vpu_enc_fmts,
.num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts),
.dec_offset = 0x400,
- .dec_fmts = rk3399_vpu_dec_fmts,
- .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+ .dec_fmts = rockchip_vdpu2_dec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts),
.codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER |
HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
.codec_ops = rk3399_vpu_codec_ops,

27
target/linux/rockchip/patches-6.1/008-0042-v6.0-phy-rockchip-inno-usb2-Prevent-incorrect-error-on-probe.patch
View File

@@ -1,27 +0,0 @@
From b113e55913e7f7f031d6cbf9d7b585c6b112f55a Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Sat, 25 Jun 2022 17:27:11 -0400
Subject: [PATCH] phy: rockchip-inno-usb2: Prevent incorrect error on probe
If a phy supply is designated but isn't available at probe time, an
EPROBE_DEFER is returned. Use dev_err_probe to prevent this from
incorrectly printing during boot.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220625212711.558495-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1295,7 +1295,7 @@ static int rockchip_usb2phy_probe(struct
phy = devm_phy_create(dev, child_np, &rockchip_usb2phy_ops);
if (IS_ERR(phy)) {
- dev_err(dev, "failed to create phy\n");
+ dev_err_probe(dev, PTR_ERR(phy), "failed to create phy\n");
ret = PTR_ERR(phy);
goto put_child;
}

33
target/linux/rockchip/patches-6.1/008-0043-v6.0-phy-rockchip-inno-usb2-Sync-initial-otg-state.patch
View File

@@ -1,33 +0,0 @@
From 8dc60f8da22fdbaa1fafcfb5ff6d24bc9eff56aa Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Tue, 21 Jun 2022 20:31:40 -0400
Subject: [PATCH] phy: rockchip-inno-usb2: Sync initial otg state
The initial otg state for the phy defaults to device mode. The actual
state isn't detected until an ID IRQ fires. Fix this by syncing the ID
state during initialization.
Fixes: 51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220622003140.30365-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1174,6 +1174,12 @@ static int rockchip_usb2phy_otg_port_ini
EXTCON_USB_HOST, &rport->event_nb);
if (ret)
dev_err(rphy->dev, "register USB HOST notifier failed\n");
+
+ if (!of_property_read_bool(rphy->dev->of_node, "extcon")) {
+ /* do initial sync of usb state */
+ ret = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
+ extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !ret);
+ }
}
out:

57
target/linux/rockchip/patches-6.1/008-0044-v6.1-phy-rockchip-Support-PCIe-v3.patch
View File

@@ -1,57 +0,0 @@
From 2e9bffc4f713db465177238f6033f7d367d6f151 Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Thu, 25 Aug 2022 21:38:34 +0200
Subject: [PATCH] phy: rockchip: Support PCIe v3
RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
It use a dedicated PCIe-phy. Add support for this.
Initial support by Shawn Lin, modifications by Peter Geis and Frank
Wunderlich.
Add data-lanes property for splitting pcie-lanes across controllers.
The data-lanes is an array where x=0 means lane is disabled and x > 0
means controller x is assigned to phy lane.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Suggested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220825193836.54262-4-linux@fw-web.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/Kconfig | 9 +
drivers/phy/rockchip/Makefile | 1 +
.../phy/rockchip/phy-rockchip-snps-pcie3.c | 319 ++++++++++++++++++
include/linux/phy/pcie.h | 12 +
4 files changed, 341 insertions(+)
create mode 100644 drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
create mode 100644 include/linux/phy/pcie.h
--- a/drivers/phy/rockchip/Kconfig
+++ b/drivers/phy/rockchip/Kconfig
@@ -83,6 +83,15 @@ config PHY_ROCKCHIP_PCIE
help
Enable this to support the Rockchip PCIe PHY.
+config PHY_ROCKCHIP_SNPS_PCIE3
+ tristate "Rockchip Snps PCIe3 PHY Driver"
+ depends on (ARCH_ROCKCHIP && OF) || COMPILE_TEST
+ depends on HAS_IOMEM
+ select GENERIC_PHY
+ select MFD_SYSCON
+ help
+ Enable this to support the Rockchip snps PCIe3 PHY.
+
config PHY_ROCKCHIP_TYPEC
tristate "Rockchip TYPEC PHY Driver"
depends on OF && (ARCH_ROCKCHIP || COMPILE_TEST)
--- a/drivers/phy/rockchip/Makefile
+++ b/drivers/phy/rockchip/Makefile
@@ -8,5 +8,6 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) +=
obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY) += phy-rockchip-naneng-combphy.o
obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o
+obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o
obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o

54
target/linux/rockchip/patches-6.1/008-0045-v6.1-phy-rockchip-inno-usb2-Return-zero-after-otg-sync.patch
View File

@@ -1,54 +0,0 @@
From f340ed8664a55a467850ec1689996e63d9ee971a Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Fri, 2 Sep 2022 14:45:42 -0400
Subject: [PATCH] phy: rockchip-inno-usb2: Return zero after otg sync
The otg sync state patch reuses the ret variable, but fails to set it to
zero after use. This leads to a situation when the otg port is in
peripheral mode where the otg phy aborts halfway through setup. It also
fails to account for a failure to register the extcon notifier. Fix this
by using our own variable and skipping otg sync in case of failure.
Fixes: 8dc60f8da22f ("phy: rockchip-inno-usb2: Sync initial otg state")
Reported-by: Markus Reichl <m.reichl@fivetechno.de>
Reported-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220902184543.1234835-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1134,7 +1134,7 @@ static int rockchip_usb2phy_otg_port_ini
struct rockchip_usb2phy_port *rport,
struct device_node *child_np)
{
- int ret;
+ int ret, id;
rport->port_id = USB2PHY_PORT_OTG;
rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -1172,13 +1172,15 @@ static int rockchip_usb2phy_otg_port_ini
ret = devm_extcon_register_notifier(rphy->dev, rphy->edev,
EXTCON_USB_HOST, &rport->event_nb);
- if (ret)
+ if (ret) {
dev_err(rphy->dev, "register USB HOST notifier failed\n");
+ goto out;
+ }
if (!of_property_read_bool(rphy->dev->of_node, "extcon")) {
/* do initial sync of usb state */
- ret = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
- extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !ret);
+ id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
+ extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id);
}
}

44
target/linux/rockchip/patches-6.1/008-0046-v6.1-phy-rockchip-snps-pcie3-only-look-for-rockchip-pipe-grf-o.patch
View File

@@ -1,44 +0,0 @@
From 37d40a21473fdf1d0194089eb259b8ceeec2a4b9 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue, 27 Sep 2022 07:17:52 +0200
Subject: [PATCH] phy: rockchip-snps-pcie3: only look for rockchip,pipe-grf on
rk3588
The rockchip,pipe-grf property is only used on rk3588, but not on
rk3568. Therefore this property is not present on rk3568 devices,
leading to the following message:
rockchip-snps-pcie3-phy fe8c0000.phy: failed to find rockchip,pipe_grf regmap
Fix that by only looking for this property on rk3588.
Fixes: 2e9bffc4f713d ("phy: rockchip: Support PCIe v3")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Link: https://lore.kernel.org/r/20220927051752.53089-1-aurelien@aurel32.net
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -257,10 +257,15 @@ static int rockchip_p3phy_probe(struct p
return PTR_ERR(priv->phy_grf);
}
- priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev->of_node,
- "rockchip,pipe-grf");
- if (IS_ERR(priv->pipe_grf))
- dev_info(dev, "failed to find rockchip,pipe_grf regmap\n");
+ if (of_device_is_compatible(np, "rockchip,rk3588-pcie3-phy")) {
+ priv->pipe_grf =
+ syscon_regmap_lookup_by_phandle(dev->of_node,
+ "rockchip,pipe-grf");
+ if (IS_ERR(priv->pipe_grf))
+ dev_info(dev, "failed to find rockchip,pipe_grf regmap\n");
+ } else {
+ priv->pipe_grf = NULL;
+ }
priv->num_lanes = of_property_read_variable_u32_array(dev->of_node, "data-lanes",
priv->lanes, 2,

47
target/linux/rockchip/patches-6.1/008-0047-v6.5-drm-rockchip-vop2-fix-suspend-resume.patch
View File

@@ -1,47 +0,0 @@
From afa965a45e01e541cdbe5c8018226eff117610f0 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Thu, 13 Apr 2023 16:43:47 +0200
Subject: [PATCH] drm/rockchip: vop2: fix suspend/resume
During a suspend/resume cycle the VO power domain will be disabled and
the VOP2 registers will reset to their default values. After that the
cached register values will be out of sync and the read/modify/write
operations we do on the window registers will result in bogus values
written. Fix this by re-initializing the register cache each time we
enable the VOP2. With this the VOP2 will show a picture after a
suspend/resume cycle whereas without this the screen stays dark.
Fixes: 604be85547ce4 ("drm/rockchip: Add VOP2 driver")
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230413144347.3506023-1-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -214,6 +214,8 @@ struct vop2 {
struct vop2_win win[];
};
+static const struct regmap_config vop2_regmap_config;
+
static struct vop2_video_port *to_vop2_video_port(struct drm_crtc *crtc)
{
return container_of(crtc, struct vop2_video_port, crtc);
@@ -838,6 +840,12 @@ static void vop2_enable(struct vop2 *vop
return;
}
+ ret = regmap_reinit_cache(vop2->map, &vop2_regmap_config);
+ if (ret) {
+ drm_err(vop2->drm, "failed to reinit cache: %d\n", ret);
+ return;
+ }
+
if (vop2->data->soc_id == 3566)
vop2_writel(vop2, RK3568_OTP_WIN_EN, 1);

53
target/linux/rockchip/patches-6.1/008-0048-v6.5-drm-rockchip-vop2-Use-regcache_sync-to-fix-suspend-resume.patch
View File

@@ -1,53 +0,0 @@
From b63a553e8f5aa6574eeb535a551817a93c426d8c Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Mon, 17 Apr 2023 14:37:47 +0200
Subject: [PATCH] drm/rockchip: vop2: Use regcache_sync() to fix suspend/resume
afa965a45e01 ("drm/rockchip: vop2: fix suspend/resume") uses
regmap_reinit_cache() to fix the suspend/resume issue with the VOP2
driver. During discussion it came up that we should rather use
regcache_sync() instead. As the original patch is already applied
fix this up in this follow-up patch.
Fixes: afa965a45e01 ("drm/rockchip: vop2: fix suspend/resume")
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230417123747.2179695-1-s.hauer@pengutronix.de
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -214,8 +214,6 @@ struct vop2 {
struct vop2_win win[];
};
-static const struct regmap_config vop2_regmap_config;
-
static struct vop2_video_port *to_vop2_video_port(struct drm_crtc *crtc)
{
return container_of(crtc, struct vop2_video_port, crtc);
@@ -840,11 +838,7 @@ static void vop2_enable(struct vop2 *vop
return;
}
- ret = regmap_reinit_cache(vop2->map, &vop2_regmap_config);
- if (ret) {
- drm_err(vop2->drm, "failed to reinit cache: %d\n", ret);
- return;
- }
+ regcache_sync(vop2->map);
if (vop2->data->soc_id == 3566)
vop2_writel(vop2, RK3568_OTP_WIN_EN, 1);
@@ -874,6 +868,8 @@ static void vop2_disable(struct vop2 *vo
pm_runtime_put_sync(vop2->dev);
+ regcache_mark_dirty(vop2->map);
+
clk_disable_unprepare(vop2->aclk);
clk_disable_unprepare(vop2->hclk);
}

123
target/linux/rockchip/patches-6.1/009-v6.0-arm64-enable-THP_SWAP-for-arm64.patch
View File

@@ -1,123 +0,0 @@
From d0637c505f8a1d8c4088642f1f3e9e3b22da14f6 Mon Sep 17 00:00:00 2001
From: Barry Song <v-songbaohua@oppo.com>
Date: Wed, 20 Jul 2022 21:37:37 +1200
Subject: [PATCH] arm64: enable THP_SWAP for arm64
THP_SWAP has been proven to improve the swap throughput significantly
on x86_64 according to commit bd4c82c22c367e ("mm, THP, swap: delay
splitting THP after swapped out").
As long as arm64 uses 4K page size, it is quite similar with x86_64
by having 2MB PMD THP. THP_SWAP is architecture-independent, thus,
enabling it on arm64 will benefit arm64 as well.
A corner case is that MTE has an assumption that only base pages
can be swapped. We won't enable THP_SWAP for ARM64 hardware with
MTE support until MTE is reworked to coexist with THP_SWAP.
A micro-benchmark is written to measure thp swapout throughput as
below,
unsigned long long tv_to_ms(struct timeval tv)
{
return tv.tv_sec * 1000 + tv.tv_usec / 1000;
}
main()
{
struct timeval tv_b, tv_e;;
#define SIZE 400*1024*1024
volatile void *p = mmap(NULL, SIZE, PROT_READ | PROT_WRITE,
MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
if (!p) {
perror("fail to get memory");
exit(-1);
}
madvise(p, SIZE, MADV_HUGEPAGE);
memset(p, 0x11, SIZE); /* write to get mem */
gettimeofday(&tv_b, NULL);
madvise(p, SIZE, MADV_PAGEOUT);
gettimeofday(&tv_e, NULL);
printf("swp out bandwidth: %ld bytes/ms\n",
SIZE/(tv_to_ms(tv_e) - tv_to_ms(tv_b)));
}
Testing is done on rk3568 64bit Quad Core Cortex-A55 platform -
ROCK 3A.
thp swp throughput w/o patch: 2734bytes/ms (mean of 10 tests)
thp swp throughput w/ patch: 3331bytes/ms (mean of 10 tests)
Cc: "Huang, Ying" <ying.huang@intel.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Hugh Dickins <hughd@google.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Steven Price <steven.price@arm.com>
Cc: Yang Shi <shy828301@gmail.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Barry Song <v-songbaohua@oppo.com>
Link: https://lore.kernel.org/r/20220720093737.133375-1-21cnbao@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/pgtable.h | 6 ++++++
include/linux/huge_mm.h | 12 ++++++++++++
mm/swap_slots.c | 2 +-
4 files changed, 20 insertions(+), 1 deletion(-)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -95,6 +95,7 @@ config ARM64
select ARCH_WANT_HUGE_PMD_SHARE if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)
select ARCH_WANT_LD_ORPHAN_WARN
select ARCH_WANTS_NO_INSTR
+ select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES
select ARCH_HAS_UBSAN_SANITIZE_ALL
select ARM_AMBA
select ARM_ARCH_TIMER
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -44,6 +44,12 @@
__flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1)
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+static inline bool arch_thp_swp_supported(void)
+{
+ return !system_supports_mte();
+}
+#define arch_thp_swp_supported arch_thp_swp_supported
+
/*
* Outside of a few very special situations (e.g. hibernation), we always
* use broadcast TLB invalidation instructions, therefore a spurious page
--- a/include/linux/huge_mm.h
+++ b/include/linux/huge_mm.h
@@ -495,4 +495,16 @@ static inline unsigned long thp_size(str
return PAGE_SIZE << thp_order(page);
}
+/*
+ * archs that select ARCH_WANTS_THP_SWAP but don't support THP_SWP due to
+ * limitations in the implementation like arm64 MTE can override this to
+ * false
+ */
+#ifndef arch_thp_swp_supported
+static inline bool arch_thp_swp_supported(void)
+{
+ return true;
+}
+#endif
+
#endif /* _LINUX_HUGE_MM_H */
--- a/mm/swap_slots.c
+++ b/mm/swap_slots.c
@@ -308,7 +308,7 @@ swp_entry_t get_swap_page(struct page *p
entry.val = 0;
if (PageTransHuge(page)) {
- if (IS_ENABLED(CONFIG_THP_SWAP))
+ if (IS_ENABLED(CONFIG_THP_SWAP) && arch_thp_swp_supported())
get_swap_pages(1, &entry, HPAGE_PMD_NR);
goto out;
}

54
target/linux/rockchip/patches-6.1/010-v5.18-mmc-core-Improve-fallback-to-speed-modes-if-eMMC-HS200-fa.patch
View File

@@ -1,54 +0,0 @@
From 3b6c472822f8bdeaa3cea8290f5b4a210dca5585 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Thu, 3 Mar 2022 17:45:22 +0100
Subject: [PATCH] mmc: core: Improve fallback to speed modes if eMMC HS200
fails
In the error path of mmc_select_hs200() we are trying our best to restore
the card/host into a valid state. This makes sense, especially if we
encounter a simple switch error (-EBADMSG). However, rather than then
continue with using the legacy speed mode, let's try the other better speed
modes first. Additionally, let's update the card->mmc_avail_type to avoid
us from trying a broken HS200 mode again.
In an Amlogic S905W based TV box where the switch to HS200 mode fails for
the eMMC, this allows us to use the eMMC in DDR mode in favor of the legacy
mode, which greatly improves the performance.
Suggested-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/20220303164522.129583-1-ulf.hansson@linaro.org
---
drivers/mmc/core/mmc.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1530,13 +1530,23 @@ static int mmc_select_timing(struct mmc_
if (!mmc_can_ext_csd(card))
goto bus_speed;
- if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES)
+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES) {
err = mmc_select_hs400es(card);
- else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200)
+ goto out;
+ }
+
+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200) {
err = mmc_select_hs200(card);
- else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS)
+ if (err == -EBADMSG)
+ card->mmc_avail_type &= ~EXT_CSD_CARD_TYPE_HS200;
+ else
+ goto out;
+ }
+
+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS)
err = mmc_select_hs(card);
+out:
if (err && err != -EBADMSG)
return err;

2
target/linux/rockchip/patches-6.1/012-v6.3-arm64-dts-rockchip-rk3328-Add-Orange-Pi-R1-Plus.patch
View File

@@ -21,7 +21,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od
@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb

7
target/linux/rockchip/patches-6.1/013-v6.4-arm64-dts-rockchip-Add-FriendlyElec-Nanopi-R5S.patch
View File

@@ -30,11 +30,12 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -54,3 +54,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
@@ -72,4 +72,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
@@ -0,0 +1,713 @@

7
target/linux/rockchip/patches-6.1/015-v6.4-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R5C.patch
View File

@@ -28,12 +28,13 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -54,4 +54,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
@@ -72,5 +72,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
@@ -0,0 +1,112 @@

2
target/linux/rockchip/patches-6.1/018-v6.4-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C.patch
View File

@@ -17,7 +17,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a9
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a9
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb

2
target/linux/rockchip/patches-6.1/019-v6.4-arm64-dts-rockchip-Add-Xunlong-OrangePi-R1-Plus-LTS.patch
View File

@@ -18,7 +18,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-ev
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-ev
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb

7
target/linux/rockchip/patches-6.1/020-v6.5-arm64-dts-rockchip-Add-Lunzn-Fastrhino-R66S.patch
View File

@@ -26,13 +26,14 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -56,5 +56,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
@@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts
@@ -0,0 +1,27 @@

5
target/linux/rockchip/patches-6.1/021-v6.5-arm64-dts-rockchip-Add-Lunzn-Fastrhino-R68S.patch
View File

@@ -21,13 +21,14 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -57,5 +57,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts
@@ -0,0 +1,112 @@

2
target/linux/rockchip/patches-6.1/023-v6.5-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C-Plus.patch
View File

@@ -17,7 +17,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od
@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb

2
target/linux/rockchip/patches-6.1/107-mmc-core-set-initial-signal-voltage-on-power-off.patch
View File

@@ -24,7 +24,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1364,6 +1364,8 @@ void mmc_power_off(struct mmc_host *host
@@ -1366,6 +1366,8 @@ void mmc_power_off(struct mmc_host *host
mmc_pwrseq_power_off(host);

8
target/linux/rockchip/patches-6.1/600-net-ethernet-r8169-add-LED-configuration-from-OF.patch
View File

@@ -8,7 +8,7 @@
#include <linux/tcp.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
@@ -183,6 +184,7 @@ enum rtl_registers {
@@ -171,6 +172,7 @@ enum rtl_registers {
MAR0 = 8, /* Multicast filter. */
CounterAddrLow = 0x10,
CounterAddrHigh = 0x14,
@@ -16,7 +16,7 @@
TxDescStartAddrLow = 0x20,
TxDescStartAddrHigh = 0x24,
TxHDescStartAddrLow = 0x28,
@@ -2140,6 +2142,22 @@ void r8169_apply_firmware(struct rtl8169
@@ -2096,6 +2098,22 @@ void r8169_apply_firmware(struct rtl8169
}
}
@@ -39,7 +39,7 @@
static void rtl8168_config_eee_mac(struct rtl8169_private *tp)
{
/* Adjust EEE LED frequency */
@@ -3243,6 +3261,8 @@ static void rtl_hw_start_8168h_1(struct
@@ -3238,6 +3256,8 @@ static void rtl_hw_start_8168h_1(struct
r8168_mac_ocp_write(tp, 0xc094, 0x0000);
r8168_mac_ocp_write(tp, 0xc09e, 0x0000);
@@ -48,7 +48,7 @@
rtl_hw_aspm_clkreq_enable(tp, true);
}
@@ -3695,6 +3715,8 @@ static void rtl_hw_start_8125b(struct rt
@@ -3610,6 +3630,8 @@ static void rtl_hw_start_8125b(struct rt
rtl_ephy_init(tp, e_info_8125b);
rtl_hw_start_8125_common(tp);

4
target/linux/rockchip/patches-6.1/602-net-ethernet-r8169-add-devname-configuration-from-OF.patch
View File

@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2142,6 +2142,22 @@ void r8169_apply_firmware(struct rtl8169
@@ -2098,6 +2098,22 @@ void r8169_apply_firmware(struct rtl8169
}
}
@@ -23,7 +23,7 @@
static int rtl8169_led_configuration(struct rtl8169_private *tp)
{
u32 led_data;
@@ -3715,6 +3731,7 @@ static void rtl_hw_start_8125b(struct rt
@@ -3630,6 +3646,7 @@ static void rtl_hw_start_8125b(struct rt
rtl_ephy_init(tp, e_info_8125b);
rtl_hw_start_8125_common(tp);

24
target/linux/rockchip/patches-6.1/701-01-irqchip-gic-v3-its-add-GFP_DMA32-flag-for-memory-allocate.patch
View File

@@ -12,7 +12,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2172,6 +2172,8 @@ static struct page *its_allocate_prop_ta
@@ -2178,6 +2178,8 @@ static struct page *its_allocate_prop_ta
{
struct page *prop_page;
@@ -21,7 +21,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ));
if (!prop_page)
return NULL;
@@ -2295,6 +2297,7 @@ static int its_setup_baser(struct its_no
@@ -2301,6 +2303,7 @@ static int its_setup_baser(struct its_no
u32 alloc_pages, psz;
struct page *page;
void *base;
@@ -29,7 +29,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
psz = baser->psz;
alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz);
@@ -2306,7 +2309,10 @@ static int its_setup_baser(struct its_no
@@ -2312,7 +2315,10 @@ static int its_setup_baser(struct its_no
order = get_order(GITS_BASER_PAGES_MAX * psz);
}
@@ -41,7 +41,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
if (!page)
return -ENOMEM;
@@ -2935,6 +2941,8 @@ static struct page *its_allocate_pending
@@ -2941,6 +2947,8 @@ static struct page *its_allocate_pending
{
struct page *pend_page;
@@ -50,7 +50,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
pend_page = alloc_pages(gfp_flags | __GFP_ZERO,
get_order(LPI_PENDBASE_SZ));
if (!pend_page)
@@ -3278,7 +3286,11 @@ static bool its_alloc_table_entry(struct
@@ -3283,7 +3291,11 @@ static bool its_alloc_table_entry(struct
/* Allocate memory for 2nd level table */
if (!table[idx]) {
@@ -63,7 +63,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
get_order(baser->psz));
if (!page)
return false;
@@ -3367,6 +3379,7 @@ static struct its_device *its_create_dev
@@ -3372,6 +3384,7 @@ static struct its_device *its_create_dev
int nr_lpis;
int nr_ites;
int sz;
@@ -71,7 +71,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
if (!its_alloc_device_table(its, dev_id))
return NULL;
@@ -3382,7 +3395,10 @@ static struct its_device *its_create_dev
@@ -3387,7 +3400,10 @@ static struct its_device *its_create_dev
nr_ites = max(2, nvecs);
sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
@@ -83,15 +83,15 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
if (alloc_lpis) {
lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis);
if (lpi_map)
@@ -4974,6 +4990,7 @@ static int __init its_probe_one(struct r
u64 baser, tmp, typer;
@@ -5011,6 +5027,7 @@ static int __init its_probe_one(struct r
struct page *page;
u32 ctlr;
int err;
+ gfp_t gfp_flags;
its_base = ioremap(res->start, SZ_64K);
if (!its_base) {
@@ -5042,7 +5059,10 @@ static int __init its_probe_one(struct r
its_base = its_map_one(res, &err);
if (!its_base)
@@ -5064,7 +5081,10 @@ static int __init its_probe_one(struct r
its->numa_node = numa_node;

8
target/linux/rockchip/patches-6.1/701-02-irqchip-gic-v3-its-force-to-config-its-tables-as.patch
View File

@@ -12,7 +12,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2359,6 +2359,10 @@ retry_baser:
@@ -2365,6 +2365,10 @@ retry_baser:
its_write_baser(its, baser, val);
tmp = baser->val;
@@ -23,7 +23,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) {
/*
* Shareability didn't stick. Just use
@@ -3100,6 +3104,10 @@ static void its_cpu_init_lpis(void)
@@ -3104,6 +3108,10 @@ static void its_cpu_init_lpis(void)
gicr_write_propbaser(val, rbase + GICR_PROPBASER);
tmp = gicr_read_propbaser(rbase + GICR_PROPBASER);
@@ -34,7 +34,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) {
if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) {
/*
@@ -3124,6 +3132,10 @@ static void its_cpu_init_lpis(void)
@@ -3128,6 +3136,10 @@ static void its_cpu_init_lpis(void)
gicr_write_pendbaser(val, rbase + GICR_PENDBASER);
tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER);
@@ -45,7 +45,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) {
/*
* The HW reports non-shareable, we must remove the
@@ -5093,6 +5105,10 @@ static int __init its_probe_one(struct r
@@ -5115,6 +5127,10 @@ static int __init its_probe_one(struct r
gits_write_cbaser(baser, its->base + GITS_CBASER);
tmp = gits_read_cbaser(its->base + GITS_CBASER);

2
target/linux/rockchip/patches-6.1/701-03-irqchip-gic-v3-its-flush-base-table-if-rk356x.patch
View File

@@ -11,7 +11,7 @@ Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2360,8 +2360,12 @@ retry_baser:
@@ -2366,8 +2366,12 @@ retry_baser:
tmp = baser->val;
if (of_machine_is_compatible("rockchip,rk3568") ||

8
target/linux/rockchip/patches-6.1/701-04-irqchip-gic-v3-its-force-to-config-its-tables-as.patch
View File

@@ -12,7 +12,7 @@ Change-Id: I7275cbf011061f11968505a7570230d2d789e9fc
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2360,7 +2360,8 @@ retry_baser:
@@ -2366,7 +2366,8 @@ retry_baser:
tmp = baser->val;
if (of_machine_is_compatible("rockchip,rk3568") ||
@@ -22,7 +22,7 @@ Change-Id: I7275cbf011061f11968505a7570230d2d789e9fc
if (tmp & GITS_BASER_SHAREABILITY_MASK)
tmp &= ~GITS_BASER_SHAREABILITY_MASK;
else
@@ -3109,7 +3110,8 @@ static void its_cpu_init_lpis(void)
@@ -3113,7 +3114,8 @@ static void its_cpu_init_lpis(void)
tmp = gicr_read_propbaser(rbase + GICR_PROPBASER);
if (of_machine_is_compatible("rockchip,rk3568") ||
@@ -32,7 +32,7 @@ Change-Id: I7275cbf011061f11968505a7570230d2d789e9fc
tmp &= ~GICR_PROPBASER_SHAREABILITY_MASK;
if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) {
@@ -3137,7 +3139,8 @@ static void its_cpu_init_lpis(void)
@@ -3141,7 +3143,8 @@ static void its_cpu_init_lpis(void)
tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER);
if (of_machine_is_compatible("rockchip,rk3568") ||
@@ -42,7 +42,7 @@ Change-Id: I7275cbf011061f11968505a7570230d2d789e9fc
tmp &= ~GICR_PENDBASER_SHAREABILITY_MASK;
if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) {
@@ -5110,7 +5113,8 @@ static int __init its_probe_one(struct r
@@ -5132,7 +5135,8 @@ static int __init its_probe_one(struct r
tmp = gits_read_cbaser(its->base + GITS_CBASER);
if (of_machine_is_compatible("rockchip,rk3568") ||

4
target/linux/rockchip/patches-6.1/702-arm64-dts-rockchip-rk356x-Fix-PCIe-register-and-range-map.patch
View File

@@ -33,7 +33,7 @@ Signed-off-by: Andrew Powers-Holmes <aholmes@omnom.net>
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -855,7 +855,7 @@
@@ -951,7 +951,7 @@
compatible = "rockchip,rk3568-pcie";
reg = <0x3 0xc0000000 0x0 0x00400000>,
<0x0 0xfe260000 0x0 0x00010000>,
@@ -42,7 +42,7 @@ Signed-off-by: Andrew Powers-Holmes <aholmes@omnom.net>
reg-names = "dbi", "apb", "config";
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
@@ -884,8 +884,9 @@
@@ -981,8 +981,9 @@
phys = <&combphy2 PHY_TYPE_PCIE>;
phy-names = "pcie-phy";
power-domains = <&power RK3568_PD_PIPE>;

2
target/linux/rockchip/patches-6.1/703-arm64-rk3568-update-gicv3-its-and-pci-msi-map.patch
View File

@@ -66,7 +66,7 @@
};
usb_host0_ehci: usb@fd800000 {
@@ -879,7 +886,7 @@
@@ -976,7 +983,7 @@
num-ib-windows = <6>;
num-ob-windows = <2>;
max-link-speed = <2>;

4
target/linux/rockchip/patches-6.1/801-01-hwrng-rockchip-add-support-for-Rockchip-HW-RNG.patch
View File

@@ -14,7 +14,7 @@ Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -385,6 +385,19 @@ config HW_RANDOM_STM32
@@ -372,6 +372,19 @@ config HW_RANDOM_STM32
If unsure, say N.
@@ -36,7 +36,7 @@ Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
depends on HW_RANDOM && MACH_PIC32
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) +=
@@ -34,6 +34,7 @@ obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) +=
obj-$(CONFIG_HW_RANDOM_ST) += st-rng.o
obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o
obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o

2
target/linux/rockchip/patches-6.1/801-03-arm64-dts-rockchip-add-rng-node-for-rk3399.patch
View File

@@ -13,7 +13,7 @@ Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1937,6 +1937,16 @@
@@ -2043,6 +2043,16 @@
};
};

2
target/linux/rockchip/patches-6.1/801-05-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch
View File

@@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -608,6 +608,10 @@
@@ -609,6 +609,10 @@
status = "okay";
};

2
target/linux/rockchip/patches-6.1/802-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch
View File

@@ -180,7 +180,7 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED,
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -399,7 +399,8 @@ struct clk *rockchip_clk_register_mmc(co
@@ -418,7 +418,8 @@ struct clk *rockchip_clk_register_mmc(co
* DDRCLK flags, including method of setting the rate
* ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate.
*/

12
target/linux/rockchip/patches-6.1/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch
View File

@@ -13,9 +13,9 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -120,6 +120,18 @@ config ARM_TEGRA_DEVFREQ
It reads ACTMON counters of memory controllers and adjusts the
operating frequencies and voltages with OPP support.
@@ -130,6 +130,18 @@ config ARM_MEDIATEK_CCI_DEVFREQ
buck voltages and update a proper CCI frequency. Use the notification
to get the regulator status.
+config ARM_RK3328_DMC_DEVFREQ
+ tristate "ARM RK3328 DMC DEVFREQ Driver"
@@ -34,11 +34,11 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) +=
obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx
obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o
obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) += mtk-cci-devfreq.o
obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o
+obj-$(CONFIG_ARM_RK3328_DMC_DEVFREQ) += rk3328_dmc.o
obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33-mbus.o
obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o
# DEVFREQ Event Drivers

2
target/linux/rockchip/patches-6.1/804-02-PM-devfreq-event-add-support-for-rk3368-dfi.patch
View File

@@ -174,7 +174,7 @@ Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
data->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(data->regs))
return PTR_ERR(data->regs);
@@ -205,23 +290,59 @@ static int rockchip_dfi_probe(struct pla
@@ -204,23 +289,59 @@ static int rockchip_dfi_probe(struct pla
if (IS_ERR(data->regmap_pmu))
return PTR_ERR(data->regmap_pmu);
}

2
target/linux/rockchip/patches-6.1/804-03-PM-devfreq-event-add-support-for-rk3288-dfi.patch
View File

@@ -219,7 +219,7 @@ Signed-off-by: Tang Yun ping <typ@rock-chips.com>
static __init int rk3368_dfi_init(struct platform_device *pdev,
struct rockchip_dfi *data,
struct devfreq_event_desc *desc)
@@ -297,6 +436,7 @@ static __init int rockchip_dfi_init(stru
@@ -296,6 +435,7 @@ static __init int rockchip_dfi_init(stru
}
static const struct of_device_id rockchip_dfi_id_match[] = {

2
target/linux/rockchip/patches-6.1/804-04-PM-devfreq-event-add-support-for-rk3128-dfi.patch
View File

@@ -142,7 +142,7 @@ Signed-off-by: Liang Chen <cl@rock-chips.com>
static __init int rk3288_dfi_init(struct platform_device *pdev,
struct rockchip_dfi *data,
struct devfreq_event_desc *desc)
@@ -436,6 +531,7 @@ static __init int rockchip_dfi_init(stru
@@ -435,6 +530,7 @@ static __init int rockchip_dfi_init(stru
}
static const struct of_device_id rockchip_dfi_id_match[] = {

2
target/linux/rockchip/patches-6.1/804-05-PM-devfreq-event-make-dfi-more-extension.patch
View File

@@ -171,7 +171,7 @@ Signed-off-by: CanYang He <hcy@rock-chips.com>
data->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(data->regs))
@@ -525,6 +538,10 @@ static __init int rockchip_dfi_init(stru
@@ -524,6 +537,10 @@ static __init int rockchip_dfi_init(stru
return PTR_ERR(data->regmap_pmu);
}

2
target/linux/rockchip/patches-6.1/804-06-PM-devfreq-event-add-support-for-rk3328-dfi.patch
View File

@@ -63,7 +63,7 @@ Signed-off-by: CanYang He <hcy@rock-chips.com>
/* enable count, use software mode */
writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
@@ -547,9 +552,40 @@ static __init int rockchip_dfi_init(stru
@@ -546,9 +551,40 @@ static __init int rockchip_dfi_init(stru
return 0;
}

2
target/linux/rockchip/patches-6.1/804-07-PM-devfreq-event-add-support-for-px30-dfi.patch
View File

@@ -104,7 +104,7 @@ Signed-off-by: YouMin Chen <cym@rock-chips.com>
static __init int rk3128_dfi_init(struct platform_device *pdev,
struct rockchip_dfi *data,
struct devfreq_event_desc *desc)
@@ -583,6 +617,7 @@ static __init int rk3328_dfi_init(struct
@@ -582,6 +616,7 @@ static __init int rk3328_dfi_init(struct
}
static const struct of_device_id rockchip_dfi_id_match[] = {

2
target/linux/rockchip/patches-6.1/804-08-PM-devfreq-rockchip-dfi-add-support-for-rk1808-dfi.patch
View File

@@ -11,7 +11,7 @@ Signed-off-by: YouMin Chen <cym@rock-chips.com>
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -618,6 +618,7 @@ static __init int rk3328_dfi_init(struct
@@ -617,6 +617,7 @@ static __init int rk3328_dfi_init(struct
static const struct of_device_id rockchip_dfi_id_match[] = {
{ .compatible = "rockchip,px30-dfi", .data = px30_dfi_init },

2
target/linux/rockchip/patches-6.1/804-10-PM-devfreq-rockchip-dfi-add-support-for-rv1126-dfi.patch
View File

@@ -11,7 +11,7 @@ Signed-off-by: YouMin Chen <cym@rock-chips.com>
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -632,6 +632,7 @@ static const struct of_device_id rockchi
@@ -631,6 +631,7 @@ static const struct of_device_id rockchi
{ .compatible = "rockchip,rk3328-dfi", .data = rk3328_dfi_init },
{ .compatible = "rockchip,rk3368-dfi", .data = rk3368_dfi_init },
{ .compatible = "rockchip,rk3399-dfi", .data = rockchip_dfi_init },

2
target/linux/rockchip/patches-6.1/804-11-PM-devfreq-rockchip-dfi-add-support-for-rk3568-dfi.patch
View File

@@ -11,7 +11,7 @@ Signed-off-by: YouMin Chen <cym@rock-chips.com>
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -632,6 +632,7 @@ static const struct of_device_id rockchi
@@ -631,6 +631,7 @@ static const struct of_device_id rockchi
{ .compatible = "rockchip,rk3328-dfi", .data = rk3328_dfi_init },
{ .compatible = "rockchip,rk3368-dfi", .data = rk3368_dfi_init },
{ .compatible = "rockchip,rk3399-dfi", .data = rockchip_dfi_init },

2
target/linux/rockchip/patches-6.1/804-13-PM-devfreq-rockchip-dfi-add-rk3588-dfi-support.patch
View File

@@ -219,7 +219,7 @@ Change-Id: I0bebfd16aa4897f770f70aca70b0e9a88808446f
static __init int px30_dfi_init(struct platform_device *pdev,
struct rockchip_dfi *data,
struct devfreq_event_desc *desc)
@@ -641,6 +729,7 @@ static const struct of_device_id rockchi
@@ -640,6 +728,7 @@ static const struct of_device_id rockchi
{ .compatible = "rockchip,rk3368-dfi", .data = rk3368_dfi_init },
{ .compatible = "rockchip,rk3399-dfi", .data = rockchip_dfi_init },
{ .compatible = "rockchip,rk3568-dfi", .data = px30_dfi_init },

2
target/linux/rockchip/patches-6.1/805-arm64-dts-rockchip-add-rk3328-ddr-relate-node.patch
View File

@@ -28,7 +28,7 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
/ {
compatible = "rockchip,rk3328";
@@ -1010,6 +1011,78 @@
@@ -1023,6 +1024,78 @@
status = "disabled";
};

5
target/linux/rockchip/patches-6.1/900-arm64-boot-add-dts-files.patch
View File

@@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-na
@@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-na
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb
@@ -8,10 +8,11 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s-enterprise.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
@@ -59,5 +60,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro
@@ -77,6 +78,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb

4
target/linux/rockchip/patches-6.1/992-rockchip-rk3399-overclock-to-2.2-1.8-GHz.patch
View File

@@ -28,7 +28,7 @@ Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+ };
};
cluster1_opp: opp-table1 {
cluster1_opp: opp-table-1 {
@@ -72,6 +80,14 @@
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1200000 1200000 1250000>;
@@ -43,4 +43,4 @@ Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+ };
};
gpu_opp_table: opp-table2 {
gpu_opp_table: opp-table-2 {