Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2023-10-19 22:10:59 +08:00
352 changed files with 18662 additions and 3451 deletions

View File

@@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=binutils
PKG_VERSION:=2.40
PKG_VERSION:=2.41
PKG_RELEASE:=1
PKG_SOURCE_URL:=@GNU/binutils
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_VERSION:=$(PKG_VERSION)
PKG_HASH:=0f8a4c272d7f17f369ded10a4aca28b8e304828e95526da482b0ccc4dfc9d8e1
PKG_HASH:=ae9a5789e23459e59606e6714723f2d3ffc31c03174191ef0d015bdf06007450
PKG_FIXUP:=patch-libtool
PKG_LIBTOOL_PATHS:=. gas bfd opcodes gprof gprofng binutils ld libiberty gold intl libctf libsframe

View File

@@ -1,3 +1,24 @@
From 1046fc9e98936991aeb0b0656c84833d96a63c0f Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sun, 15 Oct 2023 14:22:49 +0200
Subject: [PATCH 1/5] wifi: rt2x00: Add support for loading EEPROM from
userspace
Add support for loading EEPROM from userspace.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/net/wireless/ralink/rt2x00/Kconfig | 5 ++
drivers/net/wireless/ralink/rt2x00/Makefile | 1 +
.../net/wireless/ralink/rt2x00/rt2800soc.c | 15 +---
drivers/net/wireless/ralink/rt2x00/rt2x00.h | 1 +
.../net/wireless/ralink/rt2x00/rt2x00dev.c | 9 +++
.../net/wireless/ralink/rt2x00/rt2x00eeprom.c | 75 +++++++++++++++++++
.../net/wireless/ralink/rt2x00/rt2x00soc.c | 1 +
.../net/wireless/ralink/rt2x00/rt2x00soc.h | 9 +++
8 files changed, 102 insertions(+), 14 deletions(-)
create mode 100644 drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
--- a/local-symbols
+++ b/local-symbols
@@ -350,6 +350,7 @@ RT2X00_LIB_FIRMWARE=
@@ -46,33 +67,6 @@
obj-$(CPTCFG_RT2X00_LIB) += rt2x00lib.o
obj-$(CPTCFG_RT2X00_LIB_MMIO) += rt2x00mmio.o
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
@@ -47,6 +47,8 @@ struct rt2800_drv_data {
struct ieee80211_sta *wcid_to_sta[STA_IDS_SIZE];
};
+#include "rt2800.h"
+
struct rt2800_ops {
u32 (*register_read)(struct rt2x00_dev *rt2x00dev,
const unsigned int offset);
@@ -145,6 +147,15 @@ static inline int rt2800_read_eeprom(str
{
const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
+ if (rt2x00dev->eeprom_file) {
+ memcpy(rt2x00dev->eeprom, rt2x00dev->eeprom_file->data,
+ EEPROM_SIZE);
+ return 0;
+ }
+
+ if (!rt2800ops->read_eeprom)
+ return -EINVAL;
+
return rt2800ops->read_eeprom(rt2x00dev);
}
--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
@@ -90,19 +90,6 @@ static int rt2800soc_set_device_state(st
@@ -95,11 +89,12 @@
/* Firmware functions */
static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
{
@@ -168,7 +155,6 @@ static const struct rt2800_ops rt2800soc
@@ -168,7 +155,7 @@ static const struct rt2800_ops rt2800soc
.register_multiread = rt2x00mmio_register_multiread,
.register_multiwrite = rt2x00mmio_register_multiwrite,
.regbusy_read = rt2x00mmio_regbusy_read,
- .read_eeprom = rt2800soc_read_eeprom,
+ .read_eeprom = rt2x00lib_read_eeprom,
.hwcrypt_disabled = rt2800soc_hwcrypt_disabled,
.drv_write_firmware = rt2800soc_write_firmware,
.drv_init_registers = rt2800mmio_init_registers,
@@ -113,77 +108,24 @@
/*
* Capabilities
@@ -980,6 +981,11 @@ struct rt2x00_dev {
const struct firmware *fw;
/*
+ * EEPROM image.
+ */
+ const struct firmware *eeprom_file;
+
+ /*
* FIFO for storing tx status reports between isr and tasklet.
*/
DECLARE_KFIFO_PTR(txstatus_fifo, u32);
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
@@ -1420,6 +1420,10 @@ int rt2x00lib_probe_dev(struct rt2x00_de
INIT_DELAYED_WORK(&rt2x00dev->autowakeup_work, rt2x00lib_autowakeup);
INIT_WORK(&rt2x00dev->sleep_work, rt2x00lib_sleep);
+ retval = rt2x00lib_load_eeprom_file(rt2x00dev);
+ if (retval)
+ goto exit;
+
/*
* Let the driver probe the device to detect the capabilities.
*/
@@ -1560,6 +1564,11 @@ void rt2x00lib_remove_dev(struct rt2x00_
* Free the driver data.
*/
kfree(rt2x00dev->drv_data);
+
+ /*
+ * Free EEPROM image.
+ */
+ rt2x00lib_free_eeprom_file(rt2x00dev);
}
EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev);
--- /dev/null
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
@@ -0,0 +1,106 @@
+/*
+ Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+ Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
+ <http://rt2x00.serialmonkey.com>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the
+ Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+ * Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
+ * <http://rt2x00.serialmonkey.com>
+ */
+
+/*
+ Module: rt2x00lib
+ Abstract: rt2x00 eeprom file loading routines.
+/* Module: rt2x00lib
+ * Abstract: rt2x00 eeprom file loading routines.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include "rt2x00.h"
+#include "rt2x00lib.h"
+#include "rt2x00soc.h"
+
+static const char *
+rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
@@ -196,7 +138,7 @@
+ return NULL;
+}
+
+static int rt2x00lib_request_eeprom_file(struct rt2x00_dev *rt2x00dev)
+static int rt2x00lib_read_eeprom_file(struct rt2x00_dev *rt2x00dev)
+{
+ const struct firmware *ee;
+ const char *ee_name;
@@ -233,8 +175,7 @@
+ goto err_release_ee;
+ }
+
+ rt2x00dev->eeprom_file = ee;
+ return 0;
+ memcpy(rt2x00dev->eeprom, ee->data, rt2x00dev->ops->eeprom_size);
+
+err_release_ee:
+ release_firmware(ee);
@@ -242,48 +183,11 @@
+ return retval;
+}
+
+int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev)
+int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev)
+{
+ int retval;
+
+ retval = rt2x00lib_request_eeprom_file(rt2x00dev);
+ if (retval)
+ return retval;
+
+ return 0;
+ return rt2x00lib_read_eeprom_file(rt2x00dev);
+}
+
+void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev)
+{
+ if (rt2x00dev->eeprom_file && rt2x00dev->eeprom_file->size)
+ release_firmware(rt2x00dev->eeprom_file);
+ rt2x00dev->eeprom_file = NULL;
+}
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h
@@ -286,6 +286,22 @@ static inline void rt2x00lib_free_firmwa
#endif /* CPTCFG_RT2X00_LIB_FIRMWARE */
/*
+ * EEPROM file handlers.
+ */
+#ifdef CPTCFG_RT2X00_LIB_EEPROM
+int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev);
+void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev);
+#else
+static inline int rt2x00lib_load_eeprom_file(struct rt2x00_dev *rt2x00dev)
+{
+ return 0;
+}
+static inline void rt2x00lib_free_eeprom_file(struct rt2x00_dev *rt2x00dev)
+{
+}
+#endif /* CPTCFG_RT2X00_LIB_EEPROM */
+
+/*
* Debugfs handlers.
*/
#ifdef CPTCFG_RT2X00_LIB_DEBUGFS
+EXPORT_SYMBOL_GPL(rt2x00lib_read_eeprom);
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
@@ -86,6 +86,7 @@ int rt2x00soc_probe(struct platform_devi
@@ -294,3 +198,19 @@
rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
retval = rt2x00soc_alloc_reg(rt2x00dev);
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h
@@ -26,4 +26,13 @@ int rt2x00soc_resume(struct platform_dev
#define rt2x00soc_resume NULL
#endif /* CONFIG_PM */
+/*
+ * EEPROM file handlers.
+ */
+#ifdef CPTCFG_RT2X00_LIB_EEPROM
+int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev);
+#else
+#define rt2x00lib_read_eeprom NULL
+#endif /* CPTCFG_RT2X00_LIB_EEPROM */
+
#endif /* RT2X00SOC_H */

View File

@@ -0,0 +1,43 @@
From 15329d8b206d9c04ffad49aecd37f5d0bfb85768 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sun, 15 Oct 2023 14:23:19 +0200
Subject: [PATCH 2/5] wifi: rt2x00: Add option to pass EEPROM file name from DT
Add option to pass EEPROM file name from DT using ralink,eeprom binding.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/of.h>
#include "rt2x00.h"
#include "rt2x00soc.h"
@@ -18,10 +19,20 @@ static const char *
rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
{
struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
+#ifdef CONFIG_OF
+ struct device_node *np;
+ const char *eep;
+#endif
if (pdata && pdata->eeprom_file_name)
return pdata->eeprom_file_name;
+#ifdef CONFIG_OF
+ np = rt2x00dev->dev->of_node;
+ if (np && !of_property_read_string(np, "ralink,eeprom", &eep))
+ return eep;
+#endif
+
return NULL;
}

View File

@@ -1,14 +1,16 @@
From 339fe73f340161a624cc08e738d2244814852c3e Mon Sep 17 00:00:00 2001
From 71261ca81b491a4c3b08690347c12e96a75ad0d0 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Sun, 17 Mar 2013 00:55:04 +0100
Subject: [PATCH] rt2x00: load eeprom on SoC from a mtd device defines inside
OF
Subject: [PATCH 3/5] wifi: rt2x00: Add support for loading EEPROM from MTD
Add support for loading EEPROM from MTD.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/net/wireless/ralink/rt2x00/Kconfig | 1 +
drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c | 65 +++++++++++++++++++++++
2 files changed, 66 insertions(+)
drivers/net/wireless/ralink/rt2x00/Kconfig | 1 +
.../net/wireless/ralink/rt2x00/rt2x00eeprom.c | 66 +++++++++++++++++++
2 files changed, 67 insertions(+)
--- a/drivers/net/wireless/ralink/rt2x00/Kconfig
+++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
@@ -22,7 +24,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
Supported chips: RT2880, RT3050, RT3052, RT3350, RT3352.
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
@@ -26,11 +26,76 @@
@@ -10,11 +10,69 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -33,21 +35,20 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
#include <linux/of.h>
#include "rt2x00.h"
#include "rt2x00lib.h"
#include "rt2x00soc.h"
+#if IS_ENABLED(CONFIG_MTD)
+static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev)
+{
+ int ret = -EINVAL;
+#ifdef CONFIG_OF
+ static struct firmware mtd_fw;
+ struct device_node *np = rt2x00dev->dev->of_node, *mtd_np = NULL;
+ size_t retlen, len = rt2x00dev->ops->eeprom_size;
+ int i, size, offset = 0;
+ int size, offset = 0;
+ struct mtd_info *mtd;
+ const char *part;
+ const __be32 *list;
+ phandle phandle;
+ size_t retlen;
+
+ list = of_get_property(np, "ralink,mtd-eeprom", &size);
+ if (!list)
@@ -74,21 +75,15 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ if (size > sizeof(*list))
+ offset = be32_to_cpup(list);
+
+ ret = mtd_read(mtd, offset, len, &retlen, (u_char *) rt2x00dev->eeprom);
+ ret = mtd_read(mtd, offset, rt2x00dev->ops->eeprom_size,
+ &retlen, (u_char *)rt2x00dev->eeprom);
+ put_mtd_device(mtd);
+
+ if ((retlen != rt2x00dev->ops->eeprom_size) || ret) {
+ if (retlen != rt2x00dev->ops->eeprom_size || ret) {
+ dev_err(rt2x00dev->dev, "failed to load eeprom from device \"%s\"\n", part);
+ return ret;
+ }
+
+ if (of_find_property(np, "ralink,mtd-eeprom-swap", NULL))
+ for (i = 0; i < len/sizeof(u16); i++)
+ rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]);
+
+ rt2x00dev->eeprom_file = &mtd_fw;
+ mtd_fw.data = (const u8 *) rt2x00dev->eeprom;
+
+ dev_info(rt2x00dev->dev, "loaded eeprom from mtd device \"%s\"\n", part);
+#endif
+
@@ -99,15 +94,17 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
static const char *
rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
{
@@ -58,6 +123,11 @@ static int rt2x00lib_request_eeprom_file
const char *ee_name;
int retval;
@@ -83,5 +141,13 @@ err_exit:
int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev)
{
+ int ret;
+
+#if IS_ENABLED(CONFIG_MTD)
+ if (!rt2800lib_read_eeprom_mtd(rt2x00dev))
+ ret = rt2800lib_read_eeprom_mtd(rt2x00dev);
+ if (!ret)
+ return 0;
+#endif
+
ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev);
if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) {
rt2x00_err(rt2x00dev, "Required EEPROM name is missing.");
return rt2x00lib_read_eeprom_file(rt2x00dev);
}

View File

@@ -0,0 +1,44 @@
From 9c9a3c27b96e057f3c3f47151d7a170d84e3bb5f Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sun, 15 Oct 2023 15:31:47 +0200
Subject: [PATCH 4/5] wifi: rt2x00: Support EEPROM swap binding
Add binding "ralink,eeprom-swap" to swap bytes of EEPROM before using
it.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
@@ -20,6 +20,19 @@
#include "rt2x00soc.h"
#if IS_ENABLED(CONFIG_MTD)
+static void rt2800lib_eeprom_swap(struct rt2x00_dev *rt2x00dev)
+{
+ struct device_node *np = rt2x00dev->dev->of_node;
+ size_t len = rt2x00dev->ops->eeprom_size;
+ int i;
+
+ if (!of_find_property(np, "ralink,eeprom-swap", NULL))
+ return;
+
+ for (i = 0; i < len / sizeof(u16); i++)
+ rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]);
+}
+
static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev)
{
int ret = -EINVAL;
@@ -66,6 +79,8 @@ static int rt2800lib_read_eeprom_mtd(str
return ret;
}
+ rt2800lib_eeprom_swap(rt2x00dev);
+
dev_info(rt2x00dev->dev, "loaded eeprom from mtd device \"%s\"\n", part);
#endif

View File

@@ -0,0 +1,96 @@
From 9008cdacdc41f8233f4444b86cf3a17201686e2d Mon Sep 17 00:00:00 2001
From: Shiji Yang <yangshiji66@outlook.com>
Date: Tue, 18 Jul 2023 20:18:16 +0800
Subject: [PATCH 5/5] wifi: rt2x00: support loading eeprom from NVMEM cells
This patch allows rt2x00 to load eeprom from "eeprom" NVMEM cell.
Example:
/* load eeprom from NVMEM provider 'eep' */
&wmac {
nvmem-cells = <&eep>;
nvmem-cell-names = "eeprom";
};
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
.../net/wireless/ralink/rt2x00/rt2x00eeprom.c | 41 ++++++++++++++++++-
1 file changed, 40 insertions(+), 1 deletion(-)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
@@ -14,12 +14,12 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#endif
+#include <linux/nvmem-consumer.h>
#include <linux/of.h>
#include "rt2x00.h"
#include "rt2x00soc.h"
-#if IS_ENABLED(CONFIG_MTD)
static void rt2800lib_eeprom_swap(struct rt2x00_dev *rt2x00dev)
{
struct device_node *np = rt2x00dev->dev->of_node;
@@ -33,6 +33,7 @@ static void rt2800lib_eeprom_swap(struct
rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]);
}
+#if IS_ENABLED(CONFIG_MTD)
static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev)
{
int ret = -EINVAL;
@@ -88,6 +89,40 @@ static int rt2800lib_read_eeprom_mtd(str
}
#endif
+static int rt2800lib_read_eeprom_nvmem(struct rt2x00_dev *rt2x00dev)
+{
+ struct device_node *np = rt2x00dev->dev->of_node;
+ unsigned int len = rt2x00dev->ops->eeprom_size;
+ struct nvmem_cell *cell;
+ const void *data;
+ size_t retlen;
+ int ret = 0;
+
+ cell = of_nvmem_cell_get(np, "eeprom");
+ if (IS_ERR(cell))
+ return PTR_ERR(cell);
+
+ data = nvmem_cell_read(cell, &retlen);
+ nvmem_cell_put(cell);
+
+ if (IS_ERR(data))
+ return PTR_ERR(data);
+
+ if (retlen != len) {
+ dev_err(rt2x00dev->dev, "invalid eeprom size, required: 0x%04x\n", len);
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ memcpy(rt2x00dev->eeprom, data, len);
+
+ rt2800lib_eeprom_swap(rt2x00dev);
+
+exit:
+ kfree(data);
+ return ret;
+}
+
static const char *
rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
{
@@ -164,5 +199,9 @@ int rt2x00lib_read_eeprom(struct rt2x00_
return 0;
#endif
+ ret = rt2800lib_read_eeprom_nvmem(rt2x00dev);
+ if (!ret)
+ return 0;
+
return rt2x00lib_read_eeprom_file(rt2x00dev);
}

View File

@@ -1,31 +0,0 @@
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
@@ -26,6 +26,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/of.h>
#include "rt2x00.h"
#include "rt2x00lib.h"
@@ -34,10 +35,20 @@ static const char *
rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
{
struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
+#ifdef CONFIG_OF
+ struct device_node *np;
+ const char *eep;
+#endif
if (pdata && pdata->eeprom_file_name)
return pdata->eeprom_file_name;
+#ifdef CONFIG_OF
+ np = rt2x00dev->dev->of_node;
+ if (np && of_property_read_string(np, "ralink,eeprom", &eep) == 0)
+ return eep;
+#endif
+
return NULL;
}

View File

@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
@@ -225,10 +225,17 @@ static int rt2800soc_probe(struct platfo
@@ -226,10 +226,17 @@ static int rt2800soc_probe(struct platfo
return rt2x00soc_probe(pdev, &rt2800soc_ops);
}

View File

@@ -123,7 +123,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#include <linux/rt2x00_platform.h>
#include <net/mac80211.h>
@@ -1029,6 +1030,11 @@ struct rt2x00_dev {
@@ -1024,6 +1025,11 @@ struct rt2x00_dev {
/* Clock for System On Chip devices. */
struct clk *clk;

View File

@@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
@@ -78,6 +78,9 @@ struct rt2800_ops {
@@ -76,6 +76,9 @@ struct rt2800_ops {
int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev);
__le32 *(*drv_get_txwi)(struct queue_entry *entry);
unsigned int (*drv_get_dma_done)(struct data_queue *queue);
@@ -10,7 +10,7 @@
};
static inline u32 rt2800_register_read(struct rt2x00_dev *rt2x00dev,
@@ -195,6 +198,27 @@ static inline unsigned int rt2800_drv_ge
@@ -184,6 +187,27 @@ static inline unsigned int rt2800_drv_ge
return rt2800ops->drv_get_dma_done(queue);
}
@@ -104,7 +104,7 @@
static const struct ieee80211_ops rt2800soc_mac80211_ops = {
.tx = rt2x00mac_tx,
.wake_tx_queue = ieee80211_handle_wake_tx_queue,
@@ -160,6 +187,9 @@ static const struct rt2800_ops rt2800soc
@@ -161,6 +188,9 @@ static const struct rt2800_ops rt2800soc
.drv_init_registers = rt2800mmio_init_registers,
.drv_get_txwi = rt2800mmio_get_txwi,
.drv_get_dma_done = rt2800mmio_get_dma_done,

View File

@@ -398,7 +398,7 @@ Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
rt2x00_rt(rt2x00dev, RT3071) ||
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
@@ -1277,6 +1277,12 @@ rt2x00_has_cap_external_lna_bg(struct rt
@@ -1272,6 +1272,12 @@ rt2x00_has_cap_external_lna_bg(struct rt
}
static inline bool

View File

@@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=gmp
PKG_VERSION:=6.2.1
PKG_VERSION:=6.3.0
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)$(PKG_REVISION).tar.xz
PKG_SOURCE_URL:=@GNU/gmp/
PKG_HASH:=fd4829912cddd12f84181c3451cc752be224643e87fac497b69edddadc49b4f2
PKG_HASH:=a3c2b80201b89e68616f4ad30bc66aee4927c3ce50e33929ca819d5c43538898
PKG_BUILD_PARALLEL:=1
PKG_INSTALL:=1

View File

@@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=zlib
PKG_VERSION:=1.2.13
PKG_VERSION:=1.3
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=https://github.com/madler/zlib/releases/download/v$(PKG_VERSION)
PKG_HASH:=d14c38e313afc35a9a8760dadf26042f51ea0f5d154b0630a31da0540107fb98
PKG_HASH:=8a9ba2898e1d0d774eca6ba5b4627a11e5588ba85c8851336eb38de4683050a7
PKG_LICENSE:=Zlib
PKG_LICENSE_FILES:=README

View File

@@ -2754,6 +2754,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
# CONFIG_IMGPDC_WDT is not set
# CONFIG_IMG_MDC_DMA is not set
# CONFIG_IMX7D_ADC is not set
# CONFIG_IMX8QXP_ADC is not set
# CONFIG_IMX_IPUV3_CORE is not set
# CONFIG_IMX_THERMAL is not set
# CONFIG_INA2XX_ADC is not set
@@ -7010,6 +7011,7 @@ CONFIG_TRAD_SIGNALS=y
# CONFIG_TRIM_UNUSED_KSYMS is not set
# CONFIG_TRUSTED_FOUNDATIONS is not set
# CONFIG_TRUSTED_KEYS is not set
# CONFIG_TRUSTED_KEYS_CAAM is not set
# CONFIG_TRUSTED_KEYS_TPM is not set
# CONFIG_TRUSTED_KEYS_TEE is not set
# CONFIG_TSL2583 is not set

View File

@@ -154,7 +154,7 @@
compatible = "pci1814,3592";
reg = <0x7000 0 0 0 0>;
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
nvmem-cells = <&macaddr_boardconfig_16>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;

View File

@@ -178,7 +178,7 @@
compatible = "pci1814,3592";
reg = <0x7000 0 0 0 0>;
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
};
};

View File

@@ -198,7 +198,7 @@
compatible = "pci0,0";
reg = <0x7000 0 0 0 0>;
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
};
};

View File

@@ -224,7 +224,7 @@
nvmem-cells = <&macaddr_boardconfig_16>;
nvmem-cell-names = "mac-address";
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
};
};

View File

@@ -242,7 +242,7 @@
compatible = "pci1814,3592";
reg = <0x7000 0 0 0 0>;
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
nvmem-cells = <&macaddr_boardconfig_16>;
nvmem-cell-names = "mac-address";
};

View File

@@ -220,7 +220,7 @@
compatible = "pci1814,3592";
reg = <0x7000 0 0 0 0>;
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
nvmem-cells = <&macaddr_boardconfig_16>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;

View File

@@ -238,7 +238,7 @@
compatible = "pci1814,3091";
reg = <0x7000 0 0 0 0>;
ralink,mtd-eeprom = <&boardconfig 0x410>;
ralink,mtd-eeprom-swap;
ralink,eeprom-swap;
nvmem-cells = <&macaddr_boardconfig_16>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;

View File

@@ -8,6 +8,7 @@ BOARD:=layerscape
BOARDNAME:=NXP Layerscape
KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=6.1
FEATURES:=squashfs nand usb pcie gpio fpu ubifs ext4 rootfs-part boot-part
SUBTARGETS:=armv8_64b armv7

View File

@@ -0,0 +1,701 @@
CONFIG_AD525X_DPOT=y
CONFIG_AD525X_DPOT_I2C=y
# CONFIG_AD525X_DPOT_SPI is not set
CONFIG_ALIGNMENT_TRAP=y
CONFIG_APDS9802ALS=y
CONFIG_AQUANTIA_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_MXC=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_CPUIDLE=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_643719=y
CONFIG_ARM_ERRATA_720789=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_ARM_ERRATA_754327=y
CONFIG_ARM_ERRATA_764369=y
CONFIG_ARM_ERRATA_775420=y
CONFIG_ARM_ERRATA_798181=y
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_HEAVY_MB=y
# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
# CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set
# CONFIG_ARM_IMX_BUS_DEVFREQ is not set
# CONFIG_ARM_IMX_CPUFREQ_DT is not set
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_LPAE=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_PSCI=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_SMMU is not set
CONFIG_ARM_THUMB=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_ATAGS=y
CONFIG_AUTOFS4_FS=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BATTERY_SBS=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_BSG=y
CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=262144
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y
CONFIG_BOUNCE=y
CONFIG_BRCMSTB_GISB_ARB=y
CONFIG_BROADCOM_PHY=y
CONFIG_CACHE_L2X0=y
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CDROM=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_CHR_DEV_SG=y
CONFIG_CLKSRC_IMX_GPT=y
CONFIG_CLKSRC_MMIO=y
# CONFIG_CLK_IMX8MM is not set
# CONFIG_CLK_IMX8MN is not set
# CONFIG_CLK_IMX8MP is not set
# CONFIG_CLK_IMX8MQ is not set
# CONFIG_CLK_IMX8ULP is not set
# CONFIG_CLK_IMX93 is not set
CONFIG_CLK_QORIQ=y
# CONFIG_CLK_VEXPRESS_OSC is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=64
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_CMDLINE_PARTITION=y
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRASH_CORE=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_DEVFREQ_GOV_PASSIVE is not set
# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
# CONFIG_DEVFREQ_THERMAL is not set
CONFIG_DMADEVICES=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_DW_DMAC=y
CONFIG_DW_DMAC_CORE=y
CONFIG_DW_WATCHDOG=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_93CX6=y
CONFIG_EEPROM_AT24=y
CONFIG_ELF_CORE=y
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_F2FS_FS=y
CONFIG_FAILOVER=y
CONFIG_FAT_FS=y
# CONFIG_FEC is not set
CONFIG_FHANDLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FREEZER=y
# CONFIG_FSL_DPAA2_SWITCH is not set
CONFIG_FSL_EDMA=y
CONFIG_FSL_GUTS=y
CONFIG_FSL_IFC=y
# CONFIG_FSL_PPFE is not set
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_RCPM=y
CONFIG_FSL_XGMAC_MDIO=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FTRACE=y
# CONFIG_FTRACE_SYSCALLS is not set
CONFIG_FUSE_FS=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_GIANFAR=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_MXC=y
CONFIG_GPIO_VF610=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HID=y
CONFIG_HID_GENERIC=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
# CONFIG_HIST_TRIGGERS is not set
CONFIG_HOTPLUG_CPU=y
CONFIG_HVC_DRIVER=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_DEMUX_PINCTRL=y
CONFIG_I2C_DESIGNWARE_CORE=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_IMX=y
# CONFIG_I2C_IMX_LPI2C is not set
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_RK3X=y
CONFIG_I2C_SLAVE=y
CONFIG_I2C_SLAVE_EEPROM=y
# CONFIG_I2C_SLAVE_TESTUNIT is not set
CONFIG_I2C_XILINX=y
CONFIG_ICPLUS_PHY=y
CONFIG_ICS932S401=y
CONFIG_IMX2_WDT=y
# CONFIG_IMX7ULP_WDT is not set
# CONFIG_IMX8MM_THERMAL is not set
CONFIG_IMX_DMA=y
# CONFIG_IMX_GPCV2_PM_DOMAINS is not set
CONFIG_IMX_INTMUX=y
# CONFIG_IMX_IRQSTEER is not set
# CONFIG_IMX_MU_MSI is not set
CONFIG_IMX_SDMA=y
# CONFIG_IMX_WEIM is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IPC_NS=y
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_ISL29003=y
CONFIG_JBD2=y
CONFIG_KALLSYMS=y
CONFIG_KCMP=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
CONFIG_LIBFDT=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LS_EXTIRQ=y
CONFIG_LS_SCFG_MSI=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MARVELL_PHY=y
CONFIG_MCPM=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
# CONFIG_MDIO_GPIO is not set
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_MFD_HI6421_SPMI is not set
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_VEXPRESS_SYSREG is not set
CONFIG_MICREL_PHY=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=16
# CONFIG_MMC_MXC is not set
CONFIG_MMC_SDHCI=y
# CONFIG_MMC_SDHCI_ESDHC_IMX is not set
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MSDOS_FS=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_DATAFLASH=y
# CONFIG_MTD_DATAFLASH_OTP is not set
# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SST25L=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
# CONFIG_MTD_UBI_BLOCK is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_MX3_IPU=y
CONFIG_MX3_IPU_IRQS=4
CONFIG_MXC_CLK=y
# CONFIG_MXS_DMA is not set
CONFIG_NAMESPACES=y
CONFIG_NATIONAL_PHY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEON=y
CONFIG_NET_FAILOVER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_NS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=16
CONFIG_NTFS_FS=y
CONFIG_NVMEM=y
# CONFIG_NVMEM_IMX_IIM is not set
# CONFIG_NVMEM_IMX_OCOTP_ELE is not set
# CONFIG_NVMEM_SNVS_LPGPR is not set
# CONFIG_NVMEM_SPMI_SDAM is not set
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OUTER_CACHE=y
CONFIG_OUTER_CACHE_SYNC=y
CONFIG_PACKET_DIAG=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_PME=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_ECAM=y
CONFIG_PCI_HOST_COMMON=y
CONFIG_PCI_HOST_GENERIC=y
# CONFIG_PCI_IMX6 is not set
CONFIG_PCI_LAYERSCAPE=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PID_NS=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_IMX8ULP is not set
# CONFIG_PINCTRL_IMX93 is not set
# CONFIG_PINCTRL_IMXRT1050 is not set
# CONFIG_PINCTRL_IMXRT1170 is not set
CONFIG_PL310_ERRATA_588369=y
CONFIG_PL310_ERRATA_727915=y
CONFIG_PL310_ERRATA_753970=y
CONFIG_PL310_ERRATA_769419=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_DEVFREQ=y
# CONFIG_PM_DEVFREQ_EVENT is not set
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_BRCMKONA=y
CONFIG_POWER_RESET_BRCMSTB=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_POWER_RESET_VEXPRESS=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_CHILDREN=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_PSTORE=y
CONFIG_PSTORE_COMPRESS=y
CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_DEFLATE_COMPRESS=y
CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PTP_1588_CLOCK_QORIQ=y
CONFIG_QORIQ_CPUFREQ=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REALTEK_PHY=y
CONFIG_REED_SOLOMON=y
CONFIG_REED_SOLOMON_DEC8=y
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_EM3027=y
CONFIG_RTC_DRV_FSL_FTM_ALARM=y
# CONFIG_RTC_DRV_IMXDI is not set
# CONFIG_RTC_DRV_MXC is not set
# CONFIG_RTC_DRV_MXC_V2 is not set
CONFIG_RTC_DRV_PCF2127=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCHED_DEBUG=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SECCOMP=y
CONFIG_SECCOMP_FILTER=y
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_CONEXANT_DIGICOLOR=y
CONFIG_SERIAL_CONEXANT_DIGICOLOR_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_IMX_EARLYCON=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_ST_ASC=y
CONFIG_SERIAL_ST_ASC_CONSOLE=y
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SLUB_DEBUG=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_DIAG=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BRCMSTB=y
CONFIG_SOC_BUS=y
# CONFIG_SOC_IMX50 is not set
# CONFIG_SOC_IMX51 is not set
# CONFIG_SOC_IMX53 is not set
# CONFIG_SOC_IMX6Q is not set
# CONFIG_SOC_IMX6SL is not set
# CONFIG_SOC_IMX6SLL is not set
# CONFIG_SOC_IMX6SX is not set
# CONFIG_SOC_IMX6UL is not set
# CONFIG_SOC_IMX7D is not set
# CONFIG_SOC_IMX7ULP is not set
# CONFIG_SOC_IMX8M is not set
# CONFIG_SOC_IMX9 is not set
CONFIG_SOC_LS1021A=y
# CONFIG_SOC_VF610 is not set
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_CADENCE=y
CONFIG_SPI_DYNAMIC=y
# CONFIG_SPI_FSL_LPSPI is not set
# CONFIG_SPI_FSL_QUADSPI is not set
# CONFIG_SPI_IMX is not set
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPI_XILINX=y
CONFIG_SPMI=y
# CONFIG_SPMI_HISI3670 is not set
# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
CONFIG_SQUASHFS_DECOMP_SINGLE=y
CONFIG_SQUASHFS_FILE_CACHE=y
# CONFIG_SQUASHFS_FILE_DIRECT is not set
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_ZLIB=y
CONFIG_SRAM=y
CONFIG_SRAM_EXEC=y
CONFIG_SRCU=y
CONFIG_STACKDEPOT=y
CONFIG_STACKTRACE=y
CONFIG_STAGING_BOARD=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYNC_FILE=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNIX_DIAG=y
CONFIG_UNWINDER_ARM=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_NS=y
CONFIG_USE_OF=y
CONFIG_UTS_NS=y
CONFIG_VEXPRESS_CONFIG=y
CONFIG_VFAT_FS=y
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_VIRTIO=y
CONFIG_VIRTIO_ANCHOR=y
CONFIG_VIRTIO_BLK=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_PCI_LEGACY=y
CONFIG_VIRTIO_PCI_LIB=y
CONFIG_VIRTIO_PCI_LIB_LEGACY=y
CONFIG_VITESSE_PHY=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XILINX_WATCHDOG=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_X86=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@@ -102,6 +102,7 @@ CONFIG_CAVIUM_ERRATUM_22375=y
CONFIG_CAVIUM_ERRATUM_23144=y
CONFIG_CAVIUM_ERRATUM_23154=y
CONFIG_CAVIUM_ERRATUM_27456=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_CHROME_PLATFORMS=y
@@ -149,6 +150,7 @@ CONFIG_CPU_FREQ_THERMAL=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_THERMAL=y
@@ -292,7 +294,6 @@ CONFIG_FSL_MC_BUS=y
CONFIG_FSL_MC_DPIO=y
CONFIG_FSL_MC_UAPI_SUPPORT=y
# CONFIG_FSL_PPFE is not set
# CONFIG_FSL_PPFE_UTIL_DISABLED is not set
# CONFIG_FSL_QMAN_TEST is not set
CONFIG_FSL_RCPM=y
CONFIG_FSL_XGMAC_MDIO=y
@@ -342,6 +343,7 @@ CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
@@ -562,6 +564,7 @@ CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NUMA=y
CONFIG_PACKET_DIAG=y
CONFIG_PACKING=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_REPORTING=y

View File

@@ -0,0 +1,905 @@
CONFIG_64BIT=y
CONFIG_AQUANTIA_PHY=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_HEADER=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_LAYERSCAPE=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=33
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_NXP=y
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CNP=y
CONFIG_ARM64_EPAN=y
CONFIG_ARM64_ERRATUM_1165522=y
CONFIG_ARM64_ERRATUM_1286807=y
CONFIG_ARM64_ERRATUM_2051678=y
CONFIG_ARM64_ERRATUM_2054223=y
CONFIG_ARM64_ERRATUM_2067961=y
CONFIG_ARM64_ERRATUM_2077057=y
CONFIG_ARM64_ERRATUM_2658417=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PAN=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_SME=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=48
# CONFIG_ARM64_VA_BITS_39 is not set
CONFIG_ARM64_VA_BITS_48=y
CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_FSL_MC=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
# CONFIG_ARM_PL172_MPMC is not set
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_SMMU=y
# CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is not set
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
CONFIG_ARM_SMMU_V3=y
# CONFIG_ARM_SMMU_V3_SVA is not set
CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_ASM_MODVERSIONS=y
CONFIG_ASN1=y
CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
CONFIG_ATA=y
CONFIG_AUDIT=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_AUDIT_GENERIC=y
CONFIG_AUTOFS4_FS=y
CONFIG_AUTOFS_FS=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BALLOON_COMPACTION=y
CONFIG_BATTERY_BQ27XXX=y
# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set
CONFIG_BATTERY_BQ27XXX_I2C=y
CONFIG_BLK_DEV_BSG=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=262144
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_BTRFS_FS=y
# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
CONFIG_BTRFS_FS_POSIX_ACL=y
CONFIG_CAVIUM_ERRATUM_22375=y
CONFIG_CAVIUM_ERRATUM_23144=y
CONFIG_CAVIUM_ERRATUM_23154=y
CONFIG_CAVIUM_ERRATUM_27456=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_CHROME_PLATFORMS=y
CONFIG_CLK_LS1028A_PLLDIG=y
CONFIG_CLK_QORIQ=y
# CONFIG_CLK_VEXPRESS_OSC is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=16
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_CS2000_CP=y
CONFIG_COMMON_CLK_FSL_FLEXSPI=y
# CONFIG_COMMON_CLK_FSL_SAI is not set
CONFIG_COMMON_CLK_XGENE=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_COREDUMP=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_FREQ=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_THERMAL=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_THERMAL=y
CONFIG_CRASH_CORE=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC64=y
CONFIG_CRC64_ROCKSOFT=y
CONFIG_CRC7=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC_T10DIF=y
CONFIG_CROSS_MEMORY_ATTACH=y
# CONFIG_CROS_EC is not set
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_BLAKE2B=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRC64_ROCKSOFT=y
CONFIG_CRYPTO_CRCT10DIF=y
CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_FSL_CAAM=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI=y
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ENGINE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA256_ARM64=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_XTS=y
CONFIG_CRYPTO_XXHASH=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DIMLIB=y
CONFIG_DMADEVICES=y
CONFIG_DMATEST=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_ENGINE_RAID=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DPAA2_CONSOLE=y
CONFIG_DPAA_ERRATUM_A050385=y
CONFIG_DTC=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_ELF_CORE=y
# CONFIG_EMBEDDED is not set
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTCON=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_F2FS_FS=y
CONFIG_FAILOVER=y
CONFIG_FANOTIFY=y
CONFIG_FAT_FS=y
CONFIG_FB=y
CONFIG_FB_ARMCLCD=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_FOPS=y
CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FHANDLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FRAME_POINTER=y
CONFIG_FREEZER=y
# CONFIG_FSL_BMAN_TEST is not set
CONFIG_FSL_DPAA=y
CONFIG_FSL_DPAA2_ETH=y
CONFIG_FSL_DPAA2_PTP_CLOCK=y
# CONFIG_FSL_DPAA2_QDMA is not set
# CONFIG_FSL_DPAA2_SWITCH is not set
# CONFIG_FSL_DPAA_CHECKING is not set
CONFIG_FSL_DPAA_ETH=y
CONFIG_FSL_EDMA=y
CONFIG_FSL_ENETC=y
CONFIG_FSL_ENETC_IERB=y
CONFIG_FSL_ENETC_MDIO=y
CONFIG_FSL_ENETC_PTP_CLOCK=y
CONFIG_FSL_ENETC_VF=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_FSL_FMAN=y
CONFIG_FSL_GUTS=y
CONFIG_FSL_IFC=y
CONFIG_FSL_MC_BUS=y
CONFIG_FSL_MC_DPIO=y
CONFIG_FSL_MC_UAPI_SUPPORT=y
# CONFIG_FSL_PPFE is not set
# CONFIG_FSL_QMAN_TEST is not set
CONFIG_FSL_RCPM=y
CONFIG_FSL_XGMAC_MDIO=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FUSE_FS=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GARP=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_NUMA=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
# CONFIG_GIANFAR is not set
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GRO_CELLS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HIBERNATE_CALLBACKS=y
CONFIG_HIBERNATION=y
CONFIG_HIBERNATION_SNAPSHOT_DEV=y
CONFIG_HID=y
CONFIG_HID_A4TECH=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_EZKEY=y
CONFIG_HID_GENERIC=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_HVC_DRIVER=y
CONFIG_HVC_IRQ=y
CONFIG_HVC_XEN=y
CONFIG_HVC_XEN_FRONTEND=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_DESIGNWARE_CORE=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_IMX=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_RK3X=y
CONFIG_I2C_SLAVE=y
# CONFIG_I2C_SLAVE_TESTUNIT is not set
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_IMX2_WDT=y
CONFIG_INET_DIAG=y
# CONFIG_INET_DIAG_DESTROY is not set
# CONFIG_INET_RAW_DIAG is not set
CONFIG_INET_TCP_DIAG=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_FF_MEMLESS=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_INPUT_MOUSE=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_VIVALDIFMAP=y
CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y
CONFIG_INTERVAL_TREE=y
CONFIG_IOMMU_API=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set
CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y
CONFIG_IOMMU_DMA=y
CONFIG_IOMMU_IOVA=y
CONFIG_IOMMU_IO_PGTABLE=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_DART is not set
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IPC_NS=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_BYPASS_MANAGER=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MSI_IOMMU=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_JUMP_LABEL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KCMP=y
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
CONFIG_KEYBOARD_ATKBD=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KSM=y
CONFIG_LIBCRC32C=y
CONFIG_LIBFDT=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LS_EXTIRQ=y
CONFIG_LS_SCFG_MSI=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_BUS_MUX=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
# CONFIG_MDIO_GPIO is not set
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY=y
CONFIG_MEMORY_BALLOON=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MEMTEST=y
# CONFIG_MFD_HI6421_SPMI is not set
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_VEXPRESS_SYSREG is not set
CONFIG_MICREL_PHY=y
CONFIG_MICROSEMI_PHY=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMU_NOTIFIER=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_CYAPA is not set
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_BYD=y
CONFIG_MOUSE_PS2_CYPRESS=y
# CONFIG_MOUSE_PS2_ELANTECH is not set
CONFIG_MOUSE_PS2_FOCALTECH=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SMBUS=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
CONFIG_MPILIB=y
CONFIG_MRP=y
CONFIG_MSCC_OCELOT_SWITCH_LIB=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_DATAFLASH=y
# CONFIG_MTD_DATAFLASH_OTP is not set
# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_SST25L=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MULTIPLEXER=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_MUX_MMIO=y
CONFIG_MV_XOR_V2=y
CONFIG_NAMESPACES=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MSCC_FELIX=y
CONFIG_NET_DSA_TAG_OCELOT=y
CONFIG_NET_DSA_TAG_OCELOT_8021Q=y
CONFIG_NET_FAILOVER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_NS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NODES_SHIFT=2
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=64
CONFIG_NUMA=y
CONFIG_NUMA_BALANCING=y
CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYERSCAPE_SFP=y
# CONFIG_NVMEM_SPMI_SDAM is not set
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NUMA=y
CONFIG_PACKET_DIAG=y
CONFIG_PACKING=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_REPORTING=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PARAVIRT=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_PCIE_MOBIVEIL=y
CONFIG_PCIE_MOBIVEIL_HOST=y
CONFIG_PCIE_PME=y
CONFIG_PCI_ATS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_ECAM=y
CONFIG_PCI_HISI=y
CONFIG_PCI_HOST_COMMON=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_IOV=y
CONFIG_PCI_LAYERSCAPE=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCS_LYNX=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_PHY_FSL_LYNX_28G is not set
CONFIG_PHY_XGENE=y
CONFIG_PID_IN_CONTEXTIDR=y
CONFIG_PID_NS=y
CONFIG_PL330_DMA=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_PM_STD_PARTITION=""
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_VEXPRESS=y
CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT=y
CONFIG_PREEMPTION=y
CONFIG_PREEMPT_BUILD=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PRINTK_TIME=y
CONFIG_PRINT_QUOTA_WARNING=y
CONFIG_PROC_CHILDREN=y
CONFIG_PROFILING=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PTP_1588_CLOCK_QORIQ=y
CONFIG_QCOM_HIDMA=y
CONFIG_QCOM_HIDMA_MGMT=y
CONFIG_QCOM_QDF2400_ERRATUM_0065=y
# CONFIG_QFMT_V2 is not set
CONFIG_QORIQ_CPUFREQ=y
CONFIG_QORIQ_THERMAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_QUOTA=y
CONFIG_QUOTACTL=y
CONFIG_RAID6_PQ=y
# CONFIG_RANDOMIZE_KSTACK_OFFSET is not set
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REALTEK_PHY=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_FSL_FTM_ALARM=y
CONFIG_RTC_DRV_PCF2127=y
CONFIG_RTC_DRV_PL031=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCHED_INFO=y
CONFIG_SCHED_MC=y
CONFIG_SCHED_THERMAL_PRESSURE=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_PROC_FS is not set
# CONFIG_SCSI_SAS_ATA is not set
CONFIG_SCSI_SAS_ATTRS=y
CONFIG_SCSI_SAS_HOST_SMP=y
CONFIG_SCSI_SAS_LIBSAS=y
CONFIG_SECCOMP=y
CONFIG_SECCOMP_FILTER=y
CONFIG_SECRETMEM=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SC16IS7XX=y
CONFIG_SERIAL_SC16IS7XX_CORE=y
# CONFIG_SERIAL_SC16IS7XX_I2C is not set
CONFIG_SERIAL_SC16IS7XX_SPI=y
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
CONFIG_SERIO=y
CONFIG_SERIO_AMBAKMI=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
CONFIG_SMP=y
CONFIG_SOCK_DIAG=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_FSL_DSPI=y
CONFIG_SPI_FSL_QUADSPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_PL022=y
CONFIG_SPMI=y
# CONFIG_SPMI_HISI3670 is not set
# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
CONFIG_SQUASHFS_DECOMP_SINGLE=y
CONFIG_SQUASHFS_FILE_CACHE=y
# CONFIG_SQUASHFS_FILE_DIRECT is not set
# CONFIG_SQUASHFS_XZ is not set
CONFIG_SQUASHFS_ZLIB=y
CONFIG_SRAM=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
CONFIG_SWIOTLB_XEN=y
CONFIG_SWPHY=y
CONFIG_SYNC_FILE=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYS_HYPERVISOR=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_TASK_XACCT=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_EMULATION=y
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THP_SWAP=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
CONFIG_TRANS_TABLE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UACCE is not set
CONFIG_UBIFS_FS=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_UIO=y
CONFIG_UIO_AEC=y
CONFIG_UIO_CIF=y
CONFIG_UIO_DMEM_GENIRQ=y
CONFIG_UIO_MF624=y
CONFIG_UIO_NETX=y
CONFIG_UIO_PCI_GENERIC=y
CONFIG_UIO_PDRV_GENIRQ=y
# CONFIG_UIO_PRUSS is not set
CONFIG_UIO_SERCOS3=y
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_UNIX_DIAG=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_NS=y
CONFIG_USE_PERCPU_NUMA_NODE_ID=y
CONFIG_UTS_NS=y
CONFIG_VEXPRESS_CONFIG=y
CONFIG_VFAT_FS=y
CONFIG_VFIO=y
CONFIG_VFIO_FSL_MC=y
CONFIG_VFIO_IOMMU_TYPE1=y
# CONFIG_VFIO_MDEV is not set
# CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=y
CONFIG_VFIO_PCI_CORE=y
CONFIG_VFIO_PCI_INTX=y
CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_VIRQFD=y
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VIDEOMODE_HELPERS=y
CONFIG_VIRTIO=y
CONFIG_VIRTIO_ANCHOR=y
CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_BLK=y
CONFIG_VIRTIO_CONSOLE=y
# CONFIG_VIRTIO_IOMMU is not set
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_PCI_LEGACY=y
CONFIG_VIRTIO_PCI_LIB=y
CONFIG_VIRTIO_PCI_LIB_LEGACY=y
CONFIG_VITESSE_PHY=y
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
CONFIG_VMAP_STACK=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XARRAY_MULTI=y
CONFIG_XEN=y
CONFIG_XENFS=y
CONFIG_XEN_AUTO_XLATE=y
CONFIG_XEN_BACKEND=y
CONFIG_XEN_BALLOON=y
# CONFIG_XEN_BLKDEV_BACKEND is not set
CONFIG_XEN_BLKDEV_FRONTEND=y
CONFIG_XEN_COMPAT_XENFS=y
CONFIG_XEN_DEV_EVTCHN=y
CONFIG_XEN_DOM0=y
CONFIG_XEN_FBDEV_FRONTEND=y
CONFIG_XEN_GNTDEV=y
CONFIG_XEN_GRANT_DEV_ALLOC=y
# CONFIG_XEN_NETDEV_BACKEND is not set
CONFIG_XEN_NETDEV_FRONTEND=y
# CONFIG_XEN_PCIDEV_STUB is not set
CONFIG_XEN_PRIVCMD=y
# CONFIG_XEN_PVCALLS_BACKEND is not set
# CONFIG_XEN_SCSI_FRONTEND is not set
CONFIG_XEN_SYS_HYPERVISOR=y
# CONFIG_XEN_VIRTIO is not set
# CONFIG_XEN_WDT is not set
CONFIG_XEN_XENBUS_FRONTEND=y
CONFIG_XFS_FS=y
CONFIG_XFS_POSIX_ACL=y
CONFIG_XFS_RT=y
CONFIG_XOR_BLOCKS=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_X86=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@@ -0,0 +1,288 @@
From 1bb35ff4ce33e65601c8d9c736be52e4aabd6252 Mon Sep 17 00:00:00 2001
From: Calvin Johnson <calvin.johnson@nxp.com>
Date: Sat, 16 Sep 2017 14:20:23 +0530
Subject: [PATCH] arm64: dts: freescale: ls1012a: update with ppfe support
Update ls1012a dtsi and platform dts files with support for ppfe.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
---
.../boot/dts/freescale/fsl-ls1012a-frdm.dts | 43 +++++++++++++++++
.../boot/dts/freescale/fsl-ls1012a-frwy.dts | 43 +++++++++++++++++
.../boot/dts/freescale/fsl-ls1012a-qds.dts | 43 +++++++++++++++++
.../boot/dts/freescale/fsl-ls1012a-rdb.dts | 47 +++++++++++++++++++
.../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 29 ++++++++++++
5 files changed, 205 insertions(+)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -14,6 +14,11 @@
model = "LS1012A Freedom Board";
compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -95,6 +100,44 @@
};
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
@@ -14,6 +14,11 @@
/ {
model = "LS1012A FRWY Board";
compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
+
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
};
&duart0 {
@@ -28,6 +33,44 @@
status = "okay";
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
@@ -18,6 +18,11 @@
mmc1 = &esdhc1;
};
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -132,6 +137,44 @@
};
};
};
+
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x2>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x3>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -16,6 +16,8 @@
aliases {
serial0 = &duart0;
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
mmc0 = &esdhc0;
mmc1 = &esdhc1;
};
@@ -86,6 +88,44 @@
};
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
+ fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "rgmii-txid";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -568,6 +568,35 @@
};
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ pfe_reserved: packetbuffer@83400000 {
+ reg = <0 0x83400000 0 0xc00000>;
+ };
+ };
+
+ pfe: pfe@04000000 {
+ compatible = "fsl,pfe";
+ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
+ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
+ reg-names = "pfe", "pfe-ddr";
+ fsl,pfe-num-interfaces = <0x2>;
+ interrupts = <0 172 0x4>, /* HIF interrupt */
+ <0 173 0x4>, /*HIF_NOCPY interrupt */
+ <0 174 0x4>; /* WoL interrupt */
+ interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
+ memory-region = <&pfe_reserved>;
+ fsl,pfe-scfg = <&scfg 0>;
+ fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "pfe";
+
+ status = "okay";
+ };
+
firmware {
optee {
compatible = "linaro,optee-tz";

View File

@@ -0,0 +1,41 @@
From 9c5c18dbf8e1845d349ef7020f8af5bc9b56ed1f Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Fri, 28 Sep 2022 17:14:32 +0200
Subject: [PATCH] arm64: dts: ls1012a-frdm/qds: workaround by updating qspi flash to
single mode
Update rx and tx bus-width to 1 to use single mode to workaround ubifs
issue found with double mode. (The same method as RDB board)
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 4 ++--
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 4 ++--
2 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -148,8 +148,8 @@
spi-max-frequency = <50000000>;
m25p,fast-read;
reg = <0>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
};
};
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
@@ -186,8 +186,8 @@
spi-max-frequency = <50000000>;
m25p,fast-read;
reg = <0>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
};
};

View File

@@ -0,0 +1,29 @@
From 9c5c18dbf8e1845d349ef7020f8af5bc9b56ed1f Mon Sep 17 00:00:00 2001
From: Kuldeep Singh <kuldeep.singh@nxp.com>
Date: Tue, 7 Jan 2020 17:14:32 +0530
Subject: [PATCH] arm64: dts: ls1012a-rdb: workaround by updating qspi flash to
single mode
Update rx and tx bus-width to 1 to use single mode to workaround ubifs
issue found with double mode.
[ Leo: Local workaround ]
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -136,8 +136,8 @@
spi-max-frequency = <50000000>;
m25p,fast-read;
reg = <0>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
};
};

View File

@@ -0,0 +1,34 @@
From 38093ebbf25eb60a1aa863f46118a68a0300c56e Mon Sep 17 00:00:00 2001
From: Kuldeep Singh <kuldeep.singh@nxp.com>
Date: Fri, 3 Jan 2020 14:49:07 +0530
Subject: [PATCH] arm64: dts: ls1046a-rdb: Update qspi spi-rx-bus-width to 1
Update rx width from quad mode to single mode as a workaround.
[Leo: Local workaround ]
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -104,7 +104,7 @@
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
- spi-rx-bus-width = <4>;
+ spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
reg = <0>;
};
@@ -114,7 +114,7 @@
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
- spi-rx-bus-width = <4>;
+ spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
reg = <1>;
};

View File

@@ -0,0 +1,27 @@
From 20b1193c8c1d81a8d44ae36e579f70e6fbab45b9 Mon Sep 17 00:00:00 2001
From: Han Xu <han.xu@nxp.com>
Date: Tue, 14 Apr 2020 11:58:44 -0500
Subject: [PATCH] LF-20-3 mtd: spi-nor: Use 1 bit mode of spansion(s25fs512s)
flash
This is a workaround patch which uses only single bit mode of s25fs512s
flash
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
drivers/mtd/spi-nor/spansion.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -398,8 +398,8 @@ static const struct flash_info spansion_
MFR_FLAGS(USE_CLSR)
},
{ "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
MFR_FLAGS(USE_CLSR)
+ FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
.fixups = &s25fs_s_nor_fixups, },
{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) },
{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) },

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,54 @@
From fd32b1bc9a49919d3d59a50d775d03fe7ca5e654 Mon Sep 17 00:00:00 2001
From: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Date: Wed, 29 Nov 2017 15:27:57 +0530
Subject: [PATCH] phy: Add 2.5G SGMII interface mode
Add 2.5G SGMII interface mode(PHY_INTERFACE_MODE_2500SGMII)
in existing phy_interface list
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
---
drivers/net/phy/phy-core.c | 1 +
drivers/net/phy/phylink.c | 1 +
include/linux/phy.h | 3 +++
3 files changed, 5 insertions(+)
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -136,6 +136,7 @@ int phy_interface_num_ports(phy_interfac
case PHY_INTERFACE_MODE_RXAUI:
case PHY_INTERFACE_MODE_XAUI:
case PHY_INTERFACE_MODE_1000BASEKX:
+ case PHY_INTERFACE_MODE_2500SGMII:
return 1;
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QUSGMII:
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -199,6 +199,7 @@ static int phylink_interface_max_speed(p
return SPEED_1000;
case PHY_INTERFACE_MODE_2500BASEX:
+ case PHY_INTERFACE_MODE_2500SGMII:
return SPEED_2500;
case PHY_INTERFACE_MODE_5GBASER:
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -157,6 +157,7 @@ typedef enum {
PHY_INTERFACE_MODE_10GKR,
PHY_INTERFACE_MODE_QUSGMII,
PHY_INTERFACE_MODE_1000BASEKX,
+ PHY_INTERFACE_MODE_2500SGMII,
PHY_INTERFACE_MODE_MAX,
} phy_interface_t;
@@ -276,6 +277,8 @@ static inline const char *phy_modes(phy_
return "100base-x";
case PHY_INTERFACE_MODE_QUSGMII:
return "qusgmii";
+ case PHY_INTERFACE_MODE_2500SGMII:
+ return "sgmii-2500";
default:
return "unknown";
}

View File

@@ -0,0 +1,248 @@
From 1dc3a2e216d99adc2df022ab37eab32f61d80e0e Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Mon, 8 May 2023 19:26:48 +0200
Subject: [PATCH] layerscape: 6.1: fix compilation warning for fsl ppfe driver
Rework some desc dump and dummy pkt function to fix compilation warning.
Fix compilation warning:
drivers/staging/fsl_ppfe/pfe_hif.c: In function 'send_dummy_pkt_to_hif':
drivers/staging/fsl_ppfe/pfe_hif.c:118:19: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
118 | ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:122:20: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
122 | lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
| ^
drivers/staging/fsl_ppfe/pfe_hif.c: In function 'pfe_hif_desc_dump':
drivers/staging/fsl_ppfe/pfe_hif.c:195:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
195 | desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:195:36: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
195 | desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:207:19: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
207 | desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:207:31: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
207 | desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
cc1: all warnings being treated as errors
In file included from ./include/linux/kernel.h:19,
from ./include/linux/list.h:9,
from ./include/linux/wait.h:7,
from ./include/linux/eventfd.h:13,
from drivers/staging/fsl_ppfe/pfe_cdev.c:11:
drivers/staging/fsl_ppfe/pfe_cdev.c: In function 'pfe_cdev_read':
./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'int' [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
422 | _p_func(_fmt, ##__VA_ARGS__); \
| ^~~~
./include/linux/printk.h:132:17: note: in expansion of macro 'printk'
132 | printk(fmt, ##__VA_ARGS__); \
| ^~~~~~
./include/linux/printk.h:580:9: note: in expansion of macro 'no_printk'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~
./include/linux/kern_levels.h:15:25: note: in expansion of macro 'KERN_SOH'
15 | #define KERN_DEBUG KERN_SOH "7" /* debug-level messages */
| ^~~~~~~~
./include/linux/printk.h:580:19: note: in expansion of macro 'KERN_DEBUG'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~~
drivers/staging/fsl_ppfe/pfe_cdev.c:42:17: note: in expansion of macro 'pr_debug'
42 | pr_debug("%u %lu", link_states[ret].phy_id,
| ^~~~~~~~
./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
422 | _p_func(_fmt, ##__VA_ARGS__); \
| ^~~~
./include/linux/printk.h:493:9: note: in expansion of macro 'printk'
493 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~
./include/linux/kern_levels.h:11:25: note: in expansion of macro 'KERN_SOH'
11 | #define KERN_ERR KERN_SOH "3" /* error conditions */
| ^~~~~~~~
./include/linux/printk.h:493:16: note: in expansion of macro 'KERN_ERR'
493 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~
drivers/staging/fsl_ppfe/pfe_cdev.c:50:17: note: in expansion of macro 'pr_err'
50 | pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
| ^~~~~~
./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'unsigned int' [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
422 | _p_func(_fmt, ##__VA_ARGS__); \
| ^~~~
./include/linux/printk.h:132:17: note: in expansion of macro 'printk'
132 | printk(fmt, ##__VA_ARGS__); \
| ^~~~~~
./include/linux/printk.h:580:9: note: in expansion of macro 'no_printk'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~
./include/linux/kern_levels.h:15:25: note: in expansion of macro 'KERN_SOH'
15 | #define KERN_DEBUG KERN_SOH "7" /* debug-level messages */
| ^~~~~~~~
./include/linux/printk.h:580:19: note: in expansion of macro 'KERN_DEBUG'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~~
drivers/staging/fsl_ppfe/pfe_cdev.c:57:9: note: in expansion of macro 'pr_debug'
57 | pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
| ^~~~~~~~
cc1: all warnings being treated as errors
In file included from ./include/uapi/linux/posix_types.h:5,
from ./include/uapi/linux/types.h:14,
from ./include/linux/types.h:6,
from ./include/linux/list.h:5,
from ./include/linux/module.h:12,
from drivers/staging/fsl_ppfe/pfe_sysfs.c:7:
drivers/staging/fsl_ppfe/pfe_sysfs.c: In function 'pfe_set_util':
./include/linux/stddef.h:8:14: error: passing argument 2 of 'kstrtoul' makes integer from pointer without a cast [-Werror=int-conversion]
8 | #define NULL ((void *)0)
| ^~~~~~~~~~~
| |
| void *
drivers/staging/fsl_ppfe/pfe_sysfs.c:538:39: note: in expansion of macro 'NULL'
538 | util_do_clear = kstrtoul(buf, NULL, 0);
| ^~~~
In file included from ./include/linux/kernel.h:13,
from ./include/linux/list.h:9:
./include/linux/kstrtox.h:30:69: note: expected 'unsigned int' but argument is of type 'void *'
30 | static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res)
| ~~~~~~~~~~~~~^~~~
cc1: all warnings being treated as errors
With UTIL compiled on, fix compilation warning:
drivers/staging/fsl_ppfe/pfe_hal.c: In function 'pe_load_ddr_section':
drivers/staging/fsl_ppfe/pfe_hal.c:617:19: error: 'else' without a previous 'if'
617 | } else {
| ^~~~
drivers/staging/fsl_ppfe/pfe_hal.c:622:17: error: break statement not within loop or switch
622 | break;
| ^~~~~
drivers/staging/fsl_ppfe/pfe_hal.c:624:9: error: case label not within a switch statement
624 | case SHT_NOBITS:
| ^~~~
drivers/staging/fsl_ppfe/pfe_hal.c:627:17: error: break statement not within loop or switch
627 | break;
| ^~~~~
drivers/staging/fsl_ppfe/pfe_hal.c:629:9: error: 'default' label not within a switch statement
629 | default:
| ^~~~~~~
drivers/staging/fsl_ppfe/pfe_hal.c: At top level:
drivers/staging/fsl_ppfe/pfe_hal.c:635:9: error: expected identifier or '(' before 'return'
635 | return 0;
| ^~~~~~
drivers/staging/fsl_ppfe/pfe_hal.c:636:1: error: expected identifier or '(' before '}' token
636 | }
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
drivers/staging/fsl_ppfe/pfe_cdev.c | 6 +++---
drivers/staging/fsl_ppfe/pfe_hif.c | 14 +++++++-------
drivers/staging/fsl_ppfe/pfe_sysfs.c | 2 +-
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/staging/fsl_ppfe/pfe_cdev.c b/drivers/staging/fsl_ppfe/pfe_cdev.c
index f19a1821af42..e0b3af0892ac 100644
--- a/drivers/staging/fsl_ppfe/pfe_cdev.c
+++ b/drivers/staging/fsl_ppfe/pfe_cdev.c
@@ -34,7 +34,7 @@ static ssize_t pfe_cdev_read(struct file *fp, char *buf,
{
int ret = 0;
- pr_info("PFE CDEV attempt copying (%lu) size of user.\n",
+ pr_info("PFE CDEV attempt copying (%zu) size of user.\n",
sizeof(link_states));
pr_debug("Dump link_state on screen before copy_to_user\n");
@@ -47,14 +47,14 @@ static ssize_t pfe_cdev_read(struct file *fp, char *buf,
/* Copy to user the value in buffer sized len */
ret = copy_to_user(buf, &link_states, sizeof(link_states));
if (ret != 0) {
- pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
+ pr_err("Failed to send (%d)bytes of (%zu) requested.\n",
ret, len);
return -EFAULT;
}
/* offset set back to 0 as there is contextual reading offset */
*off = 0;
- pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
+ pr_debug("Read of (%zu) bytes performed.\n", sizeof(link_states));
return sizeof(link_states);
}
diff --git a/drivers/staging/fsl_ppfe/pfe_hif.c b/drivers/staging/fsl_ppfe/pfe_hif.c
index dcc3f7f1e9ef..5347401f92c0 100644
--- a/drivers/staging/fsl_ppfe/pfe_hif.c
+++ b/drivers/staging/fsl_ppfe/pfe_hif.c
@@ -115,11 +115,11 @@ static void send_dummy_pkt_to_hif(void)
0x33221100, 0xa8c05544, 0x00000301, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0xbe86c51f };
- ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
+ ddr_ptr = (void *)((uintptr_t)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
if (!ddr_ptr)
return;
- lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
+ lmem_ptr = (void *)((uintptr_t)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
if (!lmem_ptr)
return;
@@ -186,16 +186,16 @@ static void pfe_hif_free_descr(struct pfe_hif *hif)
void pfe_hif_desc_dump(struct pfe_hif *hif)
{
struct hif_desc *desc;
- unsigned long desc_p;
+ u64 desc_p;
int ii = 0;
pr_info("%s\n", __func__);
desc = hif->rx_base;
- desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
+ desc_p = ((void *)desc - hif->descr_baseaddr_v +
hif->descr_baseaddr_p);
- pr_info("HIF Rx desc base %p physical %x\n", desc, (u32)desc_p);
+ pr_info("HIF Rx desc base %p physical %llx\n", desc, desc_p);
for (ii = 0; ii < hif->rx_ring_size; ii++) {
pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
readl(&desc->status), readl(&desc->ctrl),
@@ -204,10 +204,10 @@ void pfe_hif_desc_dump(struct pfe_hif *hif)
}
desc = hif->tx_base;
- desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
+ desc_p = ((void *)desc - hif->descr_baseaddr_v +
hif->descr_baseaddr_p);
- pr_info("HIF Tx desc base %p physical %x\n", desc, (u32)desc_p);
+ pr_info("HIF Tx desc base %p physical %llx\n", desc, desc_p);
for (ii = 0; ii < hif->tx_ring_size; ii++) {
pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
readl(&desc->status), readl(&desc->ctrl),
diff --git a/drivers/staging/fsl_ppfe/pfe_sysfs.c b/drivers/staging/fsl_ppfe/pfe_sysfs.c
index 1792e88140d1..ede651be51bf 100644
--- a/drivers/staging/fsl_ppfe/pfe_sysfs.c
+++ b/drivers/staging/fsl_ppfe/pfe_sysfs.c
@@ -535,7 +535,7 @@ static ssize_t pfe_show_tmu3_queues(struct device *dev, struct device_attribute
static ssize_t pfe_set_util(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
- util_do_clear = kstrtoul(buf, NULL, 0);
+ util_do_clear = kstrtoul(buf, 0, 0);
return count;
}
--
2.25.1

View File

@@ -0,0 +1,47 @@
From eb57941154e2ad142c07d47e874a221328467349 Mon Sep 17 00:00:00 2001
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Thu, 2 Jun 2022 12:11:11 +0300
Subject: [PATCH] net: phylink: treat PHY_INTERFACE_MODE_2500SGMII in
phylink_get_linkmodes
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There is a downstream patch which adds a new interface type -
PHY_INTERFACE_MODE_2500SGMII (which is really the same one as
PHY_INTERFACE_MODE_2500BASEX).
We backported from upstream the following phylink patch which, of
course, does not treat the PHY_INTERFACE_MODE_2500SGMII interface mode
in a switch case statement.
34ae2c09d46a ("net: phylink: add generic validate implementation")
Because of this, we get the following build warning.
drivers/net/phy/phylink.c: In function phylink_get_linkmodes:
drivers/net/phy/phylink.c:322:2: warning: enumeration value PHY_INTERFACE_MODE_2500SGMII not handled in switch [-Wswitch]
322 | switch (interface) {
| ^~~~~~
Fix it by treating the new interface mode in the switch-case statement.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
drivers/net/phy/phylink.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 2805b04d6402..a1e34b127401 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -485,6 +485,7 @@ unsigned long phylink_get_capabilities(phy_interface_t interface,
break;
case PHY_INTERFACE_MODE_2500BASEX:
+ case PHY_INTERFACE_MODE_2500SGMII:
caps |= MAC_2500FD;
break;
--
2.25.1

View File

@@ -0,0 +1,29 @@
From 93e161c8f4b9b051e5e746814138cb5520b4b897 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 1 Sep 2023 20:10:04 +0200
Subject: [PATCH] dt-bindings: arm: qcom,ids: Add IDs for IPQ8174 family
IPQ8174 (Oak) family is part of the IPQ8074 family, but the ID-s for it
are missing so lets add them.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230901181041.1538999-1-robimarko@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---
include/dt-bindings/arm/qcom,ids.h | 3 +++
1 file changed, 3 insertions(+)
--- a/include/dt-bindings/arm/qcom,ids.h
+++ b/include/dt-bindings/arm/qcom,ids.h
@@ -121,6 +121,9 @@
#define QCOM_ID_SM6125 394
#define QCOM_ID_IPQ8070A 395
#define QCOM_ID_IPQ8071A 396
+#define QCOM_ID_IPQ8172 397
+#define QCOM_ID_IPQ8173 398
+#define QCOM_ID_IPQ8174 399
#define QCOM_ID_IPQ6018 402
#define QCOM_ID_IPQ6028 403
#define QCOM_ID_IPQ6000 421

View File

@@ -1,10 +1,11 @@
From 11592aa862e67f4477dee7e94d5c8244d893de1b Mon Sep 17 00:00:00 2001
From df75a00c60c6e58bc36e4c63e9d7f1910412b132 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 31 Dec 2022 13:03:41 +0100
Date: Fri, 13 Oct 2023 19:20:02 +0200
Subject: [PATCH] cpufreq: qcom-nvmem: add support for IPQ8074
IPQ8074 comes in 2 families:
IPQ8074 comes in 3 families:
* IPQ8070A/IPQ8071A (Acorn) up to 1.4GHz
* IPQ8172/IPQ8173/IPQ8174 (Oak) up to 1.4GHz
* IPQ8072A/IPQ8074A/IPQ8076A/IPQ8078A (Hawkeye) up to 2.2GHz
So, in order to be able to share one OPP table lets add support for IPQ8074
@@ -14,14 +15,12 @@ IPQ8074 compatible is blacklisted from DT platdev as the cpufreq device
will get created by NVMEM CPUFreq driver.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
Changes in v2:
* Print an error if SMEM ID is not part of the IPQ8074 family
and restrict the speed to Acorn variant (1.4GHz)
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/qcom-cpufreq-nvmem.c | 43 ++++++++++++++++++++++++++++
2 files changed, 44 insertions(+)
drivers/cpufreq/qcom-cpufreq-nvmem.c | 48 ++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -35,17 +34,19 @@ and restrict the speed to Acorn variant (1.4GHz)
{ .compatible = "qcom,msm8960", },
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -31,6 +31,9 @@
@@ -31,6 +31,11 @@
#include <dt-bindings/arm/qcom,ids.h>
+#define IPQ8074_HAWKEYE_VERSION BIT(0)
+#define IPQ8074_ACORN_VERSION BIT(1)
+enum ipq8074_versions {
+ IPQ8074_HAWKEYE_VERSION = 0,
+ IPQ8074_ACORN_VERSION,
+};
+
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
@@ -204,6 +207,41 @@ len_error:
@@ -204,6 +209,44 @@ len_error:
return ret;
}
@@ -65,19 +66,22 @@ and restrict the speed to Acorn variant (1.4GHz)
+ switch (msm_id) {
+ case QCOM_ID_IPQ8070A:
+ case QCOM_ID_IPQ8071A:
+ drv->versions = IPQ8074_ACORN_VERSION;
+ case QCOM_ID_IPQ8172:
+ case QCOM_ID_IPQ8173:
+ case QCOM_ID_IPQ8174:
+ drv->versions = BIT(IPQ8074_ACORN_VERSION);
+ break;
+ case QCOM_ID_IPQ8072A:
+ case QCOM_ID_IPQ8074A:
+ case QCOM_ID_IPQ8076A:
+ case QCOM_ID_IPQ8078A:
+ drv->versions = IPQ8074_HAWKEYE_VERSION;
+ drv->versions = BIT(IPQ8074_HAWKEYE_VERSION);
+ break;
+ default:
+ dev_err(cpu_dev,
+ "SoC ID %u is not part of IPQ8074 family, limiting to 1.4GHz!\n",
+ msm_id);
+ drv->versions = IPQ8074_ACORN_VERSION;
+ drv->versions = BIT(IPQ8074_ACORN_VERSION);
+ break;
+ }
+
@@ -87,7 +91,7 @@ and restrict the speed to Acorn variant (1.4GHz)
static const struct qcom_cpufreq_match_data match_data_kryo = {
.get_version = qcom_cpufreq_kryo_name_version,
};
@@ -218,6 +256,10 @@ static const struct qcom_cpufreq_match_d
@@ -218,6 +261,10 @@ static const struct qcom_cpufreq_match_d
.genpd_names = qcs404_genpd_names,
};
@@ -98,7 +102,7 @@ and restrict the speed to Acorn variant (1.4GHz)
static int qcom_cpufreq_probe(struct platform_device *pdev)
{
struct qcom_cpufreq_drv *drv;
@@ -363,6 +405,7 @@ static const struct of_device_id qcom_cp
@@ -363,6 +410,7 @@ static const struct of_device_id qcom_cp
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
{ .compatible = "qcom,ipq8064", .data = &match_data_krait },

View File

@@ -73,9 +73,20 @@
};
factory: partition@30000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x30000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@40000 {
@@ -110,15 +121,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -84,7 +84,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {
@@ -132,9 +133,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -147,15 +163,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -189,9 +189,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -208,15 +219,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -120,9 +120,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
};
partition@50000 {
@@ -143,7 +154,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -167,6 +179,7 @@
compatible = "pci1814,5592";
reg = <0x0000 0 0 0 0>;
ralink,2ghz = <0>;
ralink,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
};
};

View File

@@ -8,6 +8,7 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
};
};

View File

@@ -10,7 +10,8 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {

View File

@@ -79,9 +79,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -129,19 +144,10 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -82,9 +82,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -124,7 +139,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -134,7 +150,8 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -145,13 +162,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -128,9 +128,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -174,7 +189,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
pinctrl-names = "default";
pinctrl-0 = <&pa_pins>;
};
@@ -186,7 +202,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -197,13 +214,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -114,9 +114,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -159,7 +174,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -170,17 +186,8 @@
wifi@0,0 {
compatible = "pci0,0";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -114,9 +114,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -146,18 +157,9 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
pinctrl-1 = <&pa_gpio_pins>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -114,9 +114,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -146,7 +161,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -157,16 +173,7 @@
wifi@0,0 {
compatible = "pci1814,5592";
reg = <0x0000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
};
};

View File

@@ -81,9 +81,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
factory5g: partition@50000 {
@@ -141,10 +156,8 @@
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
pinctrl-1 = <&pa_gpio_pins>;
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&macaddr_factory_28>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_28>;
nvmem-cell-names = "eeprom", "mac-address";
};
&pcie {
@@ -154,20 +167,9 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
nvmem-cells = <&macaddr_factory_28>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_28>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <2>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -119,9 +119,20 @@
};
factory: partition@34000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x34000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
nvram: partition@38000 {
@@ -173,18 +184,9 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
pinctrl-1 = <&pa_gpio_pins>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -94,9 +94,20 @@
};
config: partition@ff0000 {
compatible = "nvmem-cells";
label = "config";
reg = <0xff0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_config_e05d: eeprom@e05d {
reg = <0xe05d 0x200>;
};
macaddr_config_e490: macaddr@e490 {
reg = <0xe490 0x6>;
};
};
};
};
@@ -117,10 +128,9 @@
&pcie0 {
mt76x0e@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&macaddr_config_e490>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_config_e05d>, <&macaddr_config_e490>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <(2)>;
mediatek,mtd-eeprom = <&config 0xe05d>;
};
};
@@ -130,13 +140,3 @@
function = "gpio";
};
};
&config {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_config_e490: macaddr@e490 {
reg = <0xe490 0x6>;
};
};

View File

@@ -91,9 +91,28 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "Factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_8004: macaddr@8004 {
reg = <0x8004 0x6>;
};
};
partition@50000 {
@@ -124,9 +143,8 @@
pinctrl-0 = <&pa_pins>;
pinctrl-1 = <&pa_gpio_pins>;
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <(-1)>;
};
@@ -137,11 +155,9 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
nvmem-cells = <&macaddr_factory_8004>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_8004>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <(-3)>;
led {
@@ -149,17 +165,3 @@
};
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_8004: macaddr@8004 {
reg = <0x8004 0x6>;
};
};

View File

@@ -115,9 +115,20 @@
};
config: partition@ff0000 {
compatible = "nvmem-cells";
label = "config";
reg = <0xff0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_config_e083: eeprom@e083 {
reg = <0xe083 0x200>;
};
macaddr_config_e496: macaddr@e496 {
reg = <0xe496 0x6>;
};
};
};
};
@@ -145,10 +156,9 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&macaddr_config_e496>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_config_e083>, <&macaddr_config_e496>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <(2)>;
mediatek,mtd-eeprom = <&config 0xe083>;
led {
led-sources = <0>;
@@ -192,13 +202,3 @@
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&config {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_config_e496: macaddr@e496 {
reg = <0xe496 0x6>;
};
};

View File

@@ -30,5 +30,7 @@
};
&wifi {
mediatek,mtd-eeprom = <&config 0xe08e>;
nvmem-cells = <&eeprom_config_e08e>, <&macaddr_config_e50e>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <2>;
};

View File

@@ -58,5 +58,7 @@
};
&wifi {
mediatek,mtd-eeprom = <&config 0xe29e>;
nvmem-cells = <&eeprom_config_e29e>, <&macaddr_config_e50e>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <2>;
};

View File

@@ -120,9 +120,6 @@
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
nvmem-cells = <&macaddr_config_e50e>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(2)>;
};
};
@@ -155,13 +152,20 @@
config: partition@ff0000 {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
label = "config";
reg = <0xff0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_config_e08e: eeprom@e08e {
reg = <0xe08e 0x200>;
};
eeprom_config_e29e: eeprom@e29e {
reg = <0xe29e 0x200>;
};
macaddr_config_e50e: macaddr@e50e {
reg = <0xe50e 0x6>;
};

View File

@@ -114,9 +114,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -164,7 +179,8 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {
@@ -175,15 +191,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -79,9 +79,16 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
};
partition@50000 {
@@ -153,7 +160,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@@ -141,9 +141,28 @@
// Factory
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_2e: macaddr@2e {
reg = <0x2e 0x6>;
};
};
// Cimage
@@ -187,7 +206,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -197,21 +217,8 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_2e: macaddr@2e {
reg = <0x2e 0x6>;
};
};

View File

@@ -99,9 +99,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -183,7 +198,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -193,8 +209,9 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
mediatek,2ghz = <0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -205,13 +222,3 @@
&ohci {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -91,9 +91,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -175,7 +190,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -185,8 +201,9 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
mediatek,2ghz = <0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -197,13 +214,3 @@
&ohci {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -80,9 +80,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -174,9 +189,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>;
nvmem-cell-names = "eeprom", "mac-address";
};
&pcie {
@@ -186,20 +200,9 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_4>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <2>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -116,15 +116,33 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
};
rf: partition@50000 {
compatible = "nvmem-cells";
label = "rf";
reg = <0x50000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_rf_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_rf_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@60000 {
@@ -194,12 +212,14 @@
wifi@0,1,0 {
compatible = "pci1814,3091";
reg = <0x0 1 0 0 0>;
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
};
&wmac {
ralink,mtd-eeprom = <&rf 0x0>;
nvmem-cells = <&eeprom_rf_0>;
nvmem-cell-names = "eeprom";
};
&ehci {
@@ -216,13 +236,3 @@
function = "gpio";
};
};
&rf {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_rf_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -98,15 +98,33 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
};
iNIC_rf: partition@50000 {
compatible = "nvmem-cells";
label = "iNIC_rf";
reg = <0x50000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_iNIC_rf_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_iNIC_rf_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@60000 {
@@ -179,12 +197,14 @@
wifi@0,0 {
compatible = "pci1814,5592";
reg = <0x0 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
};
&wmac {
ralink,mtd-eeprom = <&iNIC_rf 0x0>;
nvmem-cells = <&eeprom_iNIC_rf_0>;
nvmem-cell-names = "eeprom";
};
&ehci {
@@ -194,13 +214,3 @@
&ohci {
status = "okay";
};
&iNIC_rf {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_iNIC_rf_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -77,9 +77,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -142,7 +157,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>, <&wled_pins>;
@@ -156,7 +172,8 @@
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -168,13 +185,3 @@
&ohci {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -95,9 +95,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4000: macaddr@4000 {
reg = <0x4000 0x6>;
};
};
partition@50000 {
@@ -134,7 +145,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -143,13 +155,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4000: macaddr@4000 {
reg = <0x4000 0x6>;
};
};

View File

@@ -90,9 +90,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4000: macaddr@4000 {
reg = <0x4000 0x6>;
};
};
partition@50000 {
@@ -125,7 +136,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -134,13 +146,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4000: macaddr@4000 {
reg = <0x4000 0x6>;
};
};

View File

@@ -90,9 +90,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4000: macaddr@4000 {
reg = <0x4000 0x6>;
};
};
partition@50000 {
@@ -129,7 +144,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -139,7 +155,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
};
};
@@ -149,13 +166,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4000: macaddr@4000 {
reg = <0x4000 0x6>;
};
};

View File

@@ -82,9 +82,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
firmware: partition@50000 {
@@ -156,7 +171,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -175,7 +191,8 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -183,13 +200,3 @@
&uart {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -64,7 +64,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@@ -101,7 +101,8 @@
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@@ -52,9 +52,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -96,7 +111,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -105,13 +121,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -109,9 +109,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -141,7 +152,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -154,13 +166,3 @@
&pcie {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -88,13 +88,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x30000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_10007: macaddr@10007 {
reg = <0x10007 0x6>;
@@ -125,13 +132,15 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {

View File

@@ -91,15 +91,33 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
iNIC_rf: partition@48000 {
compatible = "nvmem-cells";
label = "iNIC_rf";
reg = <0x48000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_iNIC_rf_0: eeprom@0 {
reg = <0x0 0x200>;
};
};
partition@50000 {
@@ -203,21 +221,13 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
nvmem-cells = <&eeprom_iNIC_rf_0>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -105,15 +105,33 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
iNIC_rf: partition@48000 {
compatible = "nvmem-cells";
label = "iNIC_rf";
reg = <0x48000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_iNIC_rf_0: eeprom@0 {
reg = <0x0 0x200>;
};
};
partition@50000 {
@@ -181,21 +199,13 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
nvmem-cells = <&eeprom_iNIC_rf_0>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -29,9 +29,24 @@
#size-cells = <1>;
uboot: partition@0 {
compatible = "nvmem-cells";
label = "u-boot";
reg = <0x0 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_uboot_1f400: eeprom@1f400 {
reg = <0x1f400 0x200>;
};
eeprom_uboot_1f800: eeprom@1f800 {
reg = <0x1f800 0x200>;
};
macaddr_uboot_1fc20: macaddr@1fc20 {
reg = <0x1fc20 0x6>;
};
};
partition@20000 {
@@ -69,7 +84,8 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&uboot 0x1f800>;
nvmem-cells = <&eeprom_uboot_1f800>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {
@@ -82,16 +98,6 @@
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&wled_pins>;
ralink,mtd-eeprom = <&uboot 0x1f400>;
};
&uboot {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_uboot_1fc20: macaddr@1fc20 {
reg = <0x1fc20 0x6>;
};
nvmem-cells = <&eeprom_uboot_1f400>;
nvmem-cell-names = "eeprom";
};

View File

@@ -73,9 +73,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -101,7 +112,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -110,13 +122,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -92,9 +92,20 @@
};
config: partition@ff0000 {
compatible = "nvmem-cells";
label = "config";
reg = <0xff0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_config_e08a: eeprom@e08a {
reg = <0xe08a 0x200>;
};
macaddr_config_e07e: macaddr@e07e {
reg = <0xe07e 0x6>;
};
};
};
};
@@ -150,10 +161,9 @@
&pcie0 {
mt76x0e@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&macaddr_config_e07e>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(2)>;
mediatek,mtd-eeprom = <&config 0xe08a>;
nvmem-cells = <&eeprom_config_e08a>, <&macaddr_config_e07e>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <2>;
};
};
@@ -163,13 +173,3 @@
function = "gpio";
};
};
&config {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_config_e07e: macaddr@e07e {
reg = <0xe07e 0x6>;
};
};

View File

@@ -65,9 +65,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -141,7 +156,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -153,7 +169,8 @@
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
led {
led-sources = <2>;
@@ -169,13 +186,3 @@
&ohci {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -58,13 +58,3 @@
mediatek,portmap = "llllw";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -55,9 +55,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -84,7 +99,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -93,8 +109,8 @@
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
pinctrl-1 = <&pa_gpio_pins>;
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {

View File

@@ -115,13 +115,3 @@
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -76,9 +76,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -150,15 +161,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -54,9 +54,20 @@
};
factory: partition@30000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x30000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@40000 {
@@ -87,7 +98,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -96,13 +108,3 @@
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View File

@@ -93,9 +93,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -115,8 +126,9 @@
};
&ethernet {
mtd-mac-address = <&factory 0x28>;
mediatek,portmap = "llllw";
nvmem-cells = <&macaddr_factory_28>;
nvmem-cell-names = "mac-address";
};
&ehci {
@@ -128,5 +140,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -112,9 +112,24 @@
};
art: partition@3f0000 {
compatible = "nvmem-cells";
label = "art";
reg = <0x3f0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
eeprom_art_1000: eeprom@1000 {
reg = <0x1000 0x200>;
};
};
};
};
@@ -126,10 +141,8 @@
};
&wmac {
ralink,mtd-eeprom = <&art 0x1000>;
nvmem-cells = <&macaddr_art_6>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_art_1000>, <&macaddr_art_6>;
nvmem-cell-names = "eeprom", "mac-address";
};
&state_default {
@@ -138,17 +151,3 @@
function = "gpio";
};
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
};

View File

@@ -98,9 +98,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -131,7 +146,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -142,7 +158,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -152,12 +169,3 @@
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -116,9 +116,24 @@
};
art: partition@7f0000 {
compatible = "nvmem-cells";
label = "art";
reg = <0x7f0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
eeprom_art_1000: eeprom@1000 {
reg = <0x1000 0x200>;
};
};
};
};
@@ -130,10 +145,8 @@
};
&wmac {
ralink,mtd-eeprom = <&art 0x1000>;
nvmem-cells = <&macaddr_art_6>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&eeprom_art_1000>, <&macaddr_art_6>;
nvmem-cell-names = "eeprom", "mac-address";
};
&state_default {
@@ -142,17 +155,3 @@
function = "gpio";
};
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
};

View File

@@ -74,9 +74,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -155,21 +170,13 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -73,9 +73,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
@@ -105,7 +116,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&sdhci {
@@ -119,13 +131,3 @@
&ohci {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};

View File

@@ -69,9 +69,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
};
};
@@ -91,7 +106,8 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
@@ -102,15 +118,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -67,19 +67,34 @@
read-only;
};
partition@20000 {
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@30000 {
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@40000 {
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
@@ -112,21 +127,13 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -80,9 +80,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -136,15 +147,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -64,9 +64,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -96,15 +107,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -84,9 +84,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -116,7 +131,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -126,16 +142,7 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
};
};

View File

@@ -99,9 +99,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -136,15 +147,6 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

View File

@@ -104,9 +104,24 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -141,7 +156,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&pcie {
@@ -151,16 +167,7 @@
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
};
};

View File

@@ -50,9 +50,16 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
};
partition@50000 {
@@ -82,7 +89,8 @@
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@@ -111,9 +111,20 @@
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
partition@50000 {
@@ -147,7 +158,8 @@
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&state_default {
@@ -174,13 +186,3 @@
&pcie {
status = "okay";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

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