Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2024-08-02 22:36:36 +08:00
71 changed files with 1277 additions and 15281 deletions

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@@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2024-01-04
PKG_SOURCE_VERSION:=f01345ec13b9b27ffd314d8689fb2d3f9c81a47d
PKG_MIRROR_HASH:=b051aa94e6413f520b711372f8cae4574cad26cba880ff6ab2d415713d06e592
PKG_SOURCE_DATE:=2024-08-01
PKG_SOURCE_VERSION:=68c8a4f94cd3cfd654a52cbc8b57c5c9d99640dd
PKG_MIRROR_HASH:=897481d6d4309b4a940b80cfe2392a0c0ccbef4d0024cb1a995b1f4780b69cde
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0

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@@ -0,0 +1,30 @@
From 6c06c88fa838fcc1b7e5380facd086f57fd9d1c4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Sun, 4 Feb 2024 15:16:46 +0100
Subject: [PATCH] net: mdio: add 2.5g and 5g related PMA speed constants
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add constants indicating 2.5g and 5g ability in the MMD PMA speed
register.
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/98e15038-d96c-442f-93e4-410100d27866@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
include/uapi/linux/mdio.h | 2 ++
1 file changed, 2 insertions(+)
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -138,6 +138,8 @@
#define MDIO_PMA_SPEED_1000 0x0010 /* 1000M capable */
#define MDIO_PMA_SPEED_100 0x0020 /* 100M capable */
#define MDIO_PMA_SPEED_10 0x0040 /* 10M capable */
+#define MDIO_PMA_SPEED_2_5G 0x2000 /* 2.5G capable */
+#define MDIO_PMA_SPEED_5G 0x4000 /* 5G capable */
#define MDIO_PCS_SPEED_10P2B 0x0002 /* 10PASS-TS/2BASE-TL capable */
#define MDIO_PCS_SPEED_2_5G 0x0040 /* 2.5G capable */
#define MDIO_PCS_SPEED_5G 0x0080 /* 5G capable */

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@@ -0,0 +1,40 @@
From 5befa3728b855e9f75b29bb0069a1ca7f5bab2f7 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 31 Jan 2024 21:24:29 +0100
Subject: [PATCH] net: phy: realtek: add support for RTL8126A-integrated 5Gbps
PHY
A user reported that first consumer mainboards show up with a RTL8126A
5Gbps MAC/PHY. This adds support for the integrated PHY, which is also
available stand-alone. From a PHY driver perspective it's treated the
same as the 2.5Gbps PHY's, we just have to support the new PHY ID.
Reported-by: Joe Salmeri <jmscdba@gmail.com>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Joe Salmeri <jmscdba@gmail.com>
Link: https://lore.kernel.org/r/0c8e67ea-6505-43d1-bd51-94e7ecd6e222@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1050,6 +1050,16 @@ static struct phy_driver realtek_drvs[]
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
+ PHY_ID_MATCH_EXACT(0x001cc862),
+ .name = "RTL8251B 5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg = rtl822x_config_aneg,
+ .read_status = rtl822x_read_status,
+ .suspend = genphy_suspend,
+ .resume = rtlgen_resume,
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ }, {
PHY_ID_MATCH_EXACT(0x001cc961),
.name = "RTL8366RB Gigabit Ethernet",
.config_init = &rtl8366rb_config_init,

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@@ -0,0 +1,93 @@
From 2b9ec5dfb8255656ca731ab9d9bf59d94566d377 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Sun, 4 Feb 2024 15:17:53 +0100
Subject: [PATCH] net: phy: realtek: use generic MDIO constants
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Drop the ad-hoc MDIO constants used in the driver and use generic
constants instead.
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/732a70d6-4191-4aae-8862-3716b062aa9e@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek.c | 30 +++++++++++++-----------------
1 file changed, 13 insertions(+), 17 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -57,14 +57,6 @@
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-#define RTL_SUPPORTS_5000FULL BIT(14)
-#define RTL_SUPPORTS_2500FULL BIT(13)
-#define RTL_SUPPORTS_10000FULL BIT(0)
-#define RTL_ADV_2500FULL BIT(7)
-#define RTL_LPADV_10000FULL BIT(11)
-#define RTL_LPADV_5000FULL BIT(6)
-#define RTL_LPADV_2500FULL BIT(5)
-
#define RTL9000A_GINMR 0x14
#define RTL9000A_GINMR_LINK_STATUS BIT(4)
@@ -676,11 +668,11 @@ static int rtl822x_get_features(struct p
return val;
linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- phydev->supported, val & RTL_SUPPORTS_2500FULL);
+ phydev->supported, val & MDIO_PMA_SPEED_2_5G);
linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
- phydev->supported, val & RTL_SUPPORTS_5000FULL);
+ phydev->supported, val & MDIO_PMA_SPEED_5G);
linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
- phydev->supported, val & RTL_SUPPORTS_10000FULL);
+ phydev->supported, val & MDIO_SPEED_10G);
return genphy_read_abilities(phydev);
}
@@ -694,10 +686,11 @@ static int rtl822x_config_aneg(struct ph
if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
phydev->advertising))
- adv2500 = RTL_ADV_2500FULL;
+ adv2500 = MDIO_AN_10GBT_CTRL_ADV2_5G;
ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
- RTL_ADV_2500FULL, adv2500);
+ MDIO_AN_10GBT_CTRL_ADV2_5G,
+ adv2500);
if (ret < 0)
return ret;
}
@@ -716,11 +709,14 @@ static int rtl822x_read_status(struct ph
return lpadv;
linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
- phydev->lp_advertising, lpadv & RTL_LPADV_10000FULL);
+ phydev->lp_advertising,
+ lpadv & MDIO_AN_10GBT_STAT_LP10G);
linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
- phydev->lp_advertising, lpadv & RTL_LPADV_5000FULL);
+ phydev->lp_advertising,
+ lpadv & MDIO_AN_10GBT_STAT_LP5G);
linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL);
+ phydev->lp_advertising,
+ lpadv & MDIO_AN_10GBT_STAT_LP2_5G);
}
ret = genphy_read_status(phydev);
@@ -738,7 +734,7 @@ static bool rtlgen_supports_2_5gbps(stru
val = phy_read(phydev, 0x13);
phy_write(phydev, RTL821x_PAGE_SELECT, 0);
- return val >= 0 && val & RTL_SUPPORTS_2500FULL;
+ return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
}
static int rtlgen_match_phy_device(struct phy_device *phydev)

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@@ -0,0 +1,42 @@
From db1bb7741ff29bf2cefcbc0ca567644e9ed1caa9 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 4 Feb 2024 15:18:50 +0100
Subject: [PATCH] net: phy: realtek: add 5Gbps support to rtl822x_config_aneg()
RTL8126 as an evolution of RTL8125 supports 5Gbps. rtl822x_config_aneg()
is used by the PHY driver for the integrated PHY, therefore add 5Gbps
support to it.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/5644ab50-e3e9-477c-96db-05cd5bdc2563@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -682,15 +682,19 @@ static int rtl822x_config_aneg(struct ph
int ret = 0;
if (phydev->autoneg == AUTONEG_ENABLE) {
- u16 adv2500 = 0;
+ u16 adv = 0;
if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
phydev->advertising))
- adv2500 = MDIO_AN_10GBT_CTRL_ADV2_5G;
+ adv |= MDIO_AN_10GBT_CTRL_ADV2_5G;
+ if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ phydev->advertising))
+ adv |= MDIO_AN_10GBT_CTRL_ADV5G;
ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
- MDIO_AN_10GBT_CTRL_ADV2_5G,
- adv2500);
+ MDIO_AN_10GBT_CTRL_ADV2_5G |
+ MDIO_AN_10GBT_CTRL_ADV5G,
+ adv);
if (ret < 0)
return ret;
}

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@@ -0,0 +1,52 @@
From b63cc73341e076961d564a74cc3d29b2fd444079 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 8 Feb 2024 07:59:18 +0100
Subject: [PATCH] net: phy: realtek: use generic MDIO helpers to simplify the
code
Use generic MDIO helpers to simplify the code.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/422ae70f-7305-45fd-ab3e-0dd604b9fd6c@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek.c | 20 +++-----------------
1 file changed, 3 insertions(+), 17 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -682,14 +682,7 @@ static int rtl822x_config_aneg(struct ph
int ret = 0;
if (phydev->autoneg == AUTONEG_ENABLE) {
- u16 adv = 0;
-
- if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- phydev->advertising))
- adv |= MDIO_AN_10GBT_CTRL_ADV2_5G;
- if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
- phydev->advertising))
- adv |= MDIO_AN_10GBT_CTRL_ADV5G;
+ u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
MDIO_AN_10GBT_CTRL_ADV2_5G |
@@ -712,15 +705,8 @@ static int rtl822x_read_status(struct ph
if (lpadv < 0)
return lpadv;
- linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
- phydev->lp_advertising,
- lpadv & MDIO_AN_10GBT_STAT_LP10G);
- linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
- phydev->lp_advertising,
- lpadv & MDIO_AN_10GBT_STAT_LP5G);
- linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- phydev->lp_advertising,
- lpadv & MDIO_AN_10GBT_STAT_LP2_5G);
+ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising,
+ lpadv);
}
ret = genphy_read_status(phydev);

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@@ -0,0 +1,209 @@
From deb8af5243504e379878ae3f9a091b21422d65b2 Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Tue, 9 Apr 2024 09:30:11 +0200
Subject: [PATCH] net: phy: realtek: configure SerDes mode for rtl822xb PHYs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The rtl8221b and rtl8226b series support switching SerDes mode between
2500base-x and sgmii based on the negotiated copper speed.
Configure this switching mode according to SerDes modes supported by
host.
There is an additional datasheet for RTL8226B/RTL8221B called
"SERDES MODE SETTING FLOW APPLICATION NOTE" where a sequence is
described to setup interface and rate adapter mode.
However, there is no documentation about the meaning of registers
and bits, it's literally just magic numbers and pseudo-code.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
[ refactored, dropped HiSGMII mode and changed commit message ]
Signed-off-by: Marek Behún <kabel@kernel.org>
[ changed rtl822x_update_interface() to use vendor register ]
[ always fill in possible interfaces ]
[ only apply to rtl8221b and rtl8226b phy's ]
[ set phydev->rate_matching in .config_init() ]
Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: should come before them, without any blank lines. As the
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek.c | 114 ++++++++++++++++++++++++++++++++++++--
1 file changed, 110 insertions(+), 4 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -54,6 +54,16 @@
RTL8201F_ISR_LINK)
#define RTL8201F_IER 0x13
+#define RTL822X_VND1_SERDES_OPTION 0x697a
+#define RTL822X_VND1_SERDES_OPTION_MODE_MASK GENMASK(5, 0)
+#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII 0
+#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX 2
+
+#define RTL822X_VND1_SERDES_CTRL3 0x7580
+#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK GENMASK(5, 0)
+#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02
+#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -659,6 +669,63 @@ static int rtl822x_write_mmd(struct phy_
return ret;
}
+static int rtl822xb_config_init(struct phy_device *phydev)
+{
+ bool has_2500, has_sgmii;
+ u16 mode;
+ int ret;
+
+ has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
+ phydev->host_interfaces) ||
+ phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
+
+ has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
+ phydev->host_interfaces) ||
+ phydev->interface == PHY_INTERFACE_MODE_SGMII;
+
+ /* fill in possible interfaces */
+ __assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
+ has_2500);
+ __assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
+ has_sgmii);
+
+ if (!has_2500 && !has_sgmii)
+ return 0;
+
+ /* determine SerDes option mode */
+ if (has_2500 && !has_sgmii) {
+ mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
+ phydev->rate_matching = RATE_MATCH_PAUSE;
+ } else {
+ mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
+ phydev->rate_matching = RATE_MATCH_NONE;
+ }
+
+ /* the following sequence with magic numbers sets up the SerDes
+ * option mode
+ */
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
+ RTL822X_VND1_SERDES_OPTION,
+ RTL822X_VND1_SERDES_OPTION_MODE_MASK,
+ mode);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
+ if (ret < 0)
+ return ret;
+
+ return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
+}
+
static int rtl822x_get_features(struct phy_device *phydev)
{
int val;
@@ -695,6 +762,28 @@ static int rtl822x_config_aneg(struct ph
return __genphy_config_aneg(phydev, ret);
}
+static void rtl822xb_update_interface(struct phy_device *phydev)
+{
+ int val;
+
+ if (!phydev->link)
+ return;
+
+ /* Change interface according to serdes mode */
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
+ if (val < 0)
+ return;
+
+ switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
+ case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
+ phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+ break;
+ case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
+ phydev->interface = PHY_INTERFACE_MODE_SGMII;
+ break;
+ }
+}
+
static int rtl822x_read_status(struct phy_device *phydev)
{
int ret;
@@ -716,6 +805,19 @@ static int rtl822x_read_status(struct ph
return rtlgen_get_speed(phydev);
}
+static int rtl822xb_read_status(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = rtl822x_read_status(phydev);
+ if (ret < 0)
+ return ret;
+
+ rtl822xb_update_interface(phydev);
+
+ return 0;
+}
+
static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
{
int val;
@@ -988,7 +1090,8 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
- .read_status = rtl822x_read_status,
+ .config_init = rtl822xb_config_init,
+ .read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
@@ -1010,7 +1113,8 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
- .read_status = rtl822x_read_status,
+ .config_init = rtl822xb_config_init,
+ .read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
@@ -1020,7 +1124,8 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VB-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
- .read_status = rtl822x_read_status,
+ .config_init = rtl822xb_config_init,
+ .read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
@@ -1030,7 +1135,8 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VM-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
- .read_status = rtl822x_read_status,
+ .config_init = rtl822xb_config_init,
+ .read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,

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@@ -0,0 +1,77 @@
From c189dbd738243be6775bb6878366bf63e27bfd05 Mon Sep 17 00:00:00 2001
From: Eric Woudstra <ericwouds@gmail.com>
Date: Tue, 9 Apr 2024 09:30:12 +0200
Subject: [PATCH] net: phy: realtek: add get_rate_matching() for rtl822xb PHYs
Uses vendor register to determine if SerDes is setup in rate-matching mode.
Rate-matching only supported when SerDes is set to 2500base-x.
Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -726,6 +726,27 @@ static int rtl822xb_config_init(struct p
return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
}
+static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+ phy_interface_t iface)
+{
+ int val;
+
+ /* Only rate matching at 2500base-x */
+ if (iface != PHY_INTERFACE_MODE_2500BASEX)
+ return RATE_MATCH_NONE;
+
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_OPTION);
+ if (val < 0)
+ return val;
+
+ if ((val & RTL822X_VND1_SERDES_OPTION_MODE_MASK) ==
+ RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX)
+ return RATE_MATCH_PAUSE;
+
+ /* RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII */
+ return RATE_MATCH_NONE;
+}
+
static int rtl822x_get_features(struct phy_device *phydev)
{
int val;
@@ -1091,6 +1112,7 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
+ .get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
@@ -1114,6 +1136,7 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
+ .get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
@@ -1125,6 +1148,7 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
+ .get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
@@ -1136,6 +1160,7 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
+ .get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,

View File

@@ -0,0 +1,218 @@
From ad5ce743a6b0329f642d80be50ef7b534e908fba Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Tue, 9 Apr 2024 09:30:13 +0200
Subject: [PATCH] net: phy: realtek: Add driver instances for rtl8221b via
Clause 45
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Collected from several commits in [PATCH net-next]
"Realtek RTL822x PHY rework to c45 and SerDes interface switching"
The instances are used by Clause 45 only accessible PHY's on several sfp
modules, which are using RollBall protocol.
Signed-off-by: Marek Behún <kabel@kernel.org>
[ Added matching functions to differentiate C45 instances ]
Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek.c | 135 ++++++++++++++++++++++++++++++++++++--
1 file changed, 131 insertions(+), 4 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -64,6 +64,13 @@
#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02
#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16
+/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
+ * is set, they cannot be accessed by C45-over-C22.
+ */
+#define RTL822X_VND2_GBCR 0xa412
+
+#define RTL822X_VND2_GANLPAR 0xa414
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -74,6 +81,9 @@
#define RTL_GENERIC_PHYID 0x001cc800
#define RTL_8211FVD_PHYID 0x001cc878
+#define RTL_8221B_VB_CG 0x001cc849
+#define RTL_8221B_VN_CG 0x001cc84a
+#define RTL_8251B 0x001cc862
MODULE_DESCRIPTION("Realtek PHY driver");
MODULE_AUTHOR("Johnson Leung");
@@ -839,6 +849,67 @@ static int rtl822xb_read_status(struct p
return 0;
}
+static int rtl822x_c45_config_aneg(struct phy_device *phydev)
+{
+ bool changed = false;
+ int ret, val;
+
+ if (phydev->autoneg == AUTONEG_DISABLE)
+ return genphy_c45_pma_setup_forced(phydev);
+
+ ret = genphy_c45_an_config_aneg(phydev);
+ if (ret < 0)
+ return ret;
+ if (ret > 0)
+ changed = true;
+
+ val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
+
+ /* Vendor register as C45 has no standardized support for 1000BaseT */
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
+ ADVERTISE_1000FULL, val);
+ if (ret < 0)
+ return ret;
+ if (ret > 0)
+ changed = true;
+
+ return genphy_c45_check_and_restart_aneg(phydev, changed);
+}
+
+static int rtl822x_c45_read_status(struct phy_device *phydev)
+{
+ int ret, val;
+
+ ret = genphy_c45_read_status(phydev);
+ if (ret < 0)
+ return ret;
+
+ /* Vendor register as C45 has no standardized support for 1000BaseT */
+ if (phydev->autoneg == AUTONEG_ENABLE) {
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+ RTL822X_VND2_GANLPAR);
+ if (val < 0)
+ return val;
+
+ mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+ }
+
+ return 0;
+}
+
+static int rtl822xb_c45_read_status(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = rtl822x_c45_read_status(phydev);
+ if (ret < 0)
+ return ret;
+
+ rtl822xb_update_interface(phydev);
+
+ return 0;
+}
+
static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
{
int val;
@@ -862,6 +933,35 @@ static int rtl8226_match_phy_device(stru
rtlgen_supports_2_5gbps(phydev);
}
+static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
+ bool is_c45)
+{
+ if (phydev->is_c45)
+ return is_c45 && (id == phydev->c45_ids.device_ids[1]);
+ else
+ return !is_c45 && (id == phydev->phy_id);
+}
+
+static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+{
+ return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
+}
+
+static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
+{
+ return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
+}
+
+static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
+{
+ return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
+}
+
+static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
+{
+ return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+}
+
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
@@ -872,6 +972,15 @@ static int rtlgen_resume(struct phy_devi
return ret;
}
+static int rtlgen_c45_resume(struct phy_device *phydev)
+{
+ int ret = genphy_c45_pma_resume(phydev);
+
+ msleep(20);
+
+ return ret;
+}
+
static int rtl9000a_config_init(struct phy_device *phydev)
{
phydev->autoneg = AUTONEG_DISABLE;
@@ -1143,8 +1252,8 @@ static struct phy_driver realtek_drvs[]
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
- PHY_ID_MATCH_EXACT(0x001cc849),
- .name = "RTL8221B-VB-CG 2.5Gbps PHY",
+ .match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ .name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1155,8 +1264,17 @@ static struct phy_driver realtek_drvs[]
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
- PHY_ID_MATCH_EXACT(0x001cc84a),
- .name = "RTL8221B-VM-CG 2.5Gbps PHY",
+ .match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+ .name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ .config_init = rtl822xb_config_init,
+ .get_rate_matching = rtl822xb_get_rate_matching,
+ .config_aneg = rtl822x_c45_config_aneg,
+ .read_status = rtl822xb_c45_read_status,
+ .suspend = genphy_c45_pma_suspend,
+ .resume = rtlgen_c45_resume,
+ }, {
+ .match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+ .name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1167,6 +1285,15 @@ static struct phy_driver realtek_drvs[]
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
+ .match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+ .name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ .config_init = rtl822xb_config_init,
+ .get_rate_matching = rtl822xb_get_rate_matching,
+ .config_aneg = rtl822x_c45_config_aneg,
+ .read_status = rtl822xb_c45_read_status,
+ .suspend = genphy_c45_pma_suspend,
+ .resume = rtlgen_c45_resume,
+ }, {
PHY_ID_MATCH_EXACT(0x001cc862),
.name = "RTL8251B 5Gbps PHY",
.get_features = rtl822x_get_features,

View File

@@ -0,0 +1,125 @@
From 2e4ea707c7e04eb83e58c43e0e744bbdf6b23ff2 Mon Sep 17 00:00:00 2001
From: Eric Woudstra <ericwouds@gmail.com>
Date: Tue, 9 Apr 2024 09:30:14 +0200
Subject: [PATCH] net: phy: realtek: Change rtlgen_get_speed() to
rtlgen_decode_speed()
The value of the register to determine the speed, is retrieved
differently when using Clause 45 only. To use the rtlgen_get_speed()
function in this case, pass the value of the register as argument to
rtlgen_get_speed(). The function would then always return 0, so change it
to void. A better name for this function now is rtlgen_decode_speed().
Replace a call to genphy_read_status() followed by rtlgen_get_speed()
with a call to rtlgen_read_status() in rtl822x_read_status().
Add reading speed to rtl822x_c45_read_status().
Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek.c | 46 +++++++++++++++++++++------------------
1 file changed, 25 insertions(+), 21 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -71,6 +71,8 @@
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL822X_VND2_PHYSR 0xa434
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -551,17 +553,8 @@ static int rtl8366rb_config_init(struct
}
/* get actual speed to cover the downshift case */
-static int rtlgen_get_speed(struct phy_device *phydev)
+static void rtlgen_decode_speed(struct phy_device *phydev, int val)
{
- int val;
-
- if (!phydev->link)
- return 0;
-
- val = phy_read_paged(phydev, 0xa43, 0x12);
- if (val < 0)
- return val;
-
switch (val & RTLGEN_SPEED_MASK) {
case 0x0000:
phydev->speed = SPEED_10;
@@ -584,19 +577,26 @@ static int rtlgen_get_speed(struct phy_d
default:
break;
}
-
- return 0;
}
static int rtlgen_read_status(struct phy_device *phydev)
{
- int ret;
+ int ret, val;
ret = genphy_read_status(phydev);
if (ret < 0)
return ret;
- return rtlgen_get_speed(phydev);
+ if (!phydev->link)
+ return 0;
+
+ val = phy_read_paged(phydev, 0xa43, 0x12);
+ if (val < 0)
+ return val;
+
+ rtlgen_decode_speed(phydev, val);
+
+ return 0;
}
static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
@@ -817,8 +817,6 @@ static void rtl822xb_update_interface(st
static int rtl822x_read_status(struct phy_device *phydev)
{
- int ret;
-
if (phydev->autoneg == AUTONEG_ENABLE) {
int lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
@@ -829,11 +827,7 @@ static int rtl822x_read_status(struct ph
lpadv);
}
- ret = genphy_read_status(phydev);
- if (ret < 0)
- return ret;
-
- return rtlgen_get_speed(phydev);
+ return rtlgen_read_status(phydev);
}
static int rtl822xb_read_status(struct phy_device *phydev)
@@ -894,6 +888,16 @@ static int rtl822x_c45_read_status(struc
mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
}
+ if (!phydev->link)
+ return 0;
+
+ /* Read actual speed from vendor register. */
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_PHYSR);
+ if (val < 0)
+ return val;
+
+ rtlgen_decode_speed(phydev, val);
+
return 0;
}

View File

@@ -0,0 +1,48 @@
From 2d9ce64862705b33397d54dafecc5f51d8b1bb06 Mon Sep 17 00:00:00 2001
From: Eric Woudstra <ericwouds@gmail.com>
Date: Tue, 9 Apr 2024 09:30:15 +0200
Subject: [PATCH] net: phy: realtek: add rtl822x_c45_get_features() to set
supported port
Sets ETHTOOL_LINK_MODE_TP_BIT in phydev->supported.
Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -843,6 +843,14 @@ static int rtl822xb_read_status(struct p
return 0;
}
+static int rtl822x_c45_get_features(struct phy_device *phydev)
+{
+ linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+ phydev->supported);
+
+ return genphy_c45_pma_read_abilities(phydev);
+}
+
static int rtl822x_c45_config_aneg(struct phy_device *phydev)
{
bool changed = false;
@@ -1272,6 +1280,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
+ .get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
@@ -1293,6 +1302,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
+ .get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,

View File

@@ -1,15 +1,42 @@
From 7f4c9c534aabe1315669e076d3fe0af0fd374cda Mon Sep 17 00:00:00 2001
From patchwork Tue Jul 30 19:25:59 2024
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
X-Patchwork-Id: 13747816
Date: Tue, 30 Jul 2024 20:25:59 +0100
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 May 2024 03:13:19 +0100
Subject: [PATCH 2/9] block: partitions: populate fwnode
To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Jens Axboe <axboe@kernel.dk>,
Daniel Golle <daniel@makrotopia.org>, Christian Brauner <brauner@kernel.org>,
Al Viro <viro@zeniv.linux.org.uk>, Li Lingfeng <lilingfeng3@huawei.com>,
Ming Lei <ming.lei@redhat.com>, Christian Heusel <christian@heusel.eu>,
=?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
Chad Monroe <chad.monroe@adtran.com>, Yangyu Chen <cyy@cyyself.name>,
Tianling Shen <cnsztl@immortalwrt.org>, Chuanhong Guo <gch981213@gmail.com>,
Chen Minqiang <ptpt52@gmail.com>, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-block@vger.kernel.org
Subject: [PATCH v5 2/4] block: partitions: populate fwnode
Message-ID:
<3051ac090ad3b3e2f5adb6b67c923261ead729a5.1722365899.git.daniel@makrotopia.org>
References: <cover.1722365899.git.daniel@makrotopia.org>
Precedence: bulk
X-Mailing-List: linux-block@vger.kernel.org
List-Id: <linux-block.vger.kernel.org>
List-Subscribe: <mailto:linux-block+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-block+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Disposition: inline
In-Reply-To: <cover.1722365899.git.daniel@makrotopia.org>
Let block partitions to be represented by a firmware node and hence
allow them to being referenced e.g. for use with blk-nvmem.
Assign matching firmware nodes to block partitions in order to allow
them to be referenced e.g. as NVMEM providers.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
block/partitions/core.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
block/partitions/core.c | 72 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 72 insertions(+)
--- a/block/partitions/core.c
+++ b/block/partitions/core.c
@@ -22,36 +49,70 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#include "check.h"
static int (*const check_part[])(struct parsed_partitions *) = {
@@ -292,6 +294,40 @@ static ssize_t whole_disk_show(struct de
@@ -292,6 +294,74 @@ static ssize_t whole_disk_show(struct de
}
static const DEVICE_ATTR(whole_disk, 0444, whole_disk_show, NULL);
+static bool part_meta_match(const char *attr, const char *member, size_t length)
+{
+ /* check if length of attr exceeds specified maximum length */
+ if (strnlen(attr, length) == length)
+ return false;
+
+ /* return true if strings match */
+ return !strncmp(attr, member, length);
+}
+
+static struct fwnode_handle *find_partition_fwnode(struct block_device *bdev)
+{
+ struct fwnode_handle *fw_parts, *fw_part;
+ struct device *ddev = disk_to_dev(bdev->bd_disk);
+ const char *partname, *uuid;
+ u32 partno;
+ bool got_uuid, got_partname, got_partno;
+
+ fw_parts = device_get_named_child_node(ddev, "partitions");
+ if (!fw_parts)
+ return NULL;
+
+ fwnode_for_each_child_node(fw_parts, fw_part) {
+ if (!fwnode_property_read_string(fw_part, "uuid", &uuid) &&
+ (!bdev->bd_meta_info || strncmp(uuid,
+ bdev->bd_meta_info->uuid,
+ PARTITION_META_INFO_UUIDLTH)))
+ got_uuid = false;
+ got_partname = false;
+ got_partno = false;
+ /*
+ * In case 'uuid' is defined in the partitions firmware node
+ * require partition meta info being present and the specified
+ * uuid to match.
+ */
+ got_uuid = !fwnode_property_read_string(fw_part, "uuid", &uuid);
+ if (got_uuid && (!bdev->bd_meta_info ||
+ !part_meta_match(uuid, bdev->bd_meta_info->uuid,
+ PARTITION_META_INFO_UUIDLTH)))
+ continue;
+
+ if (!fwnode_property_read_string(fw_part, "partname", &partname) &&
+ (!bdev->bd_meta_info || strncmp(partname,
+ bdev->bd_meta_info->volname,
+ PARTITION_META_INFO_VOLNAMELTH)))
+ /*
+ * In case 'partname' is defined in the partitions firmware node
+ * require partition meta info being present and the specified
+ * volname to match.
+ */
+ got_partname = !fwnode_property_read_string(fw_part, "partname",
+ &partname);
+ if (got_partname && (!bdev->bd_meta_info ||
+ !part_meta_match(partname,
+ bdev->bd_meta_info->volname,
+ PARTITION_META_INFO_VOLNAMELTH)))
+ continue;
+
+ if (!fwnode_property_read_u32(fw_part, "partno", &partno) &&
+ bdev->bd_partno != partno)
+ /*
+ * In case 'partno' is defined in the partitions firmware node
+ * the specified partno needs to match.
+ */
+ got_partno = !fwnode_property_read_u32(fw_part, "partno", &partno);
+ if (got_partno && bdev->bd_partno != partno)
+ continue;
+
+ /* Skip if no matching criteria is present in firmware node */
+ if (!got_uuid && !got_partname && !got_partno)
+ continue;
+
+ return fw_part;
@@ -63,7 +124,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/*
* Must be called either with open_mutex held, before a disk can be opened or
* after all disk users are gone.
@@ -374,6 +410,8 @@ static struct block_device *add_partitio
@@ -374,6 +444,8 @@ static struct block_device *add_partitio
goto out_put;
}

View File

@@ -1,7 +1,34 @@
From e07ace307ce598847074a096f408bec0e3a392ed Mon Sep 17 00:00:00 2001
From patchwork Tue Jul 30 19:26:42 2024
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
X-Patchwork-Id: 13747817
Date: Tue, 30 Jul 2024 20:26:42 +0100
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 May 2024 03:14:34 +0100
Subject: [PATCH 3/9] block: add support for notifications
To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Jens Axboe <axboe@kernel.dk>,
Daniel Golle <daniel@makrotopia.org>, Christian Brauner <brauner@kernel.org>,
Al Viro <viro@zeniv.linux.org.uk>, Li Lingfeng <lilingfeng3@huawei.com>,
Ming Lei <ming.lei@redhat.com>, Christian Heusel <christian@heusel.eu>,
=?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
Chad Monroe <chad.monroe@adtran.com>, Yangyu Chen <cyy@cyyself.name>,
Tianling Shen <cnsztl@immortalwrt.org>, Chuanhong Guo <gch981213@gmail.com>,
Chen Minqiang <ptpt52@gmail.com>, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-block@vger.kernel.org
Subject: [PATCH v5 3/4] block: add support for notifications
Message-ID:
<ca0022886e8f211a323a716653a1396a3bc91653.1722365899.git.daniel@makrotopia.org>
References: <cover.1722365899.git.daniel@makrotopia.org>
Precedence: bulk
X-Mailing-List: linux-block@vger.kernel.org
List-Id: <linux-block.vger.kernel.org>
List-Subscribe: <mailto:linux-block+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-block+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Disposition: inline
In-Reply-To: <cover.1722365899.git.daniel@makrotopia.org>
Add notifier block to notify other subsystems about the addition or
removal of block devices.
@@ -10,9 +37,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
block/Kconfig | 6 +++
block/Makefile | 1 +
block/blk-notify.c | 88 ++++++++++++++++++++++++++++++++++++++++++
include/linux/blkdev.h | 8 ++++
4 files changed, 103 insertions(+)
block/blk-notify.c | 87 ++++++++++++++++++++++++++++++++++++++++++
include/linux/blkdev.h | 11 ++++++
4 files changed, 105 insertions(+)
create mode 100644 block/blk-notify.c
--- a/block/Kconfig
@@ -39,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+obj-$(CONFIG_BLOCK_NOTIFIERS) += blk-notify.o
--- /dev/null
+++ b/block/blk-notify.c
@@ -0,0 +1,88 @@
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Notifiers for addition and removal of block devices
@@ -97,7 +124,6 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ list_add_tail(&new_blkdev->list, &blk_devices);
+ raw_notifier_call_chain(&blk_notifier_list, BLK_DEVICE_ADD, dev);
+ mutex_unlock(&blk_notifier_lock);
+
+ return 0;
+}
+
@@ -130,16 +156,19 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+device_initcall(blk_notifications_init);
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -1564,4 +1564,12 @@ struct io_comp_batch {
@@ -1564,4 +1564,15 @@ struct io_comp_batch {
#define DEFINE_IO_COMP_BATCH(name) struct io_comp_batch name = { }
+
+#ifdef CONFIG_BLOCK_NOTIFIERS
+#define BLK_DEVICE_ADD 1
+#define BLK_DEVICE_REMOVE 2
+#if defined(CONFIG_BLOCK_NOTIFIERS)
+void blk_register_notify(struct notifier_block *nb);
+void blk_unregister_notify(struct notifier_block *nb);
+#else
+static inline void blk_register_notify(struct notifier_block *nb) { };
+static inline void blk_unregister_notify(struct notifier_block *nb) { };
+#endif
+
#endif /* _LINUX_BLKDEV_H */

View File

@@ -1,7 +1,34 @@
From f4487fa1cb7e55b3c17a33f41b9c9d66f4f853b7 Mon Sep 17 00:00:00 2001
From patchwork Tue Jul 30 19:27:07 2024
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
X-Patchwork-Id: 13747818
Date: Tue, 30 Jul 2024 20:27:07 +0100
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 May 2024 03:14:49 +0100
Subject: [PATCH 4/9] block: add new genhd flag GENHD_FL_NVMEM
To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Jens Axboe <axboe@kernel.dk>,
Daniel Golle <daniel@makrotopia.org>, Christian Brauner <brauner@kernel.org>,
Al Viro <viro@zeniv.linux.org.uk>, Li Lingfeng <lilingfeng3@huawei.com>,
Ming Lei <ming.lei@redhat.com>, Christian Heusel <christian@heusel.eu>,
=?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
Chad Monroe <chad.monroe@adtran.com>, Yangyu Chen <cyy@cyyself.name>,
Tianling Shen <cnsztl@immortalwrt.org>, Chuanhong Guo <gch981213@gmail.com>,
Chen Minqiang <ptpt52@gmail.com>, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-block@vger.kernel.org
Subject: [PATCH v5 4/4] block: add new genhd flag GENHD_FL_NVMEM
Message-ID:
<311ea569c23ce14e2896cd3b069dc494c58c49c2.1722365899.git.daniel@makrotopia.org>
References: <cover.1722365899.git.daniel@makrotopia.org>
Precedence: bulk
X-Mailing-List: linux-block@vger.kernel.org
List-Id: <linux-block.vger.kernel.org>
List-Subscribe: <mailto:linux-block+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-block+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Disposition: inline
In-Reply-To: <cover.1722365899.git.daniel@makrotopia.org>
Add new flag to destinguish block devices which may act as an NVMEM
provider.

View File

@@ -1,106 +0,0 @@
From ace6abaa0f9203083fe4c0a6a74da2d96410b625 Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Sat, 13 Aug 2022 12:49:33 +0200
Subject: [PATCH 01/10] net: phy: realtek: rtl8221: allow to configure SERDES
mode
The rtl8221 supports multiple SERDES modes:
- SGMII
- 2500base-x
- HiSGMII
Further it supports rate adaption on SERDES links to allow
slow ethernet speeds (10/100/1000mbit) to work on 2500base-x/HiSGMII
links without reducing the SERDES speed.
When operating without rate adapters the SERDES link will follow the
ethernet speed.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/net/phy/realtek.c | 48 +++++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -54,6 +54,15 @@
RTL8201F_ISR_LINK)
#define RTL8201F_IER 0x13
+#define RTL8221B_MMD_SERDES_CTRL MDIO_MMD_VEND1
+#define RTL8221B_MMD_PHY_CTRL MDIO_MMD_VEND2
+#define RTL8221B_SERDES_OPTION 0x697a
+#define RTL8221B_SERDES_OPTION_MODE_MASK GENMASK(5, 0)
+#define RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII 0
+#define RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII 1
+#define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2
+#define RTL8221B_SERDES_OPTION_MODE_HISGMII 3
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -879,6 +888,48 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
+static int rtl8221b_config_init(struct phy_device *phydev)
+{
+ u16 option_mode;
+
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_2500BASEX:
+ if (!phydev->is_c45) {
+ option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX;
+ break;
+ }
+ fallthrough;
+ case PHY_INTERFACE_MODE_SGMII:
+ option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII;
+ break;
+ default:
+ return 0;
+ }
+
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL,
+ 0x75f3, 0);
+
+ phy_modify_mmd_changed(phydev, RTL8221B_MMD_SERDES_CTRL,
+ RTL8221B_SERDES_OPTION,
+ RTL8221B_SERDES_OPTION_MODE_MASK, option_mode);
+ switch (option_mode) {
+ case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII:
+ case RTL8221B_SERDES_OPTION_MODE_2500BASEX:
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503);
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd455);
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020);
+ break;
+ case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII:
+ case RTL8221B_SERDES_OPTION_MODE_HISGMII:
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503);
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd433);
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020);
+ break;
+ }
+
+ return 0;
+}
+
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -1033,6 +1084,7 @@ static struct phy_driver realtek_drvs[]
PHY_ID_MATCH_EXACT(0x001cc849),
.name = "RTL8221B-VB-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
+ .config_init = rtl8221b_config_init,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
@@ -1044,6 +1096,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VM-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
+ .config_init = rtl8221b_config_init,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,

View File

@@ -1,61 +0,0 @@
From 312753d0aadba0f58841ae513b80fdbabc887523 Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Wed, 8 Feb 2023 16:32:18 +0800
Subject: [PATCH] net: phy: realtek: support switching between SGMII and
2500BASE-X for RTL822x series
After commit ace6aba ("net: phy: realtek: rtl8221: allow to configure
SERDES mode"), the rtl8221 phy can work in SGMII and 2500base-x modes
respectively. So add interface automatic switching for rtl8221 phy to
match various wire speeds.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---
drivers/net/phy/realtek.c | 26 ++++++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -714,6 +714,25 @@ static int rtl822x_config_aneg(struct ph
return __genphy_config_aneg(phydev, ret);
}
+static void rtl822x_update_interface(struct phy_device *phydev)
+{
+ /* Automatically switch SERDES interface between
+ * SGMII and 2500-BaseX according to speed.
+ */
+ switch (phydev->speed) {
+ case SPEED_2500:
+ phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+ break;
+ case SPEED_1000:
+ case SPEED_100:
+ case SPEED_10:
+ phydev->interface = PHY_INTERFACE_MODE_SGMII;
+ break;
+ default:
+ break;
+ }
+}
+
static int rtl822x_read_status(struct phy_device *phydev)
{
int ret;
@@ -732,11 +751,14 @@ static int rtl822x_read_status(struct ph
phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL);
}
- ret = genphy_read_status(phydev);
+ ret = rtlgen_read_status(phydev);
if (ret < 0)
return ret;
- return rtlgen_get_speed(phydev);
+ if (phydev->is_c45 && phydev->link)
+ rtl822x_update_interface(phydev);
+
+ return 0;
}
static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)

View File

@@ -15,51 +15,67 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1070,6 +1070,7 @@ static struct phy_driver realtek_drvs[]
.write_page = rtl821x_write_page,
.read_mmd = rtl822x_read_mmd,
.write_mmd = rtl822x_write_mmd,
@@ -1218,6 +1218,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
+ .soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
@@ -1230,6 +1231,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc840),
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
@@ -1082,6 +1083,7 @@ static struct phy_driver realtek_drvs[]
.write_page = rtl821x_write_page,
.read_mmd = rtl822x_read_mmd,
.write_mmd = rtl822x_write_mmd,
+ .soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1244,6 +1246,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
@@ -1092,6 +1094,7 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
+ .soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
@@ -1254,6 +1257,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -1102,6 +1105,7 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
+ .soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1266,6 +1270,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc849),
.name = "RTL8221B-VB-CG 2.5Gbps PHY",
@@ -1113,6 +1117,7 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+ .soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1278,6 +1283,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc84a),
.name = "RTL8221B-VM-CG 2.5Gbps PHY",
@@ -1124,6 +1129,7 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ .soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
@@ -1288,6 +1294,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc961),
.name = "RTL8366RB Gigabit Ethernet",
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+ .soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1300,6 +1307,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ .soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,

View File

@@ -1,7 +1,8 @@
From 2b1b8c4c215af7988136401c902338d091d408a1 Mon Sep 17 00:00:00 2001
From d54ef6aea00e7a6ace439baade6ad0aa38ee4b04 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Mon, 3 Apr 2023 01:21:57 +0300
Subject: [PATCH 2/2] net: phy: realtek: disable SGMII in-band AN for 2.5G PHYs
Subject: [PATCH 287/326] net: phy: realtek: disable SGMII in-band AN for 2.5G
PHYs
MAC drivers don't use SGMII in-band autonegotiation unless told to do so
in device tree using 'managed = "in-band-status"'. When using MDIO to
@@ -14,30 +15,49 @@ Reported-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
Tested-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek.c | 8 ++++++++
1 file changed, 8 insertions(+)
drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++--
1 file changed, 25 insertions(+), 2 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -913,6 +913,7 @@ static irqreturn_t rtl9000a_handle_inter
static int rtl8221b_config_init(struct phy_device *phydev)
@@ -682,8 +682,8 @@ static int rtl822x_write_mmd(struct phy_
static int rtl822xb_config_init(struct phy_device *phydev)
{
u16 option_mode;
+ int val;
bool has_2500, has_sgmii;
+ int ret, val;
u16 mode;
- int ret;
switch (phydev->interface) {
case PHY_INTERFACE_MODE_2500BASEX:
@@ -949,6 +950,13 @@ static int rtl8221b_config_init(struct p
break;
}
has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
phydev->host_interfaces) ||
@@ -733,7 +733,29 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
+ /* Disable SGMII AN */
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7588, 0x2);
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7589, 0x71d0);
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7587, 0x3);
+ phy_read_mmd_poll_timeout(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7587,
+ val, !(val & BIT(0)), 500, 100000, false);
- return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
+ if (ret < 0)
+ return ret;
+
return 0;
+ /* Disable SGMII AN */
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7589, 0x71d0);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7587, 0x3);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, 0x7587,
+ val, !(val & BIT(0)), 500, 100000, false);
+ if (ret < 0)
+ return ret;
+
+ return 0;
}
static int rtl822xb_get_rate_matching(struct phy_device *phydev,

View File

@@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -765,9 +765,11 @@ static bool rtlgen_supports_2_5gbps(stru
@@ -948,9 +948,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;
@@ -31,5 +31,5 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ rtl821x_write_page(phydev, 0);
+ mutex_unlock(&phydev->mdio.bus->mdio_lock);
return val >= 0 && val & RTL_SUPPORTS_2500FULL;
return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
}

View File

@@ -14,47 +14,13 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -69,10 +69,6 @@
#define RTL_SUPPORTS_5000FULL BIT(14)
#define RTL_SUPPORTS_2500FULL BIT(13)
#define RTL_SUPPORTS_10000FULL BIT(0)
-#define RTL_ADV_2500FULL BIT(7)
-#define RTL_LPADV_10000FULL BIT(11)
-#define RTL_LPADV_5000FULL BIT(6)
-#define RTL_LPADV_2500FULL BIT(5)
@@ -806,7 +806,8 @@ static int rtl822x_config_aneg(struct ph
#define RTL9000A_GINMR 0x14
#define RTL9000A_GINMR_LINK_STATUS BIT(4)
@@ -699,14 +695,11 @@ static int rtl822x_config_aneg(struct ph
int ret = 0;
if (phydev->autoneg == AUTONEG_ENABLE) {
- u16 adv2500 = 0;
-
- if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- phydev->advertising))
- adv2500 = RTL_ADV_2500FULL;
-
ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
- RTL_ADV_2500FULL, adv2500);
+ MDIO_AN_10GBT_CTRL_ADV10G |
MDIO_AN_10GBT_CTRL_ADV2_5G |
- MDIO_AN_10GBT_CTRL_ADV5G,
+ MDIO_AN_10GBT_CTRL_ADV5G |
+ MDIO_AN_10GBT_CTRL_ADV2_5G,
+ linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising));
+ MDIO_AN_10GBT_CTRL_ADV10G,
adv);
if (ret < 0)
return ret;
}
@@ -743,12 +736,7 @@ static int rtl822x_read_status(struct ph
if (lpadv < 0)
return lpadv;
- linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
- phydev->lp_advertising, lpadv & RTL_LPADV_10000FULL);
- linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
- phydev->lp_advertising, lpadv & RTL_LPADV_5000FULL);
- linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
- phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL);
+ mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
}
ret = rtlgen_read_status(phydev);

View File

@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -736,6 +736,10 @@ static int rtl822x_read_status(struct ph
@@ -846,6 +846,10 @@ static int rtl822x_read_status(struct ph
if (lpadv < 0)
return lpadv;
@@ -23,6 +23,6 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ !(lpadv & MDIO_AN_10GBT_STAT_LOCOK))
+ lpadv = 0;
+
mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising,
lpadv);
}

View File

@@ -13,9 +13,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -63,6 +63,10 @@
#define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2
#define RTL8221B_SERDES_OPTION_MODE_HISGMII 3
@@ -73,6 +73,10 @@
#define RTL822X_VND2_PHYSR 0xa434
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
@@ -24,8 +24,8 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -778,6 +782,25 @@ static int rtl8226_match_phy_device(stru
rtlgen_supports_2_5gbps(phydev);
@@ -1003,6 +1007,25 @@ static int rtl8221b_vn_cg_c45_match_phy_
return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
}
+static int rtl822x_probe(struct phy_device *phydev)
@@ -33,7 +33,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ struct device *dev = &phydev->mdio.dev;
+ int val;
+
+ val = phy_read_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1);
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
+ if (val < 0)
+ return val;
+
@@ -42,7 +42,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ else
+ val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+
+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1, val);
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
+
+ return 0;
+}
@@ -50,35 +50,51 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
@@ -1091,6 +1114,7 @@ static struct phy_driver realtek_drvs[]
@@ -1275,6 +1298,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
+ .probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
+ .probe = rtl822x_probe,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
@@ -1102,6 +1126,7 @@ static struct phy_driver realtek_drvs[]
@@ -1286,6 +1310,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+ .probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1299,6 +1324,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+ .probe = rtl822x_probe,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
@@ -1114,6 +1139,7 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_init = rtl8221b_config_init,
.config_aneg = rtl822x_config_aneg,
+ .probe = rtl822x_probe,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
@@ -1126,6 +1152,7 @@ static struct phy_driver realtek_drvs[]
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl8221b_config_init,
@@ -1312,6 +1338,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ .probe = rtl822x_probe,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
.resume = rtlgen_resume,
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
@@ -1323,6 +1350,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+ .probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1336,6 +1364,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ .probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,

View File

@@ -1,71 +0,0 @@
From 0de82310d2b32e78ff79d42c08b1122a6ede3778 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sun, 30 Apr 2023 00:15:41 +0100
Subject: [PATCH] net: phy: realtek: detect early version of RTL8221B
Early versions (?) of the RTL8221B PHY cannot be identified in a regular
Clause-45 bus scan as the PHY doesn't report the implemented MMDs
correctly but returns 0 instead.
Implement custom identify function using the PKGID instead of iterating
over the implemented MMDs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -81,6 +81,7 @@
#define RTL_GENERIC_PHYID 0x001cc800
#define RTL_8211FVD_PHYID 0x001cc878
+#define RTL_8221B_VB_CG_PHYID 0x001cc849
MODULE_DESCRIPTION("Realtek PHY driver");
MODULE_AUTHOR("Johnson Leung");
@@ -782,6 +783,38 @@ static int rtl8226_match_phy_device(stru
rtlgen_supports_2_5gbps(phydev);
}
+static int rtl8221b_vb_cg_match_phy_device(struct phy_device *phydev)
+{
+ int val;
+ u32 id;
+
+ if (phydev->mdio.bus->read_c45) {
+ val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PKGID1);
+ if (val < 0)
+ return 0;
+
+ id = val << 16;
+ val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PKGID2);
+ if (val < 0)
+ return 0;
+
+ id |= val;
+ } else {
+ val = phy_read(phydev, MII_PHYSID1);
+ if (val < 0)
+ return 0;
+
+ id = val << 16;
+ val = phy_read(phydev, MII_PHYSID2);
+ if (val < 0)
+ return 0;
+
+ id |= val;
+ }
+
+ return (id == RTL_8221B_VB_CG_PHYID);
+}
+
static int rtl822x_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
@@ -1134,7 +1167,7 @@ static struct phy_driver realtek_drvs[]
.write_page = rtl821x_write_page,
.soft_reset = genphy_soft_reset,
}, {
- PHY_ID_MATCH_EXACT(0x001cc849),
+ .match_phy_device = rtl8221b_vb_cg_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_init = rtl8221b_config_init,

View File

@@ -12,15 +12,15 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1010,6 +1010,51 @@ static int rtl8221b_config_init(struct p
return 0;
@@ -1161,6 +1161,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
+static int rtl8221b_ack_interrupt(struct phy_device *phydev)
+{
+ int err;
+
+ err = phy_read_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d4);
+ err = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa4d4);
+
+ return (err < 0) ? err : 0;
+}
@@ -34,9 +34,9 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
+ if (err)
+ return err;
+
+ err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x7ff);
+ err = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xa4d2, 0x7ff);
+ } else {
+ err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x0);
+ err = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xa4d2, 0x0);
+ if (err)
+ return err;
+
@@ -64,12 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -1172,6 +1217,8 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_init = rtl8221b_config_init,
.config_aneg = rtl822x_config_aneg,
@@ -1324,6 +1369,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.read_status = rtl822x_read_status,
.suspend = genphy_suspend,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
@@ -1338,6 +1385,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
@@ -1350,6 +1399,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
@@ -1364,6 +1415,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,

View File

@@ -11,8 +11,7 @@ FEATURES:=rtc usb nand squashfs ramdisk
CPU_TYPE:=xscale
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.1
KERNEL_TESTING_PATCHVER:=6.6
KERNEL_PATCHVER:=6.6
include $(INCLUDE_DIR)/target.mk

View File

@@ -1,309 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_CPU_AUTO=y
# CONFIG_ARCH_MULTI_V4 is not set
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
CONFIG_ARCH_MULTI_V5=y
CONFIG_ARCH_MVEBU=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
# CONFIG_ARMADA_37XX_WATCHDOG is not set
# CONFIG_ARMADA_THERMAL is not set
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
# CONFIG_ARM_KIRKWOOD_CPUIDLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_THUMB is not set
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_LEDS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CACHE_FEROCEON_L2=y
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FEROCEON=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FEROCEON=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PM=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_FEROCEON=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_MARVELL=y
CONFIG_CRYPTO_DEV_MARVELL_CESA=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
CONFIG_DEBUG_MVEBU_UART0_ALTERNATE=y
# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
CONFIG_DEBUG_UART_8250=y
CONFIG_DEBUG_UART_8250_SHIFT=2
CONFIG_DEBUG_UART_PHYS=0xf1012000
CONFIG_DEBUG_UART_VIRT=0xfed12000
CONFIG_DMA_OPS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FORCE_PCI=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_MVEBU=y
CONFIG_GRO_CELLS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OMAP=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MV64XXX=y
# CONFIG_I2C_PXA is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KIRKWOOD_CLK=y
CONFIG_KIRKWOOD_THERMAL=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_NETXBIG=y
CONFIG_LEDS_NS2=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_MVEBU_ANY=y
CONFIG_MANGLE_BOOTARGS=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
# CONFIG_MTD_NAND_MARVELL is not set
CONFIG_MTD_NAND_ORION=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MV643XX_ETH=y
CONFIG_MVEBU_CLK_COMMON=y
CONFIG_MVEBU_MBUS=y
CONFIG_MVMDIO=y
# CONFIG_MVNETA is not set
# CONFIG_MVPP2 is not set
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6XXX=y
CONFIG_NET_DSA_TAG_DSA=y
CONFIG_NET_DSA_TAG_DSA_COMMON=y
CONFIG_NET_DSA_TAG_EDSA=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NVMEM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_ORION_IRQCHIP=y
CONFIG_ORION_TIMER=y
CONFIG_ORION_WATCHDOG=y
CONFIG_OUTER_CACHE=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCI_BRIDGE_EMUL=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MVEBU=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
# CONFIG_PHY_MVEBU_A3700_UTMI is not set
# CONFIG_PHY_MVEBU_A38X_COMPHY is not set
CONFIG_PHY_MVEBU_SATA=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_KIRKWOOD=y
CONFIG_PINCTRL_MVEBU=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_SX150X=y
CONFIG_PLAT_ORION=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_LINKSTATION=y
CONFIG_POWER_SUPPLY=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MV=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_SERIAL_MVEBU_UART is not set
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
# CONFIG_SPI_ARMADA_3700 is not set
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_ORION=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SRAM=y
CONFIG_SRAM_EXEC=y
CONFIG_SRCU=y
CONFIG_SWPHY=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_LED_TRIG=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WAN=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@@ -112,9 +112,7 @@ endef
define Device/Default
PROFILES := Default
ifdef CONFIG_LINUX_6_6
DEVICE_DTS_DIR := $(DTS_DIR)/marvell
endif
DEVICE_DTS = kirkwood-$(lastword $(subst _, ,$(1)))
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL := kernel-bin | append-dtb | uImage none

View File

@@ -1,177 +0,0 @@
define Device/checkpoint_l-50
DEVICE_VENDOR := Check Point
DEVICE_MODEL := L-50
DEVICE_PACKAGES := kmod-ath9k kmod-gpio-button-hotplug kmod-mvsdio \
kmod-rtc-s35390a kmod-usb-ledtrig-usbport wpad-basic-mbedtls
IMAGES := sysupgrade.bin
endef
TARGET_DEVICES += checkpoint_l-50
define Device/cisco_on100
DEVICE_VENDOR := Cisco Systems
DEVICE_MODEL := ON100
KERNEL_SIZE := 5376k
KERNEL_IN_UBI :=
UBINIZE_OPTS := -E 5
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi
DEVICE_PACKAGES := kmod-mvsdio kmod-rtc-mv
SUPPORTED_DEVICES += on100
endef
TARGET_DEVICES += cisco_on100
define Device/cloudengines_pogoe02
DEVICE_VENDOR := Cloud Engines
DEVICE_MODEL := Pogoplug E02
DEVICE_DTS := kirkwood-pogo_e02
DEVICE_PACKAGES := kmod-rtc-mv
SUPPORTED_DEVICES += pogo_e02
endef
TARGET_DEVICES += cloudengines_pogoe02
define Device/cloudengines_pogoplugv4
DEVICE_VENDOR := Cloud Engines
DEVICE_MODEL := Pogoplug V4
DEVICE_DTS := kirkwood-pogoplug-series-4
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-mvsdio kmod-usb3 \
kmod-gpio-button-hotplug kmod-rtc-mv
endef
TARGET_DEVICES += cloudengines_pogoplugv4
define Device/ctera_c200-v1
DEVICE_VENDOR := Ctera
DEVICE_MODEL := C200
DEVICE_VARIANT := V1
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-gpio-button-hotplug \
kmod-hwmon-lm63 kmod-rtc-s35390a kmod-usb-ledtrig-usbport
KERNEL := kernel-bin | append-dtb | uImage none | ctera-firmware
KERNEL_IN_UBI :=
KERNEL_SUFFIX := -factory.firm
IMAGES := sysupgrade.bin
endef
TARGET_DEVICES += ctera_c200-v1
define Device/endian_4i-edge-200
DEVICE_VENDOR := Endian
DEVICE_MODEL := 4i Edge 200
DEVICE_ALT0_VENDOR := Endian
DEVICE_ALT0_MODEL := UTM Mini Firewall
DEVICE_PACKAGES := kmod-ath9k kmod-mvsdio wpad-basic-mbedtls kmod-rtc-mv
KERNEL_SIZE := 4096k
IMAGES := sysupgrade.bin
endef
TARGET_DEVICES += endian_4i-edge-200
define Device/globalscale_sheevaplug
DEVICE_VENDOR := Globalscale
DEVICE_MODEL := Sheevaplug
DEVICE_PACKAGES := kmod-mvsdio kmod-rtc-mv
endef
TARGET_DEVICES += globalscale_sheevaplug
define Device/iom_iconnect-1.1
DEVICE_VENDOR := Iomega
DEVICE_MODEL := Iconnect
DEVICE_PACKAGES := kmod-rtc-mv
DEVICE_DTS := kirkwood-iconnect
SUPPORTED_DEVICES += iconnect
endef
TARGET_DEVICES += iom_iconnect-1.1
define Device/iptime_nas1
DEVICE_VENDOR := ipTIME
DEVICE_MODEL := NAS1
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 \
kmod-gpio-button-hotplug kmod-gpio-pca953x kmod-hwmon-drivetemp \
kmod-hwmon-gpiofan kmod-usb-ledtrig-usbport kmod-rtc-mv kmod-thermal \
-uboot-envtools
KERNEL := $$(KERNEL) | iptime-naspkg nas1
BLOCKSIZE := 256k
IMAGE_SIZE := 15872k
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | \
check-size | append-metadata
endef
TARGET_DEVICES += iptime_nas1
define Device/netgear_readynas-duo-v2
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := ReadyNAS Duo
DEVICE_VARIANT := v2
DEVICE_DTS := kirkwood-netgear_readynas_duo_v2
KERNEL_IN_UBI :=
IMAGES := sysupgrade.bin
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 \
kmod-gpio-button-hotplug kmod-hwmon-g762 kmod-rtc-rs5c372a kmod-usb3
endef
TARGET_DEVICES += netgear_readynas-duo-v2
define Device/raidsonic_ib-nas62x0
DEVICE_VENDOR := RaidSonic
DEVICE_MODEL := ICY BOX IB-NAS62x0
DEVICE_DTS := kirkwood-ib62x0
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-rtc-mv
SUPPORTED_DEVICES += ib62x0
endef
TARGET_DEVICES += raidsonic_ib-nas62x0
define Device/seagate_blackarmor-nas220
DEVICE_VENDOR := Seagate
DEVICE_MODEL := Blackarmor NAS220
DEVICE_PACKAGES := kmod-hwmon-adt7475 kmod-fs-ext4 kmod-ata-marvell-sata \
mdadm kmod-gpio-button-hotplug kmod-rtc-mv
PAGESIZE := 512
SUBPAGESIZE := 256
BLOCKSIZE := 16k
UBINIZE_OPTS := -e 1
endef
TARGET_DEVICES += seagate_blackarmor-nas220
define Device/seagate_dockstar
DEVICE_VENDOR := Seagate
DEVICE_MODEL := FreeAgent Dockstar
DEVICE_PACKAGES := kmod-rtc-mv
SUPPORTED_DEVICES += dockstar
endef
TARGET_DEVICES += seagate_dockstar
define Device/seagate_goflexnet
DEVICE_VENDOR := Seagate
DEVICE_MODEL := GoFlexNet
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-rtc-mv
SUPPORTED_DEVICES += goflexnet
endef
TARGET_DEVICES += seagate_goflexnet
define Device/seagate_goflexhome
DEVICE_VENDOR := Seagate
DEVICE_MODEL := GoFlexHome
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-rtc-mv
SUPPORTED_DEVICES += goflexhome
endef
TARGET_DEVICES += seagate_goflexhome
define Device/zyxel_nsa310b
DEVICE_VENDOR := ZyXEL
DEVICE_MODEL := NSA310b
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-r8169 kmod-fs-ext4 \
kmod-gpio-button-hotplug kmod-hwmon-lm85 kmod-rtc-mv
SUPPORTED_DEVICES += nsa310b
endef
TARGET_DEVICES += zyxel_nsa310b
define Device/zyxel_nsa310s
DEVICE_VENDOR := ZyXEL
DEVICE_MODEL := NSA310S
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-gpio-button-hotplug
endef
TARGET_DEVICES += zyxel_nsa310s
define Device/zyxel_nsa325
DEVICE_VENDOR := ZyXEL
DEVICE_MODEL := NSA325
DEVICE_VARIANT := v1/v2
DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 \
kmod-gpio-button-hotplug kmod-rtc-pcf8563 kmod-usb3
SUPPORTED_DEVICES += nsa325
endef
TARGET_DEVICES += zyxel_nsa325

View File

@@ -1,301 +0,0 @@
From e977a103840c57d72b52cbc8c17f87f86ef9aa8d Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sat, 29 Oct 2022 22:57:38 +0200
Subject: [PATCH] ARM: dts: kirkwood: Add Zyxel NSA310S board
Zyxel NSA310S is a NAS based on Marvell kirkwood SoC.
Specification:
- Processor Marvell 88F6702 1 GHz
- 256MB RAM
- 128MB NAND
- 1x GBE LAN port (PHY: Marvell 88E1318)
- 2x USB 2.0
- 1x SATA
- 3x button
- 7x leds
- serial on J1 connector (115200 8N1) (GND-NOPIN-RX-TX-VCC)
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Acked-by: Adam Baker <linux@baker-net.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/kirkwood-nsa310s.dts | 259 +++++++++++++++++++++++++
2 files changed, 260 insertions(+)
create mode 100644 arch/arm/boot/dts/kirkwood-nsa310s.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -356,6 +356,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-ns2mini.dtb \
kirkwood-nsa310.dtb \
kirkwood-nsa310a.dtb \
+ kirkwood-nsa310s.dtb \
kirkwood-nsa320.dtb \
kirkwood-nsa325.dtb \
kirkwood-openblocks_a6.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-nsa310s.dts
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * ZyXEL NSA310S Board Description
+ * Copyright 2020-2022 Pawel Dembicki <paweldembicki@gmail.com>
+ * Copyright (c) 2015-2021, Tony Dinh <mibodhi@gmail.com>
+ * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
+ * Based upon the board setup file created by Peter Schildmann
+ */
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "ZyXEL NSA310S";
+ compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ stdout-path = &uart0;
+ };
+
+ gpio_poweroff {
+ compatible = "gpio-poweroff";
+ pinctrl-0 = <&pmx_pwr_off>;
+ pinctrl-names = "default";
+ gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pmx_buttons>;
+ pinctrl-names = "default";
+
+ power {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+ };
+
+ copy {
+ label = "Copy Button";
+ linux,code = <KEY_COPY>;
+ gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_leds>;
+ pinctrl-names = "default";
+
+ led-1 {
+ function = LED_FUNCTION_DISK_ERR;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-2 {
+ function = LED_FUNCTION_USB;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "usb-host";
+ };
+
+ led-3 {
+ function = LED_FUNCTION_DISK;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "ata1";
+ };
+
+ led-4 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-5 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-6 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+
+ led-7 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ usb0_power: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "USB Power";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata1_power: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "SATA1 Power";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ thermal-zones {
+ disk-thermal {
+ polling-delay = <20000>;
+ polling-delay-passive = <2000>;
+
+ thermal-sensors = <&hdd_temp>;
+
+ trips {
+ disk_alert: disk-alert {
+ temperature = <40000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ disk_crit: disk-crit {
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
+
+&eth0 {
+ status = "okay";
+
+ ethernet0-port@0 {
+ phy-handle = <&ethphy0>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ rtc@68 {
+ compatible = "htk,ht1382";
+ reg = <0x68>;
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ phy-mode = "rgmii-id";
+ marvell,reg-init = <0x1 0x16 0x0 0x3>,
+ <0x1 0x10 0x0 0x1017>,
+ <0x1 0x11 0x0 0x4408>,
+ <0x1 0x16 0x0 0x0>;
+ };
+};
+
+&nand {
+ status = "okay";
+ chip-delay = <35>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0000000 0x00c0000>;
+ read-only;
+ };
+ partition@c0000 {
+ label = "uboot_env";
+ reg = <0x00c0000 0x0080000>;
+ };
+ partition@140000 {
+ label = "ubi";
+ reg = <0x0140000 0x7ec0000>;
+ };
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+
+ pmx_buttons: pmx-buttons {
+ marvell,pins = "mpp24", "mpp25", "mpp26";
+ marvell,function = "gpio";
+ };
+
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp13", "mpp15", "mpp16", "mpp22", "mpp23",
+ "mpp28", "mpp29";
+ marvell,function = "gpio";
+ };
+
+ pmx_power: pmx-power {
+ marvell,pins = "mpp21", "mpp33";
+ marvell,function = "gpio";
+ };
+
+ pmx_pwr_off: pmx-pwr-off {
+ marvell,pins = "mpp27";
+ marvell,function = "gpio";
+ };
+};
+
+&rtc {
+ status = "disabled";
+};
+
+&sata {
+ status = "okay";
+ nr-ports = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdd_temp: sata-port@0 {
+ reg = <0>;
+ #thermal-sensor-cells = <0>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@@ -1,249 +0,0 @@
From 5668d088ee4ea05db9daaae0645d1d1f579b20f9 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Mon, 3 Oct 2022 09:34:43 +0200
Subject: ARM: dts: kirkwood: Add Endian 4i Edge 200 board
Add Endian 4i Edge 200 is 5-port firewall.
It have also clone: Endian UTM Mini (The same hardware, with added WLAN
card).
Hardware:
- SoC: Marvell 88F6281-A1 ARMv5TE Processor 1.2GHz
- Ram: 512MB (4x Nanya NT5TU128M8GE-AC)
- NAND Flash: 512MB (Micron 29F4G08AAC)
- Lan 1-4: 4x GBE (Marvell 88E6171R-TFJ2)
- Lan 5: 1x GBE (Marvell 88E1116R-NNC1)
- Storage: MicroSD Slot
- MCPIE: MiniPCIe Slot present [fitted with SparkLan WPEA-110N/E
(Atheros AR9280 chipset) in Endian UTM Mini WLAN only]
- USB: 1x USB 2.0 port
- Console: RJ-45 port
- LEDs: 3x GPIO controlled
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/kirkwood-4i-edge-200.dts | 205 +++++++++++++++++++++++++++++
2 files changed, 206 insertions(+)
create mode 100644 arch/arm/boot/dts/kirkwood-4i-edge-200.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -300,6 +300,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
keystone-k2g-evm.dtb \
keystone-k2g-ice.dtb
dtb-$(CONFIG_MACH_KIRKWOOD) += \
+ kirkwood-4i-edge-200.dtb \
kirkwood-b3.dtb \
kirkwood-blackarmor-nas220.dtb \
kirkwood-c200-v1.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Endian 4i Edge 200 Board Description
+ * Note: Endian UTM Mini is hardware clone of Endian Edge 200
+ * Copyright 2021-2022 Pawel Dembicki <paweldembicki@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Endian 4i Edge 200";
+ compatible = "endian,4i-edge-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ stdout-path = &uart0;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_led>;
+ pinctrl-names = "default";
+
+ led-1 {
+ function = LED_FUNCTION_SD;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ };
+
+ led-2 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-3 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+};
+
+&eth0port {
+ speed = <1000>;
+ duplex = <1>;
+};
+
+&eth1 {
+ status = "okay";
+};
+
+&eth1port {
+ phy-handle = <&ethphyb>;
+};
+
+&mdio {
+ status = "okay";
+
+ ethphyb: ethernet-phy@b {
+ reg = <0x0b>;
+
+ marvell,reg-init =
+ /* link-activity, bi-color mode 4 */
+ <3 0x10 0xfff0 0xf>; /* Reg 3,16 <- 0xzzzf */
+ };
+
+ switch0: switch@11 {
+ compatible = "marvell,mv88e6085";
+ reg = <0x11>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "port1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "port2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "port3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "port4";
+ };
+
+ port@5 {
+ reg = <5>;
+ phy-mode = "rgmii-id";
+ ethernet = <&eth0port>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&nand {
+ status = "okay";
+ pinctrl-0 = <&pmx_nand>;
+ pinctrl-names = "default";
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x00000000 0x000a0000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "u-boot-env";
+ reg = <0x000a0000 0x00060000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "kernel";
+ reg = <0x00100000 0x00400000>;
+ };
+
+ partition@500000 {
+ label = "ubi";
+ reg = <0x00500000 0x1fb00000>;
+ };
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-0 = <&pmx_sysrst>;
+ pinctrl-names = "default";
+
+ pmx_sysrst: pmx-sysrst {
+ marvell,pins = "mpp6";
+ marvell,function = "sysrst";
+ };
+
+ pmx_sdio_cd: pmx-sdio-cd {
+ marvell,pins = "mpp28";
+ marvell,function = "gpio";
+ };
+
+ pmx_led: pmx-led {
+ marvell,pins = "mpp34", "mpp35", "mpp49";
+ marvell,function = "gpio";
+ };
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sata_phy0 {
+ status = "disabled";
+};
+
+&sata_phy1 {
+ status = "disabled";
+};
+
+&sdio {
+ pinctrl-0 = <&pmx_sdio_cd>;
+ pinctrl-names = "default";
+ status = "okay";
+ cd-gpios = <&gpio0 28 9>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};

View File

@@ -1,108 +0,0 @@
From 8aea8659a5f3ae8dc63c9f632ce1f676a1483556 Mon Sep 17 00:00:00 2001
From: Andrew Lunn <andrew@lunn.ch>
Date: Fri, 7 Apr 2023 17:17:20 +0200
Subject: [PATCH] ARM: dts: kirkwood: Add missing phy-mode and fixed links
The DSA framework has got more picky about always having a phy-mode
for the CPU port. The Kirkwood Ethernet is an RGMII port. Set the
switch to impose the RGMII delays.
Additionally, the cpu label has never actually been used in the
binding, so remove it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/kirkwood-dir665.dts | 3 ++-
arch/arm/boot/dts/kirkwood-l-50.dts | 2 +-
arch/arm/boot/dts/kirkwood-linksys-viper.dts | 3 ++-
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 3 ++-
arch/arm/boot/dts/kirkwood-rd88f6281.dtsi | 2 +-
5 files changed, 8 insertions(+), 5 deletions(-)
--- a/arch/arm/boot/dts/kirkwood-dir665.dts
+++ b/arch/arm/boot/dts/kirkwood-dir665.dts
@@ -232,7 +232,7 @@
port@6 {
reg = <6>;
- label = "cpu";
+ phy-mode = "rgmii-id";
ethernet = <&eth0port>;
fixed-link {
speed = <1000>;
@@ -251,6 +251,7 @@
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;
+ phy-mode = "rgmii";
};
};
--- a/arch/arm/boot/dts/kirkwood-l-50.dts
+++ b/arch/arm/boot/dts/kirkwood-l-50.dts
@@ -254,7 +254,6 @@
port@6 {
reg = <6>;
- label = "cpu";
phy-mode = "rgmii-id";
ethernet = <&eth1port>;
fixed-link {
@@ -330,6 +329,7 @@
ethernet1-port@0 {
speed = <1000>;
duplex = <1>;
+ phy-mode = "rgmii";
};
};
--- a/arch/arm/boot/dts/kirkwood-linksys-viper.dts
+++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
@@ -198,7 +198,7 @@
port@5 {
reg = <5>;
- label = "cpu";
+ phy-mode = "rgmii-id";
ethernet = <&eth0port>;
fixed-link {
speed = <1000>;
@@ -221,6 +221,7 @@
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;
+ phy-mode = "rgmii";
};
};
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -149,7 +149,7 @@
port@5 {
reg = <5>;
- label = "cpu";
+ phy-mode = "rgmii-id";
ethernet = <&eth0port>;
fixed-link {
speed = <1000>;
@@ -166,6 +166,7 @@
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;
+ phy-mode = "rgmii";
};
};
--- a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
@@ -105,7 +105,7 @@
port@5 {
reg = <5>;
- label = "cpu";
+ phy-mode = "rgmii-id";
ethernet = <&eth0port>;
fixed-link {
speed = <1000>;

View File

@@ -1,53 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -6,7 +6,14 @@
/ {
model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ compatible = "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ aliases {
+ led-boot = &led_green_os;
+ led-failsafe = &led_red_os;
+ led-running = &led_green_os;
+ led-upgrade = &led_red_os;
+ };
memory {
device_type = "memory";
@@ -81,12 +88,12 @@
&pmx_led_usb_transfer>;
pinctrl-names = "default";
- green-os {
+ led_green_os: green-os {
label = "ib62x0:green:os";
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
- red-os {
+ led_red_os: red-os {
label = "ib62x0:red:os";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
};
@@ -118,13 +125,13 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x600000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@700000 {
- label = "root";
- reg = <0x0700000 0xf900000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0xfe00000>;
};
};

View File

@@ -1,80 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -8,6 +8,13 @@
model = "Iomega Iconnect";
compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_power_blue;
+ led-failsafe = &led_power_red;
+ led-running = &led_power_blue;
+ led-upgrade = &led_power_red;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -16,8 +23,6 @@
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
- linux,initrd-start = <0x4500040>;
- linux,initrd-end = <0x4800000>;
};
ocp@f1000000 {
@@ -89,12 +94,12 @@
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
- power-blue {
+ led_power_blue: power-blue {
label = "power:blue";
gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
- power-red {
+ led_power_red: power-red {
label = "power:red";
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
@@ -146,28 +151,23 @@
status = "okay";
partition@0 {
- label = "uboot";
- reg = <0x0000000 0xc0000>;
+ label = "u-boot";
+ reg = <0x0000000 0xe0000>;
};
- partition@a0000 {
- label = "env";
- reg = <0xa0000 0x20000>;
+ partition@e0000 {
+ label = "u-boot environment";
+ reg = <0xe0000 0x100000>;
};
partition@100000 {
- label = "zImage";
- reg = <0x100000 0x300000>;
- };
-
- partition@540000 {
- label = "initrd";
- reg = <0x540000 0x300000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@980000 {
- label = "boot";
- reg = <0x980000 0x1f400000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0x1fe00000>;
};
};

View File

@@ -1,62 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -8,6 +8,13 @@
model = "Seagate FreeAgent Dockstar";
compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -42,12 +49,12 @@
pinctrl-0 = <&pmx_led_green &pmx_led_orange>;
pinctrl-names = "default";
- health {
+ led_health: health {
label = "status:green:health";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
- fault {
+ led_fault: fault {
label = "status:orange:fault";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
@@ -78,18 +85,22 @@
partition@0 {
label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
+ reg = <0x0000000 0xe0000>;
+ };
+
+ partition@e0000 {
+ label = "u-boot environment";
+ reg = <0xe0000 0x100000>;
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@500000 {
- label = "data";
- reg = <0x0500000 0xfb00000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0xfe00000>;
};
};

View File

@@ -1,71 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -8,6 +8,13 @@
model = "Iomega StorCenter ix2-200";
compatible = "iom,ix2-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_health;
+ led-running = &led_power;
+ led-upgrade = &led_health;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -127,16 +134,16 @@
&pmx_led_rebuild &pmx_led_health >;
pinctrl-names = "default";
- power_led {
+ led_power: power_led {
label = "status:white:power_led";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
rebuild_led {
label = "status:white:rebuild_led";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
};
- health_led {
+ led_health: health_led {
label = "status:red:health_led";
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
};
@@ -186,19 +193,19 @@
};
partition@a0000 {
- label = "env";
+ label = "u-boot environment";
reg = <0xa0000 0x20000>;
read-only;
};
partition@100000 {
- label = "uImage";
- reg = <0x100000 0x300000>;
+ label = "kernel";
+ reg = <0x100000 0x400000>;
};
- partition@400000 {
- label = "rootfs";
- reg = <0x400000 0x1C00000>;
+ partition@500000 {
+ label = "ubi";
+ reg = <0x500000 0x1C00000>;
};
};
@@ -211,7 +218,7 @@
};
&eth0 {
- status = "okay";
+ status = "disabled";
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;

View File

@@ -1,59 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-linksys-viper.dts
+++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
@@ -24,6 +24,10 @@
};
aliases {
+ led-boot = &led_white_health;
+ led-failsafe = &led_white_health;
+ led-running = &led_white_health;
+ led-upgrade = &led_white_health;
serial0 = &uart0;
};
@@ -56,9 +60,10 @@
pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >;
pinctrl-names = "default";
- white-health {
+ led_white_health: white-health {
label = "viper:white:health";
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
};
white-pulse {
@@ -114,23 +119,23 @@
};
partition@200000 {
- label = "kernel";
- reg = <0x200000 0x2A0000>;
+ label = "kernel1";
+ reg = <0x200000 0x1A00000>;
};
- partition@4a0000 {
- label = "rootfs";
- reg = <0x4A0000 0x1760000>;
+ partition@600000 {
+ label = "rootfs1";
+ reg = <0x600000 0x1600000>;
};
partition@1c00000 {
- label = "alt_kernel";
- reg = <0x1C00000 0x2A0000>;
+ label = "kernel2";
+ reg = <0x1C00000 0x1A00000>;
};
- partition@1ea0000 {
- label = "alt_rootfs";
- reg = <0x1EA0000 0x1760000>;
+ partition@2000000 {
+ label = "rootfs2";
+ reg = <0x2000000 0x1600000>;
};
partition@3600000 {

View File

@@ -1,53 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -8,6 +8,13 @@
model = "Seagate GoFlex Net";
compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -85,12 +92,12 @@
>;
pinctrl-names = "default";
- health {
+ led_health: health {
label = "status:green:health";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
- fault {
+ led_fault: fault {
label = "status:orange:fault";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
@@ -159,18 +166,8 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
- };
-
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0xd800000>;
+ label = "ubi";
+ reg = <0x0100000 0x0ff00000>;
};
};

View File

@@ -1,48 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
@@ -112,40 +112,16 @@
partition@0 {
label = "uboot";
- reg = <0x0000000 0x0100000>;
+ reg = <0x0000000 0x00c0000>;
read-only;
};
partition@100000 {
label = "uboot_env";
- reg = <0x0100000 0x0080000>;
+ reg = <0x00c0000 0x0080000>;
};
- partition@180000 {
- label = "key_store";
- reg = <0x0180000 0x0080000>;
- };
- partition@200000 {
- label = "info";
- reg = <0x0200000 0x0080000>;
- };
- partition@280000 {
- label = "etc";
- reg = <0x0280000 0x0a00000>;
- };
- partition@c80000 {
- label = "kernel_1";
- reg = <0x0c80000 0x0a00000>;
- };
- partition@1680000 {
- label = "rootfs1";
- reg = <0x1680000 0x2fc0000>;
- };
- partition@4640000 {
- label = "kernel_2";
- reg = <0x4640000 0x0a00000>;
- };
- partition@5040000 {
- label = "rootfs2";
- reg = <0x5040000 0x2fc0000>;
+ partition@140000 {
+ label = "ubi";
+ reg = <0x0140000 0x7ec0000>;
};
};

View File

@@ -1,54 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-nsa325.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa325.dts
@@ -15,6 +15,13 @@
model = "ZyXEL NSA325";
compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_green_sys;
+ led-failsafe = &led_orange_sys;
+ led-running = &led_green_sys;
+ led-upgrade = &led_orange_sys;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
@@ -162,17 +169,19 @@
&pmx_led_hdd1_green &pmx_led_hdd1_red>;
pinctrl-names = "default";
- green-sys {
+ led_green_sys: green-sys {
label = "nsa325:green:sys";
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
};
- orange-sys {
+ led_orange_sys: orange-sys {
label = "nsa325:orange:sys";
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
green-hdd1 {
label = "nsa325:green:hdd1";
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "ata1";
};
red-hdd1 {
label = "nsa325:red:hdd1";
@@ -181,6 +190,7 @@
green-hdd2 {
label = "nsa325:green:hdd2";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "ata2";
};
red-hdd2 {
label = "nsa325:red:hdd2";
@@ -189,6 +199,7 @@
green-usb {
label = "nsa325:green:usb";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "usb-host";
};
green-copy {
label = "nsa325:green:copy";

View File

@@ -1,87 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
+++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
@@ -18,12 +18,20 @@
compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
"marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
chosen {
+ bootargs = "console=ttyS0,115200";
stdout-path = "uart0:115200n8";
};
@@ -37,8 +45,8 @@
eject {
debounce-interval = <50>;
wakeup-source;
- linux,code = <KEY_EJECTCD>;
- label = "Eject Button";
+ linux,code = <KEY_RESTART>;
+ label = "Reset";
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
};
@@ -48,12 +56,12 @@
pinctrl-0 = <&pmx_led_green &pmx_led_red>;
pinctrl-names = "default";
- health {
+ led_health: health {
label = "pogoplugv4:green:health";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
default-state = "on";
};
- fault {
+ led_fault: fault {
label = "pogoplugv4:red:fault";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
@@ -137,29 +145,19 @@
#size-cells = <1>;
partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x200000>;
+ label = "uboot";
+ reg = <0x00000000 0x1c0000>;
read-only;
};
- partition@200000 {
- label = "uImage";
- reg = <0x00200000 0x300000>;
- };
-
- partition@500000 {
- label = "uImage2";
- reg = <0x00500000 0x300000>;
- };
-
- partition@800000 {
- label = "failsafe";
- reg = <0x00800000 0x800000>;
+ partition@1c0000 {
+ label = "uboot_env";
+ reg = <0x001c0000 0x40000>;
};
- partition@1000000 {
- label = "root";
- reg = <0x01000000 0x7000000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x00200000 0x7e00000>;
};
};
};

View File

@@ -1,68 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-pogo_e02.dts
+++ b/arch/arm/boot/dts/kirkwood-pogo_e02.dts
@@ -20,6 +20,13 @@
compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281",
"marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_fault;
+ led-running = &led_health;
+ led-upgrade = &led_fault;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -33,12 +40,12 @@
gpio-leds {
compatible = "gpio-leds";
- health {
+ led_health: health {
label = "pogo_e02:green:health";
gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
- fault {
+ led_fault: fault {
label = "pogo_e02:orange:fault";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
};
@@ -95,24 +102,24 @@
status = "okay";
partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
+ label = "uboot";
+ reg = <0x0 0xe0000>;
read-only;
};
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
+ partition@e0000 {
+ label = "uboot_env";
+ reg = <0xe0000 0x20000>;
};
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
+ partition@100000 {
+ label = "second_stage_uboot";
+ reg = <0x100000 0x100000>;
};
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0x5b00000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0x7e00000>;
};
};

View File

@@ -1,47 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-l-50.dts
+++ b/arch/arm/boot/dts/kirkwood-l-50.dts
@@ -18,6 +18,13 @@
reg = <0x00000000 0x20000000>;
};
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_red;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
@@ -95,12 +102,12 @@
leds {
compatible = "gpio-leds";
- status_green {
+ led_status_green: status_green {
label = "l-50:green:status";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
- status_red {
+ led_status_red: status_red {
label = "l-50:red:status";
gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
};
@@ -349,13 +356,8 @@
};
partition@100000 {
- label = "kernel-1";
- reg = <0x00100000 0x00800000>;
- };
-
- partition@900000 {
- label = "rootfs-1";
- reg = <0x00900000 0x07100000>;
+ label = "ubi";
+ reg = <0x00100000 0x07900000>;
};
partition@7a00000 {

View File

@@ -1,47 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
@@ -78,13 +78,8 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "root";
- reg = <0x0500000 0x1fb00000>;
+ label = "ubi";
+ reg = <0x0100000 0x1ff00000>;
};
};
--- a/arch/arm/boot/dts/kirkwood-sheevaplug.dts
+++ b/arch/arm/boot/dts/kirkwood-sheevaplug.dts
@@ -13,6 +13,13 @@
model = "Globalscale Technologies SheevaPlug";
compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_health;
+ led-failsafe = &led_health;
+ led-running = &led_health;
+ led-upgrade = &led_health;
+ };
+
ocp@f1000000 {
mvsdio@90000 {
pinctrl-0 = <&pmx_sdio>;
@@ -28,10 +35,10 @@
pinctrl-0 = <&pmx_led_blue &pmx_led_red>;
pinctrl-names = "default";
- health {
+ led_health: health {
label = "sheevaplug:blue:health";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- default-state = "keep";
+ default-state = "on";
};
misc {

View File

@@ -1,76 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
+++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
@@ -19,6 +19,13 @@
reg = <0x00000000 0x10000000>;
};
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
@@ -115,7 +122,7 @@
&pmx_led_blue_backup >;
pinctrl-names = "default";
- power_led {
+ led_power: power_led {
label = "status:blue:power_led";
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
default-state = "keep";
@@ -129,11 +136,13 @@
disk1_led {
label = "status:blue:disk1_led";
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
};
disk2_led {
label = "status:blue:disk2_led";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
};
backup_led {
@@ -150,7 +159,13 @@
power-button {
label = "Power Button";
- linux,code = <KEY_POWER>;
+ /* Power button and INT pin from PHY are both connected
+ * to this GPIO. Every network restart causes PHY restart
+ * and button is pressed. It's difficult to use it as
+ * KEY_POWER without changes in kernel (or netifd) so
+ * the button is configured as regular one.
+ */
+ linux,code = <BTN_1>;
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
@@ -208,18 +223,13 @@
};
partition@200000 {
- label = "uImage";
+ label = "kernel";
reg = <0x0200000 0x600000>;
};
partition@800000 {
- label = "minirootfs";
- reg = <0x0800000 0x1000000>;
- };
-
- partition@1800000 {
- label = "jffs2";
- reg = <0x1800000 0x6800000>;
+ label = "ubi";
+ reg = <0x0800000 0x7800000>;
};
};

View File

@@ -1,58 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-c200-v1.dts
+++ b/arch/arm/boot/dts/kirkwood-c200-v1.dts
@@ -14,6 +14,14 @@
model = "Ctera C200 V1";
compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_red;
+ };
+
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = &uart0;
@@ -78,6 +86,7 @@
function-enumerator = <1>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
};
led-2 {
@@ -85,6 +94,7 @@
function-enumerator = <2>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
};
led-3 {
@@ -94,13 +104,13 @@
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
- led-4 {
+ led_status_red: led-4 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
- led-5 {
+ led_status_green: led-5 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
@@ -240,7 +250,7 @@
};
partition@7a00000 {
- label = "rootfs";
+ label = "ubi";
reg = <0x7a00000 0x8600000>;
};
};

View File

@@ -1,35 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-nsa310s.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310s.dts
@@ -16,6 +16,13 @@
model = "ZyXEL NSA310S";
compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_green_sys;
+ led-failsafe = &led_red_sys;
+ led-running = &led_green_sys;
+ led-upgrade = &led_red_sys;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -96,14 +103,16 @@
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
};
- led-6 {
+ led_green_sys: led-6 {
+ label = "nsa310s:green:sys";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
- led-7 {
+ led_red_sys: led-7 {
+ label = "nsa310s:red:sys";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;

View File

@@ -1,34 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
+++ b/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
@@ -20,6 +20,13 @@
reg = <0x00000000 0x20000000>;
};
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_orange;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_orange;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
@@ -37,13 +44,15 @@
linux,default-trigger = "mmc0";
};
- led-2 {
+ led_status_orange: led-2 {
+ label = "orange:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_AMBER>;
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
};
- led-3 {
+ led_status_green: led-3 {
+ label = "green:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;

View File

@@ -1,10 +0,0 @@
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -375,6 +375,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-rs411.dtb \
kirkwood-sheevaplug.dtb \
kirkwood-sheevaplug-esata.dtb \
+ kirkwood-stora.dtb \
kirkwood-t5325.dtb \
kirkwood-topkick.dtb \
kirkwood-ts219-6281.dtb \

View File

@@ -1,35 +0,0 @@
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -310,6 +310,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-db-88f6282.dtb \
kirkwood-dir665.dtb \
kirkwood-dns320.dtb \
+ kirkwood-dns320l.dtb \
kirkwood-dns325.dtb \
kirkwood-dockstar.dtb \
kirkwood-dreamplug.dtb \
--- a/arch/arm/boot/dts/kirkwood-dns320l.dts
+++ b/arch/arm/boot/dts/kirkwood-dns320l.dts
@@ -32,6 +32,13 @@
reg = <0x00000000 0x10000000>;
};
+ aliases {
+ led-boot = &led_orange_usb;
+ led-failsafe = &led_orange_usb;
+ led-running = &led_orange_usb;
+ led-upgrade = &led_orange_usb;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
@@ -68,7 +75,7 @@
linux,default-trigger = "usbport";
};
- orange-usb {
+ led_orange_usb: orange-usb {
label = "dns320l:usb:orange";
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
};

View File

@@ -1,10 +0,0 @@
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -115,6 +115,7 @@ config MACH_DOVE
config MACH_KIRKWOOD
bool "Marvell Kirkwood boards"
depends on ARCH_MULTI_V5
+ select ARCH_WANT_LIBATA_LEDS
select CPU_FEROCEON
select GPIOLIB
select KIRKWOOD_CLK

View File

@@ -1,62 +0,0 @@
The WRT1900AC among other Linksys routers uses a dual-firmware layout.
Dynamically rename the active partition to "ubi".
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
---
--- a/drivers/mtd/parsers/ofpart_core.c
+++ b/drivers/mtd/parsers/ofpart_core.c
@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d
return of_get_property(pp, "compatible", NULL);
}
+static int mangled_rootblock;
+
static int parse_fixed_partitions(struct mtd_info *master,
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
@@ -47,6 +49,7 @@ static int parse_fixed_partitions(struct
struct mtd_partition *parts;
struct device_node *mtd_node;
struct device_node *ofpart_node;
+ const char *owrtpart = "ubi";
const char *partname;
struct device_node *pp;
int nr_parts, i, ret = 0;
@@ -152,9 +155,15 @@ static int parse_fixed_partitions(struct
parts[i].size = of_read_number(reg + a_cells, s_cells);
parts[i].of_node = pp;
- partname = of_get_property(pp, "label", &len);
- if (!partname)
- partname = of_get_property(pp, "name", &len);
+ if (mangled_rootblock && (i == mangled_rootblock)) {
+ partname = owrtpart;
+ } else {
+ partname = of_get_property(pp, "label", &len);
+
+ if (!partname)
+ partname = of_get_property(pp, "name", &len);
+ }
+
parts[i].name = partname;
if (of_get_property(pp, "read-only", &len))
@@ -271,6 +280,18 @@ static int __init ofpart_parser_init(voi
return 0;
}
+static int __init active_root(char *str)
+{
+ get_option(&str, &mangled_rootblock);
+
+ if (!mangled_rootblock)
+ return 1;
+
+ return 1;
+}
+
+__setup("mangled_rootblock=", active_root);
+
static void __exit ofpart_parser_exit(void)
{
deregister_mtd_parser(&ofpart_parser);

View File

@@ -1,99 +0,0 @@
--- a/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts
+++ b/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts
@@ -17,6 +17,13 @@
compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
"marvell,kirkwood";
+ aliases {
+ led-boot = &led_status_amber;
+ led-failsafe = &led_status_amber;
+ led-running = &led_status_blue;
+ led-upgrade = &led_status_amber;
+ };
+
memory { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
@@ -36,14 +43,14 @@
compatible = "gpio-keys";
reset {
- label = "Reset";
- linux,code = <KEY_POWER>;
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
- button {
- label = "Power";
- linux,code = <KEY_SLEEP>;
+ power {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
};
};
@@ -51,11 +58,27 @@
gpio-leds {
compatible = "gpio-leds";
- blue-power {
+ led_power_blue: power_blue {
label = "nas220:blue:power";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
+
+ disk_blue {
+ label = "nas220:blue:disk";
+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ };
+
+ led_status_blue: status_blue {
+ label = "nas220:blue:status";
+ gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_status_amber: status_amber {
+ label = "nas220:amber:status";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ };
};
regulators {
@@ -153,6 +176,33 @@
&nand {
status = "okay";
+
+ partitions {
+ compatible = "fixed-partitions";
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0xa0000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "uboot-env";
+ reg = <0xa0000 0x10000>;
+ read-only;
+ };
+
+ partition@b0000 {
+ label = "reserved";
+ reg = <0xb0000 0x10000>;
+ read-only;
+ };
+
+ partition@c0000 {
+ label = "ubi";
+ reg = <0xc0000 0x1e80000>;
+ };
+ };
};
&mdio {

View File

@@ -7,8 +7,7 @@ include $(TOPDIR)/rules.mk
BOARD:=layerscape
BOARDNAME:=NXP Layerscape
KERNEL_PATCHVER:=6.1
KERNEL_TESTING_PATCHVER:=6.6
KERNEL_PATCHVER:=6.6
FEATURES:=squashfs nand usb pcie gpio fpu ubifs ext4 rootfs-part boot-part
SUBTARGETS:=armv8_64b armv7

View File

@@ -6,11 +6,7 @@ define Device/Default
PROFILES := Default
FILESYSTEMS := squashfs
IMAGES := firmware.bin sysupgrade.bin
ifdef CONFIG_LINUX_6_1
DEVICE_DTS_DIR := $(DTS_DIR)
else
DEVICE_DTS_DIR := $(DTS_DIR)/nxp/ls
endif
KERNEL := kernel-bin | uImage none
KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := zImage

View File

@@ -1,288 +0,0 @@
From 1bb35ff4ce33e65601c8d9c736be52e4aabd6252 Mon Sep 17 00:00:00 2001
From: Calvin Johnson <calvin.johnson@nxp.com>
Date: Sat, 16 Sep 2017 14:20:23 +0530
Subject: [PATCH] arm64: dts: freescale: ls1012a: update with ppfe support
Update ls1012a dtsi and platform dts files with support for ppfe.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
---
.../boot/dts/freescale/fsl-ls1012a-frdm.dts | 43 +++++++++++++++++
.../boot/dts/freescale/fsl-ls1012a-frwy.dts | 43 +++++++++++++++++
.../boot/dts/freescale/fsl-ls1012a-qds.dts | 43 +++++++++++++++++
.../boot/dts/freescale/fsl-ls1012a-rdb.dts | 47 +++++++++++++++++++
.../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 29 ++++++++++++
5 files changed, 205 insertions(+)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -14,6 +14,11 @@
model = "LS1012A Freedom Board";
compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -95,6 +100,44 @@
};
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
@@ -14,6 +14,11 @@
/ {
model = "LS1012A FRWY Board";
compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
+
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
};
&duart0 {
@@ -28,6 +33,44 @@
status = "okay";
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
@@ -18,6 +18,11 @@
mmc1 = &esdhc1;
};
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -132,6 +137,44 @@
};
};
};
+
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x2>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x3>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -16,6 +16,8 @@
aliases {
serial0 = &duart0;
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
mmc0 = &esdhc0;
mmc1 = &esdhc1;
};
@@ -86,6 +88,44 @@
};
};
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pfe_mac0: ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ pfe_mac1: ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
+ fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "rgmii-txid";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
&qspi {
status = "okay";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -568,6 +568,35 @@
};
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ pfe_reserved: packetbuffer@83400000 {
+ reg = <0 0x83400000 0 0xc00000>;
+ };
+ };
+
+ pfe: pfe@04000000 {
+ compatible = "fsl,pfe";
+ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
+ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
+ reg-names = "pfe", "pfe-ddr";
+ fsl,pfe-num-interfaces = <0x2>;
+ interrupts = <0 172 0x4>, /* HIF interrupt */
+ <0 173 0x4>, /*HIF_NOCPY interrupt */
+ <0 174 0x4>; /* WoL interrupt */
+ interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
+ memory-region = <&pfe_reserved>;
+ fsl,pfe-scfg = <&scfg 0>;
+ fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "pfe";
+
+ status = "okay";
+ };
+
firmware {
optee {
compatible = "linaro,optee-tz";

View File

@@ -1,41 +0,0 @@
From 9c5c18dbf8e1845d349ef7020f8af5bc9b56ed1f Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Fri, 28 Sep 2022 17:14:32 +0200
Subject: [PATCH] arm64: dts: ls1012a-frdm/qds: workaround by updating qspi flash to
single mode
Update rx and tx bus-width to 1 to use single mode to workaround ubifs
issue found with double mode. (The same method as RDB board)
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 4 ++--
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 4 ++--
2 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -148,8 +148,8 @@
spi-max-frequency = <50000000>;
m25p,fast-read;
reg = <0>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
};
};
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
@@ -186,8 +186,8 @@
spi-max-frequency = <50000000>;
m25p,fast-read;
reg = <0>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
};
};

View File

@@ -1,29 +0,0 @@
From 9c5c18dbf8e1845d349ef7020f8af5bc9b56ed1f Mon Sep 17 00:00:00 2001
From: Kuldeep Singh <kuldeep.singh@nxp.com>
Date: Tue, 7 Jan 2020 17:14:32 +0530
Subject: [PATCH] arm64: dts: ls1012a-rdb: workaround by updating qspi flash to
single mode
Update rx and tx bus-width to 1 to use single mode to workaround ubifs
issue found with double mode.
[ Leo: Local workaround ]
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -136,8 +136,8 @@
spi-max-frequency = <50000000>;
m25p,fast-read;
reg = <0>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
};
};

View File

@@ -1,34 +0,0 @@
From 38093ebbf25eb60a1aa863f46118a68a0300c56e Mon Sep 17 00:00:00 2001
From: Kuldeep Singh <kuldeep.singh@nxp.com>
Date: Fri, 3 Jan 2020 14:49:07 +0530
Subject: [PATCH] arm64: dts: ls1046a-rdb: Update qspi spi-rx-bus-width to 1
Update rx width from quad mode to single mode as a workaround.
[Leo: Local workaround ]
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -104,7 +104,7 @@
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
- spi-rx-bus-width = <4>;
+ spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
reg = <0>;
};
@@ -114,7 +114,7 @@
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
- spi-rx-bus-width = <4>;
+ spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
reg = <1>;
};

View File

@@ -1,27 +0,0 @@
From 20b1193c8c1d81a8d44ae36e579f70e6fbab45b9 Mon Sep 17 00:00:00 2001
From: Han Xu <han.xu@nxp.com>
Date: Tue, 14 Apr 2020 11:58:44 -0500
Subject: [PATCH] LF-20-3 mtd: spi-nor: Use 1 bit mode of spansion(s25fs512s)
flash
This is a workaround patch which uses only single bit mode of s25fs512s
flash
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
drivers/mtd/spi-nor/spansion.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -398,8 +398,8 @@ static const struct flash_info spansion_
MFR_FLAGS(USE_CLSR)
},
{ "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
- NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
MFR_FLAGS(USE_CLSR)
+ FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
.fixups = &s25fs_s_nor_fixups, },
{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) },
{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) },

View File

@@ -1,54 +0,0 @@
From fd32b1bc9a49919d3d59a50d775d03fe7ca5e654 Mon Sep 17 00:00:00 2001
From: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Date: Wed, 29 Nov 2017 15:27:57 +0530
Subject: [PATCH] phy: Add 2.5G SGMII interface mode
Add 2.5G SGMII interface mode(PHY_INTERFACE_MODE_2500SGMII)
in existing phy_interface list
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
---
drivers/net/phy/phy-core.c | 1 +
drivers/net/phy/phylink.c | 1 +
include/linux/phy.h | 3 +++
3 files changed, 5 insertions(+)
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -136,6 +136,7 @@ int phy_interface_num_ports(phy_interfac
case PHY_INTERFACE_MODE_RXAUI:
case PHY_INTERFACE_MODE_XAUI:
case PHY_INTERFACE_MODE_1000BASEKX:
+ case PHY_INTERFACE_MODE_2500SGMII:
return 1;
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QUSGMII:
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -231,6 +231,7 @@ static int phylink_interface_max_speed(p
return SPEED_1000;
case PHY_INTERFACE_MODE_2500BASEX:
+ case PHY_INTERFACE_MODE_2500SGMII:
return SPEED_2500;
case PHY_INTERFACE_MODE_5GBASER:
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -159,6 +159,7 @@ typedef enum {
PHY_INTERFACE_MODE_10GKR,
PHY_INTERFACE_MODE_QUSGMII,
PHY_INTERFACE_MODE_1000BASEKX,
+ PHY_INTERFACE_MODE_2500SGMII,
PHY_INTERFACE_MODE_MAX,
} phy_interface_t;
@@ -280,6 +281,8 @@ static inline const char *phy_modes(phy_
return "100base-x";
case PHY_INTERFACE_MODE_QUSGMII:
return "qusgmii";
+ case PHY_INTERFACE_MODE_2500SGMII:
+ return "sgmii-2500";
default:
return "unknown";
}

View File

@@ -1,239 +0,0 @@
From 1dc3a2e216d99adc2df022ab37eab32f61d80e0e Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Mon, 8 May 2023 19:26:48 +0200
Subject: [PATCH] layerscape: 6.1: fix compilation warning for fsl ppfe driver
Rework some desc dump and dummy pkt function to fix compilation warning.
Fix compilation warning:
drivers/staging/fsl_ppfe/pfe_hif.c: In function 'send_dummy_pkt_to_hif':
drivers/staging/fsl_ppfe/pfe_hif.c:118:19: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
118 | ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:122:20: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
122 | lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
| ^
drivers/staging/fsl_ppfe/pfe_hif.c: In function 'pfe_hif_desc_dump':
drivers/staging/fsl_ppfe/pfe_hif.c:195:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
195 | desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:195:36: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
195 | desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:207:19: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
207 | desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
drivers/staging/fsl_ppfe/pfe_hif.c:207:31: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
207 | desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
| ^
cc1: all warnings being treated as errors
In file included from ./include/linux/kernel.h:19,
from ./include/linux/list.h:9,
from ./include/linux/wait.h:7,
from ./include/linux/eventfd.h:13,
from drivers/staging/fsl_ppfe/pfe_cdev.c:11:
drivers/staging/fsl_ppfe/pfe_cdev.c: In function 'pfe_cdev_read':
./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'int' [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
422 | _p_func(_fmt, ##__VA_ARGS__); \
| ^~~~
./include/linux/printk.h:132:17: note: in expansion of macro 'printk'
132 | printk(fmt, ##__VA_ARGS__); \
| ^~~~~~
./include/linux/printk.h:580:9: note: in expansion of macro 'no_printk'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~
./include/linux/kern_levels.h:15:25: note: in expansion of macro 'KERN_SOH'
15 | #define KERN_DEBUG KERN_SOH "7" /* debug-level messages */
| ^~~~~~~~
./include/linux/printk.h:580:19: note: in expansion of macro 'KERN_DEBUG'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~~
drivers/staging/fsl_ppfe/pfe_cdev.c:42:17: note: in expansion of macro 'pr_debug'
42 | pr_debug("%u %lu", link_states[ret].phy_id,
| ^~~~~~~~
./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
422 | _p_func(_fmt, ##__VA_ARGS__); \
| ^~~~
./include/linux/printk.h:493:9: note: in expansion of macro 'printk'
493 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~
./include/linux/kern_levels.h:11:25: note: in expansion of macro 'KERN_SOH'
11 | #define KERN_ERR KERN_SOH "3" /* error conditions */
| ^~~~~~~~
./include/linux/printk.h:493:16: note: in expansion of macro 'KERN_ERR'
493 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~
drivers/staging/fsl_ppfe/pfe_cdev.c:50:17: note: in expansion of macro 'pr_err'
50 | pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
| ^~~~~~
./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'unsigned int' [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
422 | _p_func(_fmt, ##__VA_ARGS__); \
| ^~~~
./include/linux/printk.h:132:17: note: in expansion of macro 'printk'
132 | printk(fmt, ##__VA_ARGS__); \
| ^~~~~~
./include/linux/printk.h:580:9: note: in expansion of macro 'no_printk'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~
./include/linux/kern_levels.h:15:25: note: in expansion of macro 'KERN_SOH'
15 | #define KERN_DEBUG KERN_SOH "7" /* debug-level messages */
| ^~~~~~~~
./include/linux/printk.h:580:19: note: in expansion of macro 'KERN_DEBUG'
580 | no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~~
drivers/staging/fsl_ppfe/pfe_cdev.c:57:9: note: in expansion of macro 'pr_debug'
57 | pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
| ^~~~~~~~
cc1: all warnings being treated as errors
In file included from ./include/uapi/linux/posix_types.h:5,
from ./include/uapi/linux/types.h:14,
from ./include/linux/types.h:6,
from ./include/linux/list.h:5,
from ./include/linux/module.h:12,
from drivers/staging/fsl_ppfe/pfe_sysfs.c:7:
drivers/staging/fsl_ppfe/pfe_sysfs.c: In function 'pfe_set_util':
./include/linux/stddef.h:8:14: error: passing argument 2 of 'kstrtoul' makes integer from pointer without a cast [-Werror=int-conversion]
8 | #define NULL ((void *)0)
| ^~~~~~~~~~~
| |
| void *
drivers/staging/fsl_ppfe/pfe_sysfs.c:538:39: note: in expansion of macro 'NULL'
538 | util_do_clear = kstrtoul(buf, NULL, 0);
| ^~~~
In file included from ./include/linux/kernel.h:13,
from ./include/linux/list.h:9:
./include/linux/kstrtox.h:30:69: note: expected 'unsigned int' but argument is of type 'void *'
30 | static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res)
| ~~~~~~~~~~~~~^~~~
cc1: all warnings being treated as errors
With UTIL compiled on, fix compilation warning:
drivers/staging/fsl_ppfe/pfe_hal.c: In function 'pe_load_ddr_section':
drivers/staging/fsl_ppfe/pfe_hal.c:617:19: error: 'else' without a previous 'if'
617 | } else {
| ^~~~
drivers/staging/fsl_ppfe/pfe_hal.c:622:17: error: break statement not within loop or switch
622 | break;
| ^~~~~
drivers/staging/fsl_ppfe/pfe_hal.c:624:9: error: case label not within a switch statement
624 | case SHT_NOBITS:
| ^~~~
drivers/staging/fsl_ppfe/pfe_hal.c:627:17: error: break statement not within loop or switch
627 | break;
| ^~~~~
drivers/staging/fsl_ppfe/pfe_hal.c:629:9: error: 'default' label not within a switch statement
629 | default:
| ^~~~~~~
drivers/staging/fsl_ppfe/pfe_hal.c: At top level:
drivers/staging/fsl_ppfe/pfe_hal.c:635:9: error: expected identifier or '(' before 'return'
635 | return 0;
| ^~~~~~
drivers/staging/fsl_ppfe/pfe_hal.c:636:1: error: expected identifier or '(' before '}' token
636 | }
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
drivers/staging/fsl_ppfe/pfe_cdev.c | 6 +++---
drivers/staging/fsl_ppfe/pfe_hif.c | 14 +++++++-------
drivers/staging/fsl_ppfe/pfe_sysfs.c | 2 +-
3 files changed, 11 insertions(+), 11 deletions(-)
--- a/drivers/staging/fsl_ppfe/pfe_cdev.c
+++ b/drivers/staging/fsl_ppfe/pfe_cdev.c
@@ -34,7 +34,7 @@ static ssize_t pfe_cdev_read(struct file
{
int ret = 0;
- pr_info("PFE CDEV attempt copying (%lu) size of user.\n",
+ pr_info("PFE CDEV attempt copying (%zu) size of user.\n",
sizeof(link_states));
pr_debug("Dump link_state on screen before copy_to_user\n");
@@ -47,14 +47,14 @@ static ssize_t pfe_cdev_read(struct file
/* Copy to user the value in buffer sized len */
ret = copy_to_user(buf, &link_states, sizeof(link_states));
if (ret != 0) {
- pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
+ pr_err("Failed to send (%d)bytes of (%zu) requested.\n",
ret, len);
return -EFAULT;
}
/* offset set back to 0 as there is contextual reading offset */
*off = 0;
- pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
+ pr_debug("Read of (%zu) bytes performed.\n", sizeof(link_states));
return sizeof(link_states);
}
--- a/drivers/staging/fsl_ppfe/pfe_hif.c
+++ b/drivers/staging/fsl_ppfe/pfe_hif.c
@@ -115,11 +115,11 @@ static void send_dummy_pkt_to_hif(void)
0x33221100, 0xa8c05544, 0x00000301, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0xbe86c51f };
- ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
+ ddr_ptr = (void *)((uintptr_t)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
if (!ddr_ptr)
return;
- lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
+ lmem_ptr = (void *)((uintptr_t)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
if (!lmem_ptr)
return;
@@ -186,16 +186,16 @@ static void pfe_hif_free_descr(struct pf
void pfe_hif_desc_dump(struct pfe_hif *hif)
{
struct hif_desc *desc;
- unsigned long desc_p;
+ u64 desc_p;
int ii = 0;
pr_info("%s\n", __func__);
desc = hif->rx_base;
- desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
+ desc_p = ((void *)desc - hif->descr_baseaddr_v +
hif->descr_baseaddr_p);
- pr_info("HIF Rx desc base %p physical %x\n", desc, (u32)desc_p);
+ pr_info("HIF Rx desc base %p physical %llx\n", desc, desc_p);
for (ii = 0; ii < hif->rx_ring_size; ii++) {
pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
readl(&desc->status), readl(&desc->ctrl),
@@ -204,10 +204,10 @@ void pfe_hif_desc_dump(struct pfe_hif *h
}
desc = hif->tx_base;
- desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
+ desc_p = ((void *)desc - hif->descr_baseaddr_v +
hif->descr_baseaddr_p);
- pr_info("HIF Tx desc base %p physical %x\n", desc, (u32)desc_p);
+ pr_info("HIF Tx desc base %p physical %llx\n", desc, desc_p);
for (ii = 0; ii < hif->tx_ring_size; ii++) {
pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
readl(&desc->status), readl(&desc->ctrl),
--- a/drivers/staging/fsl_ppfe/pfe_sysfs.c
+++ b/drivers/staging/fsl_ppfe/pfe_sysfs.c
@@ -535,7 +535,7 @@ static ssize_t pfe_show_tmu3_queues(stru
static ssize_t pfe_set_util(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
- util_do_clear = kstrtoul(buf, NULL, 0);
+ util_do_clear = kstrtoul(buf, 0, 0);
return count;
}

View File

@@ -1,42 +0,0 @@
From eb57941154e2ad142c07d47e874a221328467349 Mon Sep 17 00:00:00 2001
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Thu, 2 Jun 2022 12:11:11 +0300
Subject: [PATCH] net: phylink: treat PHY_INTERFACE_MODE_2500SGMII in
phylink_get_linkmodes
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There is a downstream patch which adds a new interface type -
PHY_INTERFACE_MODE_2500SGMII (which is really the same one as
PHY_INTERFACE_MODE_2500BASEX).
We backported from upstream the following phylink patch which, of
course, does not treat the PHY_INTERFACE_MODE_2500SGMII interface mode
in a switch case statement.
34ae2c09d46a ("net: phylink: add generic validate implementation")
Because of this, we get the following build warning.
drivers/net/phy/phylink.c: In function phylink_get_linkmodes:
drivers/net/phy/phylink.c:322:2: warning: enumeration value PHY_INTERFACE_MODE_2500SGMII not handled in switch [-Wswitch]
322 | switch (interface) {
| ^~~~~~
Fix it by treating the new interface mode in the switch-case statement.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
drivers/net/phy/phylink.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -518,6 +518,7 @@ unsigned long phylink_get_capabilities(p
break;
case PHY_INTERFACE_MODE_2500BASEX:
+ case PHY_INTERFACE_MODE_2500SGMII:
caps |= MAC_2500FD;
break;

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@@ -148,7 +148,7 @@
partname = "u-boot-env";
nvmem-layout {
compatible = "u-boot,env-layout";
compatible = "u-boot,env";
};
};

View File

@@ -164,7 +164,7 @@
block-partition-u-boot-env {
partname = "u-boot-env";
nvmem-layout {
compatible = "u-boot,env-layout";
compatible = "u-boot,env";
};
};
};

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@@ -32,7 +32,7 @@
partname = "u-boot-env";
nvmem-layout {
compatible = "u-boot,env-layout";
compatible = "u-boot,env";
};
};

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@@ -325,7 +325,7 @@
partname = "u-boot-env";
nvmem-layout {
compatible = "u-boot,env-layout";
compatible = "u-boot,env";
};
};

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@@ -41,7 +41,7 @@
block-partition-env {
partname = "ubootenv";
nvmem-layout {
compatible = "u-boot,env-layout";
compatible = "u-boot,env";
};
};
emmc_rootfs: block-partition-production {

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@@ -39,7 +39,7 @@
block-partition-env {
partname = "ubootenv";
nvmem-layout {
compatible = "u-boot,env-layout";
compatible = "u-boot,env";
};
};
sd_rootfs: block-partition-production {

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@@ -92,7 +92,7 @@ Subject: [PATCH] kernel: add block fit partition parser
#ifdef CONFIG_SGI_PARTITION
sgi_partition,
#endif
@@ -430,6 +436,11 @@ static struct block_device *add_partitio
@@ -464,6 +470,11 @@ static struct block_device *add_partitio
goto out_del;
}
@@ -104,7 +104,7 @@ Subject: [PATCH] kernel: add block fit partition parser
/* everything is up and running, commence */
err = xa_insert(&disk->part_tbl, partno, bdev, GFP_KERNEL);
if (err)
@@ -622,6 +633,11 @@ static bool blk_add_partition(struct gen
@@ -656,6 +667,11 @@ static bool blk_add_partition(struct gen
(state->parts[p].flags & ADDPART_FLAG_RAID))
md_autodetect_dev(part->bd_dev);

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@@ -25,7 +25,7 @@
+ block-partition-env {
+ partname = "ubootenv";
+ nvmem-layout {
+ compatible = "u-boot,env-layout";
+ compatible = "u-boot,env";
+ };
+ };
+ emmc_rootfs: block-partition-production {
@@ -52,7 +52,7 @@
+ block-partition-env {
+ partname = "ubootenv";
+ nvmem-layout {
+ compatible = "u-boot,env-layout";
+ compatible = "u-boot,env";
+ };
+ };
+ sd_rootfs: block-partition-production {