rockchip: fix reset pcie
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit a3ac91322e)
This commit is contained in:
@@ -0,0 +1,76 @@
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From c335ab00b0cd70707291efaf9ff48ebb69dcf667 Mon Sep 17 00:00:00 2001
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From: Niklas Cassel <cassel@kernel.org>
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Date: Wed, 17 Apr 2024 18:42:26 +0200
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Subject: [PATCH] PCI: dw-rockchip: Fix initial PERST# GPIO value
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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PERST# is active low according to the PCIe specification.
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However, the existing pcie-dw-rockchip.c driver does:
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gpiod_set_value(..., 0); msleep(100); gpiod_set_value(..., 1);
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when asserting + deasserting PERST#.
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This is of course wrong, but because all the device trees for this
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compatible string have also incorrectly marked this GPIO as ACTIVE_HIGH:
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$ git grep -B 10 reset-gpios arch/arm64/boot/dts/rockchip/rk3568*
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$ git grep -B 10 reset-gpios arch/arm64/boot/dts/rockchip/rk3588*
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The actual toggling of PERST# is correct, and we cannot change it anyway,
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since that would break device tree compatibility.
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However, this driver does request the GPIO to be initialized as
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GPIOD_OUT_HIGH, which does cause a silly sequence where PERST# gets
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toggled back and forth for no good reason.
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Fix this by requesting the GPIO to be initialized as GPIOD_OUT_LOW (which
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for this driver means PERST# asserted).
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This will avoid an unnecessary signal change where PERST# gets deasserted
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(by devm_gpiod_get_optional()) and then gets asserted (by
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rockchip_pcie_start_link()) just a few instructions later.
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Before patch, debug prints on EP side, when booting RC:
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[ 845.606810] pci: PERST# asserted by host!
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[ 852.483985] pci: PERST# de-asserted by host!
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[ 852.503041] pci: PERST# asserted by host!
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[ 852.610318] pci: PERST# de-asserted by host!
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After patch, debug prints on EP side, when booting RC:
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[ 125.107921] pci: PERST# asserted by host!
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[ 132.111429] pci: PERST# de-asserted by host!
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This extra, very short, PERST# assertion + deassertion has been reported to
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cause issues with certain WLAN controllers, e.g. RTL8822CE.
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Fixes: 0e898eb8df4e ("PCI: rockchip-dwc: Add Rockchip RK356X host controller driver")
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Link: https://lore.kernel.org/linux-pci/20240417164227.398901-1-cassel@kernel.org
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Tested-by: Heiko Stuebner <heiko@sntech.de>
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Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
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Signed-off-by: Niklas Cassel <cassel@kernel.org>
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Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Cc: stable@vger.kernel.org # v5.15+
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---
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drivers/pci/controller/dwc/pcie-dw-rockchip.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
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+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
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@@ -240,7 +240,7 @@ static int rockchip_pcie_resource_get(st
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return PTR_ERR(rockchip->apb_base);
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rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
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- GPIOD_OUT_HIGH);
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+ GPIOD_OUT_LOW);
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if (IS_ERR(rockchip->rst_gpio))
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return PTR_ERR(rockchip->rst_gpio);
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@@ -38,7 +38,7 @@
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phy-names = "pcie-phy";
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -315,14 +315,21 @@
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@@ -356,14 +356,21 @@
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gic: interrupt-controller@fd400000 {
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compatible = "arm,gic-v3";
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@@ -66,7 +66,7 @@
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};
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usb_host0_ehci: usb@fd800000 {
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@@ -880,7 +887,7 @@
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@@ -921,7 +928,7 @@
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num-ib-windows = <6>;
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num-ob-windows = <2>;
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max-link-speed = <2>;
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@@ -12,7 +12,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -222,6 +222,13 @@
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@@ -263,6 +263,13 @@
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arm,no-tick-in-suspend;
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};
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@@ -26,7 +26,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
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xin24m: xin24m {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -376,6 +383,12 @@
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@@ -417,6 +424,12 @@
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status = "disabled";
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};
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@@ -39,7 +39,7 @@ Signed-off-by: David Wu <david.wu@rock-chips.com>
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pmugrf: syscon@fdc20000 {
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compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
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reg = <0x0 0xfdc20000 0x0 0x10000>;
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@@ -623,11 +636,13 @@
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@@ -664,11 +677,13 @@
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clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>,
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<&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>,
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<&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>,
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@@ -11,7 +11,7 @@ Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -1586,6 +1586,15 @@
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@@ -1627,6 +1627,15 @@
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status = "disabled";
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};
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