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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-01-27 19:03:10 +08:00
parent 8ef328099c ea66541032
commit b3b143104a
27 changed files with 406 additions and 206 deletions
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2
package/kernel/lantiq/vrx518_tc/Makefile
View File

@@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=vrx518_tc
PKG_VERSION:=1.5.12.4
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_BASE_NAME:=vrx518_tc_drv
UGW_VERSION=8.5.2.10

2
package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
View File

@@ -166,7 +166,7 @@
- return (skb->DW0 >> 3) & 0xF;
+// return (skb->DW0 >> 3) & 0xF;
+ return 1;
+ return 0; /* We use only one connection for now, so return the first connection id */
}
static int atm_get_qid_by_vcc(struct net_device *dev, struct sk_buff *skb,

144
package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch Normal file
View File

@@ -0,0 +1,144 @@
Extra ATM traffic classes requires atm_qos struct extension and a set of
new defines. What itself requires atm.h updates both in the kernel and
in the toolchain. On another hand we do not have any real users of these
traffic classes.
In absence of real user there are no benefits to support this
functionality. There is only the burden of maintenance of extra patches
all around the building framework. So just drop these extra QoS traffic
classes in order to facilitate maintenance and avoid side effects like
breaking compatibility with existing userspace tools like linux-atm.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
--
--- a/dcdp/atm_tc.c
+++ b/dcdp/atm_tc.c
@@ -463,34 +463,9 @@ static void set_qsb(struct atm_priv *pri
/* Weighted Fair Queueing Factor (WFQF) */
switch (qos->txtp.traffic_class) {
case ATM_CBR:
- case ATM_VBR_RT:
/* real time queue gets weighted fair queueing bypass */
q_parm_tbl.bit.wfqf = 0;
break;
- case ATM_VBR_NRT:
- case ATM_UBR_PLUS:
- /* WFQF calculation here is based on virtual cell rates,
- to reduce granularity for high rates
- */
- /* WFQF is maximum cell rate / garenteed cell rate */
- /* wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX /
- requested_minimum_peak_cell_rate
- */
- if (qos->txtp.min_pcr == 0)
- q_parm_tbl.bit.wfqf = QSB_WFQ_NONUBR_MAX;
- else {
- tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX /
- qos->txtp.min_pcr;
- if (tmp == 0)
- q_parm_tbl.bit.wfqf = 1;
- else if (tmp > QSB_WFQ_NONUBR_MAX)
- q_parm_tbl.bit.wfqf
- = QSB_WFQ_NONUBR_MAX;
- else
- q_parm_tbl.bit.wfqf = tmp;
- }
- break;
-
case ATM_UBR:
default:
q_parm_tbl.bit.wfqf = QSB_WFQ_UBR_BYPASS;
@@ -498,42 +473,9 @@ static void set_qsb(struct atm_priv *pri
}
/* Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 */
- if (qos->txtp.traffic_class == ATM_VBR_RT ||
- qos->txtp.traffic_class == ATM_VBR_NRT) {
- if (qos->txtp.scr == 0) {
- /* disable shaper */
- q_vbr_parm_tbl.bit.taus = 0;
- q_vbr_parm_tbl.bit.ts = 0;
- } else {
- /* Cell Loss Priority (CLP) */
- if ((vcc->atm_options & ATM_ATMOPT_CLP))
- /* CLP1 */
- q_parm_tbl.bit.vbr = 1;
- else
- /* CLP0 */
- q_parm_tbl.bit.vbr = 0;
- /* Rate Shaper Parameter (TS) and
- Burst Tolerance Parameter for SCR (tauS)
- */
- tmp = ((qsb_clk * param->qsb_tstep) >> 5) /
- qos->txtp.scr + 1;
- q_vbr_parm_tbl.bit.ts
- = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
- tmp = (qos->txtp.mbs - 1) *
- (q_vbr_parm_tbl.bit.ts -
- q_parm_tbl.bit.tp) / 64;
- if (tmp == 0)
- q_vbr_parm_tbl.bit.taus = 1;
- else if (tmp > QSB_TAUS_MAX)
- q_vbr_parm_tbl.bit.taus
- = QSB_TAUS_MAX;
- else
- q_vbr_parm_tbl.bit.taus = tmp;
- }
- } else {
- q_vbr_parm_tbl.bit.taus = 0;
- q_vbr_parm_tbl.bit.ts = 0;
- }
+ /* NB: shaper disabled since there no user interface to activate it */
+ q_vbr_parm_tbl.bit.taus = 0;
+ q_vbr_parm_tbl.bit.ts = 0;
/* Queue Parameter Table (QPT) */
tc_w32(QSB_QPT_SET_MASK, QSB_RTM);
@@ -1064,15 +1006,6 @@ static int ppe_open(struct atm_vcc *vcc)
/* check bandwidth */
if ((vcc->qos.txtp.traffic_class == ATM_CBR &&
vcc->qos.txtp.max_pcr >
- (port->tx_max_cell_rate - port->tx_used_cell_rate))
- || (vcc->qos.txtp.traffic_class == ATM_VBR_RT &&
- vcc->qos.txtp.max_pcr >
- (port->tx_max_cell_rate - port->tx_used_cell_rate))
- || (vcc->qos.txtp.traffic_class == ATM_VBR_NRT &&
- vcc->qos.txtp.scr >
- (port->tx_max_cell_rate - port->tx_used_cell_rate))
- || (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS &&
- vcc->qos.txtp.min_pcr >
(port->tx_max_cell_rate - port->tx_used_cell_rate))) {
tc_dbg(priv->tc_priv, MSG_INIT, "exceed TX line rate\n");
return -EINVAL;
@@ -1128,15 +1061,8 @@ static int ppe_open(struct atm_vcc *vcc)
/* reserve bandwidth */
switch (vcc->qos.txtp.traffic_class) {
case ATM_CBR:
- case ATM_VBR_RT:
port->tx_used_cell_rate += vcc->qos.txtp.max_pcr;
break;
- case ATM_VBR_NRT:
- port->tx_used_cell_rate += vcc->qos.txtp.scr;
- break;
- case ATM_UBR_PLUS:
- port->tx_used_cell_rate += vcc->qos.txtp.min_pcr;
- break;
}
/* update atm_vcc structure */
@@ -1222,15 +1148,8 @@ static void ppe_close(struct atm_vcc *vc
/* release bandwidth */
switch (vcc->qos.txtp.traffic_class) {
case ATM_CBR:
- case ATM_VBR_RT:
port->tx_used_cell_rate -= vcc->qos.txtp.max_pcr;
break;
- case ATM_VBR_NRT:
- port->tx_used_cell_rate -= vcc->qos.txtp.scr;
- break;
- case ATM_UBR_PLUS:
- port->tx_used_cell_rate -= vcc->qos.txtp.min_pcr;
- break;
}
/* idle for a while to let parallel operation finish */

20
package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
View File

@@ -3,7 +3,7 @@ This replaces it by a basic working implementation.
--- a/dcdp/atm_tc.c
+++ b/dcdp/atm_tc.c
@@ -603,7 +603,11 @@ static void atm_aca_init(struct atm_priv
@@ -545,7 +545,11 @@ static void atm_aca_init(struct atm_priv
cfg = &priv->tc_priv->cfg;
txin = &param.aca_txin;
@@ -15,7 +15,7 @@ This replaces it by a basic working implementation.
txin->hd_size_in_dw = cfg->txin.soc_desc_dwsz;
txin->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_IN_PD_LIST_BASE);
txin->pd_desc_num = __ACA_TX_IN_PD_LIST_NUM;
@@ -625,7 +629,11 @@ static void atm_aca_init(struct atm_priv
@@ -567,7 +571,11 @@ static void atm_aca_init(struct atm_priv
txin->soc_cmlt_cnt_addr);
txout = &param.aca_txout;
@@ -27,7 +27,7 @@ This replaces it by a basic working implementation.
txout->hd_size_in_dw = cfg->txout.soc_desc_dwsz;
txout->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_OUT_PD_LIST_BASE);
txout->pd_desc_num = __ACA_TX_OUT_PD_LIST_NUM;
@@ -647,7 +655,11 @@ static void atm_aca_init(struct atm_priv
@@ -589,7 +597,11 @@ static void atm_aca_init(struct atm_priv
txout->soc_cmlt_cnt_addr);
rxout = &param.aca_rxout;
@@ -39,7 +39,7 @@ This replaces it by a basic working implementation.
rxout->hd_size_in_dw = cfg->rxout.soc_desc_dwsz;
rxout->pd_desc_base = SB_XBAR_ADDR(__ACA_RX_OUT_PD_LIST_BASE);
rxout->pd_desc_num = __ACA_RX_OUT_PD_LIST_NUM;
@@ -669,7 +681,11 @@ static void atm_aca_init(struct atm_priv
@@ -611,7 +623,11 @@ static void atm_aca_init(struct atm_priv
rxout->soc_cmlt_cnt_addr);
rxin = &param.aca_rxin;
@@ -51,7 +51,7 @@ This replaces it by a basic working implementation.
rxin->hd_size_in_dw = cfg->rxin.soc_desc_dwsz;
rxin->pd_desc_base = SB_XBAR_ADDR(__RX_IN_PD_DES_LIST_BASE);
rxin->pd_desc_num = __ACA_RX_IN_PD_LIST_NUM;
@@ -1261,7 +1277,7 @@ static int ppe_ioctl(struct atm_dev *dev
@@ -1180,7 +1196,7 @@ static int ppe_ioctl(struct atm_dev *dev
static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb)
{
int ret, qid, mpoa_pt, mpoa_type, vid;
@@ -60,7 +60,7 @@ This replaces it by a basic working implementation.
struct atm_priv *priv;
if (!vcc) {
@@ -1327,12 +1343,14 @@ static int ppe_send(struct atm_vcc *vcc,
@@ -1246,12 +1262,14 @@ static int ppe_send(struct atm_vcc *vcc,
tc_dbg(priv->tc_priv, MSG_TX, "vid: 0x%x, qid: 0x%x\n",
vid, qid);
@@ -855,12 +855,12 @@ This replaces it by a basic working implementation.
- continue;
+
+ // this seems to be a pointer to a DS PKT buffer
+ phyaddr = desc->data_ptr + desc->byte_off;
+ phyaddr = desc->data_ptr;
+ ptr = plat_mem_virt(phyaddr);
+
+ len = desc->data_len;
+
+ dma_sync_single_range_for_cpu(pdev, phyaddr, 0, len, DMA_FROM_DEVICE);
+ dma_sync_single_for_cpu(pdev, phyaddr, desc->byte_off + len,
+ DMA_FROM_DEVICE);
+
+ skb = netdev_alloc_skb(g_plat_priv->netdev, len);
+ if (unlikely(!skb)) {
@@ -871,7 +871,7 @@ This replaces it by a basic working implementation.
- ring_idx_inc(rxout, idx);
+
+ dst = skb_put(skb, len);
+ memcpy(dst, ptr, len);
+ memcpy(dst, ptr + desc->byte_off, len);
+
+ priv->tc_ops.recv(g_plat_priv->netdev, skb);
+

4
package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
View File

@@ -296,7 +296,7 @@
priv->tc_ops.umt_start = plat_umt_start;
--- a/dcdp/atm_tc.c
+++ b/dcdp/atm_tc.c
@@ -3650,7 +3650,7 @@ static void atm_aca_ring_config_init(str
@@ -3569,7 +3569,7 @@ static void atm_aca_ring_config_init(str
static int atm_ring_init(struct atm_priv *priv)
{
atm_aca_ring_config_init(priv);
@@ -305,7 +305,7 @@
}
static int atm_init(struct tc_priv *tcpriv, u32 ep_id)
@@ -4020,7 +4020,7 @@ void atm_tc_unload(void)
@@ -3939,7 +3939,7 @@ void atm_tc_unload(void)
/* unregister device */
if (priv->tc_priv->tc_ops.dev_unreg != NULL)
priv->tc_priv->tc_ops.dev_unreg(NULL,

6
package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
View File

@@ -1,6 +1,6 @@
--- a/dcdp/atm_tc.c
+++ b/dcdp/atm_tc.c
@@ -746,7 +746,8 @@ static void atm_aca_init(struct atm_priv
@@ -688,7 +688,8 @@ static void atm_aca_init(struct atm_priv
ACA_TXOUT_EN | ACA_RXIN_EN | ACA_RXOUT_EN, 1);
}
@@ -10,7 +10,7 @@
{
struct tm nowtm;
char tmbuf[64];
@@ -765,7 +766,8 @@ static int print_datetime(char *buffer,
@@ -707,7 +708,8 @@ static int print_datetime(char *buffer,
nowtm.tm_hour,
nowtm.tm_min,
nowtm.tm_sec);
@@ -20,7 +20,7 @@
return 0;
}
@@ -967,7 +969,7 @@ void show_atm_pvc(struct seq_file *seq,
@@ -909,7 +911,7 @@ void show_atm_pvc(struct seq_file *seq,
char buf[64];
seq_printf(seq, "\tNet device: %s\n", pvc->dev->name);

75
package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch Normal file
View File

@@ -0,0 +1,75 @@
From: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Date: Fri, 10 Jan 2025 00:57:27 +0000
Subject: [PATCH] vrx518_tc: atm_tc: fix crash on subif_reg absence
VRX518 (sw_plat) platform does not provid the subif_reg/subif_unreg ops
in the same time ATM TC layer unconditionally calls them, what leads to
the kernel crash on the atm_hook_mpoa_setup hook invocation from the ATM
stack:
vrx518_tc:mpoa_setup_sync : sync: conn: 0, vpi: 0, vci: 35, mpoa_type: 0, mpoa_mode: 0
Unable to handle kernel NULL pointer dereference at virtual address 00000000
Subif registration is optional and PTM TC do this only when the
corresponding ops are defined. Do the same for ATM TC and call
subif_reg/subif_unreg only if they are not NULL.
While at it, move subif related data preparation under the 'if' block
in order to group and isolate that aux code.
Run tested with FRITZ!Box 7530.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
---
--- a/dcdp/atm_tc.c
+++ b/dcdp/atm_tc.c
@@ -1158,8 +1158,9 @@ static void ppe_close(struct atm_vcc *vc
validate_oam_htu_entry(priv, 0);
spin_unlock_bh(&priv->atm_lock);
- priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
- priv->conn[cid].subif_id, 0);
+ if (priv->tc_priv->tc_ops.subif_unreg)
+ priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
+ priv->conn[cid].subif_id, 0);
memset(conn, 0, sizeof(*conn));
@@ -2710,24 +2711,26 @@ static void mpoa_setup_sync(struct atm_p
struct wtx_queue_config_t tx_qcfg;
struct uni_cell_header *cell_header;
struct atm_vcc *vcc;
- struct net_device *dev;
- char dev_name[32];
tc_dbg(priv->tc_priv, MSG_INIT,
"sync: conn: %d, vpi: %d, vci: %d, mpoa_type: %d, mpoa_mode: %d\n",
conn, priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci,
priv->conn[conn].mpoa_type, priv->conn[conn].mpoa_mode);
- dev = priv->conn[conn].dev;
+ if (priv->tc_priv->tc_ops.subif_reg) {
+ struct net_device *dev;
+ char dev_name[32];
+
+ dev = priv->conn[conn].dev;
+ if (!dev)
+ sprintf(dev_name, "atm_%d%d",
+ priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
- if (!dev)
- sprintf(dev_name, "atm_%d%d",
- priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
-
- priv->tc_priv->tc_ops.subif_reg(dev, (!dev) ? dev_name : dev->name,
- &priv->conn[conn].subif_id, 0);
- tc_dbg(priv->tc_priv, MSG_INIT,
- "conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
+ priv->tc_priv->tc_ops.subif_reg(dev, !dev ? dev_name : dev->name,
+ &priv->conn[conn].subif_id, 0);
+ tc_dbg(priv->tc_priv, MSG_INIT,
+ "conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
+ }
vcc = priv->conn[conn].vcc;
/* set htu entry */

2
package/kernel/linux/modules/usb.mk
View File

@@ -1738,7 +1738,7 @@ $(eval $(call KernelPackage,usbip-server))
define KernelPackage/usb-chipidea
TITLE:=Host and device support for Chipidea controllers
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles +kmod-phy-ath79-usb
KCONFIG:= \
CONFIG_EXTCON \
CONFIG_USB_CHIPIDEA \

1
package/network/config/netifd/files/etc/init.d/network
View File

@@ -30,7 +30,6 @@ reload_service() {
init_switch
ubus call network reload || rv=1
[ -x /sbin/wifi ] && /sbin/wifi reload_legacy
return $rv
}

3
package/network/services/unetd/files/unetd.sh
View File

@@ -82,11 +82,10 @@ proto_unet_setup() {
proto_unet_teardown() {
local config="$1"
local iface="$2"
local device
json_get_vars device
device="${device:-$iface}"
device="${device:-$config}"
json_init
json_add_string name "$device"

1
target/linux/airoha/an7581/config-6.6
View File

@@ -1,4 +1,5 @@
CONFIG_64BIT=y
CONFIG_AIROHA_CPU_PM_DOMAIN=y
CONFIG_AIROHA_THERMAL=y
CONFIG_AIROHA_WATCHDOG=y
CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y

8
target/linux/airoha/dts/an7581.dtsi
View File

@@ -81,7 +81,7 @@
clocks = <&cpufreq>;
clock-names = "cpu";
power-domains = <&cpufreq>;
power-domain-names = "cpu_pd";
power-domain-names = "perf";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
@@ -95,7 +95,7 @@
clocks = <&cpufreq>;
clock-names = "cpu";
power-domains = <&cpufreq>;
power-domain-names = "cpu_pd";
power-domain-names = "perf";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
@@ -109,7 +109,7 @@
clocks = <&cpufreq>;
clock-names = "cpu";
power-domains = <&cpufreq>;
power-domain-names = "cpu_pd";
power-domain-names = "perf";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
@@ -123,7 +123,7 @@
clocks = <&cpufreq>;
clock-names = "cpu";
power-domains = <&cpufreq>;
power-domain-names = "cpu_pd";
power-domain-names = "perf";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};

47
target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch → target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
View File

@@ -1,7 +1,7 @@
From fa27cb99b297a1a9c0a5824afe5a670e424fff61 Mon Sep 17 00:00:00 2001
From 84cf9e541cccb8cb698518a9897942e8c78f1d83 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 16 Oct 2024 18:00:57 +0200
Subject: [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
Date: Thu, 9 Jan 2025 14:12:58 +0100
Subject: [PATCH] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
frequency scaling with SMC APIs and register a generic "cpufreq-dt"
@@ -14,29 +14,8 @@ Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
driver is needed with OPP v2 nodes declared in DTS.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
Changes v9:
- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
Changes v8:
- Split in dedicated PM domain driver
Changes v7:
- No changes
Changes v6:
- Improve Kconfig depends logic
- Select PM (PM_GENERIC_DOMAINS depends on it)
- Drop (int) cast for
Changes v5:
- Rename cpu_pd to perf for power domain name
- Use remove instead of remove_new
Changes v4:
- Rework to clk-only + PM set_performance_state implementation
Changes v3:
- Adapt to new cpufreq-dt APIs
- Register cpufreq-dt instead of custom freq driver
Changes v2:
- Fix kernel bot error with missing slab.h and bitfield.h header
- Limit COMPILE_TEST to ARM64 due to smcc 1.2
drivers/cpufreq/Kconfig.arm | 8 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/airoha-cpufreq.c | 152 +++++++++++++++++++++++++++
@@ -104,11 +83,15 @@ Changes v2:
+}
+
+static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
+static const char * const airoha_cpufreq_genpd_names[] = { "cpu_pd", NULL };
+static const char * const airoha_cpufreq_pd_names[] = { "perf", NULL };
+
+static int airoha_cpufreq_probe(struct platform_device *pdev)
+{
+ struct dev_pm_opp_config config = { };
+ struct dev_pm_opp_config config = {
+ .clk_names = airoha_cpufreq_clk_names,
+ .config_clks = airoha_cpufreq_config_clks_nop,
+ .genpd_names = airoha_cpufreq_pd_names,
+ };
+ struct platform_device *cpufreq_dt;
+ struct airoha_cpufreq_priv *priv;
+ struct device *dev = &pdev->dev;
@@ -125,18 +108,14 @@ Changes v2:
+ if (!priv)
+ return -ENOMEM;
+
+ config.clk_names = airoha_cpufreq_clk_names;
+ config.config_clks = airoha_cpufreq_config_clks_nop;
+ config.genpd_names = airoha_cpufreq_genpd_names;
+ config.virt_devs = &virt_devs;
+
+ /* Set OPP table conf with NOP config_clks */
+ priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
+ if (priv->opp_token < 0)
+ return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
+
+ /* Set Attached PM for OPP ACTIVE */
+ if (virt_devs) {
+ const char * const *name = airoha_cpufreq_genpd_names;
+ const char * const *name = airoha_cpufreq_pd_names;
+ int i, j;
+
+ for (i = 0; *name; i++, name++) {
@@ -177,7 +156,7 @@ Changes v2:
+static void airoha_cpufreq_remove(struct platform_device *pdev)
+{
+ struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
+ const char * const *name = airoha_cpufreq_genpd_names;
+ const char * const *name = airoha_cpufreq_pd_names;
+ int i;
+
+ platform_device_unregister(priv->cpufreq_dt);

55
target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch → target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
View File

@@ -1,7 +1,7 @@
From 76e4e6ce9aaae897f80e375345bf0095e1b09ff2 Mon Sep 17 00:00:00 2001
From 82e703dd438b71432cc0ccbb90925d1e32dd014a Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sat, 4 Jan 2025 19:03:09 +0100
Subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
Date: Thu, 9 Jan 2025 14:12:57 +0100
Subject: [PATCH] pmdomain: airoha: Add Airoha CPU PM Domain support
Add Airoha CPU PM Domain support to control frequency and power of CPU
present on Airoha EN7581 SoC.
@@ -11,25 +11,21 @@ passing the performance state. The driver also expose a read-only clock
that expose the current CPU frequency with SMC command.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250109131313.32317-1-ansuelsmth@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
Changes v9:
- Fix compile error targetting wrong branch (remove_new change)
Changes v8:
- Add this patch
- Use SMC invoke instead of 1.2
drivers/pmdomain/mediatek/Kconfig | 11 ++
drivers/pmdomain/mediatek/Kconfig | 12 ++
drivers/pmdomain/mediatek/Makefile | 1 +
.../pmdomain/mediatek/airoha-cpu-pmdomain.c | 144 ++++++++++++++++++
3 files changed, 156 insertions(+)
3 files changed, 157 insertions(+)
create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
--- a/drivers/soc/mediatek/Kconfig
+++ b/drivers/soc/mediatek/Kconfig
@@ -72,6 +72,17 @@ config MTK_SCPSYS_PM_DOMAINS
Control Processor System (SCPSYS) has several power management related
tasks in the system.
@@ -2,6 +2,17 @@
#
# MediaTek SoC drivers
#
+config AIROHA_CPU_PM_DOMAIN
+ tristate "Airoha CPU power domain"
+ default ARCH_AIROHA
@@ -41,9 +37,9 @@ Changes v8:
+ CPU frequency and power is controlled by ATF with SMC command to
+ set performance states.
+
config MTK_MMSYS
tristate "MediaTek MMSYS Support"
default ARCH_MEDIATEK
menu "MediaTek SoC drivers"
depends on ARCH_MEDIATEK || COMPILE_TEST
--- a/drivers/pmdomain/mediatek/Makefile
+++ b/drivers/pmdomain/mediatek/Makefile
@@ -1,3 +1,4 @@
@@ -53,7 +49,7 @@ Changes v8:
+obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) += airoha-cpu-pmdomain.o
--- /dev/null
+++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
@@ -0,0 +1,145 @@
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/arm-smccc.h>
@@ -123,9 +119,13 @@ Changes v8:
+{
+ struct airoha_cpu_pmdomain_priv *priv;
+ struct device *dev = &pdev->dev;
+ struct clk_init_data init = { };
+ const struct clk_init_data init = {
+ .name = "cpu",
+ .ops = &airoha_cpu_pmdomain_clk_ops,
+ /* Clock with no set_rate, can't cache */
+ .flags = CLK_GET_RATE_NOCACHE,
+ };
+ struct generic_pm_domain *pd;
+ struct clk_hw *hw;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -133,18 +133,13 @@ Changes v8:
+ return -ENOMEM;
+
+ /* Init and register a get-only clk for Cpufreq */
+ init.name = "cpu";
+ init.ops = &airoha_cpu_pmdomain_clk_ops;
+ /* Clock with no set_rate, can't cache */
+ init.flags = CLK_GET_RATE_NOCACHE;
+
+ hw = &priv->hw;
+ hw->init = &init;
+ ret = devm_clk_hw_register(dev, hw);
+ priv->hw.init = &init;
+ ret = devm_clk_hw_register(dev, &priv->hw);
+ if (ret)
+ return ret;
+
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+ &priv->hw);
+ if (ret)
+ return ret;
+

27
target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch Normal file
View File

@@ -0,0 +1,27 @@
From 1addfb042a9d27788a0fb2c2935045b56fd8560e Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 23 Jan 2025 03:25:29 +0000
Subject: [PATCH] net: phy: realtek: mark existing MMDs as present
When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
versions of the PHY fail to report the MMDs present on the PHY.
Mark MMDs PMAPMD, PCS and AN which are always existing according to
the datasheet as present to fix that.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);
+ phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
+ MDIO_DEVS_AN;
+
return genphy_c45_pma_read_abilities(phydev);
}

43
target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch
View File

@@ -1,43 +0,0 @@
From: John Crispin <blogic@openwrt.org>
Date: Fri, 3 Aug 2012 10:27:25 +0200
Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
Signed-off-by: John Crispin <blogic@openwrt.org>
--- a/include/uapi/linux/atm.h
+++ b/include/uapi/linux/atm.h
@@ -131,8 +131,14 @@
#define ATM_ABR 4
#define ATM_ANYCLASS 5 /* compatible with everything */
+#define ATM_VBR_NRT ATM_VBR
+#define ATM_VBR_RT 6
+#define ATM_UBR_PLUS 7
+#define ATM_GFR 8
+
#define ATM_MAX_PCR -1 /* maximum available PCR */
+
struct atm_trafprm {
unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
int max_pcr; /* maximum PCR in cells per second */
@@ -155,6 +161,9 @@ struct atm_trafprm {
unsigned int adtf :10; /* ACR Decrease Time Factor (10-bit) */
unsigned int cdf :3; /* Cutoff Decrease Factor (3-bit) */
unsigned int spare :9; /* spare bits */
+ int scr; /* sustained rate in cells per second */
+ int mbs; /* maximum burst size (MBS) in cells */
+ int cdv; /* Cell delay variation */
};
struct atm_qos {
--- a/net/atm/proc.c
+++ b/net/atm/proc.c
@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
{
static const char *const class_name[] = {
- "off", "UBR", "CBR", "VBR", "ABR"};
+ "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
static const char *const aal_name[] = {
"---", "1", "2", "3/4", /* 0- 3 */
"???", "5", "???", "???", /* 4- 7 */

3
target/linux/mediatek/dts/mt7622-netgear-wax206.dts
View File

@@ -13,6 +13,7 @@
aliases {
ethernet0 = &gmac0;
label-mac-device = &gmac0;
led-boot = &led_power_r;
led-failsafe = &led_power_r;
led-running = &led_power_g;
@@ -84,6 +85,7 @@
default-state = "off";
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
label = "wifin:green";
linux,default-trigger = "phy0tpt";
};
wifin_blue {
@@ -96,6 +98,7 @@
default-state = "off";
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
label = "wifia:green";
linux,default-trigger = "phy1tpt";
};
wifia_blue {

4
target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
View File

@@ -133,8 +133,8 @@
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";

20
target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
View File

@@ -8,7 +8,7 @@
/ {
model = "Cudy AP3000 Outdoor v1";
compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981-spim-snand-rfb";
compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981";
aliases {
label-mac-device = &wifi;
@@ -42,18 +42,19 @@
leds {
compatible = "gpio-leds";
led_status_green: led@0 {
led_status_green: led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
};
led_status_red: led_1 {
led_status_red: led-1 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
};
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
@@ -89,7 +90,6 @@
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac1: mac@1 {
@@ -148,6 +148,7 @@
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
@@ -163,6 +164,7 @@
label = "bdinfo";
reg = <0x380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
@@ -174,25 +176,23 @@
#nvmem-cell-cells = <1>;
};
};
};
partition@3C0000 {
partition@3c0000 {
label = "FIP";
reg = <0x3C0000 0x0200000>;
reg = <0x3c0000 0x0200000>;
read-only;
};
partition@580000 {
partition@5c0000 {
label = "ubi";
reg = <0x5C0000 0x4000000>;
reg = <0x5c0000 0x4000000>;
compatible = "linux,ubi";
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {

24
target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
View File

@@ -6,7 +6,7 @@
/ {
model = "Cudy M3000 v1";
compatible = "cudy,m3000-v1", "mediatek,mt7981-spim-snand-rfb";
compatible = "cudy,m3000-v1", "mediatek,mt7981";
aliases {
label-mac-device = &gmac0;
@@ -77,7 +77,6 @@
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
@@ -105,19 +104,17 @@
rtl8221b_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
reset-assert-us = <100000>;
reset-deassert-us = <100000>;
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&pio>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
@@ -127,18 +124,18 @@
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partition@0 {
label = "BL2";
reg = <0x0000000 0x0100000>;
@@ -177,6 +174,7 @@
partition@3c0000 {
label = "FIP";
reg = <0x03c0000 0x0200000>;
read-only;
};
partition@5c0000 {

66
target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dtsi
View File

@@ -1,16 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
aliases {
label-mac-device = &gmac1;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
led-boot = &led_sys_red;
led-failsafe = &led_sys_red;
led-running = &led_sys_white;
led-upgrade = &led_sys_white;
serial0 = &uart0;
};
@@ -29,8 +31,8 @@
mode {
label = "mode";
linux,input-type = <EV_SW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
@@ -39,36 +41,40 @@
leds {
compatible = "gpio-leds";
led_status: led_0 {
led_sys_red: led-0 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led_1 {
led_sys_white: led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
};
usb_vbus: regulator-usb {
compatible = "regulator-fixed";
regulator-name = "usb-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
@@ -92,26 +98,17 @@
&mdio_bus {
phy1: phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c45";
phy-mode = "2500base-x";
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
reg = <1>;
reset-assert-us = <100000>;
reset-deassert-us = <100000>;
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&pio>;
realtek,aldps-enable;
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
@@ -122,6 +119,7 @@
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
@@ -147,6 +145,7 @@
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
@@ -162,6 +161,7 @@
label = "bdinfo";
reg = <0x380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
@@ -173,7 +173,6 @@
#nvmem-cell-cells = <1>;
};
};
};
partition@3c0000 {
@@ -190,16 +189,22 @@
};
};
&uart0 {
status = "okay";
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
};
};
&usb_phy {
status = "okay";
};
&watchdog {
&xhci {
status = "okay";
vbus-supply = <&usb_vbus>;
};
&wifi {
@@ -207,8 +212,3 @@
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&xhci {
status = "okay";
vbus-supply = <&usb_vbus>;
};

24
target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
View File

@@ -8,7 +8,7 @@
/ {
model = "Cudy WR3000S v1";
compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
compatible = "cudy,wr3000s-v1", "mediatek,mt7981";
aliases {
label-mac-device = &gmac0;
@@ -42,33 +42,32 @@
leds {
compatible = "gpio-leds";
led_status: led@0 {
led_status: led-status {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led_internet {
led-internet {
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led_wps {
led-wps {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led_wlan2g {
led-wlan2g {
function = LED_FUNCTION_WLAN_2GHZ;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wlan5g {
led-wlan5g {
function = LED_FUNCTION_WLAN_5GHZ;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
@@ -88,7 +87,6 @@
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
@@ -165,6 +163,7 @@
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
@@ -180,6 +179,7 @@
label = "bdinfo";
reg = <0x380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
@@ -193,15 +193,15 @@
};
};
partition@3C0000 {
partition@3c0000 {
label = "FIP";
reg = <0x3C0000 0x0200000>;
reg = <0x3c0000 0x0200000>;
read-only;
};
partition@580000 {
partition@5c0000 {
label = "ubi";
reg = <0x5C0000 0x4000000>;
reg = <0x5c0000 0x4000000>;
compatible = "linux,ubi";
};
};

1
target/linux/octeon/image/Makefile
View File

@@ -92,6 +92,7 @@ define Device/ubnt_unifi-usg
DEVICE_PACKAGES += kmod-gpio-button-hotplug kmod-leds-gpio
DEVICE_DTS := cn5020_ubnt_usg
KERNEL += | append-dtb-to-elf
SUPPORTED_DEVICES += ubnt,usg
endef
TARGET_DEVICES += ubnt_unifi-usg

21
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
View File

@@ -137,6 +137,27 @@
reg = <28>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
reset-deassert-us = <10000>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_YELLOW>;
function = LED_FUNCTION_WAN;
default-state = "keep";
active-low;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
default-state = "keep";
active-low;
};
};
};
};

3
target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
View File

@@ -16,7 +16,8 @@ asus,rt-ax89x)
ucidef_set_led_netdev "sfp" "SFP" "white:sfp" "10g-sfp"
ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
;;
dynalink,dl-wrx36)
dynalink,dl-wrx36|\
spectrum,sax1v1k)
ucidef_set_led_netdev "wan-port-link-green" "WAN-PORT-LINK-GREEN" "90000.mdio-1:1c:green:wan" "wan" "link_2500"
ucidef_set_led_netdev "wan-port-link-yellow" "WAN-PORT-LINK-YELLOW" "90000.mdio-1:1c:yellow:wan" "wan" "tx rx link_10 link_100 link_1000"
;;

4
target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
View File

@@ -34,12 +34,12 @@ case "$FIRMWARE" in
wan_mac=$(jboot_config_read -m -i $(find_mtd_part "config") -o 0xE000)
wifi_mac=$(macaddr_add "$wan_mac" 1)
jboot_eeprom_extract "config" 0xE000
caldata_patch_mac $wifi_mac 0x4
caldata_patch_data "${wifi_mac//:/}" 0x4
;;
dovado,tiny-ac)
wifi_mac=$(mtd_get_mac_ascii u-boot-env INIC_MAC_ADDR)
caldata_extract "factory" 0x0 0x200
caldata_patch_mac $wifi_mac 0x4
caldata_patch_data "${wifi_mac//:/}" 0x4
;;
*)
caldata_die "Please define mtd-eeprom in $board DTS file!"

2
target/linux/realtek/image/rtl838x.mk
View File

@@ -124,7 +124,7 @@ define Device/hpe_1920-8g-poe-180w
DEVICE_MODEL := 1920-8G-PoE+ 180W (JG922A)
DEVICE_PACKAGES += realtek-poe
H3C_DEVICE_ID := 0x00010025
SUPPORTED_DEVICES += hpe_1920-8g-poe
SUPPORTED_DEVICES += hpe,1920-8g-poe
endef
TARGET_DEVICES += hpe_1920-8g-poe-180w