rockchip: backport clk fixes for rk3588
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
@@ -1,6 +1,6 @@
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From a5946bf5ce48ed73fffb1542be606e7b8659b017 Mon Sep 17 00:00:00 2001
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From 2dc66a5ab2c6fb532fbb16107ee7efcb0effbfa5 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Wed, 13 Dec 2023 18:58:43 +0100
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Date: Fri, 26 Jan 2024 19:18:22 +0100
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Subject: [PATCH] clk: rockchip: rk3588: fix CLK_NR_CLKS usage
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CLK_NR_CLKS is not part of the DT bindings and needs to be removed
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@@ -9,6 +9,8 @@ takes care of it by introducing a new function identifying the
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maximum used clock ID at runtime.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20240126182919.48402-2-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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drivers/clk/rockchip/clk-rk3588.c | 5 ++++-
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drivers/clk/rockchip/clk.c | 17 +++++++++++++++++
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@@ -46,8 +48,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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+unsigned long rockchip_clk_find_max_clk_id(struct rockchip_clk_branch *list,
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+ unsigned int nr_clk)
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+{
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+ unsigned long max = 0;
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+ unsigned int idx;
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+ unsigned long max;
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+
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+ for (idx = 0; idx < nr_clk; idx++, list++) {
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+ if (list->id > max)
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@@ -0,0 +1,27 @@
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From 11a29dc2e41ead2be78cfa9d532edf924b461acc Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Fri, 26 Jan 2024 19:18:23 +0100
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Subject: [PATCH] dt-bindings: clock: rk3588: drop CLK_NR_CLKS
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CLK_NR_CLKS should not be part of the binding. Let's drop it, since
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the kernel code no longer uses it either.
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Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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include/dt-bindings/clock/rockchip,rk3588-cru.h | 2 --
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1 file changed, 2 deletions(-)
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--- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
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+++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
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@@ -734,8 +734,6 @@
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#define PCLK_AV1_PRE 719
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#define HCLK_SDIO_PRE 720
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-#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
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-
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/* scmi-clocks indices */
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#define SCMI_CLK_CPUL 0
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@@ -1,12 +1,15 @@
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From fb7ba4ede6ab6c37bc1146f7fa1f07a7810439ab Mon Sep 17 00:00:00 2001
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From c81798cf9dd2f324934585b2b52a0398caefb88e Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Wed, 13 Dec 2023 19:02:57 +0100
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Date: Fri, 26 Jan 2024 19:18:24 +0100
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Subject: [PATCH] dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
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Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed
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for HDMI support.
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Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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include/dt-bindings/clock/rockchip,rk3588-cru.h | 1 +
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1 file changed, 1 insertion(+)
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@@ -19,5 +22,5 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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#define HCLK_SDIO_PRE 720
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+#define PCLK_VO1GRF 721
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#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
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/* scmi-clocks indices */
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@@ -1,6 +1,6 @@
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From 8824bba8426bab1a05b2f285283bc0e99de678d1 Mon Sep 17 00:00:00 2001
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From 326be62eaf2e89767b7b9223f88eaf3c041b98d2 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Wed, 13 Dec 2023 19:06:30 +0100
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Date: Fri, 26 Jan 2024 19:18:25 +0100
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Subject: [PATCH] clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
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Currently pclk_vo1grf is not exposed, but it should be referenced
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@@ -14,6 +14,8 @@ No Fixes tag has been added, since the logic requiring these clocks
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is not yet upstream anyways.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20240126182919.48402-5-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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drivers/clk/rockchip/clk-rk3588.c | 10 ++++------
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1 file changed, 4 insertions(+), 6 deletions(-)
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@@ -1,12 +1,14 @@
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From 1d45059214265717c8bc1fd32b966896e91ec51d Mon Sep 17 00:00:00 2001
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From 2a6e4710672242281347103b64e01693aa823a29 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Tue, 21 Nov 2023 17:52:54 +0100
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Date: Fri, 26 Jan 2024 19:18:26 +0100
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Subject: [PATCH] clk: rockchip: rk3588: fix indent
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pclk_mailbox2 is the only RK3588 clock indented with one tab instead of
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two tabs. Let's fix this.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20240126182919.48402-6-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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drivers/clk/rockchip/clk-rk3588.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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@@ -1,6 +1,6 @@
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From 923c6fa62da49b895fc110e2bad8d6e812b37d1a Mon Sep 17 00:00:00 2001
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From dae3e57000fb2d6f491e3ee2956f5918326d6b72 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Wed, 22 Nov 2023 19:23:13 +0100
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Date: Fri, 26 Jan 2024 19:18:27 +0100
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Subject: [PATCH] clk: rockchip: rk3588: use linked clock ID for GATE_LINK
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In preparation for properly supporting GATE_LINK switch the unused
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@@ -8,6 +8,8 @@ linked clock argument from the clock's name to its ID. This allows
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easy and fast lookup of the 'struct clk'.
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20240126182919.48402-7-sebastian.reichel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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drivers/clk/rockchip/clk-rk3588.c | 46 +++++++++++++++----------------
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1 file changed, 23 insertions(+), 23 deletions(-)
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@@ -1,7 +1,21 @@
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From 42987730c377951c90e9cfe55652e812db4a9ac9 Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Thu, 23 Nov 2023 17:58:21 +0100
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Subject: [PATCH] clk: rockchip: implement proper GATE_LINK support
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To: Michael Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@kernel.org>,
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linux-clk@vger.kernel.org
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Cc: Elaine Zhang <zhangqing@rock-chips.com>,
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Kever Yang <kever.yang@rock-chips.com>,
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Heiko Stuebner <heiko@sntech.de>,
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Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Conor Dooley <conor+dt@kernel.org>,
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huangtao@rock-chips.com, andy.yan@rock-chips.com,
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devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
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Sebastian Reichel <sebastian.reichel@collabora.com>,
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kernel@collabora.com
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Subject: [PATCH v8 7/7] clk: rockchip: implement proper GATE_LINK support
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Date: Fri, 26 Jan 2024 19:18:28 +0100 [thread overview]
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Message-ID: <20240126182919.48402-8-sebastian.reichel@collabora.com> (raw)
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In-Reply-To: <20240126182919.48402-1-sebastian.reichel@collabora.com>
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Recent Rockchip SoCs have a new hardware block called Native Interface
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Unit (NIU), which gates clocks to devices behind them. These effectively
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