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rockchip: backport upstream rock 5a and nanopc t6 updates

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2024-09-06 15:11:57 +08:00
parent f6ff069fb9
commit e600d67da2
21 changed files with 2445 additions and 193 deletions
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3
target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
View File

@@ -8,9 +8,6 @@ boardname="${board##*,}"
board_config_update
case $board in
friendlyarm,nanopc-t6)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth2"
;;
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2c-plus|\
friendlyarm,nanopi-r2s|\

110
target/linux/rockchip/patches-6.6/051-04-v6.12-arm64-dts-rockchip-enable-PCIe-on-M.2-E-key-for-Radxa-ROC.patch Normal file
View File

@@ -0,0 +1,110 @@
From b728d4c51f0ce9207daf502f3a85073785c46319 Mon Sep 17 00:00:00 2001
From: FUKAUMI Naoki <naoki@radxa.com>
Date: Mon, 26 Aug 2024 17:04:56 +0900
Subject: [PATCH] arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK
5A
Enable pcie2x1l2 and related combphy/regulator routed to M.2 E key
connector on Radxa ROCK 5A.
Tested with Radxa Wireless Module A8:
$ lspci
0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01)
0004:41:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller
$ ip l
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000
link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
2: end0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000
link/ether c2:58:fc:70:55:86 brd ff:ff:ff:ff:ff:ff
3: wlP4p65s0: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether 2c:05:47:65:5b:ed brd ff:ff:ff:ff:ff:ff
$ lsusb
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 001 Device 002: ID 1a40:0101 Terminus Technology Inc. Hub
Bus 001 Device 003: ID 0bda:b85b Realtek Semiconductor Corp. Bluetooth Radio
Bus 002 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
Bus 004 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 005 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 006 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 006 Device 002: ID 0789:0336 Logitec Corp. LMD USB Device
Bus 007 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 008 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
$ hciconfig
hci0: Type: Primary Bus: USB
BD Address: 2C:05:47:65:5B:EE ACL MTU: 1021:6 SCO MTU: 255:12
UP RUNNING
RX bytes:2698 acl:0 sco:0 events:329 errors:0
TX bytes:69393 acl:0 sco:0 commands:329 errors:0
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240826080456.525-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -64,6 +64,18 @@
regulator-max-microvolt = <12000000>;
};
+ vcc3v3_wf: vcc3v3-wf-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_wf";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pow_en>;
+ pinctrl-names = "default";
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -113,6 +125,10 @@
};
};
+&combphy0_ps {
+ status = "okay";
+};
+
&combphy2_psu {
status = "okay";
};
@@ -292,6 +308,14 @@
};
};
+&pcie2x1l2 {
+ pinctrl-0 = <&pcie20x1m0_pins>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_wf>;
+ status = "okay";
+};
+
&pinctrl {
leds {
io_led: io-led {
@@ -299,6 +323,12 @@
};
};
+ pcie {
+ pow_en: pow-en {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
power {
vcc_5v0_en: vcc-5v0-en {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;

2
target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch
View File

@@ -53,7 +53,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -711,6 +711,10 @@
@@ -741,6 +741,10 @@
};
};

33
target/linux/rockchip/patches-6.6/053-02-v6.9-arm64-dts-rockchip-nanopc-t6-sdmmc-beautification.patch Normal file
View File

@@ -0,0 +1,33 @@
From 9e1faff1cbc877903d019a7943d37ddc5042704d Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Thu, 28 Dec 2023 17:29:35 +0000
Subject: [PATCH] arm64: dts: rockchip: nanopc-t6 sdmmc beautification
drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi
order no-sdio & no-mmc properties while we are here
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231228173011.2863-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -536,13 +536,12 @@
};
&sdmmc {
- max-frequency = <200000000>;
- no-sdio;
- no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
+ no-mmc;
+ no-sdio;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;

2
target/linux/rockchip/patches-6.6/053-02-v6.9-arm64-dts-rockchip-correct-gpio_pwrctrl1-typo-on-nanopc-t.patch → target/linux/rockchip/patches-6.6/053-03-v6.9-arm64-dts-rockchip-correct-gpio_pwrctrl1-typo-on-nanopc-t.patch
View File

@@ -15,7 +15,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -591,7 +591,7 @@
@@ -590,7 +590,7 @@
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {

2
target/linux/rockchip/patches-6.6/053-03-v6.9-arm64-dts-rockchip-enable-NanoPC-T6-MiniPCIe-power.patch → target/linux/rockchip/patches-6.6/053-04-v6.9-arm64-dts-rockchip-enable-NanoPC-T6-MiniPCIe-power.patch
View File

@@ -47,7 +47,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -885,6 +901,7 @@
@@ -884,6 +900,7 @@
};
&u2phy2_host {

25
target/linux/rockchip/patches-6.6/053-05-v6.9-arm64-dts-rockchip-add-sdmmc-card-detect-to-the-nanopc-t6.patch Normal file
View File

@@ -0,0 +1,25 @@
From d8bb6c2311b6b2aad11b937f96db1d6c3393246a Mon Sep 17 00:00:00 2001
From: John Clark <inindev@gmail.com>
Date: Sat, 30 Dec 2023 11:50:53 -0500
Subject: [PATCH] arm64: dts: rockchip: add sdmmc card detect to the nanopc-t6
The nanopc-t6 has an sdmmc card detect connected to gpio0_a4 which is
active low.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231230165053.3781-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -555,6 +555,7 @@
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
no-mmc;
no-sdio;

4
target/linux/rockchip/patches-6.6/053-04-v6.9-arm64-dts-rockchip-fix-nanopc-t6-sdmmc-regulator.patch → target/linux/rockchip/patches-6.6/053-06-v6.9-arm64-dts-rockchip-fix-nanopc-t6-sdmmc-regulator.patch
View File

@@ -34,8 +34,8 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
compatible = "regulator-fixed";
enable-active-high;
@@ -560,7 +571,7 @@
cap-sd-highspeed;
disable-wp;
no-mmc;
no-sdio;
sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
+ vmmc-supply = <&vcc3v3_sd_s0>;

1916
target/linux/rockchip/patches-6.6/053-08-v6.12-arm64-dts-rockchip-prepare-NanoPC-T6-for-LTS-board.patch Normal file
View File

File diff suppressed because it is too large Load Diff

40
target/linux/rockchip/patches-6.6/053-09-v6.12-arm64-dts-rockchip-add-SPI-flash-on-NanoPC-T6.patch Normal file
View File

@@ -0,0 +1,40 @@
From a22a629c63b1addcf2d81eaf30383c1deca5b7a9 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:56 +0200
Subject: [PATCH] arm64: dts: rockchip: add SPI flash on NanoPC-T6
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -576,6 +576,21 @@
status = "okay";
};
+/* optional on non-LTS, populated on LTS version */
+&sfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim1_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <104000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;

53
target/linux/rockchip/patches-6.6/053-10-v6.12-arm64-dts-rockchip-add-IR-receiver-to-NanoPC-T6.patch Normal file
View File

@@ -0,0 +1,53 @@
From b70caff0f9592719b6c977e291c33192e959c9d4 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:57 +0200
Subject: [PATCH] arm64: dts: rockchip: add IR-receiver to NanoPC-T6
FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line
which ends as GPIO0_D4.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -25,6 +25,13 @@
stdout-path = "serial2:1500000n8";
};
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
leds {
compatible = "gpio-leds";
@@ -240,7 +247,7 @@
"HEADER_10", "HEADER_08", "HEADER_32", "",
/* GPIO0 D0-D7 */
"", "", "", "",
- "", "", "", "";
+ "IR receiver [PWM3_IR_M0]", "", "", "";
};
&gpio1 {
@@ -504,6 +511,12 @@
};
};
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pcie {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;

28
target/linux/rockchip/patches-6.6/053-11-v6.12-arm64-dts-rockchip-enable-GPU-on-NanoPC-T6.patch Normal file
View File

@@ -0,0 +1,28 @@
From e86cbf999cda2d44f32ec622537024e3b923080d Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:58 +0200
Subject: [PATCH] arm64: dts: rockchip: enable GPU on NanoPC-T6
Enable the Mali GPU on FriendlyELEC NanoPC-T6
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -310,6 +310,11 @@
"", "", "", "";
};
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;

130
target/linux/rockchip/patches-6.6/053-12-v6.12-arm64-dts-rockchip-enable-USB-C-on-NanoPC-T6.patch Normal file
View File

@@ -0,0 +1,130 @@
From c9ba75320e5a12dc9d574603acf29b38a920b40c Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:26:59 +0200
Subject: [PATCH] arm64: dts: rockchip: enable USB-C on NanoPC-T6
Enable the USB-C port on FriendlyELEC NanoPC-T6.
Works one way so far but still better than before.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 76 ++++++++++++++++++-
1 file changed, 72 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -137,6 +137,8 @@
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
+ regulator-always-on;
+ regulator-boot-on;
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
@@ -393,11 +395,34 @@
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C";
- power-role = "dual";
- try-power-role = "sink";
+ power-role = "source";
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
- sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- op-sink-microwatt = <1000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_hs: endpoint {
+ remote-endpoint = <&usb_host0_xhci_drd_sw>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ usbc0_ss: endpoint {
+ remote-endpoint = <&usbdp_phy0_typec_ss>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ usbc0_sbu: endpoint {
+ remote-endpoint = <&usbdp_phy0_typec_sbu>;
+ };
+ };
+ };
};
};
@@ -944,6 +969,14 @@
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
&u2phy2_host {
phy-supply = <&vdd_4g_3v3>;
status = "okay";
@@ -961,6 +994,29 @@
status = "okay";
};
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_typec_ss: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_ss>;
+ };
+
+ usbdp_phy0_typec_sbu: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&usbc0_sbu>;
+ };
+ };
+};
+
&usb_host0_ehci {
status = "okay";
};
@@ -969,6 +1025,18 @@
status = "okay";
};
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+ usb-role-switch;
+
+ port {
+ usb_host0_xhci_drd_sw: endpoint {
+ remote-endpoint = <&usbc0_hs>;
+ };
+ };
+};
+
&usb_host1_ehci {
status = "okay";
};

45
target/linux/rockchip/patches-6.6/053-13-v6.12-arm64-dts-rockchip-add-Mask-Rom-key-on-NanoPC-T6.patch Normal file
View File

@@ -0,0 +1,45 @@
From da439eed06ff6806f22341ab0468226afc555305 Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Thu, 29 Aug 2024 14:27:00 +0200
Subject: [PATCH] arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
Mask Rom key is connected to SARADC and can be read from OS.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -8,6 +8,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
@@ -21,6 +22,20 @@
mmc1 = &sdmmc;
};
+ adc-keys-0 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "Mask Rom";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <2000>;
+ };
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};

28
target/linux/rockchip/patches-6.6/053-14-v6.12-arm64-dts-rockchip-use-correct-fcs-suspend-voltage-selecto.patch Normal file
View File

@@ -0,0 +1,28 @@
From 170c77276d470a63d22a2634a38846dd88538637 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Thu, 29 Aug 2024 15:20:58 +0200
Subject: [PATCH] arm64: dts: rockchip: use correct
fcs,suspend-voltage-selector on NanoPC-T6
A remant from moving from the vendor kernel, the regulator is using
a fairchild fcs prefix instead of rockchip,* in the mainline kernel
according to its binding.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -378,7 +378,7 @@
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
- rockchip,suspend-voltage-selector = <1>;
+ fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;

2
target/linux/rockchip/patches-6.6/055-02-v6.9-arm64-dts-rockchip-remove-redundant-cd-gpios-from-rk3588.patch
View File

@@ -45,7 +45,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
vmmc-supply = <&vcc_3v3_s3>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -365,7 +365,6 @@
@@ -395,7 +395,6 @@
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;

44
target/linux/rockchip/patches-6.6/100-rockchip-use-system-LED-for-OpenWrt.patch
View File

@@ -471,55 +471,27 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
@@ -19,6 +20,11 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -20,6 +20,10 @@
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
+
+ led-boot = &sys_led;
+ led-failsafe = &sys_led;
+ led-running = &sys_led;
+ led-upgrade = &sys_led;
};
chosen {
@@ -27,20 +33,19 @@
leds {
compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sys_led_pin>, <&usr_led_pin>;
adc-keys-0 {
@@ -53,7 +57,6 @@
sys_led: led-0 {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_STATUS;
gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
- label = "system-led";
label = "system-led";
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&sys_led_pin>;
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
usr_led: led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WAN;
gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
- label = "user-led";
- pinctrl-names = "default";
- pinctrl-0 = <&usr_led_pin>;
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
@@ -20,6 +20,11 @@

16
target/linux/rockchip/patches-6.6/103-arm64-dts-rockchip-lower-mmc-speed.patch
View File

@@ -34,9 +34,9 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
&u2phy0_host {
phy-supply = <&vdd_5v>;
};
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -562,8 +562,7 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -618,8 +618,7 @@
no-sd;
non-removable;
max-frequency = <200000000>;
@@ -46,10 +46,10 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
};
@@ -575,7 +574,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
@@ -631,7 +630,7 @@
disable-wp;
no-mmc;
no-sdio;
- sd-uhs-sdr104;
+ sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sd_s0>;
@@ -78,7 +78,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -360,8 +360,7 @@
@@ -390,8 +390,7 @@
no-sdio;
no-sd;
non-removable;
@@ -88,7 +88,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
};
@@ -373,7 +372,7 @@
@@ -403,7 +402,7 @@
max-frequency = <150000000>;
no-sdio;
no-mmc;

22
target/linux/rockchip/patches-6.6/124-02-arm64-dts-rockchip-nanopc-t6-add-lower-USB3-port.patch
View File

@@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -109,6 +109,28 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -118,6 +118,28 @@
vin-supply = <&vcc12v_dcin>;
};
@@ -26,10 +26,10 @@
+ pinctrl-0 = <&vcc5v0_host30_en>;
+ };
+
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
/* vcc4v0_sys powers the RK806, RK860's */
vcc4v0_sys: vcc4v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc-1v1-nldo-s3";
@@ -543,6 +565,10 @@
@@ -599,6 +621,10 @@
usbc0_int: usbc0-int {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
@@ -40,7 +40,7 @@
};
};
@@ -915,6 +941,11 @@
@@ -994,6 +1020,11 @@
status = "okay";
};
@@ -52,7 +52,7 @@
&u2phy2_host {
phy-supply = <&vdd_4g_3v3>;
status = "okay";
@@ -924,6 +955,10 @@
@@ -1003,6 +1034,10 @@
status = "okay";
};
@@ -63,8 +63,8 @@
&u2phy2 {
status = "okay";
};
@@ -932,6 +967,10 @@
status = "okay";
@@ -1034,6 +1069,10 @@
};
};
+&usbdp_phy1 {
@@ -74,7 +74,7 @@
&usb_host0_ehci {
status = "okay";
};
@@ -947,3 +986,7 @@
@@ -1061,3 +1100,7 @@
&usb_host1_ohci {
status = "okay";
};

125
target/linux/rockchip/patches-6.6/124-03-arm64-dts-rockchip-nanopc-t6-add-USB-C-support.patch
View File

@@ -1,125 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -413,6 +413,48 @@
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <1000000>;
+
+ altmodes {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ altmode@0 {
+ reg = <0>;
+ svid = <0xff01>;
+ vdo = <0xffffffff>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_orien_sw: endpoint {
+ remote-endpoint = <&usbdp_phy0_orientation_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dp_altmode_mux: endpoint {
+ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
+ };
+ };
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_role_sw: endpoint@0 {
+ remote-endpoint = <&usb_host0_xhci_role_switch>;
+ };
+ };
};
};
@@ -941,6 +983,10 @@
status = "okay";
};
+&u2phy0_otg {
+ status = "okay";
+};
+
&u2phy1_otg {
phy-supply = <&vcc5v0_host_30>;
status = "okay";
@@ -955,6 +1001,10 @@
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+};
+
&u2phy1 {
status = "okay";
};
@@ -967,6 +1017,29 @@
status = "okay";
};
+&usbdp_phy0 {
+ orientation-switch;
+ rockchip,dp-lane-mux = <0 1 2 3 >;
+ svid = <0xff01>;
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ usbdp_phy0_orientation_switch: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_orien_sw>;
+ };
+
+ usbdp_phy0_dp_altmode_mux: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dp_altmode_mux>;
+ };
+ };
+};
+
&usbdp_phy1 {
status = "okay";
};
@@ -979,6 +1052,21 @@
status = "okay";
};
+&usb_host0_xhci {
+ dr_mode = "host";
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb_host0_xhci_role_switch: endpoint {
+ remote-endpoint = <&usbc0_role_sw>;
+ };
+ };
+};
+
&usb_host1_ehci {
status = "okay";
};

8
target/linux/rockchip/patches-6.6/610-arm64-rockchip-add-OF-node-for-eth.patch
View File

@@ -309,9 +309,9 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -522,6 +522,20 @@
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -530,6 +530,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie2_0_rst>;
status = "okay";
@@ -332,7 +332,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
&pcie2x1l1 {
@@ -538,6 +552,20 @@
@@ -546,6 +560,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie2_2_rst>;
status = "okay";