mediatek: add support for JDCloud RE-CP-03
Hardware specification: SoC: MediaTek MT7986A 4x A53 Flash: 128GB eMMC RAM: 1GB DDR4 Ethernet: 4x 1GbE, 1x 2.5GbE Switch: MediaTek MT7531AE WiFi: MediaTek MT7976C Button: Reset, Joylink Power: DC 12V 2A Flash instructions: 1. Download and flash the vendor migration firmware via webUI: https://firmware.download.immortalwrt.eu.org/cnsztl/mediatek/filogic/openwrt-mediatek-mt7986-jdcloud_re-cp-03-vendor-migration.bin (Default address is 192.168.68.1, user root, no password) 2. After device has booted up, write new GPT table: dd if=immortalwrt-mediatek-filogic-jdcloud_re-cp-03-gpt.bin of=/dev/mmcblk0 bs=512 seek=0 count=34 conv=fsync 3. Erase and write new BL2: echo 0 > /sys/block/mmcblk0boot0/force_ro dd if=/dev/zero of=/dev/mmcblk0boot0 bs=512 count=8192 conv=fsync dd if=immortalwrt-mediatek-filogic-jdcloud_re-cp-03-preloader.bin of=/dev/mmcblk0boot0 bs=512 conv=fsync 4. Erase and write new FIP: dd if=/dev/zero of=/dev/mmcblk0 bs=512 seek=13312 count=8192 conv=fsync dd if=immortalwrt-mediatek-filogic-jdcloud_re-cp-03-bl31-uboot.fip of=/dev/mmcblk0 bs=512 seek=13312 conv=fsync 5. Set static IP on your PC: IP 192.168.1.254/24, GW 192.168.1.1 6. Serve Immortalwrt initramfs image using TFTP server. 7. Cut off the power and re-engage, wait for TFTP recovery to complete. 8. After ImmortalWrt has booted, perform sysupgrade. 9. Additionally, if you want to have eMMC recovery boot feature: (Don't worry! You will always have TFTP recovery boot feature.) dd if=immortalwrt-mediatek-filogic-jdcloud_re-cp-03-initramfs-recovery.itb of=/dev/mmcblk0p4 bs=512 conv=fsync Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
@@ -93,6 +93,11 @@ zyxel,ex5601-t0-ubootmod)
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imou,lc-hx3001-ubootmod)
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ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x80000" "1"
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;;
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jdcloud,re-cp-03)
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local envdev=$(find_mmc_part "ubootenv" "mmcblk0")
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ubootenv_add_uci_config "$envdev" "0x0" "0x40000" "0x40000" "1"
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ubootenv_add_uci_config "$envdev" "0x40000" "0x40000" "0x40000" "1"
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;;
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livinet,zr-3020|\
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livinet,zr-3020-ubootmod|\
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qihoo,360t7-ubootmod)
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@@ -207,15 +207,15 @@
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+};
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+
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+&mmc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_default>;
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+ bus-width = <8>;
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+ max-frequency = <200000000>;
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+ cap-mmc-highspeed;
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+ cap-mmc-hw-reset;
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+ max-frequency = <200000000>;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_default>;
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+ vmmc-supply = <®_3p3v>;
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+ vqmmc-supply = <®_1p8v>;
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+ non-removable;
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+ status = "okay";
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+};
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+
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291
target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
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291
target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
Normal file
@@ -0,0 +1,291 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7986a.dtsi"
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/ {
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model = "JDCloud RE-CP-03";
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compatible = "jdcloud,re-cp-03", "mediatek,mt7986a";
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aliases {
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led-boot = &red_led;
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led-failsafe = &red_led;
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led-running = &green_led;
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led-upgrade = &green_led;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-joylink {
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label = "joylink";
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linux,code = <BTN_0>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led-0 {
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label = "blue:status";
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gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
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};
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red_led: led-1 {
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label = "red:status";
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gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
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};
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green_led: led-2 {
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label = "green:status";
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gpios = <&pio 12 GPIO_ACTIVE_LOW>;
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};
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&crypto {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "2500base-x";
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phy-handle = <&phy6>;
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&mdio {
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phy6: phy@6 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <6>;
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reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <50000>;
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realtek,aldps-enable;
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};
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&mmc0 {
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bus-width = <8>;
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cap-mmc-highspeed;
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hs400-ds-delay = <0x14014>;
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max-frequency = <200000000>;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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no-sd;
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no-sdio;
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non-removable;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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status = "okay";
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};
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&pio {
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mmc0_pins_default: mmc0-pins-default {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>;
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>;
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>;
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>;
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};
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};
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mmc0_pins_uhs: mmc0-uhs-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>;
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>;
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>;
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>;
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};
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};
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wf_2g_5g_pins: wf-2g-5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan1";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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};
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port@4 {
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reg = <4>;
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label = "lan4";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&trng {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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pinctrl-names = "default";
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pinctrl-0 = <&wf_2g_5g_pins>;
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status = "okay";
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};
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@@ -24,6 +24,7 @@ mediatek_setup_interfaces()
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
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;;
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asus,tuf-ax4200|\
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jdcloud,re-cp-03|\
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mediatek,mt7981-rfb|\
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zbtlink,zbt-z8102ax|\
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zyxel,ex5601-t0-stock|\
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@@ -152,6 +153,11 @@ mediatek_setup_macs()
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[ -n "$lan_mac" ] || lan_mac=$(macaddr_add $(mtd_get_mac_binary Factory 0x4) -1)
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wan_mac=$(macaddr_add $lan_mac 2)
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;;
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jdcloud,re-cp-03)
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wan_mac=$(mmc_get_mac_binary factory 0x2a)
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lan_mac=$(mmc_get_mac_binary factory 0x24)
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label_mac=$lan_mac
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;;
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mercusys,mr90x-v1)
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label_mac=$(get_mac_binary "/tmp/tp_data/default-mac" 0)
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lan_mac=$label_mac
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@@ -58,7 +58,8 @@ case "$FIRMWARE" in
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CI_UBIPART="UBI_DEV"
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caldata_extract_ubi "Factory" 0x0 0x1000
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;;
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glinet,gl-mt6000)
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glinet,gl-mt6000|\
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jdcloud,re-cp-03)
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caldata_extract_mmc "factory" 0x0 0x1000
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;;
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esac
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@@ -63,7 +63,8 @@ case "$board" in
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esac
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[ "$PHYNBR" = "1" ] && echo "$addr" > /sys${DEVPATH}/macaddress
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;;
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cmcc,rax3000m-emmc-ubootmod)
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cmcc,rax3000m-emmc-ubootmod|\
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jdcloud,re-cp-03)
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[ "$PHYNBR" = "1" ] && mmc_get_mac_binary factory 0xa > /sys${DEVPATH}/macaddress
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;;
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cudy,wr3000-v1)
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@@ -0,0 +1,12 @@
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. /lib/functions/system.sh
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do_extract_caldata() {
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case $(board_name) in
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glinet,gl-mt6000|\
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jdcloud,re-cp-03)
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FIRMWARE=mediatek/mt7986_eeprom_mt7976_dual.bin \
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sh /etc/hotplug.d/firmware/11-mt76-caldata
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;;
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esac
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}
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boot_hook_add preinit_main do_extract_caldata
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@@ -117,6 +117,10 @@ platform_do_upgrade() {
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CI_KERNPART="fit"
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nand_do_upgrade "$1"
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;;
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jdcloud,re-cp-03)
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CI_KERNPART="production"
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emmc_do_upgrade "$1"
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;;
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mercusys,mr90x-v1)
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CI_UBIPART="ubi0"
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nand_do_upgrade "$1"
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@@ -176,6 +180,7 @@ platform_copy_config() {
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cmcc,rax3000m-emmc-ubootmod|\
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glinet,gl-mt2500|\
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glinet,gl-mt6000|\
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jdcloud,re-cp-03|\
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ubnt,unifi-6-plus)
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emmc_copy_config
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;;
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@@ -623,6 +623,32 @@ define Device/jcg_q30-ubootmod
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endef
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TARGET_DEVICES += jcg_q30-ubootmod
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define Device/jdcloud_re-cp-03
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DEVICE_VENDOR := JDCloud
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DEVICE_MODEL := RE-CP-03
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DEVICE_DTS := mt7986a-jdcloud-re-cp-03
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DEVICE_DTS_DIR := ../dts
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DEVICE_DTC_FLAGS := --pad 4096
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DEVICE_DTS_LOADADDR := 0x43f00000
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DEVICE_PACKAGES := kmod-mt7986-firmware mt7986-wo-firmware \
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e2fsprogs f2fsck mkf2fs
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KERNEL_LOADADDR := 0x44000000
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KERNEL := kernel-bin | gzip
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KERNEL_INITRAMFS := kernel-bin | lzma | \
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fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
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KERNEL_INITRAMFS_SUFFIX := -recovery.itb
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IMAGES := sysupgrade.itb
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IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
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IMAGE/sysupgrade.itb := append-kernel | \
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fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | \
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pad-rootfs | append-metadata
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ARTIFACTS :=gpt.bin preloader.bin bl31-uboot.fip
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ARTIFACT/gpt.bin := mt798x-gpt emmc
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ARTIFACT/preloader.bin := mt7986-bl2 emmc-ddr4
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ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot jdcloud_re-cp-03
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endef
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TARGET_DEVICES += jdcloud_re-cp-03
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define Device/livinet_zr-3020-common
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DEVICE_VENDOR := Livinet
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DEVICE_MODEL := ZR-3020
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Reference in New Issue
Block a user