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320 Commits

Author SHA1 Message Date
Hauke Mehrtens
94cd25cb69 OpenWrt v23.05.0-rc3: adjust config defaults
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2023-08-20 21:50:15 +02:00
Stijn Tintel
5deed175a5 hostapd: revert upstream commit to fix #13156
Commit e978072baaca ("Do prune_association only after the STA is
authorized") causes issues when an STA roams from one interface to
another interface on the same PHY. The mt7915 driver is not able to
handle this properly. While the commits fixes a DoS, there are other
devices and drivers with the same limitation, so revert to the orginal
behavior for now, until we have a better solution in place.

Fixes: #13156
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
(cherry picked from commit 324673914d)
2023-08-19 16:01:06 +02:00
Mathew McBride
a506859f60 armsr: add kmod-sfp to default device profile
This brings the 23.05 branch into parity with the main.
kmod-sfp was in the main branch profile but not the 23.05 version.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2023-08-19 15:11:55 +02:00
Mathew McBride
cebed31c1f armsr: armv8: fix invalid symbol value for FSL_ENETC_QOS
The kernel FSL_ENETC_QOS option is only a compile time
option, it does not result in a separate module being built.

Set it to 'y' to resolve a warning from the kernel compile:

.config:2654:warning: symbol value 'm' invalid for FSL_ENETC_QOS

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Fixes: c3151b6f04 ("armvirt: 64: add support for other SystemReady-compatible vendors")
(cherry picked from commit 7770d08e2b)
2023-08-19 15:11:55 +02:00
Mathew McBride
3c316f3e24 armsr: armv8: package and select MDIO driver for Thunder SoC's
This MDIO driver was already being built, but not installed due
to being selected by the ThunderX Ethernet driver.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 0018b33531)
2023-08-19 15:11:55 +02:00
Mathew McBride
2a46bd9a01 armsr: add Marvell (Cavium) ThunderX2 network driver
The initial armv8 module incorrectly labelled the Thunder(v1) as
supporting the ThunderX2, when they have different drivers.

Add kmod-octeon-tx2 to support the newer devices.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 7c5bdff9c4)
2023-08-19 15:11:55 +02:00
Mathew McBride
3477c79c6b armsr: armv8: add bcmgenet (Raspberry Pi 4 GENET) to profile
kmod-bcmgenet is needed for Ethernet support on the
Raspberry Pi 4.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 911ee97774)
2023-08-19 15:11:55 +02:00
Mathew McBride
80d1eb4c2a armsr: armv8: add Broadcom GENET and MDIO modules
These are used by common Broadcom SoC's like
the BCM2711 (RPi4) and iProc network processor.

Tested on the RPi4B using the Raspberry Pi
UEFI+ACPI firmware[1].

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] - https://github.com/pftf/RPi4

(cherry picked from commit 27ca83c627)
2023-08-19 15:11:55 +02:00
Mathew McBride
dfb159c04b armsr: armv8: enable AHCI/SATA controllers for mvebu,qoriq,juno
When comparing the generated OpenWrt .config to the Linux arm64
defconfig, I noticed these SATA controllers were not included.
As they may be used as a boot drive, they should be built into
the kernel.

CONFIG_SATA_MVEBU is for Marvell platforms.
CONFIG_SATA_QORIQ is for NXP Layerscape.
CONFIG_SATA_SIL24 is for Arm's Juno development board, see Linux
kernel commit d7c38ff1cd86 ("arm64: defconfig: Add Juno SATA
controller").

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 9cb173e9f1)
2023-08-19 15:11:55 +02:00
Mathew McBride
daf99a12e1 armsr: armv8: synchronize PCIE related options with arm64 defconfig
This turns on various PCI related options which are enabled
in the Linux kernel arch/arm64/configs/defconfig but not
yet in the OpenWrt config.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 15d3536c9d)
2023-08-19 15:11:55 +02:00
Mathew McBride
24b35fdce9 armsr: armv8: enable Broadcom arch'es
This is part of an effort to reduce differences between
the OpenWrt armsr/armv8 config and Linux arm64 defconfig.

This enables CONFIG_ARCH_BCM and downstream
CONFIG_ARCH_BCM2835 (= BCM2711 like Raspberry Pi 4)
and CONFIG_ARCH_BCM_IPROC (Broadcom iProc packet processors).

The broadband specific SoC's (ARCH_BCMBCA) are left out
as it is assumed these will not be doing EFI boot.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.5/5.15 version of commit df23eed179)
2023-08-19 15:11:55 +02:00
Mathew McBride
cb0534d2ed armsr: armv8: enable CONFIG_ARCH_RENESAS
Renesas markets several embedded Arm64 SoCs in the
RZ series (RZ/G, RZ/V), so should be enabled in
a general purpose target.

Automotive (R-Car) SoC's are not enabled by this change.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 1ff4f4df23)
2023-08-19 15:11:55 +02:00
Mathew McBride
14f7254a6a armsr: enable ACPI_BUTTON
A review of the generated OpenWrt kernel .config
vs the Linux arm64 defconfig showed that this
option was not being enabled, as it is disabled
in OpenWrt's generic config.

ACPI_BUTTON is needed to report and respond to
power button events, so it should be enabled.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit c4c60e4b19)
2023-08-19 15:11:55 +02:00
Mathew McBride
f517d8a518 armsr: armv8: sync CPU features, EFI, CMA and scheduler options with Linux defconfig
To bring the armsr/armv8 kernel configuration closer to the Linux
arm64 defconfig, synchronize options related to CPU features
(especially more recent Armv8.X variants), scheduler, EFI vars,
CMA and scheduler options.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version commit 22e0c7be47)
2023-08-19 15:11:55 +02:00
Mathew McBride
88e7fe8741 armsr: armv8: enable KVM host
x86/64 enables support for KVM so I can't see a reason why
not on armsr/armv8 as well.

Arm CPU errata workaround items related to virtualization
are also enabled by this change.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit e505873e65)
2023-08-19 15:11:55 +02:00
Mathew McBride
2c69d3e692 kernel: default ARM_PMU on for armsr/armv8
CONFIG_ARM_PMU (Arm Performance Monitor Unit) is a requirement
to use KVM (virtualization) from Linux 5.11+, as the virtualised
guest has virtualized PMU access.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 76d4a7c84a)
2023-08-19 15:11:55 +02:00
Mathew McBride
e306e46a8d armsr: armv8: sync Arm64 erratum options with kernel defconfig
To reduce differences with the Linux arm64 defconfig,
sync the enabled erratum items with defconfig.

There are still some options not selected due to
CONFIG_KVM or other options not enabled in OpenWrt
by default.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 5c4239ac3f)
2023-08-19 15:11:55 +02:00
Tianling Shen
6eb6a75b8d kernel: modules: add xdp-sockets-diag support
Support for PF_XDP sockets monitoring interface used by the ss tool.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 06e64f9b36)
2023-08-19 15:06:52 +02:00
John Audia
097d6890ba kernel: bump 5.15 to 5.15.127
Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.127

All patches automatically rebased.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 973c5d4a1d)
2023-08-19 11:59:15 +02:00
Hauke Mehrtens
c57275df67 scripts: qemustart: Fix x86/legacy bootup
The ide-drive option was renamed to ide-hd in qemu 6.0.
With this change qemu is starting again on Debian 12.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 497012ab4e)
2023-08-15 17:19:05 +02:00
Hauke Mehrtens
dd30399cae x86: Add virtualization time sync support
This compiles the CONFIG_PTP_1588_CLOCK support into the kernel binary
and activates the drivers for KVM and VMware which allow syncing the
host time with the VM when OpenWrt is running in a VM. With this change
the CONFIG_HYPERV_UTILS driver is now build into the kernel, because it
depends on the PTP framework being compiled in. CONFIG_HYPERV_UTILS was
build as a module, but not packages before.

Fixes: #13277
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 54d470ed0e)
2023-08-15 17:19:05 +02:00
Hauke Mehrtens
f28a2a5094 x86: Activate CONFIG_PCIEASPM
This activates PCI Express ASPM control in Linux. Without this option it
is completely controlled by the BIOS, now Linux will take over and apply
some workarounds if needed.

Fixes: #13248
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit ff71035751)
2023-08-15 17:19:05 +02:00
Ivan Pavlov
4e066f1f0b uboot-envtools: add u-boot env config for Xiaomi mi-mini
Add u-boot env config for Xiaomi mi-mini for using fw_printenv and fw_setenv on this board

Signed-off-by: Ivan Pavlov <AuthorReflex@gmail.com>
(cherry picked from commit a87bc138cf)
2023-08-15 17:19:05 +02:00
Ivan Pavlov
5569b92cb3 ramips: improve Xiaomi mi-mini indications
Sets status indications led color on Xiaomi mi-mini router as other Xiaomi routers

Signed-off-by: Ivan Pavlov <AuthorReflex@gmail.com>
(cherry picked from commit 54e5e396c5)
2023-08-15 17:19:05 +02:00
Robert Marko
4956ff40c5 ipq40xx: meraki: define DTB load address
It seems that the Meraki bootloader does not respect the kernel ARM booting
specification[1] that requires that address where DTB is located needs to
be 64-bit aligned and often places the DTB on a non 64-bit aligned address
and then kernel fails to find the DTB magic and fails to boot.
Even worse, there is no prints until early printk is enabled and then its
visible that kernel is trying to find the ATAG-s as DTB was not found or
is invalid.

Unifi 6 devices had the same issue and it can be solved by passing the
load adress as part of the FIT image.
It seems that the vendor was aware of the issue and is always relocating
the DTB to 0x89000000, so lets just do the same.

Now that booting is reliable, reenable default images for the Meraki MR33
and MR74 devices.

Reviewed-by: Lech Perczak lech.perczak@gmail.com
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit f1c80445bd)
2023-08-15 17:16:05 +02:00
Robert Marko
5cecf9aec8 ipq40xx: meraki: remove swconfig in DEVICE_PACKAGES
ipq40xx was converted to DSA and swconfig is not being included at all in
the default packages so there is no need to drop it from device packages.

Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit bb4a25860f)
2023-08-15 17:16:05 +02:00
Robert Marko
73aa78c4a0 ipq40xx: commonize Meraki recipe
MR33 and MR74 share pretty much everything in the image recipe, so lets
extract a common recipe to avoid duplication.

Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 9e9dc1890c)
2023-08-15 17:16:05 +02:00
Hauke Mehrtens
1aeb247fc8 linux-firmware: Update Intel AX200 and AX210 firmware
This updates the Intel iwlwifi firmware for AX200 and AX210 from version
66 to version 72. Version 72 is the latest version supported by iwlwifi
from kernel 6.1.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 00ce1c0587)
2023-08-15 17:16:05 +02:00
Hauke Mehrtens
f147569ff1 patchelf: Revert "tools/patchelf: update to 0.18.0"
This reverts commit ec6bcda8e4.

patchelf 0.18.0 requires GCC 8, it does not compile using GCC 7 any
more. Downgrade to patchelf 0.17.2 which still supports GCC 7.

Downgrade patchelf to 0.17.2 only in the OpenWrt 23.05 branch and
require GCC 8 in the master branch.

Ubuntu 18.04 uses GCC 7 by default.

Fixes: #13102
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2023-08-15 17:12:33 +02:00
John Audia
a23aa1c55a kernel: bump 5.15 to 5.15.126
1. Disable unneeded errata Kconfig symbols
2. Update kernel

Changelog: https://lore.kernel.org/stable/2023081111-unlocking-synopsis-d7d5@gregkh/

All patches automatically rebased.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 64782497db)
2023-08-15 17:11:39 +02:00
Felix Fietkau
482c57afea hostapd: add fix for dealing with VHT 160 MHz via ext nss bw
Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit adfeda8491)
2023-08-15 16:44:58 +02:00
Daniel Golle
b59d02becc generic: backport fix for Winbond SPI NAND
Avoid using stack allocated memory for DMA operations.

Fixes: 156c00dedc ("generic: backport Winbond W25N02KV SPI-NAND support")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit e6f8b69918)
2023-08-13 17:49:40 +01:00
Daniel Golle
0ecf7a3791 generic: 5.15: rename patches to match correct version
Rename two patches which were only accepted in Linux 6.2, but were
marked as if they were accepted in Linux 6.1.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 42e14d3ed8)
2023-08-13 16:30:14 +01:00
Daniel Golle
79d669d1b7 armsr: remove redundant phy-marvell-10g module
the Marvell 10G PHY driver is no way specific to ARM SystemReady
systems, it frequently occurs on SFP+ copper modules and is useful on
many targets.

Hence it been added to package/kernel/linux/modules/netdevices and we
can remove the now redundant target-specific module.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit c524a76f4c)
2023-08-13 16:30:14 +01:00
Daniel Golle
dd00bcb43e uboot-mediatek: bpi-r3: prepare for larger FIT structures
Instead of reading only a single 4kiB page, read the first 128kiB to
determine the size of an uImage.FIT using 'imsz' or 'imszb'.
This will be needed once we add more Device Tree Overlays, which may
happen for the BPi-R3 mini.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3c2f7bb555)
2023-08-13 16:30:14 +01:00
Daniel Golle
452e4f064f mediatek: filogic: mt7988: mark RTC clock as critical
A dependency of the MT7988 MMC host controller on the SoC's RTC clock
being running has been discovered. Mark RTC clock as critical to fix
MMC host on MT7988.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 0454691960)
2023-08-13 16:30:13 +01:00
Felix Fietkau
f241408f18 arm-trusted-firmware-tools: fix build on macOS/Darwin
Resolve conflicts with the uuid type from darwin system headers

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 16c37ba913)
2023-08-13 16:29:58 +01:00
Hauke Mehrtens
9d10944de7 firmware: intel-microcode: update to 20230808
Debian changelog:

intel-microcode (3.20230808.1) unstable; urgency=high

  * New upstream microcode datafile 20230808 (closes: #1043305)
    Mitigations for "Downfall" INTEL-SA-00828 (CVE-2022-40982),
    INTEL-SA-00836 (CVE-2023-23908) and INTEL-SA-00837 (CVE-2022-41804)
    * Updated microcodes:
      sig 0x00050653, pf_mask 0x97, 2023-03-23, rev 0x1000181, size 36864
      sig 0x00050654, pf_mask 0xb7, 2023-03-06, rev 0x2007006, size 44032
      sig 0x00050656, pf_mask 0xbf, 2023-03-17, rev 0x4003604, size 38912
      sig 0x00050657, pf_mask 0xbf, 2023-03-17, rev 0x5003604, size 38912
      sig 0x0005065b, pf_mask 0xbf, 2023-03-21, rev 0x7002703, size 30720
      sig 0x000606a6, pf_mask 0x87, 2023-03-30, rev 0xd0003a5, size 297984
      sig 0x000706e5, pf_mask 0x80, 2023-02-26, rev 0x00bc, size 113664
      sig 0x000806c1, pf_mask 0x80, 2023-02-27, rev 0x00ac, size 111616
      sig 0x000806c2, pf_mask 0xc2, 2023-02-27, rev 0x002c, size 98304
      sig 0x000806d1, pf_mask 0xc2, 2023-02-27, rev 0x0046, size 103424
      sig 0x000806e9, pf_mask 0xc0, 2023-02-22, rev 0x00f4, size 106496
      sig 0x000806e9, pf_mask 0x10, 2023-02-23, rev 0x00f4, size 105472
      sig 0x000806ea, pf_mask 0xc0, 2023-02-23, rev 0x00f4, size 105472
      sig 0x000806eb, pf_mask 0xd0, 2023-02-23, rev 0x00f4, size 106496
      sig 0x000806ec, pf_mask 0x94, 2023-02-26, rev 0x00f8, size 106496
      sig 0x000806f8, pf_mask 0x87, 2023-05-09, rev 0x2b0004b1, size 572416
      sig 0x000806f7, pf_mask 0x87, 2023-05-09, rev 0x2b0004b1
      sig 0x000806f6, pf_mask 0x87, 2023-05-09, rev 0x2b0004b1
      sig 0x000806f5, pf_mask 0x87, 2023-05-09, rev 0x2b0004b1
      sig 0x000806f4, pf_mask 0x87, 2023-05-09, rev 0x2b0004b1
      sig 0x000806f8, pf_mask 0x10, 2023-05-15, rev 0x2c000271, size 605184
      sig 0x000806f6, pf_mask 0x10, 2023-05-15, rev 0x2c000271
      sig 0x000806f5, pf_mask 0x10, 2023-05-15, rev 0x2c000271
      sig 0x000806f4, pf_mask 0x10, 2023-05-15, rev 0x2c000271
      sig 0x00090672, pf_mask 0x07, 2023-04-18, rev 0x002e, size 220160
      sig 0x00090675, pf_mask 0x07, 2023-04-18, rev 0x002e
      sig 0x000b06f2, pf_mask 0x07, 2023-04-18, rev 0x002e
      sig 0x000b06f5, pf_mask 0x07, 2023-04-18, rev 0x002e
      sig 0x000906a3, pf_mask 0x80, 2023-04-18, rev 0x042c, size 219136
      sig 0x000906a4, pf_mask 0x80, 2023-04-18, rev 0x042c
      sig 0x000906e9, pf_mask 0x2a, 2023-02-23, rev 0x00f4, size 108544
      sig 0x000906ea, pf_mask 0x22, 2023-02-23, rev 0x00f4, size 104448
      sig 0x000906eb, pf_mask 0x02, 2023-02-23, rev 0x00f4, size 106496
      sig 0x000906ec, pf_mask 0x22, 2023-02-23, rev 0x00f4, size 105472
      sig 0x000906ed, pf_mask 0x22, 2023-02-27, rev 0x00fa, size 106496
      sig 0x000a0652, pf_mask 0x20, 2023-02-23, rev 0x00f8, size 97280
      sig 0x000a0653, pf_mask 0x22, 2023-02-23, rev 0x00f8, size 97280
      sig 0x000a0655, pf_mask 0x22, 2023-02-23, rev 0x00f8, size 97280
      sig 0x000a0660, pf_mask 0x80, 2023-02-23, rev 0x00f8, size 97280
      sig 0x000a0661, pf_mask 0x80, 2023-02-23, rev 0x00f8, size 96256
      sig 0x000a0671, pf_mask 0x02, 2023-02-26, rev 0x0059, size 104448
      sig 0x000b0671, pf_mask 0x32, 2023-06-06, rev 0x0119, size 210944
      sig 0x000b06a2, pf_mask 0xe0, 2023-06-06, rev 0x4119, size 216064
      sig 0x000b06a3, pf_mask 0xe0, 2023-06-06, rev 0x4119
      sig 0x000b06e0, pf_mask 0x11, 2023-04-12, rev 0x0011, size 136192
  * source: update symlinks to reflect id of the latest release, 20230808

intel-microcode (3.20230512.1) unstable; urgency=medium

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit ced2854871)
2023-08-11 14:44:13 +02:00
Hauke Mehrtens
fa3a56a57b linux-firmware: update to 20230804
7be2766 (tag: 20230804) Merge branch 'rb3-update' of https://github.com/lumag/linux-firmware
66c1db8 Merge https://github.com/pkshih/linux-firmware
5046942 Mellanox: Add new mlxsw_spectrum firmware xx.2012.1012
5c7b67f linux-firmware: Add URL for latest FW binaries for NXP BT chipsets
29f185d rtw89: 8851b: update firmware to v0.29.41.1
742bf57 qcom: sdm845: add RB3 sensors DSP firmware
253cc17 amdgpu: Update DMCUB for DCN314 & Yellow Carp
07f05b0 Merge branch 'dmc-adlp_2.20-mtl_2.13' of git://anongit.freedesktop.org/drm/drm-firmware
5a251ed Merge branch 'for-upstream' of https://github.com/CirrusLogic/linux-firmware
6c8ce49 ice: add LAG-supporting DDP package
fd6e13c i915: Update MTL DMC to v2.13
41e615c i915: Update ADLP DMC to v2.20
c8424cf cirrus: Add CS35L41 firmware for Dell Oasis Models
b6ea35f copy-firmware: Fix linking directories when using compression
0a51959 copy-firmware: Fix test: unexpected operator
b602d43 qcom: sc8280xp: LENOVO: remove directory sym link
e0bad5e qcom: sc8280xp: LENOVO: Remove execute bits
59fbffa amdgpu: update VCN 4.0.0 firmware
22fb12f amdgpu: add initial SMU 13.0.10 firmware
b3f512f amdgpu: add initial SDMA 6.0.3 firmware
b1a7d76 amdgpu: add initial PSP 13.0.10 firmware
d6d655a amdgpu: add initial GC 11.0.3 firmware
c782458 Merge branch 'v2.0.21961' of https://github.com/yunfei-mtk/linux_fw_10bit
ca9086f Merge branch 'dg2_mtl_guc_70.8' of git://anongit.freedesktop.org/drm/drm-firmware
0bc3126 linux-firmware: Update AMD fam17h cpu microcode
b250b32 linux-firmware: Update AMD cpu microcode
9dfcace amdgpu: update green sardine VCN firmware
b519832 amdgpu: update renoir VCN firmware
5f569aa amdgpu: update raven VCN firmware
868bb36 amdgpu: update raven2 VCN firmware
6fa9a17 amdgpu: update Picasso VCN firmware
cd52460 amdgpu: update DMCUB to v0.0.175.0 for various AMDGPU ASICs
4ef7581 Updated NXP SR150 UWB firmware
2514504 Merge branch 'for-upstream' of https://github.com/CirrusLogic/linux-firmware
45f5ebf wfx: update to firmware 3.16.1
f41d890 mediatek: Update mt8195 SCP firmware to support 10bit mode
6f3a37f i915: update DG2 GuC to v70.8.0
0ee23bd i915: update to GuC 70.8.0 and HuC 8.5.1 for MTL
1a76e8b cirrus: Add CS35L41 firmware for ASUS ROG 2023 Models
d3f6606 Partially revert "amdgpu: DMCUB updates for DCN 3.1.4 and 3.1.5"
8917650 linux-firmware: update firmware for mediatek bluetooth chip (MT7922)
7d9af09 linux-firmware: update firmware for MT7922 WiFi device
0bab5df Merge tag 'iwlwifi-fw-2023-06-29' of http://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/linux-firmware
3ec3817 linux-firmware: Update firmware file for Intel Bluetooth AX203
7db3ef9 linux-firmware: Update firmware file for Intel Bluetooth AX203
5684048 linux-firmware: Update firmware file for Intel Bluetooth AX211
3f7a24e linux-firmware: Update firmware file for Intel Bluetooth AX211
eb2c745 linux-firmware: Update firmware file for Intel Bluetooth AX210
4a3ff0a linux-firmware: Update firmware file for Intel Bluetooth AX200
1d1bad4 linux-firmware: Update firmware file for Intel Bluetooth AX201
db39dff Fix qcom ASoC tglp WHENCE entry
a687f89 Merge branch 'sc8280xp-audio-fw' of git://git.kernel.org/pub/scm/linux/kernel/git/srini/linux-firmware
9e0343c check_whence: Check link targets are valid
b255f5b iwlwifi: add new FWs from core80-39 release
fa5d30b iwlwifi: update cc/Qu/QuZ firmwares for core80-39 release
f9a35b3 qcom: Add Audio firmware for SC8280XP X13s

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit bfbb5ccf7a)
2023-08-11 12:53:34 +02:00
Hauke Mehrtens
58d838d81d mbedtls: Update to version 2.28.4
This only fixes minor problems.
Changelog: https://github.com/Mbed-TLS/mbedtls/releases/tag/v2.28.4

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit d773fe5411)
2023-08-11 12:53:34 +02:00
Hauke Mehrtens
09040592a3 uci: update to git HEAD
3cda251 file: Fix uci -m import command
5781664 remove internal usage of redundant uci_ptr.last

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit d1427863ba)
2023-08-11 12:53:34 +02:00
Tomasz Maciej Nowak
57bf52c6e2 mvebu: mcbin-singleshot: enable hearbeat LED by default
This has been a part of modified upstream patch but got lost on major
kernel bump to 5.15, so bring it back.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
[Add patch for kernel 6.1 too]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 5e6bab661a)
2023-08-11 12:53:34 +02:00
Alexandru Gagniuc
320cfa7b5e kernel: netsupport: Add kmod-sched-skbprio
Add support for the SKBPRIO queuing discipline. This is subtly
different than prio as it also drops packets from the lower priority
flows.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
(cherry picked from commit 8fba9afda5)
2023-08-11 12:53:34 +02:00
Luca Barbato
40f9514e80 kernel: Autoload nvme at preinit time
This way is possible to mount nvme extroots.

Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
(cherry picked from commit 0fe9a8ca94)
2023-08-11 12:53:34 +02:00
Felix Baumann
ac34f6469e ath79: move ubnt-xm 64M RAM boards back to generic
return ubnt_rocket-m and ubnt_powerbridge-m back to ath79-generic
They have enough RAM-ressources to not be considered as tiny.

This reverts the commit f4415f7635 partially

Signed-off-by: Felix Baumann <felix.bau@gmx.de>
(cherry picked from commit 9e86a96af5)
2023-08-11 12:53:34 +02:00
Javier Marcet
1a33e4b952 perf: opt-out of lto usage
This fixes building with USE_LTO enabled:

mold: error: undefined symbol: __memset
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans10.ltrans.o
mold: error: undefined symbol: memset_orig
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans10.ltrans.o
mold: error: undefined symbol: perf_regs_load
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans15.ltrans.o:(test_dwarf_unwind__thread)
mold: error: undefined symbol: memset_erms
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans10.ltrans.o
mold: error: undefined symbol: memcpy_orig
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans10.ltrans.o
mold: error: undefined symbol: memcpy_erms
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans10.ltrans.o
mold: error: undefined symbol: __memcpy
>>> referenced by <artificial>
>>>               ./tmp/ccsgR7G6.ltrans10.ltrans.o
collect2: error: ld returned 1 exit status
make[5]: *** [Makefile.perf:670: ../openwrt/linux/tools/perf-target-x86_64_musl/perf] Error 1
make[4]: *** [Makefile.perf:238: sub-make] Error 2
make[3]: *** [Makefile:70: all] Error 2
make[2]: *** [Makefile:84: ./build_dir/target-x86_64_musl/linux-x86_64/linux-5.15.120/tools/perf-target-x86_64_musl/.built] Error 2
make[2]: Leaving directory './package/devel/perf'
time: package/devel/perf/compile#55.88#6.78#12.89
    ERROR: package/devel/perf failed to build.

Signed-off-by: Javier Marcet <javier@marcet.info>
(cherry picked from commit 5ed185bfbd)
2023-08-11 12:53:34 +02:00
Matthias Van Parys
26093cbc88 fortify-headers: add __extension__ mark to strings.h
Add the __extension__ mark before #include_next in strings.h
to avoid a compiler error when -pedantic is enabled.
This has been done for all other headers in the past.

Signed-off-by: Matthias Van Parys <matthias.vanparys@softathome.com>
(cherry picked from commit 2425d6df12)
2023-08-11 12:53:33 +02:00
Oskari Rauta
e997456595 util-linux: enable colrm util as package
colrm is already built, package just isn't generated.

colrm can be used to remove columns from file/stdin.
Use cases vary, personally I needed it because I build openwrt
natively - and wolfssl configure script wants either colrm, or cut
but busybox's cut isn't accepted.

Built: x86_64, latest git
Tested: x86_64, latest git

Signed-off-by: Oskari Rauta <oskari.rauta@gmail.com>
(cherry picked from commit e21b4c9636)
2023-08-11 12:53:33 +02:00
Adam Bailey
a5b03a34c3 lua: fix integer overflow in LNUM patch
Safely detect integer overflow in try_addint() and try_subint().
Old code relied on undefined behavior, and recent versions of GCC on x86
optimized away the if-statements.
This caused integer overflow in Lua code instead of falling back to
floating-point numbers.

Signed-off-by: Adam Bailey <aebailey@gmail.com>
(cherry picked from commit 3a2e7c30d3)
2023-08-11 12:53:33 +02:00
Martin Schiller
4a3c66a401 e2fsprogs: do not symlink tune2fs to findfs
commit c0611b45a9 ("e2fsprogs: symlink e2fsck to fsck.ext{2, 3, 4},
and tune2fs to findfs") introduced a symlink from tune2fs to findfs.

This only works when the included private libblkid library is used, but
commit 5b1660a538 ("utils/e2fsprogs: Update to 1.43.6") disabled the
usage of this private lib and enabled the shared lib support.

Removing this symlink makes it possible to install tune2fs and findfs
package.

Signed-off-by: Martin Schiller <ms@dev.tdt.de>
(cherry picked from commit 0b80c5725f)
2023-08-11 12:53:33 +02:00
Hauke Mehrtens
2650ae4bb9 rpcd: update to latest git HEAD
c07ab2f iwinfo: update byte counter to 64bit

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 2486841c1b)
2023-08-11 12:53:33 +02:00
Hauke Mehrtens
b52b6c5b1a rpcd: update to latest git HEAD
31c3907 file: strengthen exec access control

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 9d8d65322c)
2023-08-11 12:53:33 +02:00
Hauke Mehrtens
a88795aeac iwinfo: update to latest git HEAD
d1f07cf devices: add device id for Atheros AR9287 and AR9380
65ea345 nl80211: constify a few arrays
ca79f64 lib: report byte counters as 64 bit values

This contains an ABI change, increase the ABI version too.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit a226153067)
2023-08-11 12:53:33 +02:00
Hauke Mehrtens
6984adde65 procd: update to latest git HEAD
122a5e3 Revert "sysupgrade: print errno on failure"
2db8365 system: add RISC-V CPU info

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 3596380987)
2023-08-11 12:53:33 +02:00
John Audia
ec0ff928d9 kernel: bump 5.15 to 5.15.125
1. Add new symbols to generic config
2. Bump kernel
   Changelog: https://lore.kernel.org/stable/2023080818-groin-gradient-a031@gregkh/

   All patches automatically rebased.

Signed-off-by: John Audia <therealgraysky@proton.me>
[Refreshed on top of OpenWrt 23.05]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit daed3322d3)
2023-08-10 21:07:50 +02:00
John Audia
795a5dd452 kernel: bump 5.15 to 5.15.124
Changelog: https://lore.kernel.org/stable/2023080341-curliness-salary-4158@gregkh/

1. Needed to make a change to to package/kernel/linux/modules/netsupport.mk
   due to upstream moving vxlan to its own directory[1].  @john-tho suggested
   using the the 6.1 xvlan FILES to circumvent.
2. All patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.124&id=77396fa9096abdbfbb87d63e73ad44d5621cf103

Signed-off-by: John Audia <therealgraysky@proton.me>
[Refreshed on top of OpenWrt 23.05]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 81c1172c36)
2023-08-10 21:06:55 +02:00
Ivan Pavlov
11b0c43671 openssl: update to 3.0.10
Changes between 3.0.9 and 3.0.10 [1 Aug 2023]
 * Fix excessive time spent checking DH q parameter value ([CVE-2023-3817])
 * Fix DH_check() excessive time with over sized modulus ([CVE-2023-3446])
 * Do not ignore empty associated data entries with AES-SIV ([CVE-2023-2975])

Signed-off-by: Ivan Pavlov <AuthorReflex@gmail.com>
(cherry picked from commit 92602f823a)
2023-08-09 22:20:58 +02:00
Christophe Sokol
e0d5621d28 openssl: opt-out of lto usage
This fixes building with USE_LTO enabled:

aarch64-openwrt-linux-musl-gcc -fPIC -pthread -Wa,--noexecstack -Wall -O3 -Os -pipe -mcpu=cortex-a53 -fno-caller-saves -fno-plt -fhonour-copts -fmacro-prefix-map=/build_dir/target-aarch64_cortex-a53_musl/openssl-3.0.9=openssl-3.0.9 -ffunction-sections -fdata-sections -flto=auto -fno-fat-lto-objects -Wformat -Werror=format-security -DPIC -fPIC -fstack-protector-strong -D_FORTIFY_SOURCE=1 -Wl,-z,now -Wl,-z,relro -DPIC -fPIC -Os -pipe -mcpu=cortex-a53 -fno-caller-saves -fno-plt -fhonour-copts -fmacro-prefix-map=/build_dir/target-aarch64_cortex-a53_musl/openssl-3.0.9=openssl-3.0.9 -ffunction-sections -fdata-sections -flto=auto -fno-fat-lto-objects -Wformat -Werror=format-security -fPIC -fstack-protector-strong -fPIC -fuse-ld=bfd -flto=auto -fuse-linker-plugin -fPIC -specs=/include/hardened-ld-pie.specs -znow -zrelro -L. -Wl,-z,defs -Wl,-znodelete -shared -Wl,-Bsymbolic  -Wl,-z,now -Wl,-z,relro -L/staging_dir/toolchain-aarch64_cortex-a53_gcc-13.1.0_musl/usr/lib -L/staging_dir/toolchain-aarch64_cortex-a53_gcc-13.1.0_musl/lib -Wl,--gc-sections \
	-o providers/legacy.so -Wl,--version-script=providers/legacy.ld \
	providers/legacy-dso-legacyprov.o \
	providers/liblegacy.a providers/libcommon.a -lcrypto -ldl -pthread
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o: in function `legacy_get_params':
<artificial>:(.text.legacy_get_params+0xd4): undefined reference to `ossl_prov_is_running'
ld.bfd: <artificial>:(.text.legacy_get_params+0xd8): undefined reference to `ossl_prov_is_running'
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o: in function `legacy_teardown':
<artificial>:(.text.legacy_teardown+0x4): undefined reference to `ossl_prov_ctx_get0_libctx'
ld.bfd: <artificial>:(.text.legacy_teardown+0x8): undefined reference to `ossl_prov_ctx_get0_libctx'
ld.bfd: <artificial>:(.text.legacy_teardown+0x34): undefined reference to `ossl_prov_ctx_free'
ld.bfd: <artificial>:(.text.legacy_teardown+0x38): undefined reference to `ossl_prov_ctx_free'
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o: in function `OSSL_provider_init':
<artificial>:(.text.OSSL_provider_init+0x14): undefined reference to `ossl_prov_ctx_new'
ld.bfd: <artificial>:(.text.OSSL_provider_init+0x18): undefined reference to `ossl_prov_ctx_new'
ld.bfd: <artificial>:(.text.OSSL_provider_init+0x84): undefined reference to `ossl_prov_ctx_set0_libctx'
ld.bfd: <artificial>:(.text.OSSL_provider_init+0x88): undefined reference to `ossl_prov_ctx_set0_libctx'
ld.bfd: <artificial>:(.text.OSSL_provider_init+0x98): undefined reference to `ossl_prov_ctx_set0_handle'
ld.bfd: <artificial>:(.text.OSSL_provider_init+0x9c): undefined reference to `ossl_prov_ctx_set0_handle'
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o:(.data.rel.ro.legacy_kdfs+0x10): undefined reference to `ossl_kdf_pbkdf1_functions'
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o:(.data.rel.ro.legacy_ciphers+0x10): undefined reference to `ossl_cast5128ecb_functions'
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o:(.data.rel.ro.legacy_ciphers+0x30): undefined reference to `ossl_cast5128cbc_functions'
[...]
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o:(.data.rel.ro.legacy_digests+0x10): undefined reference to `ossl_md4_functions'
ld.bfd: /tmp/ccdWw6Lo.ltrans0.ltrans.o:(.data.rel.ro.legacy_digests+0x30): undefined reference to `ossl_ripemd160_functions'
collect2: error: ld returned 1 exit status

Signed-off-by: Christophe Sokol <christophe@wk3.org>
(cherry picked from commit 906616d201)
2023-08-09 22:20:52 +02:00
Pawel Dembicki
4ebba8a05d realtek: add support for HPE 1920-8g-poe+
Hardware information:
---------------------

- RTL8380 SoC
- 8 Gigabit RJ45 PoE ports (built-in RTL8218B)
- 2 SFP ports (built-in SerDes)
- RJ45 RS232 port on front panel
- 32 MiB NOR Flash
- 128 MiB DDR3 DRAM
- PT7A7514 watchdog
- PoE chips: Nuvoton M0516LDE + BCM59121

Known issues:
---------------------
- PoE LEDs are uncontrolled.

(Manual taken from f2f09bc002)
Booting initramfs image:
------------------------

- Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
  connect the server to a switch port.

- Connect to the console port of the device and enter the extended
  boot menu by typing Ctrl+B when prompted.

- Choose the menu option "<3> Enter Ethernet SubMenu".

- Set network parameters via the option "<5> Modify Ethernet Parameter".
  Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
  can be left blank, it is not required for booting from RAM). Note that
  the configuration is saved on flash, so it only needs to be done once.

- Select "<1> Download Application Program To SDRAM And Run".

Initial installation:
---------------------

- Boot an initramfs image as described above, then use sysupgrade to
  install OpenWrt permanently. After initial installation, the
  bootloader needs to be configured to load the correct image file

- Enter the extended boot menu again and choose "<4> File Control",
  then select "<2> Set Application File type".

- Enter the number of the file "openwrt-kernel.bin" (should be 1), and
  use the option "<1> +Main" to select it as boot image.

- Choose "<0> Exit To Main Menu" and then "<1> Boot System".

NOTE: The bootloader on these devices can only boot from the VFS
filesystem which normally spans most of the flash. With OpenWrt, only
the first part of the firmware partition contains a valid filesystem,
the rest is used for rootfs. As the bootloader does not know about this,
you must not do any file operations in the bootloader, as this may
corrupt the OpenWrt installation (selecting the boot image is an
exception, as it only stores a flag in the bootloader data, but doesn't
write to the filesystem).

Example PoE config file (/etc/config/poe):
---------------------
config global
        option budget   '180'

config port
        option enable   '1'
        option id       '1'
        option name     'lan8'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '2'
        option name     'lan7'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '3'
        option name     'lan6'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '4'
        option name     'lan5'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '5'
        option name     'lan4'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '6'
        option name     'lan3'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '7'
        option name     'lan2'
        option poe_plus '1'
        option priority '2'
config port
        option enable   '1'
        option id       '8'
        option name     'lan1'
        option poe_plus '1'
        option priority '2'

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
(cherry picked from commit b370753fc4)
2023-08-09 22:14:12 +02:00
Daniel Golle
ad2fa6bc9c mediatek: filogic: restore non-const type in pinctrl-mt7988 driver
When building with Linux 5.15 the 'const' type results in warnings.
Restore the original non-const type in those cases.

Fixes: 36d0aa9c2d ("mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 1eb67cb070)
2023-08-07 16:48:08 +01:00
Daniel Golle
c072069fa7 mediatek: filogic: update MT7988 device tree
* move ethernet to mt7988a.dtsi
 * move switch definition to mt7988a.dtsi
 * add PHY LEDs

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 64b99802a6)
2023-08-07 16:48:08 +01:00
Daniel Golle
830bb57f6a mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK
Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 36d0aa9c2d)
2023-08-07 16:48:07 +01:00
Daniel Golle
34cd471742 mediatek: filogic: enable driver for MediaTek XS-PHY
Enable driver for MediaTek SuperSpeedPlus XS-PHY transceiver for the
USB3.1 GEN2 controllers found in the MT7988 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit dc4aafb309)
2023-08-07 16:48:07 +01:00
Daniel Golle
e723cb6131 kernel: netdevices: add driver for Marvell 10G Ethernet PHYs
Package kernel module for Marvell 10G Ethernet PHYs found also in many
10G/1G/100M/10M RJ-45 SFP+ modules.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 2a5c7bf621)
2023-08-07 16:31:27 +01:00
Daniel Golle
d25b543aa5 uboot-mediatek: fix build for MT7629
Add patch to fix build failure caused by a missing header which had
previously been implicitely included.

Fixes: 6ddb5f5a65 ("uboot-mediatek: update to version 2023.07.02")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Daniel Golle
0415aba6a9 uboot-mediatek: add missing 'memory' nodes to downstream boards
Among the patches adding support for MT7988 also came the switch to
use fdtdec_setup_mem_size_base() and no longer rely on CFG_SYS_SDRAM_BASE.
Take care of our downstream boards which did not have a 'memory' node in
their device trees.

Fixes: 572ea68070 ("uboot-mediatek: add patches for MT7988 and builds for RFB")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Daniel Golle
b7e9445d6d uboot-mediatek: add patches for MT7988 and builds for RFB
Import pending patches adding support for MT7988 and provide builds
for the reference board for all possible boot media.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Daniel Golle
6553b1caed uboot-mediatek: update to version 2023.07.02
Release 2023.07 got tagged wrongly and replaced by follow-up release
2023.07.02.

Now using upstream DTS for BPi-R3.
Removed two patches which made it upstream, refreshed the rest.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Daniel Golle
ecfb96195c arm-trusted-firmware-mediatek: fix PKG_MIRROR_HASH
Instead of using the hash of the Github-generated tarball use the
hash of the tarball generated by the OpenWrt build system (in this
case they are different, unfortunately).

Reported-by: Chen Minqiang <ptpt52@gmail.com>
Fixes: 07dbeb430e ("arm-trusted-firmware-mediatek: update to sources of 2023-07-24")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Daniel Golle
513ab38b8c arm-trusted-firmware-mediatek: update to sources of 2023-07-24
Use updated Trusted Firmware-A sources from MediaTek, now stacked
on top of the ARM Trusted Firmware-A v2.9 release.
Add builds for the newly added MT7988 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Daniel Golle
6ad85a6c2d arm-trusted-firmware-tools: update to version 2.9
147f52f3e feat(fiptool): add cca, core_swd, plat cert in FIP
 0aaa382fe fix(sptool): fix concurrency issue for SP packages
 cb666b39d Merge "fix(sptool): fix concurrency issue for SP packages" into integration
 0be2475f6 fix: 'sp_mk_generator.py' reference to undef var
 1a28f290b fix(sptool): operators "is/is not" in sp_mk_gen.py
 cf2dd17dd refactor(security): add OpenSSL 1.x compatibility
 4daeaf341 fix(sptool): add dependency to SP image
 06e69f7c9 feat(fiptool): handle FIP in a disk partition
 5a53c6c66 Merge "feat(fiptool): handle FIP in a disk partition" into integration
 034a2e3ef refactor(fiptool): move plat_fiptool.mk to tools
 0165ddd7c build(fiptool): add object dependency generation
 c89fdb4a5 Merge "refactor(fiptool): move plat_fiptool.mk to tools" into integration
 1b491eead fix(tree): correct some typos

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-07 16:31:27 +01:00
Petr Štetiar
5ae1b90e03 mediatek: filogic: fix broken sysupgrade script
Changes introduced in commit 54dc1cde48 ("mediatek: filogic: add
support for Xiaomi WR30U") missed to end the case item with mandatory
`;;` which lead to a broken sysupgrade.

Fixes: 54dc1cde48 ("mediatek: filogic: add support for Xiaomi WR30U")
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2023-08-07 16:31:27 +01:00
Hank Moretti
34d8913bd5 mediatek: filogic: add specific layout for WR30U
Because this device enable NMBM by default, most users use custom
U-Boot with NMBM-Enabled in Chinese forums.

This layout is the same as the ubootmod layout but enabling NMBM.

Signed-off-by: Hank Moretti <mchank9999@gmail.com>
2023-08-07 16:31:27 +01:00
Hank Moretti
0f0ea1087b mediatek: filogic: add support for Xiaomi WR30U
Hardware specification:
  SoC: MediaTek MT7981B 2x A53
  Flash: ESMT F50L1G41LB 128MB
  RAM: NT52B128M16JR-FL 256MB
  Ethernet: 4x 10/100/1000 Mbps
  Switch: MediaTek MT7531AE
  WiFi: MediaTek MT7976C
  Button: Reset, Mesh
  Power: DC 12V 1A

Flash instructions:

1. Get ssh access
   Check this link: https://forum.openwrt.org/t/openwrt-support-for-xiaomi-ax3000ne/153769/22

2. Backup import partitions
   ```
   dev:    size   erasesize  name
   mtd1: 00100000 00020000 "BL2"
   mtd2: 00040000 00020000 "Nvram"
   mtd3: 00040000 00020000 "Bdata"
   mtd4: 00200000 00020000 "Factory"
   mtd5: 00200000 00020000 "FIP"
   mtd8: 02200000 00020000 "ubi"
   mtd9: 02200000 00020000 "ubi1"
   mtd12: 00040000 00020000 "KF"

   ```

   Use these commands blow to backup your stock partitions.
   ```
   nanddump -f /tmp/BL2.bin /dev/mtd1
   nanddump -f /tmp/Nvram.bin /dev/mtd2
   nanddump -f /tmp/Bdata.bin /dev/mtd3
   nanddump -f /tmp/Factory.bin /dev/mtd4
   nanddump -f /tmp/FIP.bin /dev/mtd5
   nanddump -f /tmp/ubi.bin /dev/mtd8
   nanddump -f /tmp/KF.bin /dev/mtd12
   ```
   Then, transfer them to your computer via scp, netcat, tftp
   or others and keep them in a safe place.

3. Setup Nvram
   Get the current stock: `cat /proc/cmdline`

   If you find `firmware=0` or `mtd=ubi`, use these commands:
   ```
   nvram set boot_wait=on
   nvram set uart_en=1
   nvram set flag_boot_rootfs=1
   nvram set flag_last_success=1
   nvram set flag_boot_success=1
   nvram set flag_try_sys1_failed=0
   nvram set flag_try_sys2_failed=0
   nvram commit
   ```

   If you find `firmware=1` or `mtd=ubi1`, use these commands:
   ```
   nvram set boot_wait=on
   nvram set uart_en=1
   nvram set flag_boot_rootfs=0
   nvram set flag_last_success=0
   nvram set flag_boot_success=1
   nvram set flag_try_sys1_failed=0
   nvram set flag_try_sys2_failed=0
   nvram commit
   ```

4. Flash stock-initramfs-factory.ubi
   If you find `firmware=0` or `mtd=ubi`:
   `ubiformat /dev/mtd9 -y -f /tmp/stock-initramfs-factory.ubi`

   If you find `firmware=1` or `mtd=ubi1`:
   `ubiformat /dev/mtd8 -y -f /tmp/stock-initramfs-factory.ubi`

   Then reboot your router, it should boot to the openwrt
   initramfs system now.

5. Setup uboot-env
   Now it will be setup automatically in upgrade process,
   you can skip this step.

   If your `fw_setenv` did not work, you need run this command:
   `echo "/dev/mtd1 0x0 0x10000 0x20000" > /etc/fw_env.config`

   Then setup uboot-env:
   ```
   fw_setenv boot_wait on
   fw_setenv uart_en 1
   fw_setenv flag_boot_rootfs 0
   fw_setenv flag_last_success 1
   fw_setenv flag_boot_success 1
   fw_setenv flag_try_sys1_failed 8
   fw_setenv flag_try_sys2_failed 8
   fw_setenv mtdparts "nmbm0:1024k(bl2),256k(Nvram),256k(Bdata),
   2048k(factory),2048k(fip),256k(crash),256k(crash_log),
   34816k(ubi),34816k(ubi1),32768k(overlay),12288k(data),256k(KF)"
   ```

6. Flash stock-squashfs-sysupgrade.bin
   Use shell command:
   `sysupgrade -n /tmp/stock-squashfs-sysupgrade.bin`
   Or go to luci web.

If you need to change to Openwrt U-Boot layout, do next. If you
do not need, please ignore it.

Change to OpenWrt U-Boot:

1. Flash ubootmod-initramfs-factory.ubi
   Check mtd partitions: `cat /proc/mtd`
   ```
   mtd7: 00040000 00020000 "KF"
   mtd8: 02200000 00020000 "ubi_kernel"
   mtd9: 04e00000 00020000 "ubi"
   ```

   Run following command:
   `ubiformat /dev/mtd8 -y -f /tmp/ubootmod-initramfs-factory.ubi`
   Then reboot your router, it should boot to the openwrt initramfs
   system now.

2. Check mtd again
   ```
   mtd7: 00040000 00020000 "KF"
   mtd8: 07000000 00020000 "ubi"
   ```
   Make sure mtd8 is ubi.

3. Install kmod-mtd-rw
   Run command: `opkg update && opkg install kmod-mtd-rw`
   Or get it in openwrt server, or build it yourself, then install
   it manually

   Then run this command:
   `insmod /lib/modules/$(uname -r)/mtd-rw.ko i_want_a_brick=1`

4. Clean up pstore
   Run Command: `rm -f /sys/fs/pstore/*`

5. Format ubi and create new ubootenv volume
   ```
   ubidetach -p /dev/mtd8; ubiformat /dev/mtd8 -y; ubiattach -p /dev/mtd8
   ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
   ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
   ```

6. (Optional) Add recovery boot feature.
   ```
   ubimkvol /dev/ubi0 -n 2 -N recovery -s 10MiB
   ubiupdatevol /dev/ubi0_2 /tmp/ubootmod-initramfs-recovery.itb
   ```

7. Flash Openwrt U-Boot
   ```
   mtd write /tmp/ubootmod-preloader.bin BL2
   mtd write /tmp/ubootmod-bl31-uboot.fip FIP
   ```

6. Flash ubootmod-squashfs-sysupgrade.itb
   Use shell command:
   `sysupgrade -n /tmp/ubootmod-squashfs-sysupgrade.itb`
   Or go to luci web.

Now everything is done, Enjoy!

Go Back to stock from Openwrt U-Boot:

1. Force flash ubootmod-initramfs-recovery.itb
   Use shell command:
   `sysupgrade -F -n /tmp/ubootmod-initramfs-recovery.itb`
   Or go to luci web.
   Then it should boot to the openwrt initramfs system now.

2. Format ubi and Nvram
   ```
   ubidetach -p /dev/mtd8; ubiformat /dev/mtd8 -y; ubiattach -p /dev/mtd8
   mtd erase Nvram
   ```

3. Install kmod-mtd-rw
   Run command: `opkg update && opkg install kmod-mtd-rw`
   Or get it in openwrt server, or build it yourself, then install
   it manually

   Then run this command:
   `insmod /lib/modules/$(uname -r)/mtd-rw.ko i_want_a_brick=1`

4. Flash stock U-Boot and ubi
   ```
   mtd write /tmp/BL2.bin BL2
   mtd write /tmp/FIP.bin FIP
   mtd write /tmp/ubi.bin ubi
   ```
   Then reboot your router, waiting it finished rollback in minutes.

Go Back to stock from stock layout Openwrt:
   Just run command: `ubiformat /dev/mtd8 -y -f /tmp/ubi.bin`
   Then reboot your router, waiting it finished rollback in minutes.

Notes:
1. Openwrt U-Boot and ubootmod openwrt did not enable NMBM.
   Please make your backup safe.

Signed-off-by: Hank Moretti <mchank9999@gmail.com>
2023-08-07 16:31:27 +01:00
Hank Moretti
d0fc9e96be uboot-mediatek: add support for Xiaomi WR30U
Add a custom uboot build to support openwrt uboot layout.

Signed-off-by: Hank Moretti <mchank9999@gmail.com>
2023-08-07 16:31:27 +01:00
David Bauer
c697057b7c mediatek: add support for Acer Predator W6
Hardware
--------
SOC:   MediaTek MT7986A
RAM:   1GB DDR4
FLASH: 4GB eMMC
WiFi:  2x2 2.4 GHz 802.11 b/g/n/ax MT7916 DBDC
       4x4 5 GHz   802.11 a/n/ac/ax MT7986
       2x2 6 GHz   802.11ax MT7916 DBDC
ETH:   4x LAN 1Gbit/s (MT7531)
       1x WAN 2.5Gbit/s (GPY211)
BTN:   RESET, WPS
LED:   Antenna LEDs (GPIO)
       Mood-LED (Kinetic KTD2601) - unsupported
UART:  Header nest to USB port - 3V3 115200 8N1
       [BUTTON] GND - RX - TX [USB]

Installation
------------

1. Connect to the device using serial console.

2. Interrupt the Autoboot process when promted by sending '0' twice.

3. Serve the OpenWrt initramfs image using TFTP at 192.168.1.66. Name
   the image "predator.bin" and conenct the TFTP server to the routers
   LAN port.

4. Configure U-Boot to allow loading unsigned images from MMC

   $ setenv bootcmd 'mmc read 0x40000000 0x00004400 0x0010000;
     fdt addr $(fdtcontroladdr); fdt rm /signature; bootm 0x40000000';
     saveenv

5. Transfer the image from U-Boot

   $ setenv serverip 192.168.1.66; setenv ipaddr 192.168.1.1;
     tftpboot 0x46000000 predator.bin; fdt addr $(fdtcontroladdr);
     fdt rm /signature; bootm

6. Wait for OpenWrt to boot

7. Transfer the OpenWrt sysupgrade image to the router using scp.

8. Install OpenWrt using sysupgrade.

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 7e7eb5312d)
2023-08-05 18:49:34 +02:00
John Audia
7efec0acca kernel: bump 5.15 to 5.15.123
Manually rebased:
	bcm4908/patches-5.15/071-v6.1-0001-net-broadcom-bcm4908_enet-handle-EPROBE_DEFER-when-g.patch
	bcm53xx/patches-5.15/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
	ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch[*]
	bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
	bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch
	bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch

Removed upstreamed:
	backport-5.15/735-v6.5-net-bgmac-postpone-turning-IRQs-off-to-avoid-SoC-han.patch[1]
	backport-5.15/817-v6.5-01-leds-trigger-netdev-Recheck-NETDEV_LED_MODE_LINKUP-o.patch[2]
	pending-5.15/143-jffs2-reduce-stack-usage-in-jffs2_build_xattr_subsys.patch[3]
	pending-5.15/160-workqueue-fix-enum-type-for-gcc-13.patch[4]
	bcm53xx/patches-5.15/036-v6.5-0003-ARM-dts-BCM5301X-Drop-clock-names-from-the-SPI-node.patch[5]
	bcm53xx/patches-5.15/036-v6.5-0015-ARM-dts-BCM5301X-fix-duplex-full-full-duplex.patch[6]
	ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch[7]
	ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch[8]

All other patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=02474292a44205c1eb5a03634ead155a3c9134f4
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=86b93cbfe104e99fd3d25a49748b99fb88101573
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=79b9ab357b6f5675007f4c02ff8765cbd8dc06a2
4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=d528faa9e828b9fc46dfb684a2a9fd8c2e860ed8
5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=5899bc4058e89d5110a23797ff94439c53b77c25
6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=95afd2c7c7d26087730dc938709e025a303e5499
7. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=40844343a8853a08b049d50c967e2a1e28f0ece6
8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.123&id=6ad5ded420f5d96f7c65b68135f5787a1c7e58d7

Build system: x86/64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3

Co-authored-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Audia <therealgraysky@proton.me>
[rebased ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch ]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 8590531048)
[Refreshed on top of openwrt-23.05]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2023-07-31 01:39:50 +02:00
Oli Ze
017827e205 uboot-mvebu: update to version 2023.07.02
Since 2021.07 multiple bugs were introduced that made it impossible to
create a bootable target for mvebu. Those issues should be now fixed since
2023.07-rc1.

References: #11661
Signed-off-by: Oli Ze <olze@trustserv.de>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Tested-by: Andre Heider <a.heider@gmail.com> # espressobin-v3-v5-1gb-2cs
Signed-off-by: Petr Štetiar <ynezz@true.cz> [facelift]
(cherry picked from commit ba7d6dddc7)
2023-07-30 18:06:28 +02:00
Rafał Miłecki
e0c4da1ff0 bcm53xx: backport more DT changes queued for v6.6
Those sort out BCM53573 Ethernet info finally.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit ca8868a511)
2023-07-29 19:43:44 +02:00
Rafał Miłecki
3bac348387 bcm53xx: add BCM53573 Ethernet fix sent upstream for v6.6
It seems that DSA-based b53 driver never worked with BCM53573 SoCs and
BCM53125.

In case of swconfig-based b53 this fixes a regression. Switching bgmac
from using mdiobus_register() to of_mdiobus_register() resulted in MDIO
device (BCM53125) having of_node set (see of_mdiobus_register_phy()).
That made downstream b53 driver read invalid data from DT and broke
Ethernet support.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 79fd3e62b4)
2023-07-29 19:43:44 +02:00
Alexander Friese
680a4c7e12 ipq4019: fix support for AVM FRITZ!Repeater 3000
new versions of the device have NAND with 8bit ECC
which was not yet supported before. This change removes
ECC restrictions.

Signed-off-by: Alexander Friese <af944580@googlemail.com>
(cherry picked from commit 6b11f0ec83)
2023-07-27 13:54:55 +02:00
Jo-Philipp Wich
77b8ce64fa libnl-tiny: update to latest Git HEAD
8667347 build: allow passing SOVERSION value for dynamic library

Also adjust packaging of the library to only ship the SOVERSION
suffixed library object, to allow for concurrent installation of
ABI-incompible versions in the future.

Fixes: #13082
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
(cherry picked from commit 4af0a72a65)
2023-07-27 12:06:02 +02:00
David Bauer
5ded0a3975 scripts: use sep-char for hash nodes
U-Boot with enabled secure-boot will not boot images with the
@-character used for hash node-names.

Use the existing separation character configurable for each device.

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 2b133ab19c)
2023-07-26 15:39:24 +02:00
David Bauer
897d55bcdf ipq40xx: add support for Teltonika RUTX50
Hardware
--------
CPU:     Qualcomm IPQ4018
RAM:     256M
Flash:   16MB SPI-NOR (W25Q128)
         128MB SPI-NAND (XTX)
WiFi:    2T2R (2GHz 802.11n ; 5 GHz 802.11ac)
ETH:     4x LAN ; 1x WAN (Gigabit)
CELL:    Quectel RG501Q 3G/4G/5G

UART: Available on the goldfinger connector (Pinout silkscreened)
      115200 8N1 3V3 - Only connect RX / TX / GND

Installation
------------

1. Enable SSH in the Teltonika UI
   (System --> Administration --> Access Control)

2. Check from which partition set the device is currently running from.

   $ cat /proc/boot_info/rootfs/primaryboot

   In case this output reads 0, install a Software update from Teltonika
   first. After upgrade completion, check this file now reads 1 before
   continuing.

2. Transfer the OpenWrt factory image to the device using scp. Use the
   same password (user root!) as used for the Web-UI.

   $ scp -O openwrt-factory.bin root@192.168.1.1:/tmp

3. Connect to the device using ssh as the root user.

4. Install OpenWrt by writing the factory image to flash.

   $ ubiformat /dev/mtd16 -y -f /tmp/openwrt-factory.bin

5. Instruct the bootloaer to boot from the first partition set.

   $ echo 0 > /proc/boot_info/rootfs/primaryboot
   $ cat /proc/boot_info/getbinary_bootconfig > /tmp/bootconfig.bin
   $ cat /proc/boot_info/getbinary_bootconfig1 > /tmp/bootconfig1.bin
   $ mtd write /tmp/bootconfig.bin /dev/mtd2
   $ mtd write /tmp/bootconfig1.bin /dev/mtd3

6. Reboot the device.

   $ reboot

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 844bb4bfad)
2023-07-26 15:37:56 +02:00
David Bauer
1face854a2 ipq40xx: move Teltonika RUT STM32 IO to specific DTS
Prepare to re-use the DTS for the RUTX50.

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit dbc4be142e)
2023-07-26 15:37:56 +02:00
Etienne Champetier
ee910d1e67 dropbear: add ed25519 for failsafe key
At least Fedora and RHEL 9 set RSAMinSize=2048, so when trying to use
failsafe, we get 'Bad server host key: Invalid key length'
To workaround the issue, we can use: ssh -o RSAMinSize=1024 ...

Generating 2048 bits RSA is extremely slow, so add ed25519.
We keep RSA 1024 to be as compatible as possible.

Signed-off-by: Etienne Champetier <champetier.etienne@gmail.com>
(cherry picked from commit 6ac61dead9)
2023-07-26 14:00:52 +02:00
Michał Kwiatek
23953cfa5a ath11k-firmware: update to stable WLAN.HK.2.9.0.1-01837
Changelog from quic:

 Bug fixes, stability improvements from previous releases
  are present. There are no backward comatibility issues
  with this release.

Tested-by: Michał Kwiatek <michal@kwiatek.it> # Xiaomi AX3600
Signed-off-by: Michał Kwiatek <michal@kwiatek.it>
[ improve commit description ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 1c56801dd2)
2023-07-26 13:41:59 +02:00
Mathew McBride
21f0ab503c kernel: move NXP DPAA2 SFP patches to generic patches
These are used by both the armsr (EFI boot) and
layerscape targets for phylink-controlled SFP
support on NXP DPAA2 platforms (LS1088,LS2088,LX2160).

This is in place of commit a7bd96c98f
("layerscape: add patches for SFP support on DPAA2 platforms")
in the main branch. armsr in main started at kernel 6.1
so there is not an equivalent 5.15 commit to cherry pick.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2023-07-26 13:36:58 +02:00
Mathew McBride
6a89cfa418 layerscape: base-files: remove redundant RAMFS_COPY_* additions
All the tools (e.g fw_setenv, ubiupdatevol) and config (fw_env.config)
needed for sysupgrade are already included in /lib/upgrade/stage2

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 094c37708a)
2023-07-26 13:36:58 +02:00
Mathew McBride
cef98caf6e layerscape: remove Traverse LS1043 boards
The Traverse LS1043 boards were not publicly released,
all the production has been going to OEM customers who
do not use the image format defined in the OpenWrt tree.

Only a few samples were circulated outside Traverse
and our OEM customers. The public release (then called
Five64) of this series was cancelled in favour of our
LS1088A based design (Ten64).

It is best to remove these boards to avoid wasting
OpenWrt project and contributor resources.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 8e7ba6fbae)
2023-07-26 13:36:58 +02:00
Mathew McBride
68a4c60b5c layerscape: armv8_64b: add Traverse Ten64 NAND variant
The Ten64 board[1] is based around NXP's Layerscape LS1088A SoC.
It is capable of booting both standard Linux distributions
from disk devices, using EFI, and booting OpenWrt
from NAND.

See the online manual for more information, including the
flash layout[2].

This patchset adds support for generating Ten64 images
for NAND boot.
For disk boot, one can use the EFI support that was
recently added to the armvirt target.

We previously supported NAND users by building
inside our armvirt/EFI target[3], but this approach
is not suitable for OpenWrt upstream. Users who
used our supplied NAND images will be able to upgrade
to this via sysupgrade.

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] - https://www.traverse.com.au/hardware/ten64
[2] - https://ten64doc.traverse.com.au/hardware/flash/
[3] - Example:
285e4360e1
(cherry picked from commit af0546da34)
2023-07-26 13:36:58 +02:00
Lech Perczak
e54e5bc415 uqmi: do not start 464xlat for dual-stack configurations
If dual-stack configuration is in use, and dhcpv6 option is set, do not start
464xlat sub-interface for dhcpv6 sub-interace , as the configuration already
provides IPv4 connectivty, be it through single or dual APN configuration.

Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
(cherry picked from commit a9237c1af9)
2023-07-26 13:32:13 +02:00
Lech Perczak
2b889aa71a uqmi: support split-APN IPv4 and IPv6 dual-stack
Add two new "v6apn" and "v6profile" properties, to support split-APN
dual-stack onfiguration. This extends the existing ipv4v6 PDP type,
allowing simultaneous connection to two distinct APNs,
one for IPv4 and one for IPv6.
The parameters override existing 'apn' and 'profile' respectively,
if set, but only for IPv6 part of the connection.
If unset, they default to their original values, constituting a standard
IPv4v6 setup.

If a different APN is set for IPv6, a corresponding profile MUST also be
configured, with a different ID, than the IPv4 profile, for example,
profile 2.
Both APNs must match ones configured through QMI or through 'AT+CGDCONT'
command.

Example configuration in UCI:

config interface 'wan'
        option proto 'qmi'
        option device '/dev/cdc-wdm0'
        option autoconnect '1'
        option pdptype 'ipv4v6'
        option apn 'internet'
        option v6apn 'internetipv6'
	option profile '1'
	option v6profile '2'

Corresponding profile configuration:
AT+CGDCONT?
+CGDCONT: 1,"IP","internet","0.0.0.0",0,0,0,0
+CGDCONT: 2,"IPV6","internetipv6","0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0",0,0,0,0

Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
(cherry picked from commit 48e8bf1b8f)
2023-07-26 13:31:43 +02:00
David Bauer
8d6a9051cd mac80211: partly revert force-mac80211 loss detection
This patch will only force mac80211 loss detection upon ath10k by
masking the driver-specific loss-detection bit.

Ref: commit ed816f6ba8 ("mac80211: always use mac80211 loss detection")

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit d9070f8d23)
[felix.bau@gmx.de: replace path 6.2 with 5.15, refresh patches]
Signed-off-by: Felix Baumann <felix.bau@gmx.de>
2023-07-26 13:29:44 +02:00
Shiji Yang
ead5860c56 ramips: do not print error log when mdio bus is disabled
The mdio bus is used to control externel switch. In most cases, they are
disabled, which is the normal behavior. Treating this as an error makes
no sense, so we need to change the notification level from error to info.

Fixes: a2acdf9607 ("ramips: mt7620: remove useless GMAC nodes")
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
(cherry picked from commit 285f0668f4)
2023-07-26 13:28:37 +02:00
Shiji Yang
3ac300c753 ramips: backport upstream mt762x PCIe driver error log fixes
These patches silence some mt762x PCIe driver error messeges by removing
the useless debugging codes and replacing incorrectly used 'dev_err()'
with 'dev_info()':

PCI: mt7621: Use dev_info() to log PCIe card detection [1]
mips: pci-mt7620: do not print NFTS register value as error log [2]
mips: pci-mt7620: use dev_info() to log PCIe device detection result [3]

Patch [1] has already been merged into the Linux 6.3 branch. Patches [2] and
[3] have been merged into the "mips-next" tree, and they will be part of the
upcoming Linux 6.5.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v6.4-rc7&id=50233e105a0332ec0f3bc83180c416e6b200471e
[2] https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commit/?id=9f9a035e6156a57d9da062b26d2a48d031744a1e
[3] https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commit/?id=89ec9bbe60b61cc6ae3eddd6d4f43e128f8a88de

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
(cherry picked from commit 4e74777fa8)
2023-07-26 13:28:02 +02:00
Aleksander Jan Bajkowski
9d15baee6b lantiq: add patches headers
This commit adds headers to the patches, so they can be applied with the
git am command.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
(cherry picked from commit 5d51079fd0)
2023-07-26 13:26:24 +02:00
Felix Baumann
65c1f418e3 kernel: update patches for mediatek filogic
Fix complaint from actions
Check Kernel patches (mediatek, filogic)
https://github.com/openwrt/openwrt/actions/runs/5569719763/job/15081672586?pr=13072

Signed-off-by: Felix Baumann <felix.bau@gmx.de>
2023-07-26 13:19:49 +02:00
Felix Fietkau
4d880318b0 mt76: update to the latest version
53edfc7aaa34 wifi: mt76: mt7603: fix beacon interval after disabling a single vif
7ef4dd12d982 wifi: mt76: mt7603: fix tx filter/flush function
152608a40aa7 wifi: mt76: mt7615: do not advertise 5 GHz on first phy of MT7615D (DBDC)
cacac3902a63 wifi: mt76: split get_of_eeprom in subfunction
cd3dfe392769 wifi: mt76: add support for providing eeprom in nvmem cells

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 4395236a10)
2023-07-26 11:52:02 +02:00
Felix Fietkau
dc370ad19a mt76: update to the latest version
bb3937d5c3e0 wifi: mt76: mt7915: remove VHT160 capability on MT7915

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 063641f8cf)
2023-07-26 11:52:02 +02:00
Felix Fietkau
339e71cbd3 kernel: drop mips highmem offset start overrides
The maximum offset that can be supported is 0x20000000
Do not override it to to something bigger than that on MT7621, as that could
cause issues based on the fixed memory mappings. This makes the last 64 MB
RAM unusable on MT7621 devices with 512 MB but avoids incurring a heavy
performance hit

Fixes: cd2b74e01e ("ramips: mt7621: disable highmem support and remove highmem offset patch")
Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit a110de8152)
2023-07-24 20:19:11 +02:00
Felix Fietkau
e5dea9e37f ramips: mt7621: disable highmem support and remove highmem offset patch
On MT7621 it was observed, that enabling highmem support causes a significant
performance drop, as documented in: https://github.com/openwrt/openwrt/issues/13151
By adjusting the highmem start offset, we avoid leaving any RAM unaddressable,
even on devices with 512 MB

Fixes: https://github.com/openwrt/openwrt/issues/13151
Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit cd2b74e01e)
2023-07-24 20:19:11 +02:00
David Bauer
476bf135fc mediatek: add support for ZyXEL NWA50AX Pro
Hardware
--------
CPU:    Mediatek MT7981
RAM:    512M DDR4
FLASH:  256M NAND
ETH:    MaxLinear GPY211 (2.5GbE N Base-T)
WiFi:   Mediatek MT7981 (2.4GHz 2T2R:2 5GHz 3T3R:2 802.11ax)
BTN:    1x Reset
LED:    1x Multi-Color

UART Console
------------
Available below the rubber cover next to the ethernet port.

Settings: 115200 8N1

Layout:

<12V> <LAN> GND-RX-TX-VCC

Logic-Level is 3V3. Don't connect VCC to your UART adapter!

Installation Web-UI
-------------------
Upload the Factory image using the devices Web-Interface.

As the device uses a dual-image partition layout, OpenWrt can only
installed on Slot A. This requires the current active image prior
flashing the device to be on Slot B.

In case this is not the case, OpenWrt will boot only one time, returning
to the ZyXEL firmware the second boot.

If this happens, first install a ZyXEL firmware upgrade of any version
and install OpenWrt after that.

Installation TFTP / Recovery
----------------------------
This installation routine is especially useful in case of a bricked
device.

Attach to the UART console header of the device. Interrupt the boot
procedure by pressing Enter.

The bootloader has a reduced command-set available from CLI, but more
commands can be executed by abusing the atns command.

Boot a OpenWrt initramfs image available on a TFTP server at
192.168.1.66. Rename the image to nwa50axpro-openwrt-initramfs.bin.

 $ atnf nwa50axpro-openwrt-initramfs.bin
 $ atna 192.168.1.88
 $ atns "192.168.1.66; tftpboot; setenv fdt_high 0xffffffffffffffff;
   bootm"

Upon booting, set the booted image to the correct slot:

 $ zyxel-bootconfig /dev/mtd9 get-status
 $ zyxel-bootconfig /dev/mtd9 set-image-status 0 valid
 $ zyxel-bootconfig /dev/mtd9 set-active-image 0

Copy the OpenWrt sysupgrade image to the device using scp.
Write the sysupgrade image to NAND using sysupgrade.

 $ sysupgrade -n image.bin

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit f0445746f6)
2023-07-23 16:10:08 +02:00
Daniel Golle
b28d74090f mediatek: filogic: set DEVICE_DTS_LOADADDR for BPi-R3
U-Boot complains that the overlayed DT needs relocation, so set
DEVICE_DTS_LOADADDR to have it relocated.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit b1d10e0174)
2023-07-22 18:54:03 +01:00
Tony Ambardar
b607cd30c7 libbpf: Update to v1.2.2
Update to the latest upstream release to include recent bugfixes:

Link: https://github.com/libbpf/libbpf/compare/v1.2.0...v1.2.2
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
(cherry picked from commit 1d5e7b85cc)
2023-07-20 08:04:11 +02:00
Nick Hainke
0b087073e6 nftables: update to 1.0.8
ChangeLog:
https://www.netfilter.org/projects/nftables/files/changes-nftables-1.0.8.txt

Signed-off-by: Nick Hainke <vincent@systemli.org>
(cherry picked from commit 58c498247b)
2023-07-20 08:04:11 +02:00
Nick Hainke
2f71a7ecd8 libnftnl: update to 1.2.6
Release Notes:
https://lists.netfilter.org/pipermail/netfilter-announce/2023/000250.html

Signed-off-by: Nick Hainke <vincent@systemli.org>
(cherry picked from commit e57a752217)
2023-07-20 08:04:11 +02:00
Andre Heider
8d7d9aa4a4 hostapd: update to 2023-06-22
Removed, merged upstream:
- 170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch

Manually refreshed:
- 040-mesh-allow-processing-authentication-frames-in-block.patch
- 600-ubus_support.patch
- 761-shared_das_port.patch

Fixes: #12661
Fixes: 304423a4 ("hostapd: update to 2023-03-29")
Signed-off-by: Andre Heider <a.heider@gmail.com>
(cherry picked from commit cd804c1ebb)
2023-07-20 08:04:11 +02:00
John Audia
57e7188e63 linux-firmware: update to 20230625
Change from git log --oneline:

ee91452d (tag: 20230625) Makefile, copy-firmware: support xz/zstd compressed firmware
ad2ce8be copy-firmware: silence the last shellcheck warnings
67bf50e7 copy-firmware: drop obsolete backticks, quote
77f31a80 copy-firmware: tweak sed invocation
40fa2b20 copy-firmware: quote deskdir and dirname
77f92e0b check_whence: error if symlinks are in-tree
f2671b1f check_whence: error if File: is actually a link
4b539e7a check_whence: strip quotation marks
32693d3b linux-firmware: wilc1000: update WILC1000 firmware to v16.0
109b23c5 ice: update ice DDP wireless_edge package to 1.3.10.0
ade163aa amdgpu: DMCUB updates for DCN 3.1.4 and 3.1.5
045b2136 amdgpu: update DMCUB to v0.0.172.0 for various AMDGPU ASICs
5a1842ce Merge branch 'rb3-update' of https://github.com/lumag/linux-firmware
2f81bd9f fix broken cirrus firmware symlinks
01a7a844 qcom: Update the microcode files for Adreno a630 GPUs.
94120467 qcom: sdm845: rename the modem firmware
1c599488 qcom: sdm845: update remoteproc firmware
1cd1c871 rtl_bt: Update RTL8852A BT USB firmware to 0xDAC7_480D
55e74485 rtl_bt: Update RTL8852C BT USB firmware to 0x040D_7225
9dbd8ec2 amdgpu: DMCUB updates for various AMDGPU asics
9a47adc7 Merge branch 'mtl_huc_v8.5.0' of git://anongit.freedesktop.org/drm/drm-firmware
eb3ae841 linux-firmware: update firmware for MT7922 WiFi device
5ce06b9e linux-firmware: update firmware for MT7921 WiFi device
2c50361c linux-firmware: update firmware for mediatek bluetooth chip (MT7922)
185f49df linux-firmware: update firmware for mediatek bluetooth chip (MT7921)
05f94af7 Merge branch 'v2.0.21478' of https://github.com/yunfei-mtk/linux_fw_scp
5de33fb4 i915: Add HuC v8.5.0 for MTL
795aea91 mediatek: Update mt8195 SCP firmware to support hevc
fc90c59b Merge branch 'db410c' of https://github.com/lumag/linux-firmware
9d4c9a52 qcom: apq8016: add Dragonboard 410c WiFi and modem firmware
1f9667eb Merge branch 'for-upstream' of http://git.chelsio.net/pub/git/linux-firmware
b544e2b0 Merge branch 'for-upstream' of https://github.com/CirrusLogic/linux-firmware
244d6b5c cirrus: Add firmware for new Asus ROG Laptops
d11ae984 brcm: Add symlinks from Pine64 devices to AW-CM256SM.txt
1c513ec7 amdgpu: Update GC 11.0.1 and 11.0.4
8449fcd0 Merge https://github.com/pkshih/linux-firmware
c10facaf rtw89: 8851b: add firmware v0.29.41.0
1ba3519e Merge branch 'dev-queue' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/firmware
2e775450 amdgpu: update yellow carp firmware for amd.5.5 release
5eccb3c1 amdgpu: update navi14 firmware for amd.5.5 release
c70d3c3b amdgpu: update navi12 firmware for amd.5.5 release
0e4f17cc amdgpu: update vega20 firmware for amd.5.5 release
413348f3 amdgpu: update vega12 firmware for amd.5.5 release
c167587d amdgpu: update navi10 firmware for amd.5.5 release
3c98630a amdgpu: update vega10 firmware for amd.5.5 release
d13ef0cb amdgpu: update PSP 13.0.11 firmware for amd.5.5 release
31f8f526 amdgpu: update GC 11.0.4 firmware for amd.5.5 release
f0ce7026 amdgpu: update SDMA 6.0.1 firmware for amd.5.5 release
47424464 amdgpu: update PSP 13.0.4 firmware for amd.5.5 release
60dc78a7 amdgpu: update GC 11.0.1 firmware for amd.5.5 release
ba70041c amdgpu: update 13.0.8 firmware for amd.5.5 release
9c48881f amdgpu: update GC 10.3.7 firmware for amd.5.5 release
bb4d7250 amdgpu: update vangogh firmware for amd.5.5 release
102a4138 amdgpu: update VCN 4.0.4 firmware for amd.5.5 release
a7fe4aa1 amdgpu: update SMU 13.0.7 firmware for amd.5.5 release
80b2d561 amdgpu: update PSP 13.0.7 firmware for amd.5.5 release
a5d7b4df amdgpu: update GC 11.0.2 firmware for amd.5.5 release
c1db00c5 amdgpu: update renoir firmware for amd.5.5 release
683c91f7 amdgpu: update VCN 4.0.0 firmware for amd.5.5 release
39d6fcc7 amdgpu: update SMU 13.0.0 firmware for amd.5.5 release
56832557 amdgpu: update PSP 13.0.0 firmware for amd.5.5 release
ffe1a41e amdgpu: update GC 11.0.0 firmware for amd.5.5 release
72d525d7 amdgpu: update green sardine firmware for amd.5.5 release
ceba765d amdgpu: update beige goby firmware for amd.5.5 release
95eb53c9 amdgpu: update dimgrey cavefish firmware for amd.5.5 release
909cef98 amdgpu: update arcturus firmware for amd.5.5 release
91251d16 amdgpu: update vcn 3.1.2 firmware for amd.5.5 release
9eaff866 amdgpu: update psp 13.0.5 firmware for amd.5.5 release
44772528 amdgpu: update GC 10.3.6 firmware for amd.5.5 release
3bffc9f8 amdgpu: update navy flounder firmware for amd.5.5 release
3b920773 amdgpu: update sienna cichlid firmware for amd.5.5 release
84d5550e amdgpu: update aldebaran firmware for amd.5.5 release
dcd30473 amdgpu: DMCUB updates for various AMDGPU asics
c9e4034a ice: update ice DDP comms package to 1.3.40.0
601c1813 Merge https://github.com/pkshih/linux-firmware
08b854f0 rtlwifi: Add firmware v6.0 for RTL8192FU
b72c69dd rtlwifi: Update firmware for RTL8188EU to v28.0
51290942 (tag: 20230515) Merge branch 'main' of https://github.com/CirrusLogic/linux-firmware

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit a5005508f0)
2023-07-15 22:24:50 +02:00
Carsten Spieß
345bce75a1 octeon: ubnt-edgerouter-4/6p: devicetree cleanup
removed redundant eeprom partition nodes from
cn7130_ubnt_edgerouter-4.dts and cn7130_ubnt_edgerouter-6p.dts
as they are identically defined in cn7130_ubnt_edgerouter-e300.dtsi.

Signed-off-by: Carsten Spieß <mail@carsten-spiess.de>
(integrated eeprom referenced node in the .dtsi)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 700f11aaad)
2023-07-15 22:24:50 +02:00
Carsten Spieß
abe659efba octeon: ubnt-edgerouter-e300: fix missing MTD partition
The MAC addresses should be read from 3rd MTD partition,
but only two MTD partitions are populated.

To fix it, a partitions node has to surround the partition
nodes in device tree.

Tested with Edgerouter 6P

Signed-off-by: Carsten Spieß <mail@carsten-spiess.de>
(fixed checkpatch complains)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 2b1d7965c7)
2023-07-15 22:24:50 +02:00
Carsten Spieß
00d4a3190b octeon: ubnt-edgerouter-e300: fix LED settings
LEDs on Edgerouter 6P didn't work correctly:
blue /white LED swapped, on/off state inverted

Fixed in device tree:
swap the GPIO ports for power:blue and power:white LEDs
change LED activity from LOW to HIGH

Tested on Edgerouter 6P

Signed-off-by: Carsten Spieß <mail@carsten-spiess.de>
(cherry picked from commit 9009672930)
2023-07-15 22:24:50 +02:00
Tomasz Maciej Nowak
b58955e924 ib: split out processing user provided packages
Some device recipes remove default target packages. If user tries to add
them back they will be ignored, since packages list is processed in one
go. Process the device recipe packages first and do user ones later, so
additions won't get filtered out.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
(cherry picked from commit e40b9a7fa0)
2023-07-15 22:24:50 +02:00
Tomasz Maciej Nowak
b52cfba97a sdk: rename README + update Makefile
'help' target fails not finding a file, so follow up on a change[2] made
as a fix for main README[1].

1. d0113711a3 ("README: port to 21st century")
2. 751486b31f ("build: fix README.md reference after rename")

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
(cherry picked from commit 2d5f7035cf)
(cherry picked from commit e9911f10e4)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2023-07-15 22:24:50 +02:00
Adones Pitogo
4ab8abfbf7 build: fix generation of large .vdi images
Instead of loading the whole image into the memory when generating the
sha256 sum, we load the file in chunks and update the hash incrementally
to avoid MemoryError in python. Also remove a stray empty line.

Fixes: #13056
Signed-off-by: Adones Pitogo <pitogo.adones@gmail.com>
(mention empty line removal, adds Fixes from PR)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit bdb4b78210)
2023-07-15 22:24:50 +02:00
Christian Lamparter
62496e9a1a armsr: v8: fix NVMEM_IMX_OCOTP_ELE build error
there's a new symbol NVMEM_IMX_OCOTP_ELE that needs to be defined.
otherwise the build will fail:

|  i.MX On-Chip OTP Controller support (NVMEM_IMX_OCOTP_ELE) [N/m/y/?] (NEW)
| make[6]: *** [scripts/kconfig/Makefile:77: syncconfig] Error 1
| make[5]: *** [Makefile:628: syncconfig] Error 2

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2023-07-15 22:17:42 +02:00
Rafał Miłecki
b32a4bc33f bcm53xx: backport DT changes queued for v6.6
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 37ff916af7)
2023-07-14 13:53:31 +02:00
Daniel Golle
50507f5af3 scripts/mkits.sh: DT overlays don't need a loadaddr
DT overlays do not need relocation in order to be applied, so drop
defining the load address for dtbos.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit cff3786bd5)
2023-07-13 12:05:28 +01:00
Daniel Golle
5bd5be03bb uboot-mediatek: support classic uImage.FIT with internal images in imszb
The side-effect and main motivation is to also drop the FIT structure size
limit because with multiple device tree overlays it may easily grow beyond
the previous 4kB limit in the future.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 98e3f82c3f)
2023-07-13 12:05:28 +01:00
Daniel Golle
40a26239ff mediatek: replace hack for MaxLinear 2.5G PHY
Replace hack with proper patch also for Linux 5.15.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 712fa3eff8)
2023-07-13 12:05:28 +01:00
Daniel Golle
f94cda0187 mediatek: dts: mt7988a: remove boottrap hack
The PHY driver now uses regmap created from pio syscon, we no longer
need the boottrap device.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit f321a49fd5)
2023-07-13 12:05:28 +01:00
Daniel Golle
6092c39c13 mediatek: use backported Ethernet PHY driver also for 5.15
Backport in-SoC Gigabit Ethernet PHY driver instead of carrying the
driver in files-5.15.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 9fac590096)
2023-07-13 12:05:28 +01:00
Daniel Golle
0af05cd32a mediatek: dts: mt7988a: wire-up mediatek,pio for PHY LEDs
The PHY driver needs to read a register containing the values of the
bootstrap pins (which happen to be the PHY LEDs) to determine the LED
polarities. Allow regmap access to first pinctrl bank by adding the
'syscon' compatible, and reference the pinctrl in the MDIO bus where
the PHY driver will look for it.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 1f1e0b1144)
2023-07-13 12:05:28 +01:00
Chukun Pan
cf81850cce mediatek: filogic: add H3C Magic NX30 Pro support
Hardware specification:
  SoC: MediaTek MT7981B 2x A53
  Flash: W25N01GVZEIG 128MB
  RAM: NT5CB128M16JR-FL 256MB
  Ethernet: 4x 10/100/1000 Mbps
  Switch: MediaTek MT7531AE
  WiFi: MediaTek MT7976C
  Button: Reset, WPS
  Power: DC 12V 1A

Flash instructions:
  1. PC run command: "telnet 192.168.124.1 99"
     Username: H3C, password is the web login
     password of the router.
  2. Download preloader.bin and bl31-uboot.fip
  3. PC run command: "python3 -m http.server 80"
  4. Download files in the telnet window:
     "wget http://192.168.124.xx/xxx.bin"
     Replace xx with your PC's IP and
     the preloader.bin and bl31-uboot.fip.
  5. Flushing openwrt's uboot:
     "mtd write xxx-preloader.bin BL2"
     "mtd write xxx-bl31-uboot.fip FIP"
  6. Connect to the router via the Lan port,
     set a static ip of your PC.
     (ip 192.168.1.254, gateway 192.168.1.1)
  7. Download initramfs image, reboot router,
     waiting for tftp recovery to complete.
  8. After openwrt boots up, perform sysupgrade.

Note:
  1. The u-boot-env partition on mtd is empty,
     OEM stores their env on ubi:u-boot-env.
  2. Back up all mtd partitions before flashing.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit e78d1a06c8)
2023-07-13 12:05:28 +01:00
Chukun Pan
f7daeec3bd uboot-mediatek: add H3C Magic NX30 Pro support
The OEM uboot limit brush into 3rd-party firmware.
So add a custom uboot build to support openwrt.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit 437e79ad6d)
2023-07-13 12:05:28 +01:00
Wenli Looi
23d6474e45 mediatek: add support for Netgear EX6250v2 series
Netgear EX6250v2, EX6400v3, EX6410v2, EX6470 are wall-plug 802.11ac
(Wi-Fi 5) extenders. Like other MT7629 devices, Wi-Fi does not work
currently as there is no driver.

Related: https://github.com/openwrt/openwrt/pull/5084

For future reference, 2.4GHz MAC = LAN+1, 5GHz MAC = LAN+2.

Specifications:
* MT7629, 256 MiB RAM, 16 MiB SPI NOR
* MT7761N (2.4GHz) / MT7762N (5GHz) - no driver
* Ethernet: 1 port 10/100/1000
* UART: 115200 baud (labeled on board)

Installation:
* Flash the factory image through the stock web interface, or TFTP to
  the bootloader. NMRP can be used to TFTP without opening the case.
* After installation, perform a factory reset. Wait for the device to
  boot, then hold the reset button for 10 seconds. This is needed
  because sysupgrade in the stock firmware will attempt to preserve its
  configuration using sysupgrade.tgz.
  See https://github.com/openwrt/openwrt/pull/4182

Revert to stock firmware:
* Flash the stock firmware to the bootloader using TFTP/NMRP.

Signed-off-by: Wenli Looi <wlooi@ucalgary.ca>
(cherry picked from commit 73de41898f)
2023-07-13 12:05:28 +01:00
Wenli Looi
977ee439d7 image: add additional fields to Netgear encrypted image
These fields are used for EAX12 and EX6250v2 series, and perhaps other
devices. Compatibility is preserved with the WAX202 and WAX206.

In addition, adds the related vars to DEVICE_VARS so that the variables
work correctly with multiple devices.

References in GPL source:
https://www.downloads.netgear.com/files/GPL/EAX12_EAX11v2_EAX15v2_GPL_V1.0.3.34_src.tar.gz

* tools/imgencoder/src/gj_enc.c
  Contains code that generates the encrypted image.

Signed-off-by: Wenli Looi <wlooi@ucalgary.ca>
(cherry picked from commit 0a1ebccc87)
2023-07-13 12:05:28 +01:00
Pavel Pernička
b7fac1bf8c ath79: DTS improvement for buzzer on RB951G-2HnD
Mikrotik RB951 router has a buzzer on the board, which makes annoying noises
due to the interference caused by PoE input or Wifi transmission
when no GPIO pin state is set.
I added buzzer node to device's DTS in order to set deault level to 1
and to provide easier access for it.

Signed-off-by: Pavel Pernička <pernicka.pa@gmail.com>
(cherry picked from commit dac0a133cf)
2023-07-12 20:46:53 +02:00
Michał Kępień
98b397d4fb ath79: add support for MikroTik RB951G-2HnD
MikroTik RB951G-2HnD is a wireless SOHO router that was previously
supported by the ar71xx target, see commit 7a709573d7 ("ar71xx: add
kernel support for the Mikrotik RB951G board").

Specifications
--------------

  - SoC: Atheros AR9344 (600 MHz)
  - RAM: 128 MB (2x 64 MB)
  - Storage: 128 MB NAND flash (various manufacturers)
  - Ethernet: Atheros AR8327 switch, 5x 10/100/1000 Mbit/s
      - 1x PoE in (port 1, 8-30 V input)
  - Wireless: Atheros AR9340 (802.11b/g/n)
  - USB: 2.0 (1A)
  - 8x LED:
      - 1x power (green, not configurable)
      - 1x user (green, not configurable)
      - 5x GE ports (green, not configurable)
      - 1x wireless (green, not configurable)
  - 1x button (restart)

Unlike on the RB951Ui-2HnD, none of the LEDs on this device seem to be
GPIO-controllable, which was also the case for older OpenWRT versions
that supported this board via a mach file.  The Ethernet port LEDs are
controlled by the switch chip.

See https://mikrotik.com/product/RB951G-2HnD for more details.

Flashing
--------

TFTP boot initramfs image and then perform sysupgrade.  Follow
common MikroTik procedures at https://openwrt.org/toh/mikrotik/common.

Signed-off-by: Michał Kępień <openwrt@kempniu.pl>
(cherry picked from commit db02cecd6a)
2023-07-12 20:45:43 +02:00
Michał Kępień
7bb616d300 ath79: mikrotik: extract common bits for RB951x-2HnD devices
Mikrotik RouterBOARD 951Ui-2HnD and Mikrotik RouterBOARD RB951G-2HnD are
very similar devices.  Extract the DTS bits that are identical for these
two boards to a separate DTSI file.

Signed-off-by: Michał Kępień <openwrt@kempniu.pl>
(cherry picked from commit c6ef417094)
2023-07-12 20:45:43 +02:00
Rafał Miłecki
a4792d79e8 bcm53xx: backport DT changes from v6.5
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 8674b41c0d)
2023-07-11 10:53:45 +02:00
Rafał Miłecki
a210fced85 kernel: bgmac: fix regressed support for BCM53573 SoCs
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit d54f3b2cfd)
2023-07-10 12:54:53 +02:00
Rafał Miłecki
e341d51e06 bcm47xx: fix bgmac MTU patch filename
Fixes: 4970dd027b ("bcm47xx: revert bgmac back to the old limited max frame size")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 83aeb0bbd4)
2023-07-10 12:54:53 +02:00
Rafał Miłecki
ef7d800333 kernel: backport NVMEM patches queued for the v6.5
This includes some driver changes and support for fixed cells layout.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 07bdc55515)
2023-07-10 12:54:53 +02:00
Martin Schiller
f4e1f99961 kernel: net: phy: realtek: fix rtl822x_probe on unsupported devices
Calling rtl822x_probe() on phy devices which uses the rtl822x_read_mmd()
and rtl822x_write_mmd() functions makes no sense and the probe ends with
an EOPNOTSUPP error.

Signed-off-by: Martin Schiller <ms@dev.tdt.de>
(cherry picked from commit 5af7d47cd7)
2023-07-08 15:48:28 +02:00
Felix Fietkau
c49654f4f0 ramips/mt7621: disable the cpufreq driver
It causes a noticeable performance decrease

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit dc38199b96)
2023-07-08 15:46:54 +02:00
Aleksander Jan Bajkowski
ac2d6cf573 kernel: sort generic configuration
This was done by executing these commands:

$ ./scripts/kconfig.pl '+' target/linux/generic/config-5.15 /dev/null > target/linux/generic/config-5.15-new
$ mv target/linux/generic/config-5.15-new target/linux/generic/config-5.15

$ ./scripts/kconfig.pl '+' target/linux/generic/config-6.1 /dev/null > target/linux/generic/config-6.1-new
$ mv target/linux/generic/config-6.1-new target/linux/generic/config-6.1

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
(cherry picked from commit 4f197f9134)
2023-07-08 15:45:12 +02:00
John Audia
5678bb801e kernel: bump 5.15 to 5.15.120
All patches automatically rebased.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 0dc0504fc8)
2023-07-08 15:43:59 +02:00
Nick Hainke
f2a98977c4 wolfssl: update to 5.6.3
Release Notes:
- https://github.com/wolfSSL/wolfssl/releases/tag/v5.6.0-stable
- https://github.com/wolfSSL/wolfssl/releases/tag/v5.6.2-stable
- https://github.com/wolfSSL/wolfssl/releases/tag/v5.6.3-stable

Refresh patch:
- 100-disable-hardening-check.patch

Backport patch:
- 001-fix-detection-of-cut-tool-in-configure.ac.patch

Signed-off-by: Nick Hainke <vincent@systemli.org>
(cherry picked from commit 0e83b5e6cc)
2023-07-08 15:43:59 +02:00
John Thomson
27f68a39fd kernel: fix KernelPackage when all KCONFIG are versioned
If a kernel package was defined where all KCONFIG symbols were dynamic,
and versioned, no FILES would be installed, as the foreach evaluation was
providing the value of the variable defined by the KCONFIG symbol name
including the version test

Fix this by calling the version_filter function on the list of KCONFIG
variable names run through by foreach

Example, kernel 6.1:
KCONFIG:=CONFIG_OLD@lt6.1 CONFIG_NEW@ge6.1
filter-out any KCONFIG settings forced by package:
CONFIG_OLD@lt6.1 CONFIG_NEW@ge6.1
there are dynamic settings, so for each of them,
get the value of the make variable defined by symbol name:
    CONFIG_OLD@lt6.1 is not set
    CONFIG_NEW@ge6.1 is not set
  versus
    CONFIG_OLD is not set
    CONFIG_NEW=m
test if any of these are m, or y
if yes, install files, otherwise, nothing to install

Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
(cherry picked from commit b3448b3fdb)
2023-07-08 15:43:59 +02:00
John Audia
e4d7917be6 x86: set CONFIG_X86_AMD_PLATFORM_DEVICE
Needed by AMD processors using Carrizo and later chipsets

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 946100ba41)
2023-07-08 15:43:59 +02:00
Zoltan HERPAI
4a79a94e37 mxs: rework image generation
Migrate to "new" image generation method. Device profiles will be generated
based on image/Makefile instead of profiles/ , which will also allow to
automatically build images for all supported devices via buildbot.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
2023-07-06 17:04:13 +02:00
Christian Lamparter
894b2086fd ipq-wifi: fix upstream board-2.bin ZTE M289F snafu
The upstream board-2.bin file in the linux-firmware.git
repository for the QCA4019 contains a packed board-2.bin
for this device for both 2.4G and 5G wifis. This isn't
something that the ath10k driver supports.

Until this feature either gets implemented - which is
very unlikely -, or the upstream boardfile is mended
(both, the original submitter and ath10k-firmware
custodian have been notified). OpenWrt will go back
and use its own bespoke boardfile. This unfortunately
means that 2.4G and on some revisions the 5G WiFi is
not available in the initramfs image for this device.

Fixes: #12886
Reported-by: Christian Heuff <christian@heuff.at>
Debugged-by: Georgios Kourachanis <geo.kourachanis@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 75505c5ec7)
2023-07-04 22:11:08 +02:00
Felix Fietkau
a70d030fb3 mt76: update to the latest version
f704e4f83c6f mt76: mt7915: fix copy&paste issue on capability check rework

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 816933bee6)
2023-07-04 06:22:07 +02:00
Sander Vanheule
cd878b1b55 ramips: mt7621: add TP-Link EAP613 v1
The TP-Link EAP613 v1 is a ceiling-mount 802.11ax access point. It can
be powered via PoE or a DC barrel connector (12V). Connecting to the
UART requires fine soldering and careful manipulation of any soldered
wires.

Device details:
  * SoC: MT7621AT
  * Flash: 16 MiB SPI NOR
  * RAM: 256 MiB DDR3L
  * Wi-Fi:
    * MT7905DA + MT7975D: 2.4 GHz + 5 GHz (DBDC), 2x2:2
    * Two stamped metal antennas (ANT1, ANT2)
    * One PCB antenna (ANT3)
    * One unpopulated antenna (ANT4)
  * Ethernet:
    * 1× 10/100/1000 Mbps port with PoE
  * LEDs:
    * Array of four blue LEDs with one control line
  * Buttons:
    * Reset
  * Board test points:
    * UART: next to CPU RF-shield and power circuits
    * JTAG: under CPU RF-shield (untested)
  * Watchdog: 3PEAK TPV706 (not implemented)

  Althought three antennas are populated, the MT7905DA does not support
  the additional Rx chain for background DFS detection (or Bluetooth)
  according to commit 6cbcc34f50 ("ramips: disable unsupported
  background radar detection").

MAC addresses:
  * LAN: 48:22:54:xx:xx:a2 (device label)
  * WLAN 2.4 GHz: 48:22:54:xx:xx:a2
  * WLAN 5 GHz: 48:22:54:xx:xx:a3

  The radio calibration blob stored in flash also contains valid MAC
  addresses for both radio bands (OUI 00:0c:43).

Factory install:
  1. Enable SSH on the device via web interface
  2. Log in with SSH, and run `cliclientd stopcs`
  3. Upload -factory.bin image via web interface. It may be necessary to
     shorten the filename of the image to e.g. 'factory.bin'.

Recovery:
  1. Open the device by unscrewing four screws from the backside
  2. Carefully remove board from the housing
  3. Connect to UART (3.3V):
    * Find test points labelled "VCC", "GND", "UART_TX", "UART_RX"
    * Solder wires to test points or connect otherwise. Be careful not
      to damage the PCB e.g. by pulling on soldered wires.
    * Open console with 115200n8 settings
  4. Interrupt bootloader and use tftpboot to start an initramfs:
        setenv ipaddr $DEVICE_IP
        setenv serverip $SERVER_IP
        tftpboot 84000000 openwrt-initramfs-kernel.bin
        bootm

  DO NOT use saveenv to store modified u-boot environment variables. The
  environment is saved at flash offset 0x30000, which erases part of the
  (secondary) bootloader.

  The device uses two bootloader stages. The first stage will load the
  second stage from a uImage stored at flash offset 0x10000. In case of
  a damaged second stage, the first stage should allow uploading a new
  image via y-modem (untested).

Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 11588c52b4)
2023-07-03 21:07:33 +02:00
Sander Vanheule
2cece6e2b0 firmware-utils: bump to git HEAD
Add support for a number of new TP-Link devices.

9e2de8515be1 tplink-safeloader: add EAP610 v3 and EAP613 v1
bb12cf5c3fa9 tplink-safeloader: Add support for TP-Link Deco M5
a2d49fb1e188 tplink-safeloader: add RU support-list entry for Archer C6U v1

Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 0cdcf03382)
2023-07-03 21:07:33 +02:00
David Bauer
fa1822a8e9 mediatek: define NMBM management region for WAX220
The NETGEAR WAX220 employs NMBM on SPI-NAND. In order to avoid dealing
with invalid factory data, enable NMBM in the area preceding the UBI
volume.

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 92eec257dd)
2023-07-02 15:31:03 +02:00
Hauke Mehrtens
f9fadb8de2 libnl-tiny: update to latest git HEAD
d433990 Make struct nla_policy and struct nlattr const

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 513bcfdf78)
2023-07-02 15:31:03 +02:00
Mathew McBride
c54ec81c99 linux-firmware: ibt-firmware: install sfi/ddc files for AX210 card
When using an Intel AX210 card, the Bluetooth hci interface failed
to start due to a missing "ibt-0041-0041.sfi" file.

Bluetooth: hci0: Failed to load Intel firmware file intel/ibt-0041-0041.sfi (-2)

A device specific configuration file (DDC) is also required:
Bluetooth: hci0: Found device firmware: intel/ibt-0041-0041.sfi
Bluetooth: hci0: Waiting for firmware download to complete
...
Bluetooth: hci0: Found Intel DDC parameters: intel/ibt-0041-0041.ddc
Bluetooth: hci0: Applying Intel DDC parameters completed
Bluetooth: hci0: Firmware timestamp 2023.13 buildtype 1 build 62562

Fixes: #8558
Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit fff6833d4c)
2023-07-02 15:31:03 +02:00
Robert Marko
0d324c682c generic: filter out CONFIG_FRAME_WARN
CONFIG_FRAME_WARN value is set by config/Config-kernel.in based on the
target type dynamically since commit:
16a2051 ("kernel: Set CONFIG_FRAME_WARN depending on target").

However, CONFIG_FRAME_WARN was not set to get filtered out so it ended up
in multiple target configs during refreshes.
So, lets filter out CONFIG_FRAME_WARN as its set dynamically to prevent it
ending up in more target configs.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 7a9a4168bb)
2023-07-02 15:31:03 +02:00
Joshua O'Leary
fbb4aac69b zbt-wd323: add GPIO WDT support
Watchdog has not been properly configured for this router - the PCB has a
hardware watchdog connected to one of the GPIO pin 21 [1]
This commit provides this fix [2]

Without this fix, the ZBT-WD323 is unusable in OpenWRT because it power
cycles every 30 seconds due to the watchdog tripping

[1] https://forum.openwrt.org/t/zbt-wd323-router-power-cycles-every-30-seconds/77535/7
[2] https://forum.openwrt.org/t/zbt-wd323-images-unusable-proposed-workaround/162145/5

Signed-off-by: Joshua O'Leary <josh.oleary@mobile-power.co.uk>
(cherry picked from commit 008cc836fe)
2023-07-02 15:31:03 +02:00
Mikhail Zhilkin
436ef37728 ramips: add support for Sercomm S1500 devices
This commit adds support for following wireless routers:
 - Beeline SmartBox PRO (Serсomm S1500 AWI)
 - WiFire S1500.NBN (Serсomm S1500 BUC)

This commit is based on this PR:
 - Link: https://github.com/openwrt/openwrt/pull/4770
 - Author: Maximilian Weinmann <x1@disroot.org>
The opening of this PR was agreed with author.

My changes:
- Sorting, minor changes and some movings between dts and dtsi
- Move leds to dts when possible
- Recipes for the factory image
- Update of the installation/recovery/return to stock guides
- Add reset GPIO for the pcie1

Common specification
--------------------
SoC:        MediaTek MT7621AT (880 MHz, 2 cores)
Switch:     MediaTek MT7530 (via SoC MT7621AT)
Wireless:   2.4 GHz, MT7602EN, b/g/n, 2x2
Wireless:   5 GHz, MT7612EN, a/n/ac, 2x2
Ethernet:   5 ports - 5×GbE (WAN, LAN1-4)
Mini PCIe:  via J2 on PCB, not soldered on the board
UART:       J4 -> GND[], TX, VCC(3.3V), RX
BootLoader: U-Boot SerComm/Mediatek

Beeline SmartBox PRO specification
----------------------------------
RAM (Nanya NT5CB128M16FP): 256 MiB
NAND-Flash (ESMT F59L2G81A): 256 MiB
USB ports: 2xUSB2.0
LEDs: Status (white), WPS (blue), 2g (white), 5g (white) + 10 LED Ethernet
Buttons: 2 button (reset, wps), 1 switch button (ROUT<->REP)
Power: 12 VDC, 1.5 A
PCB Sticker: 970AWI0QW00N256SMT Ver. 1.0
CSN: SG15********
MAC LAN: 94:4A:0C:**:**:**
Manufacturer's code: 0AWI0500QW1

WiFire S1500.NBN specification
------------------------------
RAM (Nanya NT5CC64M16GP): 128 MiB
NAND-Flash (ESMT F59L1G81MA): 128 MiB
USB ports: 1xUSB2.0
LEDs: Status (white), WPS (white), 2g (white), 5g (white) + 10 LED Ethernet
Buttons: 2 button (RESET, WPS)
Power: 12 VDC, 1.0 A
PCB Sticker: 970BUC0RW00N128SMT Ver. 1.0
CSN: MH16********
MAC WAN: E0:60:66:**:**:**
Manufacturer's code: 0BUC0500RW1

MAC address table (PRO)
-----------------------
use   address   source
LAN   *:23      factory 0x1000 (label)
WAN   *:24      factory $label +1
2g    *:23      factory $label
5g    *:25      factory $label +2

MAC addresses (NBN)
-------------------
use   address   source
LAN   *:0e      factory 0x1000
WAN   *:0f      LAN +1 (label)
2g    *:0f      LAN +1
5g    *:10      LAN +2

OEM easy installation
---------------------
1. Remove all dots from the factory image filename (except the dot
   before file extension)
2. Upload and update the firmware via the original web interface
3. Two options are possible after the reboot:
   a. OpenWrt - that's OK, the mission accomplished
   b. Stock firmware - install Stock firmware (to switch booflag from
      Sercomm0 to Sercomm1) and then OpenWrt factory image.

Return to Stock
---------------
1. Change the bootflag to Sercomm1 in OpenWrt CLI and then reboot:
   printf 1 | dd bs=1 seek=7 count=1 of=/dev/mtdblock2
   reboot
2. Install stock firmware via the web OEM firmware interface

Recovery
--------
Use sercomm-recovery tool.
Link: https://github.com/danitool/sercomm-recovery

Tested-by: Pavel Ivanov <pi635v@gmail.com>
Tested-by: Denis Myshaev <denis.myshaev@gmail.com>
Tested-by: Oleg Galeev <olegingaleev@gmail.com>
Tested-By: Ivan Pavlov <AuthorReflex@gmail.com>
Co-authored-by: Maximilian Weinmann <x1@disroot.org>
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
(cherry picked from commit 2d6784a033)
2023-07-02 15:19:34 +02:00
Mikhail Zhilkin
5399d0362f ramips: sercomm.mk: preparation for Sercomm s1500 devices support
This commit moves a part of the code from the "sercomm-factory-cqr" recipe
to the separate "sercomm-mkhash" recipe. This simplifies recipes and
allows insert additional recipes between these code blocks (required for
the future support for Beeline SmartBox PRO router).

dd automatically fills the file by 0x00 if the filesize is less than
offset where we start writing. We drop such dd command so we need to add
--extra-padding-size 0x190 to the sercomm-pid.py call.

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
(cherry picked from commit f560be583a)
2023-07-02 15:19:34 +02:00
John Audia
c719dfd29f kernel: bump 5.15 to 5.15.119
Build system: x86_64
Build-tested: x86_64/ACEMAGICIAN T8PLUS, ramips/tplink_archer-a6-v3
Run-tested: x86_64/ACEMAGICIAN T8PLUS, ramips/tplink_archer-a6-v3

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 42cb0f0f26)
2023-07-02 10:59:25 +02:00
Felix Fietkau
7be76a9735 mt76: fix download hash
Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit a3e173e00e)
2023-07-02 10:38:50 +02:00
Felix Fietkau
649d9e3590 mt76: update to the latest version
2c9c8ffe9d8c wifi: mt76: mt7615: fix possible race in mt7615_mac_sta_poll
3365c80f4202 wifi: mt76: connac: fix stats->tx_bytes calculation
b69d82130b47 wifi: mt76: connac: do not check WED status for non-mmio devices
1f9cd65b55d7 wifi: mt76: mt7921e: fix probe timeout after reboot
42dace9ce247 wifi: mt76: mt7921: Fix use-after-free in fw features query.
540adbb38205 wifi: mt76: mt7921: add Netgear AXE3000 (A8000) support
150e2d0ffc0c wifi: mt76: mt7996: fix possible NULL pointer dereference in mt7996_mac_write_txwi()
5b7519be2bf6 wifi: mt76: mt7996: fix endianness of MT_TXD6_TX_RATE
40f6e433f747 wifi: mt76: mt76x02: remove WEP support
84ea1a24f5b5 mt76: mt7921: don't assume adequate headroom for SDIO headers
5c28e17f8c78 wifi: mt76: mt7996: fix header translation logic
2386cec860fa wifi: mt76: mt7996: enable BSS_CHANGED_MU_GROUPS support
748d4a2bfebd wifi: mt76: mt7615: enable BSS_CHANGED_MU_GROUPS support
458ad0af21be wifi: mt76: enable UNII-4 channel 177 support
7fb046011293 wifi: mt76: mt7915: fix background radar event being blocked
d2a77a9954bb wifi: mt76: mt7915: report tx retries/failed counts for non-WED path
f76b102b09ca wifi: mt76: mt7915: rework tx packets counting when WED is active
5637d9e37d9e wifi: mt76: mt7915: rework tx bytes counting when WED is active
34bdc7fcb4c0 wifi: mt76: report non-binding skb tx rate when WED is active
d71aa7b992a3 wifi: mt76: mt7915: drop return in mt7915_sta_statistics
251c363c3087 wifi: mt76: mt7996: drop return in mt7996_sta_statistics
150bb95cb153 wifi: mt76: mt7921: do not support one stream on secondary antenna only
d480c3281f21 wifi: mt76: mt7921: remove macro duplication in regs.h
18b1027e5b6e wifi: mt76: mt7915: move mib_stats structure in mt76.h
25ec4b91020e wifi: mt76: mt7996: rely on mib_stats shared definition
6541afa88b3b wifi: mt76: mt7921: rely on mib_stats shared definition
eeb60eb9a5a0 wifi: mt76: mt7915: add support for MT7981 [sync with upstream]
d5b7e6a3d735 wifi: mt76: mt7921e: report tx retries/failed counts in tx free event
f0f19cea6646 wifi: mt76: mt7921: fix skb leak by txs missing in AMSDU
edd8a830f6e3 wifi: mt76: add tx_nss histogram to ethtool stats
e48235308b3e wifi: mt76: mt7915: accumulate mu-mimo ofdma muru stats
a729242363d9 wifi: mt76: mt7921: fix non-PSC channel scan fail
8d52436ee0cd wifi: mt76: mt7921: Support temp sensor
d152c8688c14 wifi: mt76: mt7915: disable WFDMA Tx/Rx during SER recovery
d07785c344ac wifi: mt76: mt7996: disable WFDMA Tx/Rx during SER recovery
2a19784137f9 wifi: mt76: mt7921: make mt7921_mac_sta_poll static
da8e33a15e71 wifi: mt76: mt7915: fix command timeout in AP stop period
cc58d5c4a9c9 mt76: mt7996: rely on mt76_sta_stats in mt76_wcid
98a37c82a373 wifi: mt76: mt7921: get rid of MT7921_RESET_TIMEOUT marco
ece724cf562b wifi: mt76: mt7996: move radio ctrl commands to proper functions
527cbbc5ede7 wifi: mt76: connac: add support for dsp firmware download
44e323340637 wifi: mt76: mt7996: fix bss wlan_idx when sending bss_info command
63f0053df07a wifi: mt76: mt7996: enable VHT extended NSS BW feature
e1bb4ef7b2bb wifi: mt76: connac: add support to set ifs time by mcu command
080ca19cc686 wifi: mt76: mt7996: use correct phy for background radar event
2c163f1812a3 wifi: mt76: mt7996: fix WA event ring size
b511a437ace4 wifi: mt76: mt7996: add muru support
ece67c98dc1c wifi: mt76: mt7996: increase tx token size
7c2515d85117 wifi: mt76: mt7921e: fix init command fail with enabled device
30706095c566 wifi: mt76: mt7915: move sta_poll_list and sta_poll_lock in mt76_dev
b06ed10ee271 wifi: mt76: mt7603: rely on shared sta_poll_list and sta_poll_lock
b59bdae339de wifi: mt76: mt7615: rely on shared sta_poll_list and sta_poll_lock
6da2e0e4ef54 wifi: mt76: mt7996: rely on shared sta_poll_list and sta_poll_lock
b19d3ad88e8b wifi: mt76: mt7921: rely on shared sta_poll_list and sta_poll_lock
595b033275a3 wifi: mt76: mt7915: move poll_list in mt76_wcid
16fcad171849 wifi: mt76: mt7603: rely on shared poll_list field
e19f84091d2e wifi: mt76: mt7615: rely on shared poll_list field
b87e4dad1e84 wifi: mt76: mt7996: rely on shared poll_list field
6d7950e258d0 wifi: mt76: mt7921: rely on shared poll_list field
f5c5eece5038 wifi: mt76: move ampdu_state in mt76_wcid
7e44467469fe mt76: connac: move more mt7921/mt7915 mac shared code in connac lib
39a70710ddcd wifi: mt76: move rate info in mt76_vif
0dc4326991df wifi: mt76: connac: move connac3 definitions in mt76_connac3_mac.h
29cfabbb4b90 wifi: mt76: connac: add connac3 mac library
d60b401867f4 linux-firmware: update firmware for MT7922 WiFi device
9404601a6c97 linux-firmware: update firmware for MT7922 WiFi device
2f851902d6b1 linux-firmware: update firmware for MT7921 WiFi device
f36b921692b9 Revert "wifi: mt76: mt76x02: remove WEP support
c50be0b54cdd wifi: mt76: mt7915: fix capabilities in non-AP mode
d7d7479b00e9 wifi: mt7915: fix beaconing in mesh mode
1377f586c6f5 wifi: mt7915: move capability check to start_ap

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 01885bc6a3)
(cherry picked from commit 86ebaef5d4)
2023-07-01 22:11:58 +02:00
Mikhail Zhilkin
7ff95775a2 mediatek: add support for Mercusys MR90X v1
This commit adds support for Mercusys MR90X(EU) v1 router.

Device specification
--------------------
SoC Type:   MediaTek MT7986BLA, Cortex-A53, 64-bit
RAM:        MediaTek MT7986BLA (512MB)
Flash:      SPI NAND GigaDevice GD5F1GQ5UEYIGY (128 MB)
Ethernet:   MediaTek MT7531AE + 2.5GbE MaxLinear GPY211C0VC (SLNW8)
Ethernet:   1x2.5Gbe (WAN/LAN 2.5Gbps), 3xGbE (WAN/LAN 1Gbps, LAN1, LAN2)
WLAN 2g:    MediaTek MT7975N, b/g/n/ax, MIMO 4x4
WLAN 5g:    MediaTek MT7975P(N), a/n/ac/ax, MIMO 4x4
LEDs:       1 orange and 1 green status LEDs, 4 green gpio-controlled
            LEDs on ethernet ports
Button:     1 (Reset)
USB ports:  No
Power:      12 VDC, 2 A
Connector:  Barrel
Bootloader: Main U-Boot - U-Boot 2022.01-rc4. Additionally, both UBI
            slots contain "seconduboot" (also U-Boot 2022.01-rc4)

Serial console (UART)
---------------------
                            V
+-------+-------+-------+-------+
| +3.3V |  GND  |  TX   |  RX   |
+---+---+-------+-------+-------+
    |
    +--- Don't connect

The R3 (TX line) and R6 (RX line) are absent on the PCB. You should
solder them or solder the jumpers.

Installation (UART)
-------------------
1. Place OpenWrt initramfs image on tftp server with IP 192.168.1.2
2. Attach UART, switch on the router and interrupt the boot process by
   pressing 'Ctrl-C'
3. Load and run OpenWrt initramfs image:
      tftpboot initramfs-kernel.bin
      bootm
4. Once inside OpenWrt, set / update env variables:
      fw_setenv baudrate 115200
      fw_setenv bootargs "ubi.mtd=ubi0 console=ttyS0,115200n1 loglevel=8 earlycon=uart8250,mmio32,0x11002000 init=/etc/preinit"
      fw_setenv fdtcontroladdr 5ffc0e70
      fw_setenv ipaddr 192.168.1.1
      fw_setenv loadaddr 0x46000000
      fw_setenv mtdids "spi-nand0=spi-nand0"
      fw_setenv mtdparts "spi-nand0:2M(boot),1M(u-boot-env),50M(ubi0),50M(ubi1),8M(userconfig),4M(tp_data)"
      fw_setenv netmask 255.255.255.0
      fw_setenv serverip 192.168.1.2
      fw_setenv stderr serial@11002000
      fw_setenv stdin serial@11002000
      fw_setenv stdout serial@11002000
      fw_setenv tp_boot_idx 0
5. Run 'sysupgrade -n' with the sysupgrade OpenWrt image

Installation (without UART)
---------------------------
1.  Login as root via SSH (router IP, port 20001, password - your web
    interface password)
2.  Open for editing /etc/hotplug.d/iface/65-iptv (e.g., using WinSCP and
    SSH settings from the p.1)
3.  Add a newline after "#!/bin/sh":
       telnetd -l /bin/login.sh
4.  Save "65-iptv" file
5.  Toggle "IPTV/VLAN Enable" checkbox in the router web interface and
    save
6.  Make sure that telnetd is running:
       netstat -ltunp | grep 23
7.  Login via telnet to router IP, port 23 (no username and password are
    required)
8  Upload OpenWrt "initramfs-kernel.bin" to the "/tmp" folder of the
    router (e.g., using WinSCP and SSH settings from the p.1)
9.  Stock busybox doesn't contain ubiupdatevol command. Hence, we need to
    download and upload the full version of busybox to the router. For
    example, from here:
    https://github.com/xerta555/Busybox-Binaries/raw/master/busybox-arm64
    Upload busybox-arm64 to the /tmp dir of the router and run:
    in the telnet shell:
       cd /tmp
       chmod a+x busybox-arm64
10. Check "initramfs-kernel.bin" size:
       du -h initramfs-kernel.bin
11. Delete old and create new "kernel" volume with appropriate size
    (greater than "initramfs-kernel.bin" size):
       ubirmvol /dev/ubi0 -N kernel
       ubimkvol /dev/ubi0 -n 1 -N kernel -s 9MiB
12. Write OpenWrt "initramfs-kernel.bin" to the flash:
       ./busybox-arm64 ubiupdatevol /dev/ubi0_1 /tmp/initramfs-kernel.bin
13. u-boot-env can be empty so lets create it (or overwrite it if it
    already exists) with the necessary values:
       fw_setenv baudrate 115200
       fw_setenv bootargs "ubi.mtd=ubi0 console=ttyS0,115200n1 loglevel=8 earlycon=uart8250,mmio32,0x11002000 init=/etc/preinit"
       fw_setenv fdtcontroladdr 5ffc0e70
       fw_setenv ipaddr 192.168.1.1
       fw_setenv loadaddr 0x46000000
       fw_setenv mtdids "spi-nand0=spi-nand0"
       fw_setenv mtdparts "spi-nand0:2M(boot),1M(u-boot-env),50M(ubi0),50M(ubi1),8M(userconfig),4M(tp_data)"
       fw_setenv netmask 255.255.255.0
       fw_setenv serverip 192.168.1.2
       fw_setenv stderr serial@11002000
       fw_setenv stdin serial@11002000
       fw_setenv stdout serial@11002000
       fw_setenv tp_boot_idx 0
14. Reboot to OpenWrt initramfs:
       reboot
15. Login as root via SSH (IP 192.168.1.1, port 22)
16. Upload OpenWrt sysupgrade.bin image to the /tmp dir of the router
17. Run sysupgrade:
       sysupgrade -n /tmp/sysupgrade.bin

Recovery
--------
1. Press Reset button and power on the router
2. Navigate to U-Boot recovery web server (http://192.168.1.1/) and
   upload the OEM firmware

Recovery (UART)
---------------
1. Place OpenWrt initramfs image on tftp server with IP 192.168.1.2
2. Attach UART, switch on the router and interrupt the boot process by
   pressing 'Ctrl-C'
3. Load and run OpenWrt initramfs image:
      tftpboot initramfs-kernel.bin
      bootm
4. Do what you need (restore partitions from a backup, install OpenWrt
   etc.)

Stock layout
------------
0x000000000000-0x000000200000 : "boot"
0x000000200000-0x000000300000 : "u-boot-env"
0x000000300000-0x000003500000 : "ubi0"
0x000003500000-0x000006700000 : "ubi1"
0x000006700000-0x000006f00000 : "userconfig"
0x000006f00000-0x000007300000 : "tp_data"

ubi0/ubi1 format
----------------
U-Boot at boot checks that all volumes are in place:
+-------------------------------+
| Volume Name: uboot   Vol ID: 0|
| Volume Name: kernel  Vol ID: 1|
| Volume Name: rootfs  Vol ID: 2|
+-------------------------------+

MAC addresses
-------------
+---------+-------------------+-----------+
|         | MAC               | Algorithm |
+---------+-------------------+-----------+
| label   | 00:eb:xx:xx:xx:be | label     |
| LAN     | 00:eb:xx:xx:xx:be | label     |
| WAN     | 00:eb:xx:xx:xx:bf | label+1   |
| WLAN 2g | 00:eb:xx:xx:xx:be | label     |
| WLAN 5g | 00:eb:xx:xx:xx:bd | label-1   |
+---------+-------------------+-----------+
label MAC address was found in UBI partition "tp_data", file
"default-mac". OEM wireless eeprom is also there (file
"MT7986_EEPROM.bin").

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
(cherry picked from commit e4fe3097ef)
[Fix merging conflict]
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
2023-07-01 15:16:17 +00:00
Andreas Böhler
023a8853c8 ipq4019: add support for ZTE MF287+ aka DreiNeo
The ZTE MF287+ is a LTE router used (exclusively?) by the network operator
"3". The MF287 (i.e. non-plus aka 3Neo) is also supported (the only
difference is the LTE modem)

Specifications
==============

SoC: IPQ4018
RAM: 256MiB
Flash: 8MiB SPI-NOR + 128MiB SPI-NAND
LAN: 4x GBit LAN
LTE: ZTE Cat12 (MF287+) / ZTE Cat6 (MF287)
WiFi: 802.11a/b/g/n/ac SoC-integrated

MAC addresses
=============

LAN: from config + 2
WiFi 1: from config
WiFi 2: from config + 1

Installation
============

Option 1 - TFTP
---------------

TFTP installation using UART is preferred. Disassemble the device and
connect serial. Put the initramfs image as openwrt.bin to your TFTP server
and configure a static IP of 192.168.1.100. Load the initramfs image by
typing:

  setenv serverip 192.168.1.100
  setenv ipaddr 192.168.1.1
  tftpboot 0x82000000 openwrt.bin
  bootm 0x82000000

From this intiramfs boot you can take a backup of the currently installed
partitions as no vendor firmware is available for download:

  ubiattach -m14
  cat /dev/ubi0_0 > /tmp/ubi0_0
  cat /dev/ubi0_1 > /tmp/ubi0_1

Copy the files /tmp/ubi0_0 and /tmp/ubi0_1 somewhere save.

Once booted, transfer the sysupgrade image and run sysupgrade. You might
have to delete the stock volumes first:

  ubirmvol /dev/ubi0 -N ubi_rootfs
  ubirmvol /dev/ubi0 -N kernel

Option 2 - From stock firmware
------------------------------

The installation from stock requires an exploit first. The exploit consists
of a backup file that forces the firmware to download telnetd via TFTP from
192.168.0.22 and run it. Once exploited, you can connect via telnet and
login as admin:admin.

The exploit will be available at the device wiki page.

Once inside the stock firmware, you can transfer the -factory.bin file to
/tmp by using "scp" from the stock frmware or "tftp".

ZTE has blocked writing to the NAND. Fortunately, it's easy to allow write
access - you need to read from one file in /proc. Once done, you need to
erase the UBI partition and flash OpenWrt. Before performing the operation,
make sure that mtd13 is the partition labelled "rootfs" by calling
"cat /proc/mtd".

Complete commands:

  cd /tmp
  tftp -g -r factory.bin 192.168.0.22
  cat /proc/driver/sensor_id
  flash_erase /dev/mtd13 0 0
  dd if=/tmp/factory.bin of=/dev/mtdblock13 bs=131072

Afterwards, reboot your device and you should have a working OpenWrt
installation.

Restore Stock
=============

Option 1 - via UART
-------------------

Boot an OpenWrt initramfs image via TFTP as for the initial installation.
Transfer the two backed-up files to your box to /tmp.

Then, run the following commands - replace $kernel_length and $rootfs_size
by the size of ubi0_0 and ubi0_1 in bytes.

  ubiattach -m 14
  ubirmvol /dev/ubi0 -N kernel
  ubirmvol /dev/ubi0 -N rootfs
  ubirmvol /dev/ubi0 -N rootfs_data
  ubimkvol /dev/ubi0 -N kernel -s $kernel_length
  ubimkvol /dev/ubi0 -N ubi_rootfs -s $rootfs_size
  ubiupdatevol /dev/ubi0_0 /tmp/ubi0_0
  ubiupdatevol /dev/ubi0_1 /tmp/ubi0_1

Option 2 - from within OpenWrt
------------------------------

This option requires to flash an initramfs version first so that access
to the flash is possible. This can be achieved by sysupgrading to the
recovery.bin version and rebooting. Once rebooted, you are again in a
default OpenWrt installation, but no partition is mounted.

Follow the commands from Option 1 to flash back to stock.

LTE Modem
=========

The LTE modem is similar to other ZTE devices and controls some more LEDs
and battery management.

Configuring the connection using uqmi works properly, the modem
provides three serial ports and a QMI CDC ethernet interface.

Signed-off-by: Andreas Böhler <dev@aboehler.at>
(cherry picked from commit f70ee53b08)
2023-07-01 15:31:56 +02:00
Andreas Böhler
a9c92b913a ipq40xx: Enable gpio-restart in kernel configuration
Some ZTE devices require the gpio-restart driver to support restarting the
LTE modem along with OpenWrt

Signed-off-by: Andreas Böhler <dev@aboehler.at>
(cherry picked from commit 9ffdaa7fa1)
2023-07-01 15:31:56 +02:00
Jianhui Zhao
42c99789ac uboot-envtools: Add u-boot env config for GL-MT3000
This commit add u-boot env config for GL-MT3000, so
that we can use fw_printenv to print u-boot env and
use fw_setenv to set u-boot env in GL-MT3000.

Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
(cherry picked from commit 6892603efa)
2023-07-01 11:49:25 +02:00
Hauke Mehrtens
123afce696 OpenWrt v23.05.0-rc2: revert to branch defaults
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2023-06-28 00:08:33 +02:00
Hauke Mehrtens
55ae516f61 OpenWrt v23.05.0-rc2: adjust config defaults
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2023-06-28 00:08:24 +02:00
Flole Systems
cd17d8df2a filogic: add support for Netgear WAX220
Hardware
--------
SOC:   MediaTek MT7986
RAM:   1024MB DDR3
FLASH: 128MB SPI-NAND (Winbond)
WIFI:  Mediatek MT7986 DBDC 802.11ax 2.4/5 GHz
ETH:   Realtek RTL8221B-VB-CG 2.5 N-Base-T PHY with PoE
UART:  3V3 115200 8N1 (Pinout silkscreened / Do not connect VCC)

Installation
------------

1. Download the OpenWrt initramfs image. Copy the image to a TFTP server
2. Connect the TFTP server to the WAX220. Conect to the serial console,
   interrupt the autoboot process by pressing '0' when prompted.
3. Download & Boot the OpenWrt initramfs image.

   $ setenv ipaddr 192.168.2.1
   $ setenv serverip 192.168.2.2
   $ tftpboot openwrt.bin
   $ bootm

4. Wait for OpenWrt to boot. Transfer the sysupgrade image to the device
   using scp and install using sysupgrade.

   $ sysupgrade -n <path-to-sysupgrade.bin>

Signed-off-by: Flole Systems <flole@flole.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
(cherry picked from commit 984786a2f7)
2023-06-26 13:20:39 +02:00
Hauke Mehrtens
106c83a1ea uhttpd: update to latest git HEAD
34a8a74 uhttpd/file: fix string out of buffer range on uh_defer_script

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 7a6f6b8126)
2023-06-25 22:50:50 +02:00
John Audia
51c397c33f kernel: bump 5.15 to 5.15.118
All patches automatically rebased.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 1f5fce27c1)
2023-06-25 16:05:18 +02:00
Lech Perczak
b1b829ad6a ipq40xx: meraki-mr33, meraki-mr74: disable image generation
After migrating to kernel 5.15, upgrading causes the units to become
soft-bricked, hanging forever at the kernel startup.
Kernel size limitation of 4000000 bytes is suspected here, but this is
not fully confirmed.

Disable the images to protect users from inadvertent bricking of units,
because recovery of those is painful with Cisco's U-boot, until the root
cause is found and fixed.

Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
(cherry picked from commit 9d64cc068f)
2023-06-25 12:34:47 +02:00
Davide Fioravanti
fca03ea458 ramips: fix lan leds for Wavlink WL-WN535K1
Previously both lan1 and lan2 leds were wrongly labelled as lan2.
Moreover they were connected to the wrong lan port.
Fixes 8fde82095b ("ramips: add support for Wavlink WL-WN535K1")

Reported-by: Nicolò Maria Semprini <nicosemp@gmail.com>
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
(cherry picked from commit c71dada926)
2023-06-25 12:34:47 +02:00
Kim DoHyoung
0a63e72fbb ramips: mt7621: add support for Zbtlink ZBT-WG1608 (32M)
Zbtlink ZBT-WG1608 is a Wi-Fi router intendent to use with WWAN (4G/5G)
modems.

Specifications:
* SoC: MediaTek MT7621A
* RAM: 256/512 MiB
* Flash: 16/32 MiB (SPI NOR)
* Wi-Fi:
  * MediaTek MT7603E : 2.4Ghz
  * MediaTek MT7613BE : 5Ghz
* Ethernet: 10/100/1000 Mbps Ethernet x5 ports (4xLAN + WAN)
* M.2: 1x slot with USB&SIM
  * EM7455/EM12-G/EM160R/RM500Q-AE
* USB: 1x 3.0 Type-A port
* External storage: 1x microSD (SDXC) slot
* UART: console (115200 baud)
* LED:
  * 1 power indicator
  * 1 WLAN 2.4G controlled (wlan 2G)
  * 3 SoC controlled (wlan 5G, wwan, internet)
  * 5 per Eth phy (4xLAN + WAN)

MAC Addresses:
* LAN    : f8:5e:3c:xx:xx:e0 (Factory, 0xe000 (hex))
* WAN    : f8:5e:3c:xx:xx:e1 (Factory, 0xe006 (hex))
* 2.4 GHz: f8:5e:3c:xx:xx:de (Factory, 0x0004 (hex))
* 5 GHz  : f8:5e:3c:xx:xx:df (Factory, 0x8004 (hex))

Installation:
* Vendor's firmware is OpenWrt (LEDE) based, so the sysupgrade image can
  be directly used to install OpenWrt. Firmware must be upgraded using the
  'force' and 'do not save configuration' command line options (or
  correspondig web interface checkboxes) since the vendor firmware is from
  the pre-DSA era.

Recovery Mode:
 * Press reset button, power up the device, wait for about 10sec.
 * Upload sysupgrade image through the firmware recovery mode web page at
  192.168.1.1.

Signed-off-by: Kim DoHyoung <azusahmr@k-on.kr>
(cherry picked from commit 0bbd5699c8)
2023-06-25 12:32:50 +02:00
Christian Marangi
02a37dee1b odhcpd: bump to latest git HEAD
5211264 odhcpd: add support for dhcpv6_pd_min_len parameter
c6bff6f router: Add PREF64 (RFC 8781) support

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit acd9981b4e)
2023-06-24 19:09:52 +02:00
Christian Marangi
2cef1c3277 netfilter: fix typo in nf-socket and nf-tproxy kconfig
Fix a typo where the wrong KCONFIG was used and fix selecting the
correct kernel config option to use these packages.

Fixes: 4f443c885d ("netfilter: separate packages for kmod-ipt-socket and kmod-ipt-tproxy")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 3ebebf08be)
2023-06-23 17:47:17 +02:00
David Bauer
e962f866b2 mac80211: always use mac80211 loss detection
ath10k does not report excessive loss in case of broken block-ack
sessions. The loss is communicated to the host-os, but ath10k does not
trigger a low-ack events by itself.

The mac80211 framework for loss detection however detects this
circumstance well in case of ath10k. So use it regardless of ath10k's
own loss detection mechanism.

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit ed816f6ba8)
2023-06-23 00:23:58 +02:00
David Bauer
b6f2c58dd6 ath79: add support for Aruba AP-115
Hardware
========

CPU   Qualcomm Atheros QCA9558
RAM   256MB DDR2
FLASH 2x 16M SPI-NOR (Macronix MX25L12805D)
WIFI  Qualcomm Atheros QCA9558
      Atheros AR9590

Installation
============

1. Attach to the serial console of the AP-105.
   Interrupt autoboot and change the U-Boot env.

   $ setenv rb_openwrt "setenv ipaddr 192.168.1.1;
     setenv serverip 192.168.1.66;
     netget 0x80060000 ap115.bin; go 0x80060000"
   $ setenv fb_openwrt "bank 1;
     cp.b 0xbf100040 0x80060000 0x10000; go 0x80060000"
   $ setenv bootcmd "run fb_openwrt"
   $ saveenv

2. Load the OpenWrt initramfs image on the device using TFTP.
   Place the initramfs image as "ap105.bin" in the TFTP server
   root directory, connect it to the AP and make the server reachable
   at 192.168.1.66/24.

   $ run rb_openwrt

3. Once OpenWrt booted, transfer the sysupgrade image to the device
   using scp and use sysupgrade to install the firmware.

Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 1b467a902e)
2023-06-23 00:23:48 +02:00
Daniel González Cabanelas
aa256ab580 bmips: add support for Arcadyan AR7516
The Arcadyan AR7516, AKA Orange Bright Box or EE Bright Box 1, is a wifi
fast ethernet router, 2.4 GHz single band with two internal antennas. It
comes with a horizontal stand black shiny casing.

Newer Bright Box 1 model stands vertically, and comes with a totally
different board inside, not compatible with this firmware.

Hardware:
 - SoC: Broadcom BCM6328
 - CPU: single core BMIPS4350 V7.5 @ 320Mhz
 - RAM: 64 MB DDR2
 - Flash: 8 MB SPI NOR
 - Ethernet LAN: 4x 100Mbit
 - Wifi 2.4 GHz: Broadcom BCM43227 802.11bgn (onboard)
 - USB: 1x 2.0
 - ADSL: yes, unsupported
 - Buttons: 2x
 - LEDs: 9x, power LED is hardware controlled
 - UART: yes

Installation in two steps, new CFE bootloader and firmware:

Install new CFE:
  1. Power off the router and press the RESET button
  2. Power on the router and wait some seconds
  3. Release the RESET button
  3. Browse to http://192.168.1.1, this web interface will offer both
     firmware (“Software”) upgrade and bootloader upgrade; be sure to
     use the bootloader section of the upload form.
  4. Upload the new CFE (availabe at the wiki page)
  5. Wait about a minute for flashing to finish and reboot into the new bootloader.

Install OpenWrt via new CFE web UI:
  1. After installing the new CFE, visit http://192.168.1.1
  2. Upload the Openwrt cfe firmware
  5. Wait a few minutes for it to finish

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
(cherry-picked from df8e4b6c2e)
2023-06-22 17:55:04 +02:00
Etienne Champetier
09322f3c0c kernel: remove bridge offload hack
This patch initially introduced in 94b4da9b4a
breaks mvebu devices when using vlan filtering with kernel 5.15 or 6.1,
it was working ok in 5.10.

With this patch, frame that should exit untagged from the switch exit tagged.
Running 'tcpdump -Q out -evnnli eth1' (eth1 being the dsa interface)
- with the hack, frame is sent directly to the
destination port 4 with VID 2, so the switch leave the tag as instructed:
11:22:33:44:55:66 > 77:88:99:aa:bb:cc, Marvell EDSA ethertype 0xdada (Unknown), rsvd 0 0, mode From CPU, target dev 0, port 4, tagged, VID 2, FPri 0, ethertype ARP (0x0806), length 50: Ethernet (len 6), IPv4 (len 4), Request who-has 5.6.7.8 tell 1.2.3.4, length 28

- without the hack, frame is sent to the switch that
performs the forwarding decision and untagging:
11:22:33:44:55:66 > 77:88:99:aa:bb:cc, Marvell EDSA ethertype 0xdada (Unknown), rsvd 0 0, mode Forward, dev 1, port 0, tagged, VID 2, FPri 0, ethertype ARP (0x0806), length 50: Ethernet (len 6), IPv4 (len 4), Request who-has 5.6.7.8 tell 1.2.3.4, length 28

Removing this patch makes my Turris Omnia usable with vlan filtering,
ie wifi device can talk to wired device again.
Using kernel 5.15 some broadcast/multicast traffic is still leaked
(on a VLAN 2 access port I see tagged VLAN 3 frame),
using kernel 6.1 fixes that.

People needing the extra performance should try the bridger package.

Acked-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Etienne Champetier <champetier.etienne@gmail.com>
(cherry picked from commit 244328b19c)
2023-06-20 10:55:43 +02:00
Daniel González Cabanelas
ac6832110a bmips: add support for NuCom R5010UNv2
The NuCom R5010UNv2 is a wifi fast ethernet router, 2.4 GHz single band
with two external antennas.

Hardware:
 - SoC: Broadcom BCM6328
 - CPU: single core BMIPS4350 V7.5 @ 320Mhz
 - RAM: 64 MB DDR2
 - Flash: 16 MB SPI NOR
 - Ethernet LAN: 4x 100Mbit
 - Wifi 2.4 GHz: Broadcom BCM43217 802.11bgn (onboard)
 - USB: 1x 2.0
 - Buttons: 2x
 - ADSL: yes, unsupported
 - LEDs: 7x
 - UART: yes

Installation via CFE web UI:
  1. Power off the router and press the RESET button
  2. Power on the router and wait 12 or more seconds
  3. Release the RESET button
  4. Browse to http://192.168.1.1 and upload the Openwrt cfe firmware
  5. Wait a few minutes for it to finish

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
(cherry picked from commit 6cb3328b4f)
2023-06-19 20:42:44 +02:00
Daniel González Cabanelas
43746c4c5a bmips: enable the data Read Ahead Cache for BMIPS4350
The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from. Enabling this feature increases the performance up
to +30% depending on the task.

The kernel enables the whole RAC unconditionally on BMIPS3300 CPUs. Enable
the data RAC in a similar way also for BMIPS4350.

Tested on DGND3700 v1 (BCM6368) and HG556a (BCM6358).

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
(cherry picked from commit 6d1265b148)
2023-06-19 20:42:19 +02:00
Álvaro Fernández Rojas
6d3770501d bmips: fix DMA RAC flush
BMIPS_GET_CBR() returns an invalid address on some SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 62cdca25ed)
2023-06-19 20:41:57 +02:00
Maximilian Weinmann
8a0746955d ramips: Add support for Beeline SmartBox TURBO+
This adds support for Beeline Smart Box TURBO+ (Serсomm S3 CQR) router.

Device specification
--------------------
SoC Type: MediaTek MT7621AT (880 MHz, 2 cores)
RAM (Nanya NT5CC64M16GP): 128 MiB
Flash (Macronix MX30LF1G18AC): 128 MiB
Wireless 2.4 GHz (MT7603EN): b/g/n, 2x2
Wireless 5 GHz (MT7615N): a/n/ac, 4x4
Ethernet: 5 ports - 5×GbE (WAN, LAN1-4)
USB ports: 1xUSB3.0
Buttons: 2 button (reset, wps)
LEDs: Red, Green, Blue
Zigbee (EFR32MG1B232GG): 3.0
Stock bootloader: U-Boot 1.1.3
Power: 12 VDC, 1.5 A

Installation (fw 2.0.9)
-----------------------
1.  Login to the web interface under SuperUser (root) credentials.
    Password: SDXXXXXXXXXX, where SDXXXXXXXXXX is serial number of the
    device written on the backplate stick.
2.  Navigate to Setting -> WAN. Add:
       Name - WAN1
       Connection Type - Static
       IP Address - 172.16.0.1
       Netmask - 255.255.255.0
    Save -> Apply. Set default: WAN1
3.  Enable SSH and HTTP on WAN. Setting -> Remote control. Add:
       Protocol - SSH
       Port - 22
       IP Address - 172.16.0.1
       Netmask - 255.255.255.0
       WAN Interface - WAN1
    Save ->Apply
    Add:
       Protocol - HTTP
       Port - 80
       IP Address - 172.16.0.1
       Netmask - 255.255.255.0
       WAN interface - WAN1
    Save -> Apply
4.  Set up your PC ethernet:
       Connection Type - Static
       IP Address - 172.16.0.2
       Netmask - 255.255.255.0
       Gateway - 172.16.0.1
5.  Connect PC using ethernet cable to the WAN port of the router
6.  Connect to the router using SSH shell under SuperUser account
7.  Make a mtd backup (optional, see related section)
8.  Change bootflag to Sercomm1 and reboot:
        printf 1 | dd bs=1 seek=7 count=1 of=/dev/mtdblock3
        reboot
9.  Login to the router web interface under admin account
10. Remove dots from the OpenWrt factory image filename
11. Update firmware via web using OpenWrt factory image

Revert to stock
---------------
Change bootflag to Sercomm1 in OpenWrt CLI and then reboot:
   printf 1 | dd bs=1 seek=7 count=1 of=/dev/mtdblock3

mtd backup
----------
1. Set up a tftp server (e.g. tftpd64 for windows)
2. Connect to a router using SSH shell and run the following commands:
      cd /tmp
      for i in 0 1 2 3 4 5 6 7 8 9 10; do nanddump -f mtd$i /dev/mtd$i; \
      tftp -l mtd$i -p 172.16.0.2; md5sum mtd$i >> mtd.md5; rm mtd$i; done
      tftp -l mtd.md5 -p 171.16.0.2

Recovery
--------
Use sercomm-recovery tool.
Link: https://github.com/danitool/sercomm-recovery

MAC Addresses (fw 2.0.9)
------------------------
+-----+------------+---------+
| use | address    | example |
+-----+------------+---------+
| LAN | label      | *:e8    |
| WAN | label + 1  | *:e9    |
| 2g  | label + 4  | *:ec    |
| 5g  | label + 5  | *:ed    |
+-----+------------+---------+
The label MAC address was found in Factory 0x21000

Factory image format
--------------------
+---+-------------------+-------------+--------------------+
| # | Offset            | Size        | Description        |
+---+-------------------+-------------+--------------------+
| 1 | 0x0               | 0x200       | Tag Header Factory |
| 2 | 0x200             | 0x100       | Tag Header Kernel1 |
| 3 | 0x300             | 0x100       | Tag Header Kernel2 |
| 4 | 0x400             | SIZE_KERNEL | Kernel             |
| 5 | 0x400+SIZE_KERNEL | SIZE_ROOTFS | RootFS(UBI)        |
+---+-------------------+-------------+--------------------+

Co-authored-by: Mikhail Zhilkin <csharper2005@gmail.com>
Signed-off-by: Maximilian Weinmann <x1@disroot.org>
(cherry picked from commit 8fcfb21b16)
2023-06-17 12:59:37 +02:00
Mikhail Zhilkin
63942b569e scripts: sercomm-kernel-header.py: improve compatibility
This improves compatibility with the elder stock firmwares of the
following devices, which have not yet been merged into OpenWrt:
 - Beeline SmartBox Pro
 - Beeline SmartBox Turbo+
 - WiFire S1500.NBN

Without this, OpenWrt factory image installation may fail.

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Signed-off-by: Maximilian Weinmann <x1@disroot.org>
(cherry picked from commit 35a4418d39)
2023-06-17 12:59:37 +02:00
Jitao Lu
e9d2ff8045 openssl: passing cflags to configure
openssl sets additional cflags in its configuration script. We need to
make it aware of our custom cflags to avoid adding conflicting cflags.

Fixes: #12866
Signed-off-by: Jitao Lu <dianlujitao@gmail.com>
(cherry picked from commit 51f57e7c2d)
2023-06-17 12:55:29 +02:00
Tianling Shen
a46e5ce4ad rockchip: fix setup network config for nanopi r2c
Without it the WAN port won't be initialized properly.

Fixes: 8f578c15b3 ("rockchip: add NanoPi R2C support")
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit d312f12b1a)
2023-06-17 12:21:13 +02:00
John Audia
1b6f2af148 kernel: bump 5.15 to 5.15.117
Manually rebased:
	generic/backport-5.15/346-v5.18-01-Revert-ata-ahci-mvebu-Make-SATA-PHY-optional-for-Arm.patch

Removed upstreamed:
	generic/backport-5.15/830-v6.2-ata-ahci-fix-enum-constants-for-gcc-13.patch

All other patches automatically rebased.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 0e89ba8430)
2023-06-17 12:09:03 +02:00
John Audia
1de5f74062 kernel: bump 5.15 to 5.15.116
All patches rebased automatically.

Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 5dc78d8f18)
2023-06-17 12:09:03 +02:00
John Audia
81979018e0 kernel: add CONFIG_DRM_RCAR_USE_LVDS is not set
Added missing symbol.

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit fc3383a558)
2023-06-17 12:09:03 +02:00
John Audia
68bc059c55 kernel: bump 5.15 to 5.15.115
Manually rebased:
	backport-5.15/603-v5.19-page_pool-Add-recycle-stats-to-page_pool_put_page_bu.patch
	pending-5.15/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch*

Removed upstreamed:
	generic-backport/610-v6.3-net-page_pool-use-in_softirq-instead.patch[1]
	backport-5.15/705-12-v6.0-net-dsa-mt7530-rework-mt753-01-_setup.patch[2]
	backport-5.15/790-v6.4-0010-net-dsa-mt7530-split-off-common-parts-from-mt7531_se.patch[3]
	backport-5.15/703-10-v5.16-net-dsa-introduce-helpers-for-iterating-through-port.patch[4]

All other patches automatically rebased.

* Modified to define the variable i as suggested by DragonBluep in PR discussion.
  See: https://github.com/openwrt/openwrt/pull/12823#issuecomment-1578518576

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.115&id=3af319d5147454dc63665ef451229c674b538377
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.115&id=0753c1ef24194580f7165ae6e259b59a851392f2
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.115&id=5a7266feaa6d708fc6880a161786eaa884ef3c8e
4. 9902f91cf6

Build system: x86_64
Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod

Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit 5714660643)
2023-06-17 12:09:03 +02:00
Christian Marangi
6f9495b896 ipq806x: set PERFORMANCE as the default cpufreq governor
Move default cpufreq governor from ONDEMAND to PERFORMANCE. The temp
increase is just 2°C and Watt usage the change is minimal in the order
of additional millwatt. The SoC and krait in general looks to suffer for
some problem with cache scaling. To have better system stability, force
cpu freq and cache freq to the max value supported by the system. This
follows mvebu platform where cpufreq is broken and cause minimal
temp/watt increase.

User can still tweak the governor to ondemand using sysfs entry if
needed.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 6f5ea752d7)
2023-06-16 11:42:40 +02:00
Christian Marangi
11ad38f0bb Revert "ipq806x: disable cache and fabric devfreq driver to improve stability"
This reverts commit 60fc93b359.

Reenable devfreq and revert for both 5.15 and 6.1.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 37e4593213)
2023-06-16 11:41:35 +02:00
Piotr Dymacz
55993f1fc1 CI: labeler: add sifiveu target
Add support for 'sifiveu' target and its specific packages in labeler.

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
(cherry picked from commit 92b8b18c26)
2023-06-16 19:47:39 +02:00
Tianling Shen
7390068e4f toolchain: gcc: backport inline subword atomic support for riscv
RISC-V has no support for subword atomic operations; code currently
generates libatomic library calls.

This patch changes the default behavior to fast inline subword atomic
calls that do not require libatomic.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 7b4a966de8)
2023-06-16 19:47:39 +02:00
Daniel González Cabanelas
dee8ca626c bcm63xx: fix the Home Hub 2a power LED
Power LED register is wrong at dts. Fix it.

Fixes: 9ceeaf4c6c ("brcm63xx: switch to hardware led controllers")
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
(cherry picked from commit 0e01ba9361)
2023-06-16 14:41:05 +02:00
Álvaro Fernández Rojas
66e1bef8f7 bmips: add support for Comtrend VG-8050
The Comtrend VG-8050 is a wifi gigabit ethernet router, 2.4 GHz single band with
two external antennas.

Hardware:
 - SoC: Broadcom BCM63169
 - CPU: dual core BMIPS4350 @ 400Mhz
 - RAM: 128 MB DDR
 - Flash: 128 MB NAND
 - LAN switch: Broadcom BCM53125, 5x 1Gbit
 - Wifi 2.4 GHz: SoC (BCM63268) 802.11bgn
 - USB: 1x 2.0 (optional)
 - Buttons: 2x (reset)
 - LEDs: yes
 - UART: yes

Installation via CFE web UI:
  1. Power off the router.
  2. Press reset button near the power switch.
  3. Keep it pressed while powering up during ~20+ seconds.
  4. Browse to http://192.168.1.1 and upload the firmware.
  5. Wait a few minutes for it to finish.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 47cc09aa7a)
2023-06-16 09:50:34 +02:00
Álvaro Fernández Rojas
b073d6cf7a bmips: dts: dgnd3700: fix WAN port
All switch ports are labeled as port@address so let's follow the same pattern.

Fixes: ed79519b8d ("bmips: add support for Netgear DGND3700 v1, DGND3800B")
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit d9210c5ff7)
2023-06-15 20:58:18 +02:00
Álvaro Fernández Rojas
3d66e7f1db bmips: add support for Sercomm AD1018
The Sercomm AD1018 is a wifi fast ethernet router, 2.4 GHz single band with
two internal antennas.

Hardware:
 - SoC: Broadcom BCM6328
 - CPU: single core BMIPS4350 @ 320Mhz
 - RAM: 64 MB (v1) / 128 MB (v2) DDR
 - Flash: 128 MB NAND
 - Ethernet LAN: 4x 100Mbit
 - Wifi 2.4 GHz: miniPCI Broadcom BCM43217 802.11bgn
 - USB: 1x 2.0
 - Buttons: 3x (reset)
 - LEDs: yes
 - UART: yes

Installation via OEM web UI:
  1. Use the admin credentials to login via web UI
  2. Go to Managament->Update firmware and select the OpenWrt CFE firmware
  3. Press "Update Firmware" button and wait some minutes until it finish

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 38ebb2eafd)
2023-06-15 20:58:16 +02:00
Álvaro Fernández Rojas
b8bbe0d800 bmips: bump LOADER_ENTRY to RAM + 16M
This is needed on devices like Sercomm AD1018 for booting recent kernels due
to bigger kernels.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 434434ca47)
2023-06-15 20:58:11 +02:00
Daniel González Cabanelas
40966d612e bmips: add support for Actiontec R1000H
The  Actiontec R1000H is a gigabit wifi router, 2.4 GHz single band with
two external antennas. It comes with a coaxial HomePNA port.

Hardware:
 - SoC: Broadcom BCM6368
 - CPU: dual core BMIPS4350 V3.1 @400Mhz
 - RAM: 64 MB DDR
 - Flash: 32 MB parallel NOR
 - LAN switch: Broadcom BCM53115, 5x 1Gbit
 - LAN coaxial : 1x HPNA 3.1, CG3211 + CG3213
 - Wifi 2.4 GHz: Broadcom BCM4322 802.11bgn
 - USB: 1x 2.0
 - Buttons: 2x, 1 reset
 - LEDs: 7x
 - UART: yes

The HPNA hardware probably needs a firmware to make the coaxial port work.
In the OEM firmware, it's apparently sent with an utility (inhpna) through
the ethernet port.

Installation via CFE web UI:
  1. Connect the UART serial port.
  2. Power on the router and press enter at the console prompt to stop the
     bootloader.
  4. Browse to http://192.168.1.1 and upload the OpenWrt CFE firmware
  5. Wait a few minutes for it to finish

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
(cherry picked from commit e1a55de7a7)
2023-06-15 18:01:20 +02:00
Álvaro Fernández Rojas
e6acfe03dd bcm63xx: switch to standard nand_do_upgrade
Now that JFFS2 cleanmarkers are supported on the standard nand_do_upgrade
function we can start using it on bcm63xx.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from 60fc3bc948)
2023-06-15 11:49:32 +02:00
Álvaro Fernández Rojas
70afa8e6b6 bmips: switch to standard nand_do_upgrade
Now that JFFS2 cleanmarkers are supported on the standard nand_do_upgrade
function we can start using it on bmips.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from 464dfac049)
2023-06-15 11:49:13 +02:00
Álvaro Fernández Rojas
25f6252620 base-files: upgrade: nand: add JFFS2 cleanmarkers support
Some Broadcom MIPS devices require JFFS2 cleanmarkers to be present on the
kernel partition or the bootloader will identify the partition as corrupt and
won't boot the kernel.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 434df8df54)
2023-06-15 11:48:45 +02:00
Álvaro Fernández Rojas
3506efe29c bcm63xx: fix NETGEAR DGND3700v2 boot loop
The DGND3700v2 renames the cferam bootloader from cferam to cfeXXX, where XXX
is the number of firmware upgrades performed by the bootloader. Other bcm63xx
devices rename cferam.000 to cferam.XXX, but this device is special because
the cferam name isn't changed on the first firmware flashing but it's changed
on the subsequent ones.
Therefore, we need to look for "cfe" instead of "cferam" to properly detect
the cferam partition and fix the bootlop.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit cdfcac6e24)
2023-06-15 11:39:18 +02:00
Álvaro Fernández Rojas
18a85ecc29 bmips: fix NETGEAR DGND3700v2 boot loop
The DGND3700v2 renames the cferam bootloader from cferam to cfeXXX, where XXX
is the number of firmware upgrades performed by the bootloader. Other bcm63xx
devices rename cferam.000 to cferam.XXX, but this device is special because
the cferam name isn't changed on the first firmware flashing but it's changed
on the subsequent ones.
Therefore, we need to look for "cfe" instead of "cferam" to properly detect
the cferam partition and fix the bootlop.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 915e914cfa)
2023-06-15 11:39:12 +02:00
Álvaro Fernández Rojas
753be3837f kernel: mtd: bcm-wfi: add cferam name support
Some devices rename cferam bootloader using specific patterns and don't follow
broadcom standards for renaming cferam files. This requires supporting
different cferam file names.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 8813edd8d9)
2023-06-15 11:39:09 +02:00
Zoltan HERPAI
4a281a7789 sifiveu: add new target for SiFive U-based boards
RISC-V is a new CPU architecture aimed to be fully free and open. This
target will add support for it, based on 5.15.

Supports running on:
 - HiFive Unleashed - FU540, first generation
 - HiFive Unmatched - FU740, current latest generation, PCIe

SD-card images are generated, where the partitions are required to have
specific type codes. As it is commonplace nowadays, OpenSBI is used as the
first stage, with U-boot following as the proper bootloader.

Specifications:

HiFive Unleashed:
 - CPU: SiFive FU540 quad-core RISC-V (U54, RV64IMAFDC or RV64GC)
 - Memory: 8Gb
 - Ethernet: 1x 10/100/1000
 - Console: via microUSB

HiFive Unmatched:
 - CPU: SiFive FU740 quad-core RISC-V (U74, RV64IMAFDCB or RV64GCB)
 - Memory: 16Gb
 - Ethernet: 1x 10/100/1000
 - USB: 4x USB 3.2
 - PCIe:  - 1x PCIe Gen3 x8
          - 1x M.2 key M (PCIe x4)
          - 1x M.2 Key E (PCIe x1 / USB2.0)
 - Console: via microUSB

Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit a3469a90c4)
2023-06-14 09:22:08 +02:00
Zoltan HERPAI
a11f2e6044 uboot-sifiveu: add bootloader package for SiFive Ux40 boards
Add new package for building bootloader for the SiFive U-series boards. Supported
boards at this stage are the HiFive Unleashed and HiFive Unmatched.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit 91406797f9)
2023-06-14 09:22:08 +02:00
Zoltan HERPAI
0f30f47d61 firmware-utils: ptgen: add SiFive-related GUID types
Add patch until it gets accepted in firmware-utils upstream.

The SiFive RISC-V SoCs use two special partition types in the boot process.
As a first step, the ZSBL (zero-stage bootloader) in the CPU looks for a
partition with a GUID of 5B193300-FC78-40CD-8002-E86C45580B47 to load the
first-stage bootloader - which in OpenWrt's case is an SPL image. The FSBL
(SPL) then looks for a partition with a GUID of
2E54B353-1271-4842-806F-E436D6AF6985 to load the SSBL which is usually an
u-boot.

With ptgen already supporting GPT partition creation, add the required GUID
types and name them accordingly to be invoked with the '-T <GPT partition
type>' parameter.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit 18238c4428)
2023-06-14 09:22:08 +02:00
Zoltan HERPAI
cd650f1e91 openssl: add linux-riscv64 into the targets list
Add "linux-riscv64-openwrt" into openssl configurations to enable building
on riscv64.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit a0840ecd53)
2023-06-14 09:22:08 +02:00
Zoltan HERPAI
08247ffeda opensbi: add package for RISC-V
OpenSBI is a form of a first-stage bootloader, which initializes
certain parts of an SoC and then passes on control to the second
stage bootloader i.e. an u-boot image.

We're introducing the package with release v1.2, which provides
SBI v0.3 and the SBI SRST extensions which helps to gracefully
reboot/shutdown various HiFive-U SoCs.

Tested on SiFive Unleashed and Unmatched boards.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit 944b13b3ee)
2023-06-14 09:22:08 +02:00
Zoltan HERPAI
341e312ada generic: groundwork for RISC-V
Add build infrastructure for RISC-V.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit 50c05f6cd7)
2023-06-14 09:22:08 +02:00
Petr Štetiar
848759c236 uboot-armsr: add support for QEMU armv7/armv8
Add new package so we can use self-compiled bootloader during QEMU based
testing and development.

Backported fix[1] is needed for EFI boot from virtio devices.

1. https://patchwork.ozlabs.org/project/uboot/patch/20230424134946.v10.7.Ia5f5e39c882ac22b5f71c4d576941b34e868eeba@changeid/

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit b8e3fa2d12)
2023-06-13 14:15:22 +02:00
Petr Štetiar
c05c0699d4 u-boot.mk: add support for config customization
Make it possible to easily customize U-Boot config options via new
`UBOOT_CUSTOMIZE_CONFIG` variable, so we don't need to patch config
files or override config step with shell hackery.

This generic approach uses `config` CLI to tweak the .config as needed,
for example:

 UBOOT_CUSTOMIZE_CONFIG := \
	--enable CMD_EFIDEBUG \
	--enable CMD_BOOTMENU \
	--enable AUTOBOOT \
	--enable AUTOBOOT_MENU_SHOW \
	--disable AUTOBOOT_KEYED \
	--disable AUTOBOOT_USE_MENUKEY \
	--disable BOOTMENU_DISABLE_UBOOT_CONSOLE \
	--set-val BOOTDELAY 2

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit 186b97590b)
2023-06-13 14:15:21 +02:00
Mathew McBride
8d557d4744 CI: change armvirt reference to armsr
The armvirt target has been renamed to armsr.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 3df01b1aa4)
2023-06-13 14:14:34 +02:00
Mathew McBride
ded67a320c scripts: qemustart: change armvirt references to armsr
The armvirt target has been renamed to 'armsr' (Arm SystemReady)
after inclusion of EFI support.
Change references (including subtargets) accordingly.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 36bf9d8610)
2023-06-13 14:14:34 +02:00
Mathew McBride
e9ea571657 wolfssl: change armvirt reference to armsr
armvirt target has been renamed to armsr (Arm SystemReady).

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 203deef82c)
2023-06-13 14:14:33 +02:00
Mathew McBride
23a828f230 kernel: netdevices: change armvirt references to armsr
armvirt target has been renamed to armsr (Arm SystemReady)

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit c0bcfde58e)
2023-06-13 14:14:32 +02:00
Mathew McBride
4b48f8a3e7 grub2: change armvirt reference to armsr
The armvirt target has been renamed to armsr (Arm SystemReady),
so the GRUB configuration also needs to change.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 4ce7d6c888)
2023-06-13 14:14:31 +02:00
Mathew McBride
a6afb3a7bc config: change references from armvirt to armsr
armvirt target has been renamed to armsr (Arm SystemReady),
so the config defaults need to be changed as well.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 40ce6a7920)
2023-06-13 14:14:30 +02:00
Mathew McBride
7198185e3a armsr: rename from armvirt
Now that the armvirt target supports real hardware, not just
VMs, thanks to the addition of EFI, rename it to something
more appropriate.

'armsr' (Arm SystemReady) was chosen after the name of
the Arm standards program.

The 32 and 64 bit targets have also been renamed
armv7 and armv8 respectively, to allow future profiles
where required (such as armv9).

See https://developer.arm.com/documentation/102858/0100/Introduction
for more information.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05 version of commit 40b02a2301)
2023-06-13 14:14:29 +02:00
Mathew McBride
963ce6990f kernel: kmod-amazon-ena: move to top level netdevices
The Amazon ENA network devices are also used on the
AWS Arm (Graviton) instance types, so move it from
the x86-only module file to the top level netdevices.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 3a7c8fd15e)
2023-06-13 14:14:28 +02:00
Mathew McBride
86b50228c0 armvirt: 64: disable CONFIG_SMC91X
The SMC91X family is a ISA-age Ethernet controller.
I'm not particularly sure what it's doing in armvirt/64,
as it's unlikely there is a QEMU or real hardware configuration
that exists with it.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 214e94cddf)
2023-06-13 14:14:27 +02:00
Mathew McBride
bacc385dc5 armvirt: base-files: add tty0 to inittab
tty0 is the default console for devices with screens/framebuffers.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit e41b82f619)
2023-06-13 14:14:27 +02:00
Mathew McBride
067f252331 armvirt: config changes required for framebuffer console
These Kconfig options are required to get a screen console
working with the VMware Fusion ARM (Apple Silicon) preview.
They are likely to be the same for other Arm standard
"desktop" hardware that may emerge.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of 83f564f746)
2023-06-13 14:14:26 +02:00
Mathew McBride
4177b69b46 armvirt: package and select Rockchip DWMAC Ethernet driver
For devices that implement the "rockchip,*-gmac" compatible controller,
including:
- RK3328
- RK3399
- RK3568
- RK3588
- PX30

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit abbffe55dd)
2023-06-13 14:14:25 +02:00
Mathew McBride
bbd1676cd2 armvirt: 64: add Allwinner A3/A83T/A64 (sun8i family) Ethernet
Add support for the dwmac (stmmac) variant used by Allwinner
Arm64 boards.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 847467a572)
2023-06-13 14:14:24 +02:00
Luiz Angelo Daros de Luca
4d13a09ba0 kernel: modules: fix mdio-bus-mux description
Simple error during copy/paste

Fixes: 2dbeb60725 ("kernel: add mdio-bus-mux support")
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
(cherry picked from commit 1e4bc13eaa)
2023-06-13 14:14:23 +02:00
Mathew McBride
a86b74cbfe armvirt: 64: add Marvell (formerly Cavium) ThunderX series network driver
Based on working configuration supplied by Anton Antonov.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 5d2a5f7398)
2023-06-13 14:12:36 +02:00
Anton Antonov
a80eeec96d armvirt: 64: Add storage support for qemu-sbsa platform
Enable SATA support, which is used by the Server Base
System Architecture reference board[1].

Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] - https://qemu.readthedocs.io/en/latest/system/arm/sbsa.html
(23.05/5.15 version of 26905c9612)
2023-06-13 14:12:35 +02:00
Anton Antonov
3eb25435af armvirt: 64: Add NXP i.MX 8M Mini/Nano/Quad/Plus EVK support
Also includes Advantech RSB-3720 (iMX8 Plus) support.

Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[Re-sort into kernel config, move network into modules]
(23.05/5.15 version of commit 3efb3b801b)
2023-06-13 14:12:35 +02:00
Mathew McBride
2bec445c1d armvirt: 64: add support for other SystemReady-compatible vendors
These changes are to support other vendors that have SystemReady/EFI
support, including:
* Marvell Armada
** (This is speculative as I don't have a machine of my own to test)
* Amazon Graviton (tested bare-metal and virtualized instances)
* VMware (Fusion for ARM Mac preview)
* NXP/Freescale (Layerscape series not already selected)
* HiSilicon
* Allwinner/sunxi
* Rockchip (untested, options taken from arm64 defconfig)

To give an idea of the hardware certified for SystemReady,
see
https://www.arm.com/architecture/system-architectures/systemready-certification-program/ir
and
https://www.arm.com/architecture/system-architectures/systemready-certification-program/es

Other vendors that _should_ work include Marvell Octeon 10
and Ampere. I understand these systems should work
"out of the box" in ACPI mode but may require other drivers
(e.g PCIe NICs and storage controllers).

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of c3151b6f04)
2023-06-13 14:12:34 +02:00
Mathew McBride
f1a02ba135 armvirt: add options and driver modules for NXP Layerscape DPAA2 platform
Tested with a Traverse Technologies Ten64 (LS1088A) board.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 54bb95f879)
2023-06-13 14:12:33 +02:00
Mathew McBride
182fb97d8f armvirt: add 5.15 patches for NXP DPAA2 platform
This fixes an issue with NXP's DPAA2 platforms (LS1088/2088/LX2160)
* A deadlock issue when attempting to detach the SFP management from
  a PHY interface (e.g when trying to reboot). These issues were fixed
  in kernel 6.2[1], but it's version does not cleanly apply onto 5.15.

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] - see patch series "Fix rtnl_mutex deadlock with DPAA2 and SFP modules",
https://patchwork.kernel.org/project/netdevbpf/cover/20221129141221.872653-1-vladimir.oltean@nxp.com/
2023-06-13 14:12:32 +02:00
Mathew McBride
23ca9a1677 armvirt: add ACPI support
ACPI support is required for Arm 'SystemReady' server and workstation
systems (and as an option on embedded platforms).

These config changes allow OpenWrt to boot in a QEMU virtual machine
with a UEFI/EDKII 'BIOS', but with no other hardware enabled yet.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of cb3bbbf00c)
2023-06-13 14:12:31 +02:00
Mathew McBride
0bedcbb9ff build: enable vmdk/vmware images for arm64 target
This is useful for VMware's ARM64 products, e.g Fusion for M1/ARM Macs.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit f899e0e024)
2023-06-13 14:12:30 +02:00
Mathew McBride
04d2f8f11f build: use 128MiB as the boot/kernel partition size on armvirt target
The nominal partition type for EFI boot partitions is FAT32,
which has a minimum size of 32MiB on a 512-byte-sector block device.

To ensure that the boot partition is created as FAT32 set a size
well above this minimum.

A useful discussion about EFI partition sizes can be found here:
https://superuser.com/questions/1310927/what-is-the-absolute-minimum-size-a-uefi-system-partition-can-be

I have found 128MiB works pretty consistently across both
tools (mkfs.fat) and firmwares (EDKII)

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 71e56b2ff1)
2023-06-13 14:12:29 +02:00
Mathew McBride
b0e724e49c armvirt: remove model name override
Now that armvirt has been expanded to boot on more generic
ARM machines, remove the board and model name override.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 3d99314569)
2023-06-13 14:12:29 +02:00
Mathew McBride
84f566b00c armvirt: set kernel partition as the EFI system partition
U-Boot with EFI boot manager functionality will store
EFI boot order data on the ESP in the ubootefi.var file.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 9a76b99c1b)
2023-06-13 14:12:28 +02:00
Mathew McBride
ddb8845bd6 scripts: gen_image_generic: allow the partition types to be set
The use case for this is to set the kernel partition as the
EFI system partition. Versions of U-Boot with the
EFI boot manager (eficonfig and efidebug commands) will
store their boot order data on the ESP.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 701d774f54)
2023-06-13 14:12:27 +02:00
Mathew McBride
f48985861a grub2: enable EFI for armvirt
This adds a separate package for EFI on Arm SystemReady
compatible machines. 32-bit Arm UEFI is supported as well.

It is very similar to x86-64 EFI setup, without the
need for BIOS backward compatibility and slightly
different default modules.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 8f29b1573d)
2023-06-13 14:12:26 +02:00
Mathew McBride
649d3a75e2 armvirt: update README with new image names
The introduction of EFI support has changed how armvirt
images are generated. The kernel and filesystem binaries
can still be used as before with QEMU directly.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 97c5d317f5)
2023-06-13 14:12:25 +02:00
Mathew McBride
3f72d24a04 armvirt: disable LD dead code elimination on ARM32
This interferes with the generation of the EFI stub section for
ARM32. As this target is not size constrained, disable the dead code
data elimination hack.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05 version of eb0e61285d)
2023-06-13 14:12:24 +02:00
Mathew McBride
7c223a881f armvirt: add EFI support
EFI booting is used on newer machines compatible with the
Arm SystemReady specifications.

This commit restructures armvirt into a more 'generic'
target similar to x86.

See https://github.com/openwrt/openwrt/pull/4956
for a history of this port.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05 version of e0f06ddc23)
2023-06-13 14:12:23 +02:00
Petr Štetiar
1e7fa539ae ipq807x: image: fix eMMC flashing/recovery from within initramfs
Having initramfs image built with same config as on buildbots:

 CONFIG_TARGET_MULTI_PROFILE=y
 CONFIG_TARGET_ALL_PROFILES=y
 CONFIG_TARGET_PER_DEVICE_ROOTFS=y

Its currently impossible to flash/recover the device using that image as
losetup is missing:

 root@OpenWrt:/# sysupgrade -v /tmp/openwrt-ipq807x-generic-prpl_haze-squashfs-sysupgrade.bin
 ...
 /lib/upgrade/do_stage2: line 38: losetup: not found
 Failed to detach all loop devices. Skip this try.

So lets fix it by including the needed utils for sysupgrade in
DEFAULT_PACKAGES set.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit 07fe8bc62a)
2023-06-12 22:10:30 +02:00
Petr Štetiar
41af35cf6b ipq807x: add initial support for prpl Foundation Haze board
Haze is prpl Foundation's reference board (WNC LVRP).

Board info:

 - IPQ8072A SoC
 - 2 GiB RAM
 - 4 GiB eMMC
 - 8MiB SPI NOR (MX25U6435F)

 - 3x 1GigE ports (QCA8075)
 - 1x 10GigE port (AQR113C)
 - 1x SFP cage

 - WiFi 6GHz 160MHz (QCN9074)
 - WiFi 5GHz 80+80MHz (QCN5054)
 - WiFi 2.4G (QCN5024)

 - ARM Standard 20-pin 2.54mm/0.1" JTAG (1V8 !!!)
 - Bluetooth v5.0 + EDR with integrated Class 1 PA (CYW20704)
 - 1x M.2 B-key socket with PCIe 3.0
 - 1x USB 3.0 port
 - UART marked J6 is 4-pin 2.54mm/0.1" connector 3V3(arrow),RX,TX,GND (115200 8N1)
 - Reset and WPS buttons

Flashing instructions:

 1. From U-Boot boot OpenWrt using initramfs image:

    IPQ807x# tftpboot openwrt-ipq807x-generic-prpl_haze-initramfs-uImage.itb && bootm

 2. In OpenWrt running from initramfs execute sysupgrade:

    root@OpenWrt:/# sysupgrade -n /tmp/openwrt-ipq807x-generic-prpl_haze-squashfs-sysupgrade.bin

Work in progress/known issues:

 * SFP feature not implemented/tested
 * M.2 feature not implemented/tested
 * Bluetooth feature not implemented/tested
 * 6GHz wireless should be working, but not tested
 * MAC address assigments for LAN interfaces

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit 2e910039dd)
2023-06-12 22:10:29 +02:00
Petr Štetiar
7e6403a966 ipq-wifi: update to version 2023-06-03
Contains following updates:

 * ipq8074: update RegDB in new submitted BDF
 * Revert "ipq8074: update RegDB in new submitted BDF"
 * qcn9074: update RegDB in new submitted BDF
 * ipq8074: update RegDB in new submitted BDF
 * qca-wireless: ipq40xx: add BDFs for ZTE MF287+
 * Add BDFs for prpl Foundation Haze board

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit c2bb9f055b)
2023-06-12 22:10:28 +02:00
Antti Nykänen
793b9cddd2 ipq-wifi: bump to latest git HEAD
0f73d32 ipq8074: update RegDB in new submitted BDF
a4cd21f ipq8074: add Compex WPQ873 BDF
c888dd0 qca-wireless: ipq40xx: Add BDFs for Eero Cento
6388ba9 ipq8074: update regdb for Netgear SXK80 BDF
77775d2 ipq8074: add Netgear SXK80

Signed-off-by: Antti Nykänen <antti.nykanen@nokia.com>
(cherry picked from commit 86e7614e0d)
2023-06-12 22:10:27 +02:00
Petr Štetiar
f8d26ece25 ipq807x: image: cleanup unused variables
BLOCKSIZE and PAGESIZE seems to be unused on qnap_301w and zyxel_nbg7815
device which use eMMC storage.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit fdea7cb617)
2023-06-12 22:10:26 +02:00
Michael Pratt
0928545f3b tools/coreutils: rename list of installed programs
Rename the list of programs installed by coreutils
to PKG_PROGRAMS, which will create a stampfile for each
through a new feature in host-build.mk.

Also, cleanup a bit to save lines
regarding the usage of this list.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 14a85d929b)
2023-06-12 22:10:25 +02:00
Michael Pratt
f307129561 tools/findutils: define list of installed programs
Define the variable PKG_PROGRAMS for the list
of programs installed by findutils,
which will create a stampfile for each
through a new feature in host-build.mk.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 04053e3f20)
2023-06-12 22:10:24 +02:00
Michael Pratt
ea22a1f4da host-build: add support for a stampfile per installed binary
Some individual build items install a group of programs
instead of a program matching the name of the build item.

Add support for installing stampfiles for each of the
programs installed by that build item,
which will allow more control and awareness
of what is installed by the rest of the build system,
if, for example, prereq symlink checks are looking
for the same program which is built already.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 84f7a45e9e)
2023-06-12 22:10:24 +02:00
Michael Pratt
e972e4f2a9 prereq-build: replace relative symlinks only if broken
Some programs installed to staging_dir/host/bin
also install some symlinks to itself
for an alternative name.

Some of those new symlinks are overwriting
symlinks that were installed by prereq stage.

If prereq stage were to somehow be run again,
it should not be overwriting symlinks
that point to programs that are already built.

To filter that out, catch all symlinks
after first catching all symlinks
that have an absolute target
after all other cases in the case statement,
make sure it is not broken, and if so exit successfully.

Suggested-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit b890e2fbf9)
2023-06-12 22:10:23 +02:00
Michael Pratt
43b92ff6ce prereq-build: do not replace binaries with symlinks
Some programs, like bash and patch, are checked by prereq stage
and have a symlink installed, but then is later built from source.

Now that the prereq-build checks are not successful
just by finding the file alone, it is possible for
a new symlink to overwrite the installed binary.

If a normal file is found in staging_dir/host/bin,
let the check look for the associated stampfile, and if found,
skip creation of a symlink and exit successfully.

Suggested-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 729909c07f)
2023-06-12 22:10:22 +02:00
Michael Pratt
c7bd7a9c51 prereq-build: fix inconsistent value of $PATH
In the recipe SetupHostCommand for checking
and creating symlinks, $PATH was only overridden
for one of several commands.

This causes the symlinks to be included
in the paths to pick a program from
when the check was repeated, because
staging_dir/host/bin was included in $PATH,
but only *sometimes*.

When the check ran again, the command succeded
with a $PATH including the symlink,
(eval "$$$$$$$$cmd")
while the path to the program was evaluated
with a $PATH NOT including the symlink,
(bin=...)
causing the symlink to be relinked incorrectly,
instead of passing as exactly the same.

Coincidentally, this was only a problem
if the symlink targeted the alternative
program with a different name.

By overriding the value of $PATH at the invocation of Make,
it will apply to the entire environment of the checks.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 665fe2f818)
2023-06-12 22:10:21 +02:00
Michael Pratt
948dc515dc treewide: add ORIG_PATH variable
Add a variable that stores the original value of $PATH
in the host system's shell, before Make alters it.

This can be useful for when it is necessary
to ignore symlinks and programs made by the build system.

Define this new variable before all instances of
'export PATH:=' or similar.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit d87a8aa148)
2023-06-12 22:10:20 +02:00
Petr Štetiar
145d485d51 ipq807x: image: factor out common eMMC bits
For better maintainability and reusability.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit a9be186466)
2023-06-12 22:10:19 +02:00
Petr Štetiar
03455e79d7 qca-nss-dp: fix oops in nss_dp_probe
Currently kernel crashes when of_phy_connect has issues:

 Unable to handle kernel access to user memory outside uaccess routines at virtual address 0000000000000308
 ...
 pc : phy_attached_print+0x28/0x1b0
 lr : phy_attached_info+0x14/0x20
 ...
 Call trace:
  phy_attached_print+0x28/0x1b0
  phy_attached_info+0x14/0x20
  nss_dp_adjust_link+0x544/0x6c4 [qca_nss_dp]

of_phy_connect returns either pointer or NULL, so can't be checked with
IS_ERR macro.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit 38c7cf0e69)
2023-06-12 22:10:18 +02:00
Felix Fietkau
c6531042da libubox: update to the latest version
b09b316aeaf6 blobmsg: add blobmsg_parse_attr function
eac92a4d5d82 blobmsg: add blobmsg_parse_array_attr
ef5e8e38bd38 usock: fix poll return code check
6fc29d1c4292 jshn.sh: Add pretty-printing to json_dump
5893cf78da40 blobmsg: Don't do at run-time what can be done at compile-time
362951a2d96e uloop: fix uloop_run_timeout
75a3b870cace uloop: add support for integrating with a different event loop

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit b6e0a24c49)
2023-06-12 22:10:18 +02:00
Felix Fietkau
bc6bf2a0d0 unetd: update to the latest version
412d03012f13 network: prevent adding endpoint routes for addresses on the network
faaf9cee6ef4 utils: fix ipv4 checksum issue
0e1c2fad3540 pex-msg: fix memory leak on fread fail in pex_msg_update_request_init
51be0ed659d0 host: fix crash parsing gateway when no endpoint is specified
ca17601dc24e wg-linux: add support for splitting netlink messages for allowed ips
7d3986b7a5a2 wg-linux: increase default messages size

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 7b1e898336)
2023-06-12 22:10:17 +02:00
Robert Marko
7baa1573eb mac80211: ath11k: sync with ath-next
Synchronize the ath11k backports with the current ath-next tree.

This introduces support for MBSSID and EMA, adds factory test mode and
some new HTT stats.

Tested-by: Francisco G Luna <frangonlun@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit acde5271a6)
2023-06-12 22:10:16 +02:00
Robert Marko
802e99a7fe mac80211: backport EMA beacon support
Backport EMA beacon support from kernel 6.4.
It is required for MBSSID/EMA suport in ath11k that will follow.

Tested-by: Francisco G Luna <frangonlun@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 84b5735b4c)
2023-06-12 22:10:15 +02:00
Olliver Schinagl
e7aae81d03 realtek: eth: Do not write directly to dev->addr
One is never to write to dev->addr directly. In 6.1 it will be a const and
with the newly enabled WERROR, we get a failing grade.

Lets fix this ahead of time.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
(cherry picked from commit d881f65da1)
2023-06-12 22:10:14 +02:00
Olliver Schinagl
61c1b9a0f6 realtek: Add missing headers
We are missing a bunch of headers, which trigger errors on 6.1, probably
due to changed header-in-header dependencies. Best add them now.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
(cherry picked from commit 9fb1dbb1df)
2023-06-12 22:10:13 +02:00
Robert Marko
fc87a8f2ec generic: b53: rename exported symbols to avoid upstream conflict
Upstream DSA driver is exporting symbols with the same name as our
downstream swconfig driver, so lets rename the downstream symbols to make
them unique and avoid the conflict on 6.1 kernel.

Without this change, building 6.1 with kmod-switch-bcm53xx would conflict
with the B53 DSA driver and CI would fail.

Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit effccdd444)
2023-06-12 22:10:12 +02:00
Mathew McBride
b1114c1a7a kernel: add mdio-bus-mux support
The MDIO bus multiplexing framework is used by some drivers
such as dwmac-sun8i.

As this is a per-driver requirement, set it to be hidden in the menu.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
(cherry picked from commit 2dbeb60725)
2023-06-12 22:10:11 +02:00
Christian Marangi
ee7a223433 kernel: fix wrong detection of Linux-Testing-Version in makefile DUMP
When the split was done, the case for testing kernel version wasn't
handled and only the to-be-compiled kernel version details files was
included. This cause the kernel Linux-Testing-Version output from
makefile target DUMP to report only the kernel version without the minor
version (example 6.1 instead of 6.1.29).

This value is expected with the full kernel version and this cause the
dump-target-info.pl script to not correctly identify if a target have a
testing kernel for the kernels calls.

Fix this regression by correctly including the kernel details files if
the target declare support for a testing kernel version.

Fixes: 0765466a42 ("kernel: split kernel version to dedicated files")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 595608eb3f)
2023-06-12 22:10:11 +02:00
Álvaro Fernández Rojas
8f1251a951 bmips: add support for Comtrend AR-5381u
The Comtrend AR-5381u is a wifi fast ethernet router, 2.4 GHz single band with
two internal antennas.

Hardware:
 - SoC: Broadcom BCM6328
 - CPU: single core BMIPS4350 @ 320Mhz
 - RAM: 64 MB DDR
 - Flash: 16 MB SPI NOR
 - Ethernet LAN: 4x 100Mbit
 - Wifi 2.4 GHz: miniPCI Broadcom BCM43225 802.11bgn
 - USB: 1x 2.0
 - Buttons: 1x (reset)
 - LEDs: yes
 - UART: yes

Installation via CFE web UI:
  1. Power off the router.
  2. Press reset button near the power switch.
  3. Keep it pressed while powering up during ~20+ seconds.
  4. Browse to http://192.168.1.1 and upload the firmware.
  5. Wait a few minutes for it to finish.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit bcdf861519)
2023-06-12 18:54:42 +02:00
Christian Marangi
f3ec4a2790 restool: update source.codeaurora.org repository link
source.codeaurora.org project has been shut down and the nxp
repositories has been moved to github. Update the repository
link to the new location.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 0a1ee53235)
2023-06-11 18:57:01 +02:00
Christian Marangi
774ca0c0e9 ls-dpl: update source.codeaurora.org repository link
source.codeaurora.org project has been shut down and the nxp
repositories has been moved to github. Update the repository
link to the new location.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 52fd8d8ba3)
2023-06-11 18:56:52 +02:00
Christian Marangi
16d06a15d8 layerscape: 5.15: update source.codeaurora.org ppfe driver reference
source.codeaurora.org project has been shut down and the nxp
repositories has been moved to github. Update the link reference to the
new location.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 52d86ac6eb)
2023-06-11 18:56:42 +02:00
Álvaro Fernández Rojas
cfdcf4b4d9 bmips: add support for Comtrend WAP-5813n
The Comtrend WAP-5813n is a wifi gigabit router, 2.4 GHz single band with
two external antennas.

Hardware:
 - SoC: Broadcom BCM6369
 - CPU: dual core BMIPS4350 @ 400Mhz
 - RAM: 64 MB DDR
 - Flash: 8 MB parallel NOR
 - LAN switch: Broadcom BCM53115, 5x 1Gbit
 - Wifi 2.4 GHz: miniPCI Broadcom BCM4322 802.11bgn
 - USB: 1x 2.0 (optional)
 - Buttons: 3x (reset)
 - LEDs: yes
 - UART: yes

Installation via CFE web UI:
  1. Power off the router.
  2. Press reset button near the power switch.
  3. Keep it pressed while powering up during ~20+ seconds.
  4. Browse to http://192.168.1.1 and upload the firmware.
  5. Wait a few minutes for it to finish.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit c3b1ef2dfd)
2023-06-11 18:33:33 +02:00
Volodymyr Puiul
8b20b8fe2a ramips: mt7621-dts: move wan port to gmac1 YunCore FAP-640
move wan port to gmac1 to achieve 2Gbps CPU bandwidth between wan and
lan on YunCore FAP-640

Signed-off-by: Volodymyr Puiul <volodymyr.puiul@gmail.com>
(cherry picked from commit 47c2d50c03)
2023-06-11 18:19:23 +02:00
Álvaro Fernández Rojas
0880d5d194 bmips: add support for Comtrend VR-3025un
The Comtrend VR-3025un is a wifi gigabit router, 2.4 GHz single band with
two external antennas.

Hardware:
 - SoC: Broadcom BCM6368
 - CPU: dual core BMIPS4350 @ 400Mhz
 - RAM: 64 MB DDR
 - Flash: 8 MB parallel NOR
 - Ethernet LAN: 4x 100Mbit
 - Wifi 2.4 GHz: miniPCI Broadcom BCM43222 802.11bgn
 - USB: 1x 2.0
 - Buttons: 1x (reset)
 - LEDs: yes
 - UART: yes

Installation via CFE web UI:
  1. Power off the router.
  2. Press reset button near the antenna.
  3. Keep it pressed while powering up during ~20+ seconds.
  4. Browse to http://192.168.1.1 and upload the firmware.
  5. Wait a few minutes for it to finish.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 3baa45fbd8)
2023-06-11 12:11:39 +02:00
Álvaro Fernández Rojas
bb1f3ebd56 bmips: dgnd3700v1/dgnd3800b: add missing kmod-leds-gpio
Commit ed79519b8d missed adding kmod-leds-gpio to these devices.

Fixes: ed79519b8d ("bmips: add support for Netgear DGND3700 v1, DGND3800B")
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2023-06-11 10:40:57 +02:00
Álvaro Fernández Rojas
b6c9312f4b bmips: image: rename Device/bcm63xx_netgear
Every other Device definition in the target is using hyphens instead of
underscores.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2023-06-11 10:40:57 +02:00
Álvaro Fernández Rojas
0ea4866d65 bmips: dts: improve and align device tree files
Align all the device tree files and follow the same criteria before more
devices are ported from bcm63xx and this goes out of control.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2023-06-11 10:40:57 +02:00
Daniel González Cabanelas
13579e6441 bmips: add support for Netgear EVG2000
The Netgear EVG2000 is a wifi gigabit router, 2.4 GHz single band with
two internal antennas integrated in the main PCB.

Hardware:
 - SoC: Broadcom BCM6369
 - CPU: dual core BMIPS4350 V3.1 @400Mhz
 - RAM: 64 MB DDR
 - Flash: 16 MB parallel NOR
 - LAN switch: Broadcom BCM53115, 5x 1Gbit
 - Wifi 2.4 GHz: Broadcom BCM4322 802.11bgn
 - USB: 2x 2.0
 - Buttons: 2x, 1 reset
 - LEDs: 10x
 - FXS: 2x
 - UART: yes

Installation via CFE web UI:
  1. Power off the router and make a temporal TX-RX shortcircuit on the
     serial pins.
  2. Power on the router and wait 3 or more seconds
  3. Remove the TX-RX shortcircuit
  4. Browse to http://192.168.1.1 or http://192.168.0.1 and upload the
     firmware
  5. Wait a few minutes for it to finish

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
2023-06-11 09:58:17 +02:00
Thomas Schröder
df34f71be4 ramips: fix button definitions for Zyxel WSM20
Setting the events of the WPS and LED buttons to
the best matching values based from the documentation:
<https://openwrt.org/docs/guide-user/hardware/hardware.button#procd_buttons>

Signed-off-by: Thomas Schröder <tschroeder_github@outlook.com>
(cherry picked from commit b0120f7c8b)
2023-06-10 19:06:15 +02:00
Arınç ÜNAL
bc7362fbce ramips: fix first boot network configuration for TOZED ZLT S12 PRO
The network configuration at first boot for TOZED ZLT S12 PRO lacks setting
up the LAN and WAN network interfaces. Address this. The WAN port is
advertised as WAN/LAN on the device and is put on LAN on stock firmware so
put it on LAN here as well.

Fixes: ce1f9fa625 ("ramips: add support for TOZED ZLT S12 PRO")
Reported-by: Andre Cruz <me@1conan.com>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
(cherry picked from commit b61253f92a)
2023-06-10 19:06:15 +02:00
Aleksander Jan Bajkowski
7d48684612 kernel: use struct group to wipe psb6970 volatile priv data
Instead of reference vlan and do strange subtraction, use the handy
struct_group() to create a virtual struct of the same size of the
members. This permits to have a more secure memset and fix compilation
warning in 6.1 where additional checks are done.

Fix compilation warning:
| inlined from 'psb6970_reset_switch' at drivers/net/phy/psb6970.c:275:2:
| ./include/linux/fortify-string.h:314:25: error: call to '__write_overflow_field'
| declared with attribute warning: detected write beyond size of field
| (1st parameter); maybe use struct_group()? [-Werror=attribute-warning]
|  314 |                         __write_overflow_field(p_size_field, size);
|      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|cc1: all warnings being treated as errors

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
(cherry picked from commit d69becd307)
2023-06-10 19:06:15 +02:00
Christian Lamparter
04ddeb85e7 apm821xx: switch over from DTB_SIZE to DEVICE_DTC_FLAGS
DEVICE_DTC_FLAGS is more flexible and can be used in
place of APM821xx own DTB_SIZE.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit a5fc132aa3)
2023-06-10 19:06:15 +02:00
Daniel González Cabanelas
f25afae0b5 bmips: add support for Netgear DGND3700 v1, DGND3800B
The Netgear DGND3700 v1 and DGND3800B are the same device but with
different factory firmwares. It's an xDSL wifi router with a slim black
shiny casing and 4 PCB internal antennas connected via UFL to a miniPCI
detachable card.

Hardware:
 - SoC: Broadcom BCM6368
 - CPU: dual core BMIPS4350 V3.1 @400Mhz
 - RAM: 128 MB DDR
 - NOR Flash: 32 MB parallel (CFE and OS)
 - NAND flash: 128 MB (empty)
 - Ethernet LAN: 5x 1Gbit
 - Wifi 2.4 GHz: Broadcom BCM43222 802.11bgn
 - Wifi 5 GHz: Broadcom BCM43222 802.11abgn
 - USB: 2x 2.0
 - Buttons: 3x, 1 reset
 - LEDs: 11x
 - UART: yes

Installation via OEM web UI:
  1. Open the Netgear administration web interface, by default:
        http://192.168.0.1
	user: admin
        password: password
  2. Look for "upgrade firmware" and proceed
  3. Wait some minutes until it finishes

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
2023-06-10 15:42:35 +02:00
Daniel González Cabanelas
725319ad38 bmips: add support for Observa VH4032N
The Observa VH4032N is an xDSL wifi router with a vertical white casing
and two internal antennas connected via UFL.

Hardware:
 - SoC: Broadcom BCM6368
 - CPU: dual core BMIPS4350 V3.1 @400MHz
 - RAM: 128 MB DDR
 - Flash: 32 MB parallel NOR
 - Ethernet LAN: 4x 100Mbit
 - Wifi 2.4/5 GHz: onboard Broadcom BCM43222 802.11abgn
 - USB: 3x 2.0
 - Buttons: 2x, 1 reset
 - LEDs: 8x, blue and red
 - UART: 1x

Installation via OEM web UI:
  1. Use the admin credentials to login via web UI
  2. Go to Managament->Update firmware and select the OpenWrt CFE firmware
  3. Press "Update Firmware" button and wait some minutes until it finish

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
2023-06-10 15:42:19 +02:00
Álvaro Fernández Rojas
8a77ffc971 bmips: bump LZMA Loader address
This allows booting bigger ramdisk images via TFTP at the cost of breaking 32M
RAM compatibility, but those devices have been unable to boot ramdisks on this
target for some time anyway due to not having enough RAM.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2023-06-10 15:42:03 +02:00
Daniel Golle
e827f8f702 mediatek: use DEVICE_DTC_FLAGS and drop DTC_FLAGS where not needed
The MT7986 RFB was intended to use device tree overlays and for that
reason modified DTC_FLAGS. zyxel_ex5601-t0-stock later on probably
copied it from there. Both boards do not actually use device tree
overlays, so remove setting DTC_FLAGS from both.

The BPi-R3 does use device tree overlays, use DEVICE_DTC_FLAGS to give
it an extra 4kb of padding for overlays to be applied.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 98e6ea32a4)
2023-06-09 19:23:03 +01:00
Daniel Golle
703a5519cb mediatek: use DEVICE_DTC_FLAGS for BPi-R64
Make sure there is an extra 4kb of padding to apply device tree overlays
on the BPi-R64.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 7b536c4ec9)
2023-06-09 19:23:03 +01:00
Daniel Golle
4bb75f6f40 image: introduce DEVICE_DTC_FLAGS and DEVICE_DTCO_FLAGS
Handle compiling device tree overlay blobs separate to allow for
overlays being compiled with different parameters, mostly to safe
space.
Allow defining DEVICE_DTC_FLAGS and DEVICE_DTCO_FLAGS as per-device
parameters to be passed to dtc. Previously some boards directly used
DTC_FLAGS in their build recipe which then also affected other boards.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 56f409c4e4)
2023-06-09 19:23:03 +01:00
Daniel Golle
49bd38f01a mediatek: set new compat version if booted on R64 and R3
If the board comes up with OpenWrt that means that the bootloader is
recent enough and knows about the new device tree overlays.

Using /etc/board.d/ is not enough in this case because it doesn't
overwrite existing configuration which may exist (and is fine to exist)
if the user updated with 'sysupgrade -F *.itb' and has kept
configuration. They would still need to manually set compat_version
even though the fact that the bootloader env has been updated can be
implied by the fact that the system has started.

Hence we can always set compat_version=1.1 for those two boards using
uci-defaults.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 25e27c4af3)
2023-06-09 19:23:03 +01:00
Daniel Golle
a65ec9fea7 mediatek: sync MT7986 device trees with upstream
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 7a0ec001ff)
2023-06-09 19:23:03 +01:00
Daniel Golle
bca04036ff mediatek: use updated device tree overlay mechanism for BPi-R64
Use new device tree overlay mechanism for the BananaPi BPi-R64 board.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 34bb33094a)
2023-06-09 19:23:03 +01:00
Daniel Golle
5f3c5848e3 uboot-mediatek: adapt BPi-R3 and BPi-R64 to new device tree overlay
Update bootloader environment for BPi-R3 and BPi-R64 to adapt to new
device tree overlay mechanism now that support for multiple device
tree overlays has been added.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit ec50d2d366)
2023-06-09 19:23:03 +01:00
Daniel Golle
dc778190bc generic: use only first element in bootconf for uImage.FIT
Now that it is possible to load several device tree overlays by
appending their config names to bootconf the uImage.FIT partition
parser need to discard everything after the first '#' character in
bootconf when looking up the config node to be used.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 07bca1adaa)
2023-06-09 19:23:03 +01:00
Daniel Golle
d05d886d22 image: improve uImage.FIT device tree overlay support
Instead of generating full config nodes incl. kernel, generate minimal
config nodes for device tree overlays to be applied to the main config.
In this way, multiple device tree overlays can be applied more easily.
While at it change filenames to upstream style, ie. use dtso and dtbo
suffix for device tree overlays.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 6b01d40bfe)
2023-06-09 19:23:03 +01:00
Daniel Golle
d46e13d864 mediatek: convert mt7986a-zyxel-ex5601-t0-stock.dts to UNIX
The device tree file was in DOS format (CR-LF). Convert it to UNIX style.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit d28534545e)
2023-06-09 19:23:03 +01:00
Daniel Golle
4494791fc7 mediatek: use existing I2C clock names
PCK and MCK should really be P=PMIC and M=MEM, which means that they
should effectively be CLK_PMIC and CLK_ARB.

Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 0580747ada)
2023-06-09 19:23:03 +01:00
Daniel Golle
c4c14e9ce8 mediatek: use cpufreq fix suggested by MediaTek
Use suggested fix for mediatek-cpufreq, patch will also be sent
upstream.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 7e93f520d6)
2023-06-09 19:23:03 +01:00
Ivan Pavlov
e1d59497e9 openssl: update to 3.0.9
CVE-2023-2650 fix
Remove upstreamed patches

Major changes between OpenSSL 3.0.8 and OpenSSL 3.0.9 [30 May 2023]
 * Mitigate for very slow OBJ_obj2txt() performance with gigantic OBJECT IDENTIFIER sub-identities. (CVE-2023-2650)
 * Fixed buffer overread in AES-XTS decryption on ARM 64 bit platforms (CVE-2023-1255)
 * Fixed documentation of X509_VERIFY_PARAM_add0_policy() (CVE-2023-0466)
 * Fixed handling of invalid certificate policies in leaf certificates (CVE-2023-0465)
 * Limited the number of nodes created in a policy tree (CVE-2023-0464)

Signed-off-by: Ivan Pavlov <AuthorReflex@gmail.com>
(cherry picked from commit 6348850f10)
2023-06-09 13:36:21 +02:00
Hauke Mehrtens
c78ba8a695 valgrind: update to 3.21.0
Release Notes:
https://valgrind.org/docs/manual/dist.news.html

This improves support for the memory allocator used in musl libc 1.2.2
and later which is currently used by OpenWrt.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit d85013460d)
2023-06-09 13:25:34 +02:00
Tony Ambardar
436e477430 kselftests-bpf: add kernel BPF tests
Build and package kernel self-tests used for BPF testing, program and JIT
development. This package, together with the existing 'kmod-bpf-test', was
extensively used for past upstream Linux JIT submissions [1].

Currently this includes only 'test_verifier'; building 'test_progs' will
fail due to known endian limitations with bpftool skeletons.

[1]:https://lore.kernel.org/bpf/cover.1633392335.git.Tony.Ambardar@gmail.com

Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
(cherry picked from commit 3886ea9b87)
2023-06-09 13:20:44 +02:00
Tony Ambardar
11677aa44c kernel: backport libcap workaround for BPF selftests
Recent libcap versions (>= 2.60) cause problems with BPF kselftests, so
backport an upstream patch that replaces libcap and drops the dependency.

Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
(cherry picked from commit 04981c716a)
2023-06-09 13:20:44 +02:00
Tony Ambardar
081dfcfb0f base-files: enable BPF JIT kallsyms by default
Set net.core.bpf_jit_kallsyms=1 in /etc/sysctl.d/10-default.conf.

For privileged users, this exports addresses of JIT-compiled programs to
appear in /proc/kallsyms when present, allowing their use for debugging
and in traces.

Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
(cherry picked from commit b3aaede2a7)
2023-06-09 13:20:05 +02:00
Tianling Shen
3f3586a06d rockchip: add Orange Pi R1 Plus LTS support
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.

Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 32d5921b8b)
[Removed patches for kernel 6.1]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-06-09 13:15:19 +02:00
Tianling Shen
3b8564f9aa uboot-rockchip: add Orange Pi R1 Plus LTS support
Add support for the Xunlong Orange Pi R1 Plus LTS.
Manually generated of-platdata files to avoid swig dependency.

Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 37fed89166)
2023-06-09 13:15:19 +02:00
Tianling Shen
c11115b5cf rockchip: add Orange Pi R1 Plus support
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.

This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.

Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit ab641efe69)
[Removed patches for kernel 6.1]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-06-09 13:15:19 +02:00
Tianling Shen
ecfcc47f0c uboot-rockchip: add Orange Pi R1 Plus support
Add support for the Xunlong Orange Pi R1 Plus.
Manually generated of-platdata files to avoid swig dependency.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit 043f8a4f5e)
2023-06-09 13:15:19 +02:00
Christian Marangi
417b76b1f1 generic: drop useless binfmt patch fixing compilation warning
The compilation warning was triggered by wrongly set FRAME_WARN to 1024
even for 64bit. This was recently fix by correctly setting the
FRAME_WARN to 2048 for 64bit systems.

The compilation warning would still be triggered on 32bit system but the
actual code is never reached as ARCH_USE_GNU_PROPERTY is only set on
arm64 arch.

Drop the patch as kmalloc cause perf regression as suggested by upstream
maintainers.

Fixes: fa79baf4a6 ("generic: copy backport, hack, pending patch and config from 5.15 to 6.1")
Fixes: 5913ea1ba2 ("generic: 5.15: add pending patch fixing binfmt compilation warning")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
(cherry picked from commit 62338f4162)
2023-06-08 03:34:39 +02:00
Jitao Lu
2804fff57f oxnas: Enable CONFIG_CRYPTO_LZ4
Previously, CONFIG_LZ4_DECOMPRESS=y was selected by CONFIG_RD_LZ4 only.

When building kernel for initramfs, CONFIG_RD_LZ4 will be unset by
Kernel/SetInitramfs if the chosen compression method is not lz4, then
CONFIG_LZ4_DECOMPRESS will become a *module* in the newly generated
kernel config.

However, the newly added module won't be built after
38c150612c, so packaging kmod-lib-lz4
fails due to missing lz4_decompress.ko.

CONFIG_CRYPTO_LZ4=y makes CONFIG_LZ4_DECOMPRESS=y being selected w/o
CONFIG_RD_LZ4, so that the modules of the default kernel and initramfs
kernel are consistent.

Fixes: #12766
Fixes: 38c150612c ("build: revert 54070a1 (all kernels are >= 5.10)")
Signed-off-by: Jitao Lu <dianlujitao@gmail.com>
(cherry picked from commit cc87f6629b)
2023-06-08 17:28:11 +02:00
Mikhail Zhilkin
91221d9e74 ramips: enable LED button for TP-Link EC330-G5u v1
The device already has LED push button (KEY_LIGHTS_TOGGLE)
and exported GPIO control "led-light". This commit adds
button handler script for switching on/off all device LEDs.

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit d955b41275)
2023-06-08 17:28:03 +02:00
Tianling Shen
a48d0bdb77 openssl: fix uci config for built-in engines
Built-in engine configs are added in libopenssl-conf/install stage
already, postinst/add_engine_config is just duplicating them, and
due to the lack of `config` header it results a broken uci config:

> uci: Parse error (invalid command) at line 3, byte 0

```
config engine 'devcrypto'
        option enabled '1'
engine 'devcrypto'
        option enabled '1'
        option builtin '1'
```

Add `builtin` option in libopenssl-conf/install stage and remove
duplicate engine configuration in postinst/add_engine_config to
fix this issue.

Fixes: 0b70d55a64 ("openssl: make UCI config aware of built-in engines")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit a0d7193425)
2023-06-08 15:33:14 +02:00
Kevin Darbyshire-Bryant
b99b89da52 netfilter: fix typo in kmod-nft-dup-inet
Fix typo of 'family' in a7e9445975

Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
(cherry picked from commit 191742eb8d)
2023-06-08 15:33:14 +02:00
Philip Prindeville
ef1effdefc x86/64: Enable IOMMU_V2 support for later CPUs
Support newer IOMMU_V2 on AMD platforms, useful for DPDK and KVM.

Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
(cherry picked from commit 1eb02ce325)
2023-06-08 15:33:14 +02:00
Marek Behún
76cabb95da kernel: Backport mvneta crash fix to 5.15
Backport Russell King's series [1]
  net: mvneta: reduce size of TSO header allocation
to pending-5.15 to fix random crashes on Turris Omnia.

This also backports two patches that are dependencies to this series:
  net: mvneta: Delete unused variable
  net: mvneta: fix potential double-frees in mvneta_txq_sw_deinit()

[1] https://lore.kernel.org/netdev/ZCsbJ4nG+So%2Fn9qY@shell.armlinux.org.uk/

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> (squashed)
(cherry picked from commit 7b31c2e9ed)
2023-06-08 15:33:14 +02:00
Christian Lamparter
47437563aa apm821xx: mx60: drop nand-is-boot-medium
it was reported that this flag caused the mx60
not to boot anymore.

Fixes: f095822699 ("apm821xx: convert legacy nand partition layou")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2023-06-08 15:33:14 +02:00
Yanase Yuki
0c15f45fa7 ipq40xx: convert Buffalo WTR-M2133HP to DSA
This commit convert WTR-M2133HP to DSA setup.

Signed-off-by: Yanase Yuki <dev@zpc.sakura.ne.jp>
(cherry picked from commit edb3a4162c)
2023-06-08 15:33:14 +02:00
Yanase Yuki
ea11b6ea03 ipq806x: use new package name for NEC WG2600HP3
commit 0c45ad41e1 changes ipq806x usb kmod name
from usb-phy-qcom-dwc3 to phy-qcom-ipq806x-usb, so
use new name.

Signed-off-by: Yanase Yuki <dev@zpc.sakura.ne.jp>
(cherry picked from commit 9314744350)
2023-06-08 15:33:14 +02:00
Tomasz Maciej Nowak
1e4f9db138 ubnt-ledbar: depend on mediatek and ramips subtargets
It's only used on devices in mt7621 and mt7622 subtargets, so no reason
to compile it for others.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
(cherry picked from commit e81298463e)
2023-06-08 15:33:14 +02:00
Andreas Böhler
0c885c1542 ramips: tplink,mr600v2: fix image generation for sysupgrade image
The MR600v2 does not find its rootfs if it is neither directly after the
kernel or aligned to an erase block boundary (64k).

This aligns the rootfs to 0x10000 allowing the device to boot again. Based
on investigation by forum user relghuar.

Signed-off-by: Andreas Böhler <dev@aboehler.at>
(cherry picked from commit 46b51e9e99)
2023-06-08 15:33:14 +02:00
Felix Fietkau
bb03069691 netifd: update to the latest version
ec9dba721245 system-linux: fix memory leak in system_bridge_vlan_check

Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry picked from commit 20ce21866e)
2023-06-07 09:11:31 +02:00
Hauke Mehrtens
3bdefae5f8 netifd: Fix PKG_MIRROR_HASH
Fix the PKG_MIRROR_HASH value for netifd.

Fixes: d2ecaaca34 ("netifd: update to version 2023-05-31")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 21f713d5ab)
2023-06-07 09:10:51 +02:00
Petr Štetiar
42976b1c97 netifd: update to version 2023-05-31
Contains following changes:

 * bridge: bridge_dump_info: add dumping of bridge attributes
 * bridge: make it more clear why the config was applied
 * cmake: fix build by reordering the cflags definitions
 * treewide: fix multiple compiler warnings

Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit d2ecaaca34)
2023-06-07 09:10:17 +02:00
Daniel Danzberger
b42ee4df5d ramips: fix lzma-loader for ASIARF boards
This fixes a well known "LZMA ERROR 1" error, reported previously on
numerous of similar devices.

Signed-off-by: Daniel Danzberger <daniel@dd-wrt.com>
(cherry picked from commit 29a5cb7a8b)
2023-06-07 09:07:06 +02:00
Jeffery To
38f8f56c7a sdk: Expose CCACHE_DIR option
As the CCACHE option is already exposed, it would be helpful to also
make the ccache directory easily customizable.

Signed-off-by: Jeffery To <jeffery.to@gmail.com>
(cherry picked from commit 897691fdce)
2023-06-07 09:06:55 +02:00
Jeffery To
b059aaf039 build: export GIT_CEILING_DIRECTORIES for package builds
A package may run git as part of its build process, and if the package
source code is not from a git checkout, then git may traverse up the
directory tree to find buildroot's repository directory (.git).

For instance, Poetry Core, a Python build backend, will read the
contents of .gitignore for paths to exclude when creating a Python
package. If it finds buildroot's .gitignore file, then Poetry Core will
exclude all of the package's files[1].

This exports GIT_CEILING_DIRECTORIES for both package and host builds so
that git will not traverse beyond $(BUILD_DIR)/$(BUILD_DIR_HOST).

[1]: https://github.com/python-poetry/poetry/issues/5547

Signed-off-by: Jeffery To <jeffery.to@gmail.com>
(cherry picked from commit f597f34f3a)
2023-06-07 09:04:23 +02:00
Hauke Mehrtens
5db2d6d009 OpenWrt v23.05.0-rc1: revert to branch defaults
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2023-06-07 01:06:59 +02:00
836 changed files with 47206 additions and 9087 deletions

8
.github/labeler.yml vendored
View File

@@ -5,8 +5,8 @@
- "target/linux/apm821xx/**"
"target/archs38":
- "target/linux/archs38/**"
"target/armvirt":
- "target/linux/armvirt/**"
"target/armsr":
- "target/linux/armsr/**"
"target/at91":
- "target/linux/at91/**"
- "package/boot/at91bootstrap/**"
@@ -94,6 +94,10 @@
- "target/linux/rockchip/**"
- "package/boot/arm-trusted-firmware-rockchip/**"
- "package/boot/uboot-rockchip/**"
"target/sifiveu":
- "target/linux/sifiveu/**"
- "package/boot/uboot-sifiveu/**"
- "package/boot/opensbi/**"
"target/sunxi":
- "target/linux/sunxi/**"
- "package/boot/arm-trusted-firmware-sunxi/**"

View File

@@ -15,6 +15,8 @@ $(if $(findstring $(space),$(TOPDIR)),$(error ERROR: The path to the OpenWrt dir
world:
DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep '/usr' -m 1)
export ORIG_PATH:=$(if $(ORIG_PATH),$(ORIG_PATH),$(PATH))
export PATH:=$(if $(STAGING_DIR),$(abspath $(STAGING_DIR)/../host/bin),$(TOPDIR)/staging_dir/host/bin):$(PATH)
ifneq ($(OPENWRT_BUILD),1)

View File

@@ -204,11 +204,12 @@ menu "Target Images"
config GRUB_EFI_IMAGES
bool "Build GRUB EFI images (Linux x86 or x86_64 host only)"
depends on TARGET_x86
depends on TARGET_x86 || TARGET_armsr
depends on TARGET_ROOTFS_EXT4FS || TARGET_ROOTFS_JFFS2 || TARGET_ROOTFS_SQUASHFS
select PACKAGE_grub2
select PACKAGE_grub2-efi
select PACKAGE_grub2-bios-setup
select PACKAGE_grub2 if TARGET_x86
select PACKAGE_grub2-efi if TARGET_x86
select PACKAGE_grub2-bios-setup if TARGET_x86
select PACKAGE_grub2-efi-arm if TARGET_armsr
select PACKAGE_kmod-fs-vfat
default y
@@ -266,7 +267,7 @@ menu "Target Images"
config VMDK_IMAGES
bool "Build VMware image files (VMDK)"
depends on TARGET_x86
depends on TARGET_x86 || TARGET_armsr
depends on GRUB_IMAGES || GRUB_EFI_IMAGES
select PACKAGE_kmod-e1000
@@ -278,7 +279,7 @@ menu "Target Images"
config TARGET_IMAGES_GZIP
bool "GZip images"
depends on TARGET_ROOTFS_EXT4FS || TARGET_x86 || TARGET_armvirt || TARGET_malta
depends on TARGET_ROOTFS_EXT4FS || TARGET_x86 || TARGET_armsr || TARGET_malta
default y
comment "Image Options"
@@ -291,6 +292,7 @@ menu "Target Images"
depends on USES_BOOT_PART
default 8 if TARGET_apm821xx_sata
default 64 if TARGET_bcm27xx
default 128 if TARGET_armsr
default 16
config TARGET_ROOTFS_PARTSIZE

View File

@@ -47,6 +47,7 @@ config KERNEL_MIPS_FP_SUPPORT
config KERNEL_ARM_PMU
bool
default y if TARGET_armsr_armv8
depends on (arm || aarch64)
config KERNEL_X86_VSYSCALL_EMULATION
@@ -1097,6 +1098,12 @@ config KERNEL_NET_L3_MASTER_DEV
This module provides glue between core networking code and device
drivers to support L3 master devices like VRF.
config KERNEL_XDP_SOCKETS
bool "XDP sockets support"
help
XDP sockets allows a channel between XDP programs and
userspace applications.
config KERNEL_WIRELESS_EXT
def_bool n

View File

@@ -1,4 +1,4 @@
src-git packages https://git.openwrt.org/feed/packages.git^002cea57c04dc8cc606b49d2f3d6902cfbac75d8
src-git luci https://git.openwrt.org/project/luci.git^39e312a9b2ab44d19703df7a23287445da488784
src-git routing https://git.openwrt.org/feed/routing.git^593a514ab53c4590bd0efc37ab82ae90460434bb
src-git telephony https://git.openwrt.org/feed/telephony.git^129c8e0a9d68a39ad2dd550cf79dc8fc678f4a38
src-git packages https://git.openwrt.org/feed/packages.git^f84124d247f043d3801ae3cd94095e52284e8736
src-git luci https://git.openwrt.org/project/luci.git^ef54edad4bc24c207450094b33d6b2ddd83c277c
src-git routing https://git.openwrt.org/feed/routing.git^b844d67864d6486dc8f68054970c5195ec7c45a8
src-git telephony https://git.openwrt.org/feed/telephony.git^f7fbaea4c7bfe9203b037ad616553c9e5ed12405

View File

@@ -26,6 +26,7 @@ HOST_STAMP_CONFIGURED:=$(HOST_BUILD_DIR)/.configured
HOST_STAMP_BUILT:=$(HOST_BUILD_DIR)/.built
HOST_BUILD_PREFIX?=$(if $(IS_PACKAGE_BUILD),$(STAGING_DIR_HOSTPKG),$(STAGING_DIR_HOST))
HOST_STAMP_INSTALLED:=$(HOST_BUILD_PREFIX)/stamp/.$(PKG_NAME)_installed
HOST_STAMP_PROGRAMS:=$(foreach program,$(PKG_PROGRAMS),$(subst $(PKG_NAME),$(program),$(HOST_STAMP_INSTALLED)) )
override MAKEFLAGS=
@@ -131,6 +132,7 @@ define Host/Exports/Default
$(1) : export STAGING_PREFIX=$$(HOST_BUILD_PREFIX)
$(1) : export PKG_CONFIG_PATH=$$(STAGING_DIR_HOST)/lib/pkgconfig:$$(HOST_BUILD_PREFIX)/lib/pkgconfig
$(1) : export PKG_CONFIG_LIBDIR=$$(HOST_BUILD_PREFIX)/lib/pkgconfig
$(1) : export GIT_CEILING_DIRECTORIES=$$(BUILD_DIR_HOST)
$(if $(HOST_CONFIG_SITE),$(1) : export CONFIG_SITE:=$(HOST_CONFIG_SITE))
$(if $(IS_PACKAGE_BUILD),$(1) : export PATH=$$(TARGET_PATH_PKG))
endef
@@ -171,7 +173,7 @@ ifndef DUMP
$(foreach hook,$(Hooks/HostInstall/Post),$(call $(hook))$(sep))
mkdir -p $$(shell dirname $$@)
touch $(HOST_STAMP_BUILT)
touch $$@
touch $$@ $(HOST_STAMP_PROGRAMS)
$(call DefaultTargets,$(patsubst %,host-%,$(DEFAULT_SUBDIR_TARGETS)))
ifndef STAMP_BUILT
@@ -186,7 +188,7 @@ ifndef DUMP
$(_host_target)host-prepare: $(HOST_STAMP_PREPARED)
$(_host_target)host-configure: $(HOST_STAMP_CONFIGURED)
$(_host_target)host-compile: $(HOST_STAMP_BUILT) $(HOST_STAMP_INSTALLED)
$(_host_target)host-compile: $(HOST_STAMP_BUILT) $(HOST_STAMP_INSTALLED) $(HOST_STAMP_PROGRAMS)
host-install: host-compile
host-clean-build: FORCE
@@ -195,7 +197,7 @@ ifndef DUMP
host-clean: host-clean-build
$(call Host/Clean)
rm -rf $(HOST_STAMP_INSTALLED)
rm -rf $(HOST_STAMP_INSTALLED) $(HOST_STAMP_PROGRAMS)
ifneq ($(CONFIG_AUTOREMOVE),)
host-compile:

View File

@@ -307,7 +307,7 @@ define Build/fit
$(if $(DEVICE_FDT_NUM),-n $(DEVICE_FDT_NUM)) \
$(if $(DEVICE_DTS_DELIMITER),-l $(DEVICE_DTS_DELIMITER)) \
$(if $(DEVICE_DTS_LOADADDR),-s $(DEVICE_DTS_LOADADDR)) \
$(if $(DEVICE_DTS_OVERLAY),$(foreach dtso,$(DEVICE_DTS_OVERLAY), -O $(dtso):$(KERNEL_BUILD_DIR)/image-$(dtso).dtb)) \
$(if $(DEVICE_DTS_OVERLAY),$(foreach dtso,$(DEVICE_DTS_OVERLAY), -O $(dtso):$(KERNEL_BUILD_DIR)/image-$(dtso).dtbo)) \
-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
-A $(LINUX_KARCH) -v $(LINUX_VERSION)
PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage $(if $(findstring external,$(word 3,$(1))),\
@@ -423,6 +423,8 @@ define Build/netgear-encrypted-factory
--output-file $@ \
--model $(NETGEAR_ENC_MODEL) \
--region $(NETGEAR_ENC_REGION) \
$(if $(NETGEAR_ENC_HW_ID_LIST),--hw-id-list "$(NETGEAR_ENC_HW_ID_LIST)") \
$(if $(NETGEAR_ENC_MODEL_LIST),--model-list "$(NETGEAR_ENC_MODEL_LIST)") \
--version V1.0.0.0.$(shell cat $(VERSION_DIST)| sed -e 's/[[:space:]]/-/g').$(firstword $(subst -, ,$(REVISION))) \
--encryption-block-size 0x20000 \
--openssl-bin "$(STAGING_DIR_HOST)/bin/openssl" \

View File

@@ -146,7 +146,7 @@ endif
# Disable noisy checks by default as in upstream
DTC_FLAGS += \
DTC_WARN_FLAGS := \
-Wno-unit_address_vs_reg \
-Wno-simple_bus_reg \
-Wno-unit_address_format \
@@ -159,6 +159,9 @@ DTC_FLAGS += \
-Wno-graph_port \
-Wno-unique_unit_address
DTC_FLAGS += $(DTC_WARN_FLAGS)
DTCO_FLAGS += $(DTC_WARN_FLAGS)
define Image/pad-to
dd if=$(1) of=$(1).new bs=$(2) conv=sync
mv $(1).new $(1)
@@ -174,7 +177,7 @@ endef
# $(2) target dtb file
# $(3) extra CPP flags
# $(4) extra DTC flags
define Image/BuildDTB
define Image/BuildDTB/sub
$(TARGET_CROSS)cpp -nostdinc -x assembler-with-cpp \
$(DTS_CPPFLAGS) \
-I$(DTS_DIR) \
@@ -183,12 +186,20 @@ define Image/BuildDTB
-undef -D__DTS__ $(3) \
-o $(2).tmp $(1)
$(LINUX_DIR)/scripts/dtc/dtc -O dtb \
-i$(dir $(1)) $(DTC_FLAGS) $(4) \
-i$(dir $(1)) $(4) \
$(if $(CONFIG_HAS_DT_OVERLAY_SUPPORT),-@) \
-o $(2) $(2).tmp
$(RM) $(2).tmp
endef
define Image/BuildDTB
$(call Image/BuildDTB/sub,$(1),$(2),$(3),$(DTC_FLAGS) $(DEVICE_DTC_FLAGS) $(4))
endef
define Image/BuildDTBO
$(call Image/BuildDTB/sub,$(1),$(2),$(3),$(DTCO_FLAGS) $(DEVICE_DTCO_FLAGS) $(4))
endef
define Image/mkfs/jffs2/sub-raw
$(STAGING_DIR_HOST)/bin/mkfs.jffs2 \
$(2) \
@@ -400,6 +411,8 @@ define Device/Init
DEVICE_DTS_LOADADDR :=
DEVICE_DTS_OVERLAY :=
DEVICE_FDT_NUM :=
DEVICE_DTC_FLAGS :=
DEVICE_DTCO_FLAGS :=
SOC :=
BOARD_NAME :=
@@ -422,9 +435,9 @@ endef
DEFAULT_DEVICE_VARS := \
DEVICE_NAME KERNEL KERNEL_INITRAMFS KERNEL_INITRAMFS_IMAGE KERNEL_SIZE \
CMDLINE UBOOTENV_IN_UBI KERNEL_IN_UBI BLOCKSIZE PAGESIZE SUBPAGESIZE \
VID_HDR_OFFSET UBINIZE_OPTS UBINIZE_PARTS MKUBIFS_OPTS DEVICE_DTS \
DEVICE_DTS_CONFIG DEVICE_DTS_DELIMITER DEVICE_DTS_DIR DEVICE_DTS_OVERLAY \
DEVICE_DTS_LOADADDR \
VID_HDR_OFFSET UBINIZE_OPTS UBINIZE_PARTS MKUBIFS_OPTS DEVICE_DTC_FLAGS \
DEVICE_DTCO_FLAGS DEVICE_DTS DEVICE_DTS_CONFIG DEVICE_DTS_DELIMITER \
DEVICE_DTS_DIR DEVICE_DTS_OVERLAY DEVICE_DTS_LOADADDR \
DEVICE_FDT_NUM DEVICE_IMG_PREFIX SOC BOARD_NAME UIMAGE_MAGIC UIMAGE_NAME \
UIMAGE_TIME SUPPORTED_DEVICES IMAGE_METADATA KERNEL_ENTRY KERNEL_LOADADDR \
UBOOT_PATH IMAGE_SIZE \
@@ -554,16 +567,33 @@ define Device/Build/dtb
image_prepare: $(KDIR)/image-$(1).dtb
endif
endef
define Device/Build/dtbo
ifndef BUILD_DTSO_$(1)
BUILD_DTSO_$(1) := 1
$(KDIR)/image-$(1).dtbo: FORCE
$(call Image/BuildDTBO,$(strip $(2))/$(strip $(3)).dtso,$$@)
image_prepare: $(KDIR)/image-$(1).dtbo
endif
endef
endif
define Device/Build/kernel
$$(eval $$(foreach dts,$$(DEVICE_DTS) $$(DEVICE_DTS_OVERLAY), \
$$(eval $$(foreach dts,$$(DEVICE_DTS), \
$$(call Device/Build/dtb,$$(notdir $$(dts)), \
$$(if $$(DEVICE_DTS_DIR),$$(DEVICE_DTS_DIR),$$(DTS_DIR)), \
$$(dts) \
) \
))
$$(eval $$(foreach dtso,$$(DEVICE_DTS_OVERLAY), \
$$(call Device/Build/dtbo,$$(notdir $$(dtso)), \
$$(if $$(DEVICE_DTS_DIR),$$(DEVICE_DTS_DIR),$$(DTS_DIR)), \
$$(dtso) \
) \
))
$(KDIR)/$$(KERNEL_NAME):: image_prepare
$$(_TARGET): $$(if $$(KERNEL_INSTALL),$(BIN_DIR)/$$(KERNEL_IMAGE))

View File

@@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .114
LINUX_KERNEL_HASH-5.15.114 = e981ea5d219f77735bf5a3f7e84a8af578df8ac3e1c4ff1b0649e2b0795277d2
LINUX_VERSION-5.15 = .127
LINUX_KERNEL_HASH-5.15.127 = add0a575341b263a06e93599fc220a5dd34cb4ca5b9d05097a5db2a061928f26

View File

@@ -13,6 +13,15 @@ endif
include $(KERNEL_DETAILS_FILE)
ifdef KERNEL_TESTING_PATCHVER
KERNEL_TESTING_DETAILS_FILE=$(INCLUDE_DIR)/kernel-$(KERNEL_TESTING_PATCHVER)
ifeq ($(wildcard $(KERNEL_TESTING_DETAILS_FILE)),)
$(error Missing kernel version/hash file for $(KERNEL_TESTING_PATCHVER). Please create $(KERNEL_TESTING_DETAILS_FILE))
endif
include $(KERNEL_TESTING_DETAILS_FILE)
endif
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

View File

@@ -90,6 +90,8 @@ else ifneq (,$(findstring $(ARCH) , mipsel mips64 mips64el ))
LINUX_KARCH := mips
else ifneq (,$(findstring $(ARCH) , powerpc64 ))
LINUX_KARCH := powerpc
else ifneq (,$(findstring $(ARCH) , riscv64 ))
LINUX_KARCH := riscv
else ifneq (,$(findstring $(ARCH) , sh2 sh3 sh4 ))
LINUX_KARCH := sh
else ifneq (,$(findstring $(ARCH) , i386 x86_64 ))
@@ -234,7 +236,7 @@ $(call KernelPackage/$(1)/config)
$(call KernelPackage/depends)
$(call KernelPackage/hooks)
ifneq ($(if $(filter-out %=y %=n %=m,$(KCONFIG)),$(filter m y,$(foreach c,$(filter-out %=y %=n %=m,$(KCONFIG)),$($(c)))),.),)
ifneq ($(if $(filter-out %=y %=n %=m,$(KCONFIG)),$(filter m y,$(foreach c,$(call version_filter,$(filter-out %=y %=n %=m,$(KCONFIG))),$($(c)))),.),)
define Package/kmod-$(1)/install
@for mod in $$(call version_filter,$$(FILES)); do \
if grep -q "$$$$$$$${mod##$(LINUX_DIR)/}" "$(LINUX_DIR)/modules.builtin"; then \

View File

@@ -194,6 +194,7 @@ define Build/Exports/Default
$(1) : export CONFIG_SITE:=$$(CONFIG_SITE)
$(1) : export PKG_CONFIG_PATH:=$$(PKG_CONFIG_PATH)
$(1) : export PKG_CONFIG_LIBDIR:=$$(PKG_CONFIG_PATH)
$(1) : export GIT_CEILING_DIRECTORIES:=$$(BUILD_DIR)
endef
Build/Exports=$(Build/Exports/Default)

View File

@@ -28,9 +28,9 @@ define Require
prereq-$(1): $(if $(PREREQ_PREV),prereq-$(PREREQ_PREV)) FORCE
printf "Checking '$(1)'... "
if $(NO_TRACE_MAKE) -f $(firstword $(MAKEFILE_LIST)) check-$(1) >/dev/null 2>/dev/null; then \
if $(NO_TRACE_MAKE) -f $(firstword $(MAKEFILE_LIST)) check-$(1) PATH="$(ORIG_PATH)" >/dev/null 2>/dev/null; then \
echo 'ok.'; \
elif $(NO_TRACE_MAKE) -f $(firstword $(MAKEFILE_LIST)) check-$(1) >/dev/null 2>/dev/null; then \
elif $(NO_TRACE_MAKE) -f $(firstword $(MAKEFILE_LIST)) check-$(1) PATH="$(ORIG_PATH)" >/dev/null 2>/dev/null; then \
echo 'updated.'; \
else \
echo 'failed.'; \
@@ -104,13 +104,21 @@ define SetupHostCommand
$(call QuoteHostCommand,$(9)) $(call QuoteHostCommand,$(10)) \
$(call QuoteHostCommand,$(11)) $(call QuoteHostCommand,$(12)); do \
if [ -n "$$$$$$$$cmd" ]; then \
bin="$$$$$$$$(PATH="$(subst $(space),:,$(filter-out $(STAGING_DIR_HOST)/%,$(subst :,$(space),$(PATH))))" \
command -v "$$$$$$$${cmd%% *}")"; \
bin="$$$$$$$$(command -v "$$$$$$$${cmd%% *}")"; \
if [ -x "$$$$$$$$bin" ] && eval "$$$$$$$$cmd" >/dev/null 2>/dev/null; then \
case "$$$$$$$$(ls -dl -- $(STAGING_DIR_HOST)/bin/$(strip $(1)))" in \
*" -> $$$$$$$$bin"*) \
[ -x "$(STAGING_DIR_HOST)/bin/$(strip $(1))" ] && exit 0 \
;; \
"-"*) \
find "$(STAGING_DIR_HOST)/stamp" | grep $(strip $(1)) && \
[ -x "$(STAGING_DIR_HOST)/bin/$(strip $(1))" ] && exit 0 \
;; \
*" -> /"*) \
;; \
*" -> "*) \
[ -x "$(STAGING_DIR_HOST)/bin/$(strip $(1))" ] && exit 0 \
;; \
esac; \
ln -sf "$$$$$$$$bin" "$(STAGING_DIR_HOST)/bin/$(strip $(1))"; \
exit 0; \

View File

@@ -11,6 +11,7 @@ TARGET_STAMP:=$(TMP_DIR)/info/.files-$(SCAN_TARGET).stamp
FILELIST:=$(TMP_DIR)/info/.files-$(SCAN_TARGET)-$(SCAN_COOKIE)
OVERRIDELIST:=$(TMP_DIR)/info/.overrides-$(SCAN_TARGET)-$(SCAN_COOKIE)
export ORIG_PATH:=$(if $(ORIG_PATH),$(ORIG_PATH),$(PATH))
export PATH:=$(STAGING_DIR_HOST)/bin:$(PATH)
define feedname

30
include/site/riscv64 Normal file
View File

@@ -0,0 +1,30 @@
#!/bin/sh
. $TOPDIR/include/site/linux
ac_cv_c_littleendian=${ac_cv_c_littleendian=yes}
ac_cv_c_bigendian=${ac_cv_c_bigendian=no}
ac_cv_sizeof___int64=8
ac_cv_sizeof_char=1
ac_cv_sizeof_int=4
ac_cv_sizeof_int16_t=2
ac_cv_sizeof_int32_t=4
ac_cv_sizeof_int64_t=8
ac_cv_sizeof_long_int=8
ac_cv_sizeof_long_long=8
ac_cv_sizeof_long=8
ac_cv_sizeof_off_t=8
ac_cv_sizeof_short_int=2
ac_cv_sizeof_short=2
ac_cv_sizeof_size_t=8
ac_cv_sizeof_ssize_t=8
ac_cv_sizeof_u_int16_t=2
ac_cv_sizeof_u_int32_t=4
ac_cv_sizeof_u_int64_t=8
ac_cv_sizeof_uint16_t=2
ac_cv_sizeof_uint32_t=4
ac_cv_sizeof_uint64_t=8
ac_cv_sizeof_unsigned_int=4
ac_cv_sizeof_unsigned_long=8
ac_cv_sizeof_unsigned_long_long=8
ac_cv_sizeof_unsigned_short=2
ac_cv_sizeof_void_p=8

View File

@@ -260,6 +260,10 @@ ifeq ($(DUMP),1)
CPU_CFLAGS_arc700 = -mcpu=arc700
CPU_CFLAGS_archs = -mcpu=archs
endif
ifeq ($(ARCH),riscv64)
CPU_TYPE ?= riscv64
CPU_CFLAGS_riscv64:=-mabi=lp64d -march=rv64imafdc
endif
ifneq ($(CPU_TYPE),)
ifndef CPU_CFLAGS_$(CPU_TYPE)
$(warning CPU_TYPE "$(CPU_TYPE)" doesn't correspond to a known type)

View File

@@ -50,6 +50,7 @@ space:= $(empty) $(empty)
path:=$(subst :,$(space),$(PATH))
path:=$(filter-out .%,$(path))
path:=$(subst $(space),:,$(path))
export ORIG_PATH:=$(if $(ORIG_PATH),$(ORIG_PATH),$(PATH))
export PATH:=$(path)
export STAGING_DIR_HOST:=$(if $(STAGING_DIR),$(abspath $(STAGING_DIR)/../host),$(TOPDIR)/staging_dir/host)

View File

@@ -83,6 +83,9 @@ endef
define Build/Configure/U-Boot
+$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIGURE_VARS) $(UBOOT_CONFIG)_config
$(if $(strip $(UBOOT_CUSTOMIZE_CONFIG)),
$(PKG_BUILD_DIR)/scripts/config --file $(PKG_BUILD_DIR)/.config $(UBOOT_CUSTOMIZE_CONFIG)
+$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIGURE_VARS) oldconfig)
endef
DTC=$(wildcard $(LINUX_DIR)/scripts/dtc/dtc)

View File

@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),23.05.0-rc1)
VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),23.05.0-rc3)
VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r23069-e2701e0f33)
VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r23389-5deed175a5)
VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/23.05.0-rc1)
VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/23.05.0-rc3)
VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)

View File

@@ -9,6 +9,7 @@ fs.protected_hardlinks=1
fs.protected_symlinks=1
net.core.bpf_jit_enable=1
net.core.bpf_jit_kallsyms=1
net.ipv4.conf.default.arp_ignore=1
net.ipv4.conf.all.arp_ignore=1

View File

@@ -301,6 +301,7 @@ nand_upgrade_fit() {
nand_upgrade_tar() {
local tar_file="$1"
local gz="$2"
local jffs2_markers="${CI_JFFS2_CLEAN_MARKERS:-0}"
# WARNING: This fails if tar contains more than one 'sysupgrade-*' directory.
local board_dir="$(tar t${gz}f "$tar_file" | grep -m 1 '^sysupgrade-.*/$')"
@@ -329,6 +330,7 @@ nand_upgrade_tar() {
ubi_kernel_length="$kernel_length"
fi
fi
local has_env=0
nand_upgrade_prepare_ubi "$rootfs_length" "$rootfs_type" "$ubi_kernel_length" "$has_env" || return 1
@@ -340,8 +342,14 @@ nand_upgrade_tar() {
fi
if [ "$kernel_length" ]; then
if [ "$kernel_mtd" ]; then
tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
mtd write - "$CI_KERNPART"
if [ "$jffs2_markers" = 1 ]; then
flash_erase -j "/dev/mtd${kernel_mtd}" 0 0
tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
nandwrite "/dev/mtd${kernel_mtd}" -
else
tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
mtd write - "$CI_KERNPART"
fi
else
local ubidev="$( nand_find_ubi "${CI_KERN_UBIPART:-$CI_UBIPART}" )"
local kern_ubivol="$( nand_find_volume $ubidev "$CI_KERNPART" )"

View File

@@ -190,7 +190,7 @@ if VERSIONOPT
config VERSION_REPO
string
prompt "Release repository"
default "https://downloads.openwrt.org/releases/23.05.0-rc1"
default "https://downloads.openwrt.org/releases/23.05.0-rc3"
help
This is the repository address embedded in the image, it defaults
to the trunk snapshot repo; the url may contain the following placeholders:

View File

@@ -1,6 +1,6 @@
#
# Copyright (C) 2017 Hauke Mehrtens
# Copyright (C) 2021 Daniel Golle
# Copyright (C) 2021-2023 Daniel Golle
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@@ -13,9 +13,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git
PKG_SOURCE_DATE:=2022-08-31
PKG_SOURCE_VERSION:=7539348480af57c6d0db95aba6381f3ee7483779
PKG_MIRROR_HASH:=125090124d77753acc379b3b124100978c1ecb3da37c4983ba9644b433b7eb08
PKG_SOURCE_DATE:=2023-07-24
PKG_SOURCE_VERSION:=00ac6db375b76e57e1f5e9e9bffa033e907c3581
PKG_MIRROR_HASH:=74fc18395532c4292f530da8d00fa1873ada4e05e600c0077a7b7f85ace0d913
PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
@@ -31,6 +31,7 @@ define Trusted-Firmware-A/Default
DDR_TYPE:=
NAND_TYPE:=
BOARD_QFN:=
DRAM_USE_COMB:=
endef
define Trusted-Firmware-A/mt7622-nor-1ddr
@@ -214,6 +215,126 @@ define Trusted-Firmware-A/mt7986-spim-nand-ddr3
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-nor-ddr3
NAME:=MediaTek MT7988 (SPI-NOR, DDR3)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-emmc-ddr3
NAME:=MediaTek MT7988 (eMMC, DDR3)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-sdmmc-ddr3
NAME:=MediaTek MT7988 (SD card, DDR3)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-snand-ddr3
NAME:=MediaTek MT7988 (SPI-NAND via SNFI, DDR3)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-spim-nand-ddr3
NAME:=MediaTek MT7988 (SPI-NAND via SPIM, DDR3)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr3
endef
define Trusted-Firmware-A/mt7988-nor-ddr4
NAME:=MediaTek MT7988 (SPI-NOR, DDR4)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-emmc-ddr4
NAME:=MediaTek MT7988 (eMMC, DDR4)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-sdmmc-ddr4
NAME:=MediaTek MT7988 (SD card, DDR4)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-snand-ddr4
NAME:=MediaTek MT7988 (SPI-NAND via SNFI, DDR4)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-spim-nand-ddr4
NAME:=MediaTek MT7988 (SPI-NAND via SPIM, DDR4)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DDR_TYPE:=ddr4
endef
define Trusted-Firmware-A/mt7988-nor-comb
NAME:=MediaTek MT7988 (SPI-NOR)
BOOT_DEVICE:=nor
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-emmc-comb
NAME:=MediaTek MT7988 (eMMC)
BOOT_DEVICE:=emmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-sdmmc-comb
NAME:=MediaTek MT7988 (SD card)
BOOT_DEVICE:=sdmmc
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-snand-comb
NAME:=MediaTek MT7988 (SPI-NAND via SNFI)
BOOT_DEVICE:=snand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
define Trusted-Firmware-A/mt7988-spim-nand-comb
NAME:=MediaTek MT7988 (SPI-NAND via SPIM)
BOOT_DEVICE:=spim-nand
BUILD_SUBTARGET:=filogic
PLAT:=mt7988
DRAM_USE_COMB:=1
endef
TFA_TARGETS:= \
mt7622-nor-1ddr \
mt7622-nor-2ddr \
@@ -237,7 +358,22 @@ TFA_TARGETS:= \
mt7986-nor-ddr4 \
mt7986-sdmmc-ddr4 \
mt7986-snand-ddr4 \
mt7986-spim-nand-ddr4
mt7986-spim-nand-ddr4 \
mt7988-emmc-ddr3 \
mt7988-nor-ddr3 \
mt7988-sdmmc-ddr3 \
mt7988-snand-ddr3 \
mt7988-spim-nand-ddr3 \
mt7988-emmc-ddr4 \
mt7988-nor-ddr4 \
mt7988-sdmmc-ddr4 \
mt7988-snand-ddr4 \
mt7988-spim-nand-ddr4 \
mt7988-emmc-comb \
mt7988-nor-comb \
mt7988-sdmmc-comb \
mt7988-snand-comb \
mt7988-spim-nand-comb
TFA_MAKE_FLAGS += \
BOOT_DEVICE=$(BOOT_DEVICE) \
@@ -247,6 +383,7 @@ TFA_MAKE_FLAGS += \
$(if $(NAND_TYPE),NAND_TYPE=$(NAND_TYPE)) \
HAVE_DRAM_OBJ_FILE=yes \
$(if $(DDR3_FLYBY),DDR3_FLYBY=1) \
$(if $(DRAM_USE_COMB),DRAM_USE_COMB=1) \
all
define Package/trusted-firmware-a/install

View File

@@ -8,9 +8,9 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=arm-trusted-firmware-tools
PKG_VERSION:=2.7
PKG_VERSION:=2.9
PKG_RELEASE:=1
PKG_HASH:=53422dc649153838e03820330ba17cb10afe3e330ecde0db11e4d5f1361a33e6
PKG_HASH:=76a66a1de0c01aeb83dfc7b72b51173fe62c6e51d6fca17cc562393117bed08b
PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
PKG_HOST_ONLY:=1

View File

@@ -0,0 +1,21 @@
--- a/tools/fiptool/fiptool.c
+++ b/tools/fiptool/fiptool.c
@@ -3,7 +3,7 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-
+#define _DARWIN_C_SOURCE
#ifndef _MSC_VER
#include <sys/mount.h>
#endif
@@ -18,6 +18,9 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
+#include <unistd.h>
+
+#define uuid_t fiptool_uuid_t
#include "fiptool.h"
#include "tbbr_config.h"

View File

@@ -33,14 +33,15 @@ include $(INCLUDE_DIR)/package.mk
define Package/grub2/Default
CATEGORY:=Boot Loaders
SECTION:=boot
TITLE:=GRand Unified Bootloader ($(1))
TITLE:=GRand Unified Bootloader ($(2))
URL:=http://www.gnu.org/software/grub/
DEPENDS:=@TARGET_x86
VARIANT:=$(1)
DEPENDS:=@TARGET_$(1)
VARIANT:=$(2)
endef
Package/grub2=$(call Package/grub2/Default,pc)
Package/grub2-efi=$(call Package/grub2/Default,efi)
Package/grub2=$(call Package/grub2/Default,x86,pc)
Package/grub2-efi=$(call Package/grub2/Default,x86,efi)
Package/grub2-efi-arm=$(call Package/grub2/Default,armsr,efi)
define Package/grub2-editenv
CATEGORY:=Utilities
@@ -107,6 +108,10 @@ ifneq ($(BUILD_VARIANT),none)
MAKE_PATH := grub-core
endif
ifeq ($(CONFIG_arm),y)
TARGET_CFLAGS := $(filter-out -mfloat-abi=hard,$(TARGET_CFLAGS))
endif
define Host/Configure
$(SED) 's,(RANLIB),(TARGET_RANLIB),' $(HOST_BUILD_DIR)/grub-core/Makefile.in
$(Host/Configure/Default)
@@ -162,9 +167,31 @@ define Package/grub2-efi/install
-O $(CONFIG_ARCH)-efi \
-c ./files/grub-early.cfg \
-o $(STAGING_DIR_IMAGE)/grub2/iso-boot$(if $(CONFIG_x86_64),x64,ia32).efi \
at_keyboard boot chain configfile fat iso9660 linux ls part_msdos part_gpt reboot serial test efi_gop efi_uga
boot chain configfile fat iso9660 linux ls part_msdos part_gpt reboot serial test efi_gop efi_uga
endef
define Package/grub2-efi-arm/install
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)/grub2
cp ./files/grub-early-gpt.cfg $(PKG_BUILD_DIR)/grub-early.cfg
$(STAGING_DIR_HOST)/bin/grub-mkimage \
-d $(PKG_BUILD_DIR)/grub-core \
-p /boot/grub \
-O arm$(if $(CONFIG_aarch64),64,)-efi \
-c $(PKG_BUILD_DIR)/grub-early.cfg \
-o $(STAGING_DIR_IMAGE)/grub2/boot$(if $(CONFIG_aarch64),aa64,arm).efi \
boot chain configfile fat linux ls part_gpt part_msdos reboot search \
search_fs_uuid search_label serial efi_gop lsefi minicmd ext2
$(STAGING_DIR_HOST)/bin/grub-mkimage \
-d $(PKG_BUILD_DIR)/grub-core \
-p /boot/grub \
-O arm$(if $(CONFIG_aarch64),64,)-efi \
-c ./files/grub-early.cfg \
-o $(STAGING_DIR_IMAGE)/grub2/iso-bootaa$(if $(CONFIG_aarch64),aa64,arm).efi \
boot chain configfile fat iso9660 linux ls lsefi minicmd part_msdos part_gpt \
reboot serial test efi_gop
endef
define Package/grub2-editenv/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/grub-editenv $(1)/usr/sbin/
@@ -178,5 +205,6 @@ endef
$(eval $(call HostBuild))
$(eval $(call BuildPackage,grub2))
$(eval $(call BuildPackage,grub2-efi))
$(eval $(call BuildPackage,grub2-efi-arm))
$(eval $(call BuildPackage,grub2-editenv))
$(eval $(call BuildPackage,grub2-bios-setup))

View File

@@ -0,0 +1,2 @@
search --set=root --label kernel
configfile ($root)/efi/openwrt/grub.cfg

View File

@@ -0,0 +1,63 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2022 OpenWrt.org
#
include $(TOPDIR)/rules.mk
PKG_NAME:=opensbi
PKG_RELEASE:=1.2
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/riscv/opensbi
PKG_SOURCE_DATE:=2022-12-24
PKG_SOURCE_VERSION:=6b5188ca14e59ce7bf71afe4e7d3d557c3d31bf8
PKG_MIRROR_HASH:=edcdd99da6c62975171981c0aa2b73a27091067da11ccd49816b5ad27d000858
PKG_BUILD_DIR=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
PKG_TARGETS:=bin
PKG_FLAGS:=nonshared
PKG_LICENSE:=BSD-2-Clause
PKG_LICENSE_FILES:=COPYING.BSD
PKG_BUILD_PARALLEL:=1
PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
include $(INCLUDE_DIR)/package.mk
define Package/opensbi
SECTION:=boot
CATEGORY:=Boot Loaders
DEPENDS:=@TARGET_sifiveu
URL:=https://github.com/riscv/opensbi/blob/master/README.md
VARIANT:=$(subst _,/,$(subst opensbi_,,$(1)))
TITLE:=OpenSBI generic
OPENSBI_IMAGE:=
PLAT:=
endef
define Package/opensbi_generic
$(Package/opensbi)
TITLE:=OpenSBI generic
OPENSBI_IMAGE:=fw_dynamic.bin
PLAT:=generic
endef
export GCC_HONOUR_COPTS=s
MAKE_VARS = \
CROSS_COMPILE="$(TARGET_CROSS)"
define Build/Compile
$(eval $(Package/opensbi_$(BUILD_VARIANT))) \
+$(MAKE_VARS) $(MAKE) -C $(PKG_BUILD_DIR) \
PLATFORM=$(PLAT)
endef
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(CP) $(PKG_BUILD_DIR)/build/platform/$(PLAT)/firmware/fw_dynamic.bin $(STAGING_DIR_IMAGE)/fw_dynamic-${BUILD_VARIANT}.bin
endef
$(eval $(call BuildPackage,opensbi_generic))

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@@ -0,0 +1,36 @@
include $(TOPDIR)/rules.mk
PKG_VERSION:=2023.04
PKG_RELEASE:=1
PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk
define U-Boot/Default
BUILD_TARGET:=armsr
endef
define U-Boot/qemu_armv7
NAME:=QEMU ARM Virtual Machine 32-bit
BUILD_SUBTARGET:=armv7
BUILD_DEVICES:=generic
UBOOT_CONFIG:=qemu_arm
endef
define U-Boot/qemu_armv8
NAME:=QEMU ARM Virtual Machine 64-bit
BUILD_SUBTARGET:=armv8
BUILD_DEVICES:=generic
UBOOT_CONFIG:=qemu_arm64
endef
UBOOT_TARGETS := \
qemu_armv7 \
qemu_armv8
UBOOT_CUSTOMIZE_CONFIG := \
--enable CMD_EFIDEBUG
$(eval $(call BuildPackage/U-Boot))

View File

@@ -0,0 +1,62 @@
From: Simon Glass <sjg@chromium.org>
To: U-Boot Mailing List <u-boot@lists.denx.de>
Subject: [PATCH v10 7/9] bootstd: Use blk uclass device numbers to set efi
bootdev
Date: Mon, 24 Apr 2023 13:49:50 +1200
Message-ID:
<20230424134946.v10.7.Ia5f5e39c882ac22b5f71c4d576941b34e868eeba@changeid>
From: Mathew McBride <matt@traverse.com.au>
When loading a file from a block device, efiload_read_file
was using the seq_num of the device (e.g "35" of virtio_blk#35)
instead of the block device id (e.g what you get from running
the corresponding device scan command, like "virtio 0")
This cause EFI booting from these devices to fail as an
invalid device number is passed to blk_get_device_part_str:
Scanning bootdev 'virtio-blk#35.bootdev':
distro_efi_read_bootflow_file start (efi,fname=<NULL>)
distro_efi_read_bootflow_file start (efi,fname=<NULL>)
setting bootdev virtio, 35, efi/boot/bootaa64.efi, 00000000beef9a40, 170800
efi_dp_from_name calling blk_get_device_part_str
dev=virtio devnr=35 path=efi/boot/bootaa64.efi
blk_get_device_part_str (virtio,35)
blk_get_device_by_str (virtio, 35)
** Bad device specification virtio 35 **
Using default device tree: dtb/qemu-arm.dtb
No device tree available
0 efi ready virtio 1 virtio-blk#35.bootdev.par efi/boot/bootaa64.efi
** Booting bootflow 'virtio-blk#35.bootdev.part_1' with efi
blk_get_device_part_str (virtio,0:1)
blk_get_device_by_str (virtio, 0)
No UEFI binary known at beef9a40 (image buf=00000000beef9a40,addr=0000000000000000)
Boot failed (err=-22)
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Petr Štetiar <ynezz@true.cz> [backport to 2023.04]
---
(no changes since v8)
Changes in v8:
- Add new patch to use blk uclass device numbers to set efi bootdev
boot/bootmeth_efi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -117,7 +117,9 @@ static int efiload_read_file(struct blk_
* this can go away.
*/
media_dev = dev_get_parent(bflow->dev);
- snprintf(devnum_str, sizeof(devnum_str), "%x", dev_seq(media_dev));
+ snprintf(devnum_str, sizeof(devnum_str), "%x:%x",
+ desc ? desc->devnum : dev_seq(media_dev),
+ bflow->part);
strlcpy(dirname, bflow->fname, sizeof(dirname));
last_slash = strrchr(dirname, '/');

View File

@@ -93,6 +93,7 @@ zyxel,nbg6616)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
;;
aruba,ap-105|\
aruba,ap-115|\
aruba,ap-175|\
dongwon,dw02-412h-64m|\
dongwon,dw02-412h-128m|\

View File

@@ -35,6 +35,11 @@ xiaomi,ax9000)
[ -n "$idx2" ] && \
ubootenv_add_uci_sys_config "/dev/mtd$idx2" "0x0" "0x10000" "0x20000"
;;
prpl,haze)
mmcpart="$(find_mmc_part 0:APPSBLENV)"
[ -n "$mmcpart" ] && \
ubootenv_add_uci_config "$mmcpart" "0x0" "0x40000" "0x400" "0x100"
;;
qnap,301w)
idx="$(find_mtd_index 0:appsblenv)"
[ -n "$idx" ] && \

View File

@@ -12,9 +12,8 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
traverse,ls1043v|\
traverse,ls1043s)
ubootenv_add_uci_config "/dev/mtd1" "0x40000" "0x2000" "0x20000"
traverse,ten64)
ubootenv_add_uci_config "/dev/mtd3" "0x0000" "0x80000" "0x80000"
;;
esac

View File

@@ -37,14 +37,28 @@ bananapi,bpi-r3)
;;
esac
;;
glinet,gl-mt3000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000"
;;
mercusys,mr90x-v1)
local envdev=/dev/mtd$(find_mtd_index "u-boot-env")
ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1"
;;
netgear,wax220)
ubootenv_add_uci_config "/dev/mtd5" "0x0" "0x20000" "0x20000"
;;
xiaomi,mi-router-wr30u-112m-nmbm|\
xiaomi,mi-router-wr30u-stock|\
xiaomi,redmi-router-ax6000-stock)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000"
ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x10000" "0x20000"
;;
h3c,magic-nx30-pro|\
qihoo,360t7|\
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\
tplink,tl-xdr6088|\
xiaomi,mi-router-wr30u-ubootmod|\
xiaomi,redmi-router-ax6000-ubootmod)
. /lib/upgrade/nand.sh
local envubi=$(nand_find_ubi ubi)

View File

@@ -12,7 +12,8 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
iptime,a6004mx)
iptime,a6004mx|\
netgear,ex6250-v2)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000"
;;
esac

View File

@@ -39,10 +39,18 @@ ampedwireless,ally-r1900k)
;;
beeline,smartbox-giga|\
beeline,smartbox-turbo|\
beeline,smartbox-turbo-plus|\
etisalat,s3|\
rostelecom,rt-sf-1)
ubootenv_add_uci_config "/dev/mtd0" "0x80000" "0x1000" "0x20000"
;;
beeline,smartbox-pro|\
tplink,ec330-g5u-v1|\
wifire,s1500-nbn)
idx="$(find_mtd_index u-boot-env)"
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x1000" "0x20000"
;;
buffalo,wsr-1166dhp|\
buffalo,wsr-600dhp|\
kroks,kndrt31r16|\
@@ -95,10 +103,9 @@ snr,cpe-w4n-mt)
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x1000" "0x1000"
;;
tplink,ec330-g5u-v1)
idx="$(find_mtd_index u-boot-env)"
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x1000" "0x20000"
xiaomi,miwifi-mini)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
ubootenv_add_uci_sys_config "/dev/mtd9" "0x0" "0x4000" "0x10000"
;;
xiaomi,mi-router-3g-v2|\
xiaomi,mi-router-4a-gigabit|\

View File

@@ -1,8 +1,8 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2023.04
PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
PKG_VERSION:=2023.07.02
PKG_HASH:=6b6a48581c14abb0f95bd87c1af4d740922406d7b801002a9f94727fdde021d5
PKG_BUILD_DEPENDS:=!(TARGET_ramips||TARGET_mediatek_mt7623):arm-trusted-firmware-tools/host
include $(INCLUDE_DIR)/u-boot.mk
@@ -176,6 +176,18 @@ define U-Boot/mt7629_rfb
UBOOT_CONFIG:=mt7629_rfb
endef
define U-Boot/mt7981_h3c_magic-nx30-pro
NAME:=H3C Magic NX30 Pro
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=h3c_magic-nx30-pro
UBOOT_CONFIG:=mt7981_h3c_magic-nx30-pro
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7981
BL2_DDRTYPE:=ddr3
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_qihoo_360t7
NAME:=Qihoo 360T7
BUILD_SUBTARGET:=filogic
@@ -188,6 +200,18 @@ define U-Boot/mt7981_qihoo_360t7
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_xiaomi_mi-router-wr30u
NAME:=Xiaomi Router WR30U
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=xiaomi_mi-router-wr30u-ubootmod
UBOOT_CONFIG:=mt7981_xiaomi_mi-router-wr30u
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7981
BL2_DDRTYPE:=ddr3
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7986_rfb
NAME:=MT7986 Reference Board
BUILD_SUBTARGET:=filogic
@@ -297,6 +321,66 @@ define U-Boot/mt7986_xiaomi_redmi-router-ax6000
DEPENDS:=+trusted-firmware-a-mt7986-spim-nand-ddr4
endef
define U-Boot/mt7988_rfb-spim-nand
NAME:=MT7988 Reference Board
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=mediatek_mt7988a-rfb-nand
UBOOT_CONFIG:=mt7988_rfb
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7988
BL2_DDRTYPE:=ddr4
DEPENDS:=+trusted-firmware-a-mt7988-spim-nand-ddr4
endef
define U-Boot/mt7988_rfb-snand
NAME:=MT7988 Reference Board
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=mediatek_mt7988a-rfb-nand
UBOOT_CONFIG:=mt7988_rfb
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=snand
BL2_SOC:=mt7988
BL2_DDRTYPE:=ddr4
DEPENDS:=+trusted-firmware-a-mt7988-snand-ddr4
endef
define U-Boot/mt7988_rfb-nor
NAME:=MT7988 Reference Board
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=mediatek_mt7988a-rfb-nand
UBOOT_CONFIG:=mt7988_rfb
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=nor
BL2_SOC:=mt7988
BL2_DDRTYPE:=ddr4
DEPENDS:=+trusted-firmware-a-mt7988-nor-ddr4
endef
define U-Boot/mt7988_rfb-emmc
NAME:=MT7988 Reference Board
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=mediatek_mt7988a-rfb-nand
UBOOT_CONFIG:=mt7988_rfb
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=emmc
BL2_SOC:=mt7988
BL2_DDRTYPE:=ddr4
DEPENDS:=+trusted-firmware-a-mt7988-emmc-ddr4
endef
define U-Boot/mt7988_rfb-sd
NAME:=MT7988 Reference Board
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=mediatek_mt7988a-rfb-nand
UBOOT_CONFIG:=mt7988_sd_rfb
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=sdmmc
BL2_SOC:=mt7988
BL2_DDRTYPE:=ddr4
DEPENDS:=+trusted-firmware-a-mt7988-sdmmc-ddr4
endef
UBOOT_TARGETS := \
mt7620_mt7530_rfb \
mt7620_rfb \
@@ -313,7 +397,9 @@ UBOOT_TARGETS := \
mt7628_rfb \
ravpower_rp-wd009 \
mt7629_rfb \
mt7981_h3c_magic-nx30-pro \
mt7981_qihoo_360t7 \
mt7981_xiaomi_mi-router-wr30u \
mt7986_bananapi_bpi-r3-emmc \
mt7986_bananapi_bpi-r3-sdmmc \
mt7986_bananapi_bpi-r3-snand \
@@ -322,7 +408,12 @@ UBOOT_TARGETS := \
mt7986_tplink_tl-xdr6086 \
mt7986_tplink_tl-xdr6088 \
mt7986_xiaomi_redmi-router-ax6000 \
mt7986_rfb
mt7986_rfb \
mt7988_rfb-spim-nand \
mt7988_rfb-snand \
mt7988_rfb-nor \
mt7988_rfb-emmc \
mt7988_rfb-sd
ifdef CONFIG_TARGET_mediatek
UBOOT_MAKE_FLAGS += $(UBOOT_IMAGE:.fip=.bin)

View File

@@ -21,7 +21,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
CONFIG_SYS_PROMPT="MT7622> "
CONFIG_DEBUG_UART_BASE=0x11002000
CONFIG_DEBUG_UART_CLOCK=25000000
@@ -24,6 +26,9 @@ CONFIG_CMD_SF_TEST=y
@@ -25,6 +27,9 @@ CONFIG_CMD_SF_TEST=y
CONFIG_CMD_PING=y
CONFIG_CMD_SMC=y
CONFIG_ENV_OVERWRITE=y

View File

@@ -1,88 +0,0 @@
From patchwork Wed Apr 12 20:36:43 2023
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
X-Patchwork-Id: 1768270
Return-Path: <u-boot-bounces@lists.denx.de>
X-Original-To: incoming@patchwork.ozlabs.org
Delivered-To: patchwork-incoming@legolas.ozlabs.org
Date: Wed, 12 Apr 2023 21:36:43 +0100
From: Daniel Golle <daniel@makrotopia.org>
To: u-boot@lists.denx.de, Sam Shih <sam.shih@mediatek.com>,
GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Weijie Gao <weijie.gao@mediatek.com>, Ryder Lee <ryder.lee@mediatek.com>,
Frank Wunderlich <frank-w@public-files.de>
Cc: Steven Liu =?utf-8?b?KOWKieS6uuixqik=?= <steven.liu@mediatek.com>,
John Crispin <john@phrozen.org>
Subject: [PATCH] pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeeded
Message-ID: <ZDcWW7kLSLn1GMZ1@makrotopia.org>
MIME-Version: 1.0
Content-Disposition: inline
X-BeenThere: u-boot@lists.denx.de
X-Mailman-Version: 2.1.39
Precedence: list
List-Id: U-Boot discussion <u-boot.lists.denx.de>
Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Commit dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and
related functions") changed the logic deciding to set R0 and R1
registers for V1 devices.
Before:
/* Also set PUPD/R0/R1 if the pin has them */
err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
if (err != -EINVAL) {
mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
}
After:
/* try pupd_r1_r0 if pullen_pullsel return error */
err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup,
val);
if (err)
return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable,
pullup, val);
Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function
always either returns 0 in case of success or -EINVAL in case any error
has occurred. Hence the logic responsible of the decision to program R0
and R1 has been inverted.
This leads to problems on BananaPi R2 (MT7623N) when booting from
SDMMC, it turns out accessing eMMC no longer works since
U-Boot 2022.07:
MT7623> mmc dev 0
Card did not respond to voltage select! : -110
The problem wasn't detected for a long time as both eMMC and SDMMC work
fine if they are used to boot from, and hence R0 and R1 were already
setup by the bootrom and/or preloader.
Fix the logic to restore the originally intended and correct behavior
and also change the descriptive comment accordingly.
Fixes: dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -349,10 +349,10 @@ int mtk_pinconf_bias_set_v1(struct udevi
{
int err;
- /* try pupd_r1_r0 if pullen_pullsel return error */
+ /* set pupd_r1_r0 if pullen_pullsel succeeded */
err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup,
val);
- if (err)
+ if (!err)
return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable,
pullup, val);

View File

@@ -49,7 +49,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
config SYS_NAND_MAX_OOBFREE
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -38,3 +38,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
@@ -39,3 +39,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
obj-$(CONFIG_SPL_UBI) += ubispl/
endif

View File

@@ -31,16 +31,16 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -272,4 +272,6 @@ source "drivers/mtd/spi/Kconfig"
@@ -274,4 +274,6 @@ source "drivers/mtd/ubi/Kconfig"
source "drivers/mtd/ubi/Kconfig"
source "drivers/mtd/nvmxip/Kconfig"
+source "drivers/mtd/nmbm/Kconfig"
+
endmenu
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -40,3 +40,4 @@ obj-$(CONFIG_SPL_UBI) += ubispl/
@@ -41,3 +41,4 @@ obj-$(CONFIG_SPL_UBI) += ubispl/
endif
obj-$(CONFIG_MTK_SPI_NAND) += mtk-snand/

View File

@@ -34,7 +34,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
#if defined(CONFIG_CMD_ONENAND)
/* go init the NAND */
static int initr_onenand(void)
@@ -703,6 +717,9 @@ static init_fnc_t init_sequence_r[] = {
@@ -696,6 +710,9 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_CMD_ONENAND
initr_onenand,
#endif

View File

@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1352,6 +1352,12 @@ config CMD_NAND_TORTURE
@@ -1353,6 +1353,12 @@ config CMD_NAND_TORTURE
endif # CMD_NAND
@@ -30,7 +30,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
depends on NVME
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -123,6 +123,7 @@ obj-y += legacy-mtd-utils.o
@@ -125,6 +125,7 @@ obj-y += legacy-mtd-utils.o
endif
obj-$(CONFIG_CMD_MUX) += mux.o
obj-$(CONFIG_CMD_NAND) += nand.o

View File

@@ -26,7 +26,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1352,6 +1352,14 @@ config CMD_NAND_TORTURE
@@ -1353,6 +1353,14 @@ config CMD_NAND_TORTURE
endif # CMD_NAND
@@ -43,7 +43,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
bool "nmbm"
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -123,6 +123,7 @@ obj-y += legacy-mtd-utils.o
@@ -125,6 +125,7 @@ obj-y += legacy-mtd-utils.o
endif
obj-$(CONFIG_CMD_MUX) += mux.o
obj-$(CONFIG_CMD_NAND) += nand.o

View File

@@ -13,7 +13,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2818,6 +2818,100 @@ static int spi_nor_init_params(struct sp
@@ -2848,6 +2848,100 @@ static int spi_nor_init_params(struct sp
return 0;
}
@@ -114,7 +114,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
static int spi_nor_hwcaps2cmd(u32 hwcaps, const int table[][2], size_t size)
{
size_t i;
@@ -3930,6 +4024,7 @@ int spi_nor_scan(struct spi_nor *nor)
@@ -4045,6 +4139,7 @@ int spi_nor_scan(struct spi_nor *nor)
nor->write = spi_nor_write_data;
nor->read_reg = spi_nor_read_reg;
nor->write_reg = spi_nor_write_reg;

View File

@@ -23,7 +23,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi
@@ -40,3 +40,11 @@
&snfi {
u-boot,dm-pre-reloc;
bootph-all;
};
+
+&pinctrl {

View File

@@ -55,7 +55,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
reg = <0x11014000 0x1000>;
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -21,6 +21,7 @@ CONFIG_SYS_MAXARGS=8
@@ -22,6 +22,7 @@ CONFIG_SYS_MAXARGS=8
CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MMC=y
@@ -63,7 +63,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
CONFIG_CMD_PCI=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_PING=y
@@ -40,6 +41,10 @@ CONFIG_SYSCON=y
@@ -41,6 +42,10 @@ CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_MTK=y

View File

@@ -18,14 +18,14 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1288,6 +1288,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
@@ -1308,6 +1308,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7623n-bananapi-bpi-r2.dtb \
mt7629-rfb.dtb \
mt7981-rfb.dtb \
+ mt7981-snfi-nand-rfb.dtb \
mt7981-emmc-rfb.dtb \
mt7981-sd-rfb.dtb \
mt7986a-rfb.dtb \
mt7986a-bpi-r3-sd.dtb \
--- /dev/null
+++ b/arch/arm/dts/mt7981-snfi-nand-rfb.dts
@@ -0,0 +1,132 @@

View File

@@ -13,7 +13,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -672,6 +672,7 @@ static int set_4byte(struct spi_nor *nor
@@ -673,6 +673,7 @@ static int set_4byte(struct spi_nor *nor
case SNOR_MFR_ISSI:
case SNOR_MFR_MACRONIX:
case SNOR_MFR_WINBOND:

View File

@@ -207,8 +207,8 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
- ret = spinand_manufacturer_detect(spinand);
+ ret = spinand_id_detect(spinand);
if (ret) {
dev_err(spinand->slave->dev, "unknown raw ID %*phN\n",
SPINAND_MAX_ID_LEN, spinand->id.data);
dev_err(spinand->slave->dev, "unknown raw ID %02x %02x %02x %02x\n",
spinand->id.data[0], spinand->id.data[1],
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -22,8 +22,13 @@

View File

@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -823,6 +823,14 @@ config MMC_MTK
@@ -820,6 +820,14 @@ config MMC_MTK
This is needed if support for any SD/SDIO/MMC devices is required.
If unsure, say N.
@@ -32,7 +32,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
config FSL_SDHC_V2_3
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -84,3 +84,7 @@ obj-$(CONFIG_RENESAS_SDHI) += tmio-comm
@@ -83,3 +83,7 @@ obj-$(CONFIG_RENESAS_SDHI) += tmio-comm
obj-$(CONFIG_MMC_BCM2835) += bcm2835_sdhost.o
obj-$(CONFIG_MMC_MTK) += mtk-sd.o
obj-$(CONFIG_MMC_SDHCI_F_SDH30) += f_sdh30.o

View File

@@ -0,0 +1,297 @@
From 63336ec7fd7d480ac58a91f3b20d08bf1b3a13ad Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:15:41 +0800
Subject: [PATCH 01/29] arm: mediatek: retrieve ram_base from dts node for
armv8 platform
Now we use fdtdec_setup_mem_size_base() to get DRAM base from fdt ram node
and update gd->ram_base. CFG_SYS_SDRAM_BASE is unused and will be removed.
Also, since mt7622 always passes fdt to linux kernel, there's no need to
assign value to gd->bd->bi_boot_params.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/mt7981-emmc-rfb.dts | 5 +++++
arch/arm/dts/mt7981-rfb.dts | 5 +++++
arch/arm/dts/mt7981-sd-rfb.dts | 5 +++++
arch/arm/dts/mt7986a-bpi-r3-sd.dts | 5 +++++
arch/arm/dts/mt7986a-rfb.dts | 5 +++++
arch/arm/dts/mt7986a-sd-rfb.dts | 5 +++++
arch/arm/dts/mt7986b-rfb.dts | 5 +++++
arch/arm/dts/mt7986b-sd-rfb.dts | 5 +++++
arch/arm/mach-mediatek/mt7622/init.c | 13 +++++++++----
arch/arm/mach-mediatek/mt7981/init.c | 11 +++++++++--
arch/arm/mach-mediatek/mt7986/init.c | 11 +++++++++--
board/mediatek/mt7622/mt7622_rfb.c | 1 -
include/configs/mt7622.h | 10 ----------
include/configs/mt7981.h | 9 ---------
include/configs/mt7986.h | 9 ---------
15 files changed, 67 insertions(+), 37 deletions(-)
--- a/arch/arm/dts/mt7981-emmc-rfb.dts
+++ b/arch/arm/dts/mt7981-emmc-rfb.dts
@@ -18,6 +18,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
--- a/arch/arm/dts/mt7981-rfb.dts
+++ b/arch/arm/dts/mt7981-rfb.dts
@@ -17,6 +17,11 @@
stdout-path = &uart0;
tick-timer = &timer0;
};
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
};
&uart0 {
--- a/arch/arm/dts/mt7981-sd-rfb.dts
+++ b/arch/arm/dts/mt7981-sd-rfb.dts
@@ -18,6 +18,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
--- a/arch/arm/dts/mt7986a-bpi-r3-sd.dts
+++ b/arch/arm/dts/mt7986a-bpi-r3-sd.dts
@@ -19,6 +19,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x80000000>;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
--- a/arch/arm/dts/mt7986a-rfb.dts
+++ b/arch/arm/dts/mt7986a-rfb.dts
@@ -18,6 +18,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
--- a/arch/arm/dts/mt7986a-sd-rfb.dts
+++ b/arch/arm/dts/mt7986a-sd-rfb.dts
@@ -19,6 +19,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
--- a/arch/arm/dts/mt7986b-rfb.dts
+++ b/arch/arm/dts/mt7986b-rfb.dts
@@ -18,6 +18,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
--- a/arch/arm/dts/mt7986b-sd-rfb.dts
+++ b/arch/arm/dts/mt7986b-sd-rfb.dts
@@ -19,6 +19,11 @@
tick-timer = &timer0;
};
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
--- a/arch/arm/mach-mediatek/mt7622/init.c
+++ b/arch/arm/mach-mediatek/mt7622/init.c
@@ -4,11 +4,14 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
-#include <asm/cache.h>
+#include <asm/global_data.h>
+#include <asm/u-boot.h>
+#include <linux/sizes.h>
+
+DECLARE_GLOBAL_DATA_PTR;
int print_cpuinfo(void)
{
@@ -20,11 +23,13 @@ int dram_init(void)
{
int ret;
- ret = fdtdec_setup_memory_banksize();
+ ret = fdtdec_setup_mem_size_base();
if (ret)
return ret;
- return fdtdec_setup_mem_size_base();
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_2G);
+
+ return 0;
}
void reset_cpu(void)
--- a/arch/arm/mach-mediatek/mt7981/init.c
+++ b/arch/arm/mach-mediatek/mt7981/init.c
@@ -4,18 +4,25 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
-#include <cpu_func.h>
+#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
+#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
+ int ret;
+
+ ret = fdtdec_setup_mem_size_base();
+ if (ret)
+ return ret;
+
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_1G);
return 0;
}
--- a/arch/arm/mach-mediatek/mt7986/init.c
+++ b/arch/arm/mach-mediatek/mt7986/init.c
@@ -4,18 +4,25 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
-#include <cpu_func.h>
+#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
+#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
+ int ret;
+
+ ret = fdtdec_setup_mem_size_base();
+ if (ret)
+ return ret;
+
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_2G);
return 0;
}
--- a/board/mediatek/mt7622/mt7622_rfb.c
+++ b/board/mediatek/mt7622/mt7622_rfb.c
@@ -19,7 +19,6 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
return 0;
}
--- a/include/configs/mt7622.h
+++ b/include/configs/mt7622.h
@@ -9,14 +9,4 @@
#ifndef __MT7622_H
#define __MT7622_H
-/* Uboot definition */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
-
-/* SPL -> Uboot */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
-/* DRAM */
-#define CFG_SYS_SDRAM_BASE 0x40000000
-
-/* Ethernet */
-
#endif
--- a/include/configs/mt7981.h
+++ b/include/configs/mt7981.h
@@ -9,13 +9,4 @@
#ifndef __MT7981_H
#define __MT7981_H
-/* Uboot definition */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
-
-/* SPL -> Uboot */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
-
-/* DRAM */
-#define CFG_SYS_SDRAM_BASE 0x40000000
-
#endif
--- a/include/configs/mt7986.h
+++ b/include/configs/mt7986.h
@@ -9,13 +9,4 @@
#ifndef __MT7986_H
#define __MT7986_H
-/* Uboot definition */
-#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
-
-/* SPL -> Uboot */
-#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
-
-/* DRAM */
-#define CFG_SYS_SDRAM_BASE 0x40000000
-
#endif

View File

@@ -0,0 +1,129 @@
From df3a0091b249ea82198ea019d145d05a7cf49c0d Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:15:47 +0800
Subject: [PATCH 02/29] board: mediatek: update config headers
Remove unused information from include/configs/mtxxxx.h
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
include/configs/mt7620.h | 3 +--
include/configs/mt7621.h | 6 ++----
include/configs/mt7623.h | 8 --------
include/configs/mt7628.h | 5 ++---
include/configs/mt7629.h | 13 +------------
5 files changed, 6 insertions(+), 29 deletions(-)
--- a/include/configs/mt7620.h
+++ b/include/configs/mt7620.h
@@ -10,10 +10,9 @@
#define CFG_SYS_SDRAM_BASE 0x80000000
-#define CFG_SYS_INIT_SP_OFFSET 0x400000
+#define CFG_SYS_INIT_SP_OFFSET 0x400000
/* SPL */
-
#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
--- a/include/configs/mt7621.h
+++ b/include/configs/mt7621.h
@@ -12,13 +12,11 @@
#define CFG_MAX_MEM_MAPPED 0x1c000000
-#define CFG_SYS_INIT_SP_OFFSET 0x800000
+#define CFG_SYS_INIT_SP_OFFSET 0x800000
/* MMC */
#define MMC_SUPPORTS_TUNING
-/* NAND */
-
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CFG_SYS_NS16550_CLK 50000000
@@ -26,7 +24,7 @@
#endif
/* Serial common */
-#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
+#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
230400, 460800, 921600 }
/* Dummy value */
--- a/include/configs/mt7623.h
+++ b/include/configs/mt7623.h
@@ -11,12 +11,6 @@
#include <linux/sizes.h>
-/* Miscellaneous configurable options */
-
-/* Environment */
-
-/* Preloader -> Uboot */
-
/* MMC */
#define MMC_SUPPORTS_TUNING
@@ -32,8 +26,6 @@
"fdt_addr_r=" FDT_HIGH "\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
-/* Ethernet */
-
#ifdef CONFIG_DISTRO_DEFAULTS
#define BOOT_TARGET_DEVICES(func) \
--- a/include/configs/mt7628.h
+++ b/include/configs/mt7628.h
@@ -10,7 +10,7 @@
#define CFG_SYS_SDRAM_BASE 0x80000000
-#define CFG_SYS_INIT_SP_OFFSET 0x80000
+#define CFG_SYS_INIT_SP_OFFSET 0x80000
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
@@ -19,11 +19,10 @@
#endif
/* Serial common */
-#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
+#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
230400, 460800, 921600 }
/* SPL */
-
#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
--- a/include/configs/mt7629.h
+++ b/include/configs/mt7629.h
@@ -9,21 +9,10 @@
#ifndef __MT7629_H
#define __MT7629_H
-#include <linux/sizes.h>
-
-/* Miscellaneous configurable options */
-
-/* Environment */
-
+/* SPL */
#define CFG_SYS_UBOOT_BASE (0x30000000 + CONFIG_SPL_PAD_TO)
-/* SPL -> Uboot */
-
-/* UBoot -> Kernel */
-
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
-/* Ethernet */
-
#endif

View File

@@ -0,0 +1,84 @@
From 0d6d8a408f80358dd47984320ea9c65e555ac4c9 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:15:54 +0800
Subject: [PATCH 03/29] spi: mtk_spim: get spi clk rate only once
We don't really need to switch clk rate during operating SPIM controller.
Get clk rate only once at driver probing.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
---
drivers/spi/mtk_spim.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
--- a/drivers/spi/mtk_spim.c
+++ b/drivers/spi/mtk_spim.c
@@ -137,6 +137,8 @@ struct mtk_spim_capability {
* @state: Controller state
* @sel_clk: Pad clock
* @spi_clk: Core clock
+ * @pll_clk_rate: Controller's PLL source clock rate, which is different
+ * from SPI bus clock rate
* @xfer_len: Current length of data for transfer
* @hw_cap: Controller capabilities
* @tick_dly: Used to postpone SPI sampling time
@@ -149,6 +151,7 @@ struct mtk_spim_priv {
void __iomem *base;
u32 state;
struct clk sel_clk, spi_clk;
+ u32 pll_clk_rate;
u32 xfer_len;
struct mtk_spim_capability hw_cap;
u32 tick_dly;
@@ -253,11 +256,10 @@ static int mtk_spim_hw_init(struct spi_s
static void mtk_spim_prepare_transfer(struct mtk_spim_priv *priv,
u32 speed_hz)
{
- u32 spi_clk_hz, div, sck_time, cs_time, reg_val;
+ u32 div, sck_time, cs_time, reg_val;
- spi_clk_hz = clk_get_rate(&priv->spi_clk);
- if (speed_hz <= spi_clk_hz / 4)
- div = DIV_ROUND_UP(spi_clk_hz, speed_hz);
+ if (speed_hz <= priv->pll_clk_rate / 4)
+ div = DIV_ROUND_UP(priv->pll_clk_rate, speed_hz);
else
div = 4;
@@ -404,7 +406,7 @@ static int mtk_spim_transfer_wait(struct
{
struct udevice *bus = dev_get_parent(slave->dev);
struct mtk_spim_priv *priv = dev_get_priv(bus);
- u32 sck_l, sck_h, spi_bus_clk, clk_count, reg;
+ u32 sck_l, sck_h, clk_count, reg;
ulong us = 1;
int ret = 0;
@@ -413,12 +415,11 @@ static int mtk_spim_transfer_wait(struct
else
clk_count = op->data.nbytes;
- spi_bus_clk = clk_get_rate(&priv->spi_clk);
sck_l = readl(priv->base + SPI_CFG2_REG) >> SPI_CFG2_SCK_LOW_OFFSET;
sck_h = readl(priv->base + SPI_CFG2_REG) & SPI_CFG2_SCK_HIGH_MASK;
- do_div(spi_bus_clk, sck_l + sck_h + 2);
+ do_div(priv->pll_clk_rate, sck_l + sck_h + 2);
- us = CLK_TO_US(spi_bus_clk, clk_count * 8);
+ us = CLK_TO_US(priv->pll_clk_rate, clk_count * 8);
us += 1000 * 1000; /* 1s tolerance */
if (us > UINT_MAX)
@@ -662,6 +663,10 @@ static int mtk_spim_probe(struct udevice
clk_enable(&priv->sel_clk);
clk_enable(&priv->spi_clk);
+ priv->pll_clk_rate = clk_get_rate(&priv->spi_clk);
+ if (priv->pll_clk_rate == 0)
+ return -EINVAL;
+
return 0;
}

View File

@@ -0,0 +1,35 @@
From a7b630f02bb12f71f23866aee6f9a1a07497d475 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:02 +0800
Subject: [PATCH 04/29] spi: mtk_spim: clear IRQ enable bits
In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS.
However these IRQ enable bits may be set in previous boot stage (BootROM).
If we leave these bits not cleared, although u-boot has disabled IRQ and
nothing will happen, the linux kernel may encounter panic during
initializing the spim driver due to IRQ event happens before IRQ handler
is properly setup.
This patch clear IRQ bits to prevent this from happening.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
---
drivers/spi/mtk_spim.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/spi/mtk_spim.c
+++ b/drivers/spi/mtk_spim.c
@@ -242,6 +242,9 @@ static int mtk_spim_hw_init(struct spi_s
reg_val &= ~SPI_CMD_SAMPLE_SEL;
}
+ /* Disable interrupt enable for pause mode & normal mode */
+ reg_val &= ~(SPI_CMD_PAUSE_IE | SPI_CMD_FINISH_IE);
+
/* disable dma mode */
reg_val &= ~(SPI_CMD_TX_DMA | SPI_CMD_RX_DMA);

View File

@@ -0,0 +1,25 @@
From 73060da8b54e74c51ef6c1fd31c4fac6ad6b8d0e Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:07 +0800
Subject: [PATCH 05/29] serial: mtk: initial priv data before using
This patch ensures driver private data being fully initialized in
_debug_uart_init which is not covered by .priv_auto ops.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
---
drivers/serial/serial_mtk.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/serial/serial_mtk.c
+++ b/drivers/serial/serial_mtk.c
@@ -439,6 +439,7 @@ static inline void _debug_uart_init(void
{
struct mtk_serial_priv priv;
+ memset(&priv, 0, sizeof(struct mtk_serial_priv));
priv.regs = (void *) CONFIG_VAL(DEBUG_UART_BASE);
priv.fixed_clk_rate = CONFIG_DEBUG_UART_CLOCK;

View File

@@ -0,0 +1,26 @@
From 06e6d224f7d564a34407eba21b51797da7f22628 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:11 +0800
Subject: [PATCH 06/29] reset: mediatek: check malloc return valaue before use
This patch add missing return value check for allocating the driver's
private data. -ENOMEM will be returned if malloc() fails.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/reset/reset-mediatek.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/reset/reset-mediatek.c
+++ b/drivers/reset/reset-mediatek.c
@@ -79,6 +79,9 @@ int mediatek_reset_bind(struct udevice *
return ret;
priv = malloc(sizeof(struct mediatek_reset_priv));
+ if (!priv)
+ return -ENOMEM;
+
priv->regofs = regofs;
priv->nr_resets = num_regs * 32;
dev_set_priv(rst_dev, priv);

View File

@@ -0,0 +1,125 @@
From 77898faf6ce56eb08109cdb853f074bad5acee55 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:15 +0800
Subject: [PATCH 07/29] i2c: mediatek: fix I2C usability for MT7981
MT7981 actually uses MediaTek I2C controller v3 instead of v1.
This patch adds support for I2C controller v3 fix fixes the I2C usability
for MT7981.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/i2c/mtk_i2c.c | 45 +++++++++++++++++++++++++++++++++++++++++--
1 file changed, 43 insertions(+), 2 deletions(-)
--- a/drivers/i2c/mtk_i2c.c
+++ b/drivers/i2c/mtk_i2c.c
@@ -183,9 +183,36 @@ static const uint mt_i2c_regs_v2[] = {
[REG_DCM_EN] = 0xf88,
};
+static const uint mt_i2c_regs_v3[] = {
+ [REG_PORT] = 0x0,
+ [REG_INTR_MASK] = 0x8,
+ [REG_INTR_STAT] = 0xc,
+ [REG_CONTROL] = 0x10,
+ [REG_TRANSFER_LEN] = 0x14,
+ [REG_TRANSAC_LEN] = 0x18,
+ [REG_DELAY_LEN] = 0x1c,
+ [REG_TIMING] = 0x20,
+ [REG_START] = 0x24,
+ [REG_EXT_CONF] = 0x28,
+ [REG_LTIMING] = 0x2c,
+ [REG_HS] = 0x30,
+ [REG_IO_CONFIG] = 0x34,
+ [REG_FIFO_ADDR_CLR] = 0x38,
+ [REG_TRANSFER_LEN_AUX] = 0x44,
+ [REG_CLOCK_DIV] = 0x48,
+ [REG_SOFTRESET] = 0x50,
+ [REG_SLAVE_ADDR] = 0x94,
+ [REG_DEBUGSTAT] = 0xe4,
+ [REG_DEBUGCTRL] = 0xe8,
+ [REG_FIFO_STAT] = 0xf4,
+ [REG_FIFO_THRESH] = 0xf8,
+ [REG_DCM_EN] = 0xf88,
+};
+
struct mtk_i2c_soc_data {
const uint *regs;
uint dma_sync: 1;
+ uint ltiming_adjust: 1;
};
struct mtk_i2c_priv {
@@ -401,6 +428,10 @@ static int mtk_i2c_set_speed(struct udev
(sample_cnt << HS_SAMPLE_OFFSET) |
(step_cnt << HS_STEP_OFFSET);
i2c_writel(priv, REG_HS, high_speed_reg);
+ if (priv->soc_data->ltiming_adjust) {
+ timing_reg = (sample_cnt << 12) | (step_cnt << 9);
+ i2c_writel(priv, REG_LTIMING, timing_reg);
+ }
} else {
ret = mtk_i2c_calculate_speed(clk_src, priv->speed,
&step_cnt, &sample_cnt);
@@ -412,7 +443,12 @@ static int mtk_i2c_set_speed(struct udev
high_speed_reg = I2C_TIME_CLR_VALUE;
i2c_writel(priv, REG_TIMING, timing_reg);
i2c_writel(priv, REG_HS, high_speed_reg);
+ if (priv->soc_data->ltiming_adjust) {
+ timing_reg = (sample_cnt << 6) | step_cnt;
+ i2c_writel(priv, REG_LTIMING, timing_reg);
+ }
}
+
exit:
if (mtk_i2c_clk_disable(priv))
return log_msg_ret("set_speed disable clk", -1);
@@ -725,7 +761,6 @@ static int mtk_i2c_probe(struct udevice
return log_msg_ret("probe enable clk", -1);
mtk_i2c_init_hw(priv);
-
if (mtk_i2c_clk_disable(priv))
return log_msg_ret("probe disable clk", -1);
@@ -750,31 +785,37 @@ static int mtk_i2c_deblock(struct udevic
static const struct mtk_i2c_soc_data mt76xx_soc_data = {
.regs = mt_i2c_regs_v1,
.dma_sync = 0,
+ .ltiming_adjust = 0,
};
static const struct mtk_i2c_soc_data mt7981_soc_data = {
- .regs = mt_i2c_regs_v1,
+ .regs = mt_i2c_regs_v3,
.dma_sync = 1,
+ .ltiming_adjust = 1,
};
static const struct mtk_i2c_soc_data mt7986_soc_data = {
.regs = mt_i2c_regs_v1,
.dma_sync = 1,
+ .ltiming_adjust = 0,
};
static const struct mtk_i2c_soc_data mt8183_soc_data = {
.regs = mt_i2c_regs_v2,
.dma_sync = 1,
+ .ltiming_adjust = 0,
};
static const struct mtk_i2c_soc_data mt8518_soc_data = {
.regs = mt_i2c_regs_v1,
.dma_sync = 0,
+ .ltiming_adjust = 0,
};
static const struct mtk_i2c_soc_data mt8512_soc_data = {
.regs = mt_i2c_regs_v1,
.dma_sync = 1,
+ .ltiming_adjust = 0,
};
static const struct dm_i2c_ops mtk_i2c_ops = {

View File

@@ -0,0 +1,36 @@
From e9467f40d4327cfcb80944a0f12ae195b0d7cd40 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:19 +0800
Subject: [PATCH 08/29] arm: dts: enable i2c support for MediaTek MT7981
This patch enables i2c support for MediaTek MT7981
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/mt7981.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -181,6 +181,20 @@
status = "disabled";
};
+ i2c0: i2c@11007000 {
+ compatible = "mediatek,mt7981-i2c";
+ reg = <0x11007000 0x1000>,
+ <0x10217080 0x80>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ clock-div = <1>;
+ clocks = <&infracfg_ao CK_INFRA_I2CO_CK>,
+ <&infracfg_ao CK_INFRA_AP_DMA_CK>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,hsuart";
reg = <0x11002000 0x400>;

View File

@@ -0,0 +1,34 @@
From 646dab4a8e853b2d0789fa2ff64e7c48f5396cfa Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:24 +0800
Subject: [PATCH 09/29] pwm: mtk: add support for MediaTek MT7988 SoC
This patch adds PWM support for MediaTek MT7988 SoC.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/pwm/pwm-mtk.c | 7 +++++++
1 file changed, 7 insertions(+)
--- a/drivers/pwm/pwm-mtk.c
+++ b/drivers/pwm/pwm-mtk.c
@@ -205,12 +205,19 @@ static const struct mtk_pwm_soc mt7986_d
.reg_ver = PWM_REG_V1,
};
+static const struct mtk_pwm_soc mt7988_data = {
+ .num_pwms = 8,
+ .pwm45_fixup = false,
+ .reg_ver = PWM_REG_V2,
+};
+
static const struct udevice_id mtk_pwm_ids[] = {
{ .compatible = "mediatek,mt7622-pwm", .data = (ulong)&mt7622_data },
{ .compatible = "mediatek,mt7623-pwm", .data = (ulong)&mt7623_data },
{ .compatible = "mediatek,mt7629-pwm", .data = (ulong)&mt7629_data },
{ .compatible = "mediatek,mt7981-pwm", .data = (ulong)&mt7981_data },
{ .compatible = "mediatek,mt7986-pwm", .data = (ulong)&mt7986_data },
+ { .compatible = "mediatek,mt7988-pwm", .data = (ulong)&mt7988_data },
{ }
};

View File

@@ -0,0 +1,49 @@
From b4a308dd31a7c6754be230849a5e430052268b9c Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:33 +0800
Subject: [PATCH 11/29] reset: mediatek: add reset definition for MediaTek
MT7988 SoC
This patch adds reset bits for MediaTek MT7988
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
include/dt-bindings/reset/mt7988-reset.h | 31 ++++++++++++++++++++++++
1 file changed, 31 insertions(+)
create mode 100644 include/dt-bindings/reset/mt7988-reset.h
--- /dev/null
+++ b/include/dt-bindings/reset/mt7988-reset.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_MTK_RESET_H_
+#define _DT_BINDINGS_MTK_RESET_H_
+
+/* ETHDMA Subsystem resets */
+#define ETHDMA_FE_RST 6
+#define ETHDMA_PMTR_RST 8
+#define ETHDMA_GMAC_RST 23
+#define ETHDMA_WDMA0_RST 24
+#define ETHDMA_WDMA1_RST 25
+#define ETHDMA_WDMA2_RST 26
+#define ETHDMA_PPE0_RST 29
+#define ETHDMA_PPE1_RST 30
+#define ETHDMA_PPE2_RST 31
+
+/* ETHWARP Subsystem resets */
+#define ETHWARP_GSW_RST 9
+#define ETHWARP_EIP197_RST 10
+#define ETHWARP_WOCPU0_RST 32
+#define ETHWARP_WOCPU1_RST 33
+#define ETHWARP_WOCPU2_RST 34
+#define ETHWARP_WOX_NET_MUX_RST 35
+#define ETHWARP_WED0_RST 36
+#define ETHWARP_WED1_RST 37
+#define ETHWARP_WED2_RST 38
+
+#endif /* _DT_BINDINGS_MTK_RESET_H_ */

View File

@@ -0,0 +1,37 @@
From 783c46d29f8b186bd65f3e83f38ad883e8bcec69 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:42 +0800
Subject: [PATCH 13/29] pinctrl: mediatek: fix the return value in driving
configuration functions
The original mediatek pinctrl functions for driving configuration
'mtk_pinconf_drive_set_*' do not return -ENOSUPP even if input
parameters are not supported.
This patch fixes the return value in those functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -513,7 +513,7 @@ int mtk_pinconf_drive_set_v0(struct udev
return err;
}
- return 0;
+ return err;
}
int mtk_pinconf_drive_set_v1(struct udevice *dev, u32 pin, u32 arg)
@@ -531,7 +531,7 @@ int mtk_pinconf_drive_set_v1(struct udev
return err;
}
- return 0;
+ return err;
}
int mtk_pinconf_drive_set(struct udevice *dev, u32 pin, u32 arg)

View File

@@ -0,0 +1,43 @@
From 090351b416e57e0f7b5d1a4c87d4ed9ab4f5c89b Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:46 +0800
Subject: [PATCH 14/29] pinctrl: mediatek: add pinmux_set ops support
This patch adds pinmux_set ops for mediatek pinctrl framework
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -304,6 +304,19 @@ static const char *mtk_get_function_name
return priv->soc->funcs[selector].name;
}
+static int mtk_pinmux_set(struct udevice *dev, unsigned int pin_selector,
+ unsigned int func_selector)
+{
+ int err;
+
+ err = mtk_hw_set_value(dev, pin_selector, PINCTRL_PIN_REG_MODE,
+ func_selector);
+ if (err)
+ return err;
+
+ return 0;
+}
+
static int mtk_pinmux_group_set(struct udevice *dev,
unsigned int group_selector,
unsigned int func_selector)
@@ -647,6 +660,7 @@ const struct pinctrl_ops mtk_pinctrl_ops
.get_group_name = mtk_get_group_name,
.get_functions_count = mtk_get_functions_count,
.get_function_name = mtk_get_function_name,
+ .pinmux_set = mtk_pinmux_set,
.pinmux_group_set = mtk_pinmux_group_set,
#if CONFIG_IS_ENABLED(PINCONF)
.pinconf_num_params = ARRAY_SIZE(mtk_conf_params),

View File

@@ -0,0 +1,138 @@
From a0405999ebecf21ed9f76f1dc9420682cd3feba0 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:54 +0800
Subject: [PATCH 16/29] net: mediatek: connect switch to PSE only when starting
eth is requested
So far the switch is initialized in probe stage and is connected to PSE
unconditionally. This will cause all packets being flooded to PSE and may
cause PSE hang before entering linux.
This patch changes the connection between switch and PSE:
- Still initialize switch in probe stage, but disconnect it with PSE
- Connect switch with PSE on eth start
- Disconnect on eth stop
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 44 ++++++++++++++++++++++++++++++++++++++++---
1 file changed, 41 insertions(+), 3 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -123,8 +123,10 @@ struct mtk_eth_priv {
enum mtk_switch sw;
int (*switch_init)(struct mtk_eth_priv *priv);
+ void (*switch_mac_control)(struct mtk_eth_priv *priv, bool enable);
u32 mt753x_smi_addr;
u32 mt753x_phy_base;
+ u32 mt753x_pmcr;
struct gpio_desc rst_gpio;
int mcm;
@@ -613,6 +615,16 @@ static int mt7530_pad_clk_setup(struct m
return 0;
}
+static void mt7530_mac_control(struct mtk_eth_priv *priv, bool enable)
+{
+ u32 pmcr = FORCE_MODE;
+
+ if (enable)
+ pmcr = priv->mt753x_pmcr;
+
+ mt753x_reg_write(priv, PMCR_REG(6), pmcr);
+}
+
static int mt7530_setup(struct mtk_eth_priv *priv)
{
u16 phy_addr, phy_val;
@@ -663,11 +675,14 @@ static int mt7530_setup(struct mtk_eth_p
FORCE_DPX | FORCE_LINK;
/* MT7530 Port6: Forced 1000M/FD, FC disabled */
- mt753x_reg_write(priv, PMCR_REG(6), val);
+ priv->mt753x_pmcr = val;
/* MT7530 Port5: Forced link down */
mt753x_reg_write(priv, PMCR_REG(5), FORCE_MODE);
+ /* Keep MAC link down before starting eth */
+ mt753x_reg_write(priv, PMCR_REG(6), FORCE_MODE);
+
/* MT7530 Port6: Set to RGMII */
mt753x_reg_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_M, P6_INTF_MODE_RGMII);
@@ -823,6 +838,17 @@ static void mt7531_phy_setting(struct mt
}
}
+static void mt7531_mac_control(struct mtk_eth_priv *priv, bool enable)
+{
+ u32 pmcr = FORCE_MODE_LNK;
+
+ if (enable)
+ pmcr = priv->mt753x_pmcr;
+
+ mt753x_reg_write(priv, PMCR_REG(5), pmcr);
+ mt753x_reg_write(priv, PMCR_REG(6), pmcr);
+}
+
static int mt7531_setup(struct mtk_eth_priv *priv)
{
u16 phy_addr, phy_val;
@@ -882,8 +908,11 @@ static int mt7531_setup(struct mtk_eth_p
(SPEED_1000M << FORCE_SPD_S) | FORCE_DPX |
FORCE_LINK;
- mt753x_reg_write(priv, PMCR_REG(5), pmcr);
- mt753x_reg_write(priv, PMCR_REG(6), pmcr);
+ priv->mt753x_pmcr = pmcr;
+
+ /* Keep MAC link down before starting eth */
+ mt753x_reg_write(priv, PMCR_REG(5), FORCE_MODE_LNK);
+ mt753x_reg_write(priv, PMCR_REG(6), FORCE_MODE_LNK);
/* Turn on PHYs */
for (i = 0; i < MT753X_NUM_PHYS; i++) {
@@ -1227,6 +1256,9 @@ static int mtk_eth_start(struct udevice
mtk_eth_fifo_init(priv);
+ if (priv->switch_mac_control)
+ priv->switch_mac_control(priv, true);
+
/* Start PHY */
if (priv->sw == SW_NONE) {
ret = mtk_phy_start(priv);
@@ -1245,6 +1277,9 @@ static void mtk_eth_stop(struct udevice
{
struct mtk_eth_priv *priv = dev_get_priv(dev);
+ if (priv->switch_mac_control)
+ priv->switch_mac_control(priv, false);
+
mtk_pdma_rmw(priv, PDMA_GLO_CFG_REG,
TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN, 0);
udelay(500);
@@ -1484,16 +1519,19 @@ static int mtk_eth_of_to_plat(struct ude
/* check for switch first, otherwise phy will be used */
priv->sw = SW_NONE;
priv->switch_init = NULL;
+ priv->switch_mac_control = NULL;
str = dev_read_string(dev, "mediatek,switch");
if (str) {
if (!strcmp(str, "mt7530")) {
priv->sw = SW_MT7530;
priv->switch_init = mt7530_setup;
+ priv->switch_mac_control = mt7530_mac_control;
priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
} else if (!strcmp(str, "mt7531")) {
priv->sw = SW_MT7531;
priv->switch_init = mt7531_setup;
+ priv->switch_mac_control = mt7531_mac_control;
priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
} else {
printf("error: unsupported switch\n");

View File

@@ -0,0 +1,56 @@
From d9a52701f6677889cc3332ab7a888f35cd69cc76 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:16:59 +0800
Subject: [PATCH 17/29] net: mediatek: optimize the switch reset delay wait
time
Not all switches requires 1 second delay after deasserting reset.
MT7531 requires only maximum 200ms.
This patch defines dedicated reset wait time for each switch chip, and will
significantly improve the boot time for boards using MT7531.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -127,6 +127,7 @@ struct mtk_eth_priv {
u32 mt753x_smi_addr;
u32 mt753x_phy_base;
u32 mt753x_pmcr;
+ u32 mt753x_reset_wait_time;
struct gpio_desc rst_gpio;
int mcm;
@@ -943,12 +944,12 @@ int mt753x_switch_init(struct mtk_eth_pr
reset_assert(&priv->rst_mcm);
udelay(1000);
reset_deassert(&priv->rst_mcm);
- mdelay(1000);
+ mdelay(priv->mt753x_reset_wait_time);
} else if (dm_gpio_is_valid(&priv->rst_gpio)) {
dm_gpio_set_value(&priv->rst_gpio, 0);
udelay(1000);
dm_gpio_set_value(&priv->rst_gpio, 1);
- mdelay(1000);
+ mdelay(priv->mt753x_reset_wait_time);
}
ret = priv->switch_init(priv);
@@ -1528,11 +1529,13 @@ static int mtk_eth_of_to_plat(struct ude
priv->switch_init = mt7530_setup;
priv->switch_mac_control = mt7530_mac_control;
priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
+ priv->mt753x_reset_wait_time = 1000;
} else if (!strcmp(str, "mt7531")) {
priv->sw = SW_MT7531;
priv->switch_init = mt7531_setup;
priv->switch_mac_control = mt7531_mac_control;
priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
+ priv->mt753x_reset_wait_time = 200;
} else {
printf("error: unsupported switch\n");
return -EINVAL;

View File

@@ -0,0 +1,34 @@
From c44f6ac1a31961b0d4faf982ee42167de5ac1672 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:03 +0800
Subject: [PATCH 18/29] net: mediatek: fix direct MDIO clause 45 access via SoC
The original direct MDIO clause 45 access via SoC is missing the
data output. This patch adds it back to ensure MDIO clause 45 can
work properly for external PHYs.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -198,7 +198,7 @@ static int mtk_mii_rw(struct mtk_eth_pri
(((u32)phy << MDIO_PHY_ADDR_S) & MDIO_PHY_ADDR_M) |
(((u32)reg << MDIO_REG_ADDR_S) & MDIO_REG_ADDR_M);
- if (cmd == MDIO_CMD_WRITE)
+ if (cmd == MDIO_CMD_WRITE || cmd == MDIO_CMD_ADDR)
val |= data & MDIO_RW_DATA_M;
mtk_gmac_write(priv, GMAC_PIAC_REG, val | PHY_ACS_ST);
@@ -210,7 +210,7 @@ static int mtk_mii_rw(struct mtk_eth_pri
return ret;
}
- if (cmd == MDIO_CMD_READ) {
+ if (cmd == MDIO_CMD_READ || cmd == MDIO_CMD_READ_C45) {
val = mtk_gmac_read(priv, GMAC_PIAC_REG);
return val & MDIO_RW_DATA_M;
}

View File

@@ -0,0 +1,36 @@
From 9d35558bedfb82860c63cc11d3426afcbd82cb5c Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:07 +0800
Subject: [PATCH 19/29] net: mediatek: add missing static qualifier
mt7531_mmd_ind_read and mt753x_switch_init are defined without static.
Since they're not used outside this file, we should add them back.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
fixup to add static qualifier
---
drivers/net/mtk_eth.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -436,7 +436,8 @@ static int mt7531_mii_ind_write(struct m
MDIO_ST_C22);
}
-int mt7531_mmd_ind_read(struct mtk_eth_priv *priv, u8 addr, u8 devad, u16 reg)
+static int mt7531_mmd_ind_read(struct mtk_eth_priv *priv, u8 addr, u8 devad,
+ u16 reg)
{
u8 phy_addr;
int ret;
@@ -934,7 +935,7 @@ static int mt7531_setup(struct mtk_eth_p
return 0;
}
-int mt753x_switch_init(struct mtk_eth_priv *priv)
+static int mt753x_switch_init(struct mtk_eth_priv *priv)
{
int ret;
int i;

View File

@@ -0,0 +1,149 @@
From 8e59c3cc700a6efb8db574f3c8e18b6181b4a07d Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:13 +0800
Subject: [PATCH 20/29] net: mediatek: add support for SGMII 1Gbps
auto-negotiation mode
Existing SGMII support of mtk-eth is actually a MediaTek-specific
2.5Gbps high-speed SGMII (HSGMII) which does not support
auto-negotiation mode.
This patch adds SGMII 1Gbps auto-negotiation mode and rename the
existing HSGMII to 2500basex.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 46 +++++++++++++++++++++++++++++++++++++------
drivers/net/mtk_eth.h | 2 ++
2 files changed, 42 insertions(+), 6 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -893,7 +893,7 @@ static int mt7531_setup(struct mtk_eth_p
if (!port5_sgmii)
mt7531_port_rgmii_init(priv, 5);
break;
- case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_2500BASEX:
mt7531_port_sgmii_init(priv, 6);
if (port5_sgmii)
mt7531_port_sgmii_init(priv, 5);
@@ -986,6 +986,7 @@ static void mtk_phy_link_adjust(struct m
(MAC_RX_PKT_LEN_1536 << MAC_RX_PKT_LEN_S) |
MAC_MODE | FORCE_MODE |
MAC_TX_EN | MAC_RX_EN |
+ DEL_RXFIFO_CLR |
BKOFF_EN | BACKPR_EN;
switch (priv->phydev->speed) {
@@ -996,6 +997,7 @@ static void mtk_phy_link_adjust(struct m
mcr |= (SPEED_100M << FORCE_SPD_S);
break;
case SPEED_1000:
+ case SPEED_2500:
mcr |= (SPEED_1000M << FORCE_SPD_S);
break;
};
@@ -1048,7 +1050,8 @@ static int mtk_phy_start(struct mtk_eth_
return 0;
}
- mtk_phy_link_adjust(priv);
+ if (!priv->force_mode)
+ mtk_phy_link_adjust(priv);
debug("Speed: %d, %s duplex%s\n", phydev->speed,
(phydev->duplex) ? "full" : "half",
@@ -1076,7 +1079,31 @@ static int mtk_phy_probe(struct udevice
return 0;
}
-static void mtk_sgmii_init(struct mtk_eth_priv *priv)
+static void mtk_sgmii_an_init(struct mtk_eth_priv *priv)
+{
+ /* Set SGMII GEN1 speed(1G) */
+ clrsetbits_le32(priv->sgmii_base + priv->soc->ana_rgc3,
+ SGMSYS_SPEED_2500, 0);
+
+ /* Enable SGMII AN */
+ setbits_le32(priv->sgmii_base + SGMSYS_PCS_CONTROL_1,
+ SGMII_AN_ENABLE);
+
+ /* SGMII AN mode setting */
+ writel(SGMII_AN_MODE, priv->sgmii_base + SGMSYS_SGMII_MODE);
+
+ /* SGMII PN SWAP setting */
+ if (priv->pn_swap) {
+ setbits_le32(priv->sgmii_base + SGMSYS_QPHY_WRAP_CTRL,
+ SGMII_PN_SWAP_TX_RX);
+ }
+
+ /* Release PHYA power down state */
+ clrsetbits_le32(priv->sgmii_base + SGMSYS_QPHY_PWR_STATE_CTRL,
+ SGMII_PHYA_PWD, 0);
+}
+
+static void mtk_sgmii_force_init(struct mtk_eth_priv *priv)
{
/* Set SGMII GEN2 speed(2.5G) */
setbits_le32(priv->sgmii_base + priv->soc->ana_rgc3,
@@ -1111,10 +1138,14 @@ static void mtk_mac_init(struct mtk_eth_
ge_mode = GE_MODE_RGMII;
break;
case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_2500BASEX:
ge_mode = GE_MODE_RGMII;
mtk_ethsys_rmw(priv, ETHSYS_SYSCFG0_REG, SYSCFG0_SGMII_SEL_M,
SYSCFG0_SGMII_SEL(priv->gmac_id));
- mtk_sgmii_init(priv);
+ if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII)
+ mtk_sgmii_an_init(priv);
+ else
+ mtk_sgmii_force_init(priv);
break;
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_GMII:
@@ -1148,6 +1179,7 @@ static void mtk_mac_init(struct mtk_eth_
mcr |= SPEED_100M << FORCE_SPD_S;
break;
case SPEED_1000:
+ case SPEED_2500:
mcr |= SPEED_1000M << FORCE_SPD_S;
break;
}
@@ -1490,13 +1522,15 @@ static int mtk_eth_of_to_plat(struct ude
priv->duplex = ofnode_read_bool(subnode, "full-duplex");
if (priv->speed != SPEED_10 && priv->speed != SPEED_100 &&
- priv->speed != SPEED_1000) {
+ priv->speed != SPEED_1000 && priv->speed != SPEED_2500 &&
+ priv->speed != SPEED_10000) {
printf("error: no valid speed set in fixed-link\n");
return -EINVAL;
}
}
- if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII) {
+ if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII ||
+ priv->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
/* get corresponding sgmii phandle */
ret = dev_read_phandle_with_args(dev, "mediatek,sgmiisys",
NULL, 0, 0, &args);
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -69,6 +69,7 @@ enum mkt_eth_capabilities {
#define SGMII_AN_RESTART BIT(9)
#define SGMSYS_SGMII_MODE 0x20
+#define SGMII_AN_MODE 0x31120103
#define SGMII_FORCE_MODE 0x31120019
#define SGMSYS_QPHY_PWR_STATE_CTRL 0xe8
@@ -168,6 +169,7 @@ enum mkt_eth_capabilities {
#define FORCE_MODE BIT(15)
#define MAC_TX_EN BIT(14)
#define MAC_RX_EN BIT(13)
+#define DEL_RXFIFO_CLR BIT(12)
#define BKOFF_EN BIT(9)
#define BACKPR_EN BIT(8)
#define FORCE_RX_FC BIT(5)

View File

@@ -0,0 +1,214 @@
From 64ef7e977767e3b1305fb94a5169d8b7d3b19b6c Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:18 +0800
Subject: [PATCH 21/29] arm: dts: mediatek: convert gmac link mode to
2500base-x
Now that individual 2.5Gbps SGMII support has been added to
mtk-eth, all boards that use 2.5Gbps link with mt7531 must be
converted to use "2500base-x" instead of "sgmii".
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[also convert BPi-R3]
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
arch/arm/dts/mt7622-bananapi-bpi-r64.dts | 4 ++--
arch/arm/dts/mt7622-rfb.dts | 4 ++--
arch/arm/dts/mt7629-rfb.dts | 4 ++--
arch/arm/dts/mt7981-emmc-rfb.dts | 4 ++--
arch/arm/dts/mt7981-rfb.dts | 4 ++--
arch/arm/dts/mt7981-sd-rfb.dts | 4 ++--
arch/arm/dts/mt7986a-bpi-r3-sd.dts | 4 ++--
arch/arm/dts/mt7986a-rfb.dts | 4 ++--
arch/arm/dts/mt7986a-sd-rfb.dts | 4 ++--
arch/arm/dts/mt7986b-rfb.dts | 4 ++--
arch/arm/dts/mt7986b-sd-rfb.dts | 4 ++--
11 files changed, 22 insertions(+), 22 deletions(-)
--- a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts
@@ -224,12 +224,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7622-rfb.dts
+++ b/arch/arm/dts/mt7622-rfb.dts
@@ -240,12 +240,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -25,12 +25,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7981-emmc-rfb.dts
+++ b/arch/arm/dts/mt7981-emmc-rfb.dts
@@ -46,12 +46,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7981-rfb.dts
+++ b/arch/arm/dts/mt7981-rfb.dts
@@ -37,12 +37,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7981-sd-rfb.dts
+++ b/arch/arm/dts/mt7981-sd-rfb.dts
@@ -46,12 +46,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7986a-bpi-r3-sd.dts
+++ b/arch/arm/dts/mt7986a-bpi-r3-sd.dts
@@ -76,12 +76,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7986a-rfb.dts
+++ b/arch/arm/dts/mt7986a-rfb.dts
@@ -55,12 +55,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7986a-sd-rfb.dts
+++ b/arch/arm/dts/mt7986a-sd-rfb.dts
@@ -47,12 +47,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7986b-rfb.dts
+++ b/arch/arm/dts/mt7986b-rfb.dts
@@ -46,12 +46,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};
--- a/arch/arm/dts/mt7986b-sd-rfb.dts
+++ b/arch/arm/dts/mt7986b-sd-rfb.dts
@@ -47,12 +47,12 @@
&eth {
status = "okay";
mediatek,gmac-id = <0>;
- phy-mode = "sgmii";
+ phy-mode = "2500base-x";
mediatek,switch = "mt7531";
reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
fixed-link {
- speed = <1000>;
+ speed = <2500>;
full-duplex;
};
};

View File

@@ -0,0 +1,138 @@
From 542d455466bdf32e1bb70230ebcdefd8ed09643b Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:22 +0800
Subject: [PATCH 22/29] net: mediatek: add support for GMAC/USB3 PHY mux mode
for MT7981
MT7981 has its GMAC2 PHY shared with USB3. To enable GMAC2, mux
register must be set to connect the SGMII phy to GMAC2.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 33 ++++++++++++++++++++++++++++++++-
drivers/net/mtk_eth.h | 16 ++++++++++++++++
2 files changed, 48 insertions(+), 1 deletion(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -103,6 +103,8 @@ struct mtk_eth_priv {
struct regmap *ethsys_regmap;
+ struct regmap *infra_regmap;
+
struct mii_dev *mdio_bus;
int (*mii_read)(struct mtk_eth_priv *priv, u8 phy, u8 reg);
int (*mii_write)(struct mtk_eth_priv *priv, u8 phy, u8 reg, u16 val);
@@ -186,6 +188,17 @@ static void mtk_ethsys_rmw(struct mtk_et
regmap_write(priv->ethsys_regmap, reg, val);
}
+static void mtk_infra_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr,
+ u32 set)
+{
+ uint val;
+
+ regmap_read(priv->infra_regmap, reg, &val);
+ val &= ~clr;
+ val |= set;
+ regmap_write(priv->infra_regmap, reg, val);
+}
+
/* Direct MDIO clause 22/45 access via SoC */
static int mtk_mii_rw(struct mtk_eth_priv *priv, u8 phy, u8 reg, u16 data,
u32 cmd, u32 st)
@@ -1139,6 +1152,11 @@ static void mtk_mac_init(struct mtk_eth_
break;
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_2500BASEX:
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_GMAC2_U3_QPHY)) {
+ mtk_infra_rmw(priv, USB_PHY_SWITCH_REG, QPHY_SEL_MASK,
+ SGMII_QPHY_SEL);
+ }
+
ge_mode = GE_MODE_RGMII;
mtk_ethsys_rmw(priv, ETHSYS_SYSCFG0_REG, SYSCFG0_SGMII_SEL_M,
SYSCFG0_SGMII_SEL(priv->gmac_id));
@@ -1497,6 +1515,19 @@ static int mtk_eth_of_to_plat(struct ude
if (IS_ERR(priv->ethsys_regmap))
return PTR_ERR(priv->ethsys_regmap);
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_INFRA)) {
+ /* get corresponding infracfg phandle */
+ ret = dev_read_phandle_with_args(dev, "mediatek,infracfg",
+ NULL, 0, 0, &args);
+
+ if (ret)
+ return ret;
+
+ priv->infra_regmap = syscon_node_to_regmap(args.node);
+ if (IS_ERR(priv->infra_regmap))
+ return PTR_ERR(priv->infra_regmap);
+ }
+
/* Reset controllers */
ret = reset_get_by_name(dev, "fe", &priv->rst_fe);
if (ret) {
@@ -1614,7 +1645,7 @@ static const struct mtk_soc_data mt7986_
};
static const struct mtk_soc_data mt7981_data = {
- .caps = MT7986_CAPS,
+ .caps = MT7981_CAPS,
.ana_rgc3 = 0x128,
.pdma_base = PDMA_V2_BASE,
.txd_size = sizeof(struct mtk_tx_dma_v2),
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -15,27 +15,38 @@
enum mkt_eth_capabilities {
MTK_TRGMII_BIT,
MTK_TRGMII_MT7621_CLK_BIT,
+ MTK_U3_COPHY_V2_BIT,
+ MTK_INFRA_BIT,
MTK_NETSYS_V2_BIT,
/* PATH BITS */
MTK_ETH_PATH_GMAC1_TRGMII_BIT,
+ MTK_ETH_PATH_GMAC2_SGMII_BIT,
};
#define MTK_TRGMII BIT(MTK_TRGMII_BIT)
#define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT)
+#define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT)
+#define MTK_INFRA BIT(MTK_INFRA_BIT)
#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT)
/* Supported path present on SoCs */
#define MTK_ETH_PATH_GMAC1_TRGMII BIT(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
+#define MTK_ETH_PATH_GMAC2_SGMII BIT(MTK_ETH_PATH_GMAC2_SGMII_BIT)
+
#define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII)
+#define MTK_GMAC2_U3_QPHY (MTK_ETH_PATH_GMAC2_SGMII | MTK_U3_COPHY_V2 | MTK_INFRA)
+
#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x))
#define MT7621_CAPS (MTK_GMAC1_TRGMII | MTK_TRGMII_MT7621_CLK)
#define MT7623_CAPS (MTK_GMAC1_TRGMII)
+#define MT7981_CAPS (MTK_GMAC2_U3_QPHY | MTK_NETSYS_V2)
+
#define MT7986_CAPS (MTK_NETSYS_V2)
/* Frame Engine Register Bases */
@@ -56,6 +67,11 @@ enum mkt_eth_capabilities {
#define ETHSYS_CLKCFG0_REG 0x2c
#define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11)
+/* Top misc registers */
+#define USB_PHY_SWITCH_REG 0x218
+#define QPHY_SEL_MASK 0x3
+#define SGMII_QPHY_SEL 0x2
+
/* SYSCFG0_GE_MODE: GE Modes */
#define GE_MODE_RGMII 0
#define GE_MODE_MII 1

View File

@@ -0,0 +1,36 @@
From 64dab5fc8405005a78bdf1e0035d8b754cdf0c7e Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:27 +0800
Subject: [PATCH 23/29] arm: dts: mediatek: add infracfg registers to support
GMAC/USB3 Co-PHY
This patch adds infracfg to eth node to support enabling GMAC2.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/mt7981.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -266,6 +266,7 @@
reset-names = "fe";
mediatek,ethsys = <&ethsys>;
mediatek,sgmiisys = <&sgmiisys0>;
+ mediatek,infracfg = <&topmisc>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -284,6 +285,12 @@
#clock-cells = <1>;
};
+ topmisc: topmisc@11d10000 {
+ compatible = "mediatek,mt7981-topmisc", "syscon";
+ reg = <0x11d10000 0x10000>;
+ #clock-cells = <1>;
+ };
+
spi0: spi@1100a000 {
compatible = "mediatek,ipm-spi";
reg = <0x1100a000 0x100>;

View File

@@ -0,0 +1,341 @@
From d62b483092035bc86d1db83ea4ac29bfa7bba77d Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:31 +0800
Subject: [PATCH 24/29] net: mediatek: add USXGMII support
This patch adds support for USXGMII of SoC.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 230 +++++++++++++++++++++++++++++++++++++++++-
drivers/net/mtk_eth.h | 24 +++++
2 files changed, 251 insertions(+), 3 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -105,6 +105,11 @@ struct mtk_eth_priv {
struct regmap *infra_regmap;
+ struct regmap *usxgmii_regmap;
+ struct regmap *xfi_pextp_regmap;
+ struct regmap *xfi_pll_regmap;
+ struct regmap *toprgu_regmap;
+
struct mii_dev *mdio_bus;
int (*mii_read)(struct mtk_eth_priv *priv, u8 phy, u8 reg);
int (*mii_write)(struct mtk_eth_priv *priv, u8 phy, u8 reg, u16 val);
@@ -989,6 +994,42 @@ static int mt753x_switch_init(struct mtk
return 0;
}
+static void mtk_xphy_link_adjust(struct mtk_eth_priv *priv)
+{
+ u16 lcl_adv = 0, rmt_adv = 0;
+ u8 flowctrl;
+ u32 mcr;
+
+ mcr = mtk_gmac_read(priv, XGMAC_PORT_MCR(priv->gmac_id));
+ mcr &= ~(XGMAC_FORCE_TX_FC | XGMAC_FORCE_RX_FC);
+
+ if (priv->phydev->duplex) {
+ if (priv->phydev->pause)
+ rmt_adv = LPA_PAUSE_CAP;
+ if (priv->phydev->asym_pause)
+ rmt_adv |= LPA_PAUSE_ASYM;
+
+ if (priv->phydev->advertising & ADVERTISED_Pause)
+ lcl_adv |= ADVERTISE_PAUSE_CAP;
+ if (priv->phydev->advertising & ADVERTISED_Asym_Pause)
+ lcl_adv |= ADVERTISE_PAUSE_ASYM;
+
+ flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
+
+ if (flowctrl & FLOW_CTRL_TX)
+ mcr |= XGMAC_FORCE_TX_FC;
+ if (flowctrl & FLOW_CTRL_RX)
+ mcr |= XGMAC_FORCE_RX_FC;
+
+ debug("rx pause %s, tx pause %s\n",
+ flowctrl & FLOW_CTRL_RX ? "enabled" : "disabled",
+ flowctrl & FLOW_CTRL_TX ? "enabled" : "disabled");
+ }
+
+ mcr &= ~(XGMAC_TRX_DISABLE);
+ mtk_gmac_write(priv, XGMAC_PORT_MCR(priv->gmac_id), mcr);
+}
+
static void mtk_phy_link_adjust(struct mtk_eth_priv *priv)
{
u16 lcl_adv = 0, rmt_adv = 0;
@@ -1063,8 +1104,12 @@ static int mtk_phy_start(struct mtk_eth_
return 0;
}
- if (!priv->force_mode)
- mtk_phy_link_adjust(priv);
+ if (!priv->force_mode) {
+ if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII)
+ mtk_xphy_link_adjust(priv);
+ else
+ mtk_phy_link_adjust(priv);
+ }
debug("Speed: %d, %s duplex%s\n", phydev->speed,
(phydev->duplex) ? "full" : "half",
@@ -1140,6 +1185,112 @@ static void mtk_sgmii_force_init(struct
SGMII_PHYA_PWD, 0);
}
+static void mtk_xfi_pll_enable(struct mtk_eth_priv *priv)
+{
+ u32 val = 0;
+
+ /* Add software workaround for USXGMII PLL TCL issue */
+ regmap_write(priv->xfi_pll_regmap, XFI_PLL_ANA_GLB8,
+ RG_XFI_PLL_ANA_SWWA);
+
+ regmap_read(priv->xfi_pll_regmap, XFI_PLL_DIG_GLB8, &val);
+ val |= RG_XFI_PLL_EN;
+ regmap_write(priv->xfi_pll_regmap, XFI_PLL_DIG_GLB8, val);
+}
+
+static void mtk_usxgmii_reset(struct mtk_eth_priv *priv)
+{
+ switch (priv->gmac_id) {
+ case 1:
+ regmap_write(priv->toprgu_regmap, 0xFC, 0x0000A004);
+ regmap_write(priv->toprgu_regmap, 0x18, 0x88F0A004);
+ regmap_write(priv->toprgu_regmap, 0xFC, 0x00000000);
+ regmap_write(priv->toprgu_regmap, 0x18, 0x88F00000);
+ regmap_write(priv->toprgu_regmap, 0x18, 0x00F00000);
+ break;
+ case 2:
+ regmap_write(priv->toprgu_regmap, 0xFC, 0x00005002);
+ regmap_write(priv->toprgu_regmap, 0x18, 0x88F05002);
+ regmap_write(priv->toprgu_regmap, 0xFC, 0x00000000);
+ regmap_write(priv->toprgu_regmap, 0x18, 0x88F00000);
+ regmap_write(priv->toprgu_regmap, 0x18, 0x00F00000);
+ break;
+ }
+
+ mdelay(10);
+}
+
+static void mtk_usxgmii_setup_phya_an_10000(struct mtk_eth_priv *priv)
+{
+ regmap_write(priv->usxgmii_regmap, 0x810, 0x000FFE6D);
+ regmap_write(priv->usxgmii_regmap, 0x818, 0x07B1EC7B);
+ regmap_write(priv->usxgmii_regmap, 0x80C, 0x30000000);
+ ndelay(1020);
+ regmap_write(priv->usxgmii_regmap, 0x80C, 0x10000000);
+ ndelay(1020);
+ regmap_write(priv->usxgmii_regmap, 0x80C, 0x00000000);
+
+ regmap_write(priv->xfi_pextp_regmap, 0x9024, 0x00C9071C);
+ regmap_write(priv->xfi_pextp_regmap, 0x2020, 0xAA8585AA);
+ regmap_write(priv->xfi_pextp_regmap, 0x2030, 0x0C020707);
+ regmap_write(priv->xfi_pextp_regmap, 0x2034, 0x0E050F0F);
+ regmap_write(priv->xfi_pextp_regmap, 0x2040, 0x00140032);
+ regmap_write(priv->xfi_pextp_regmap, 0x50F0, 0x00C014AA);
+ regmap_write(priv->xfi_pextp_regmap, 0x50E0, 0x3777C12B);
+ regmap_write(priv->xfi_pextp_regmap, 0x506C, 0x005F9CFF);
+ regmap_write(priv->xfi_pextp_regmap, 0x5070, 0x9D9DFAFA);
+ regmap_write(priv->xfi_pextp_regmap, 0x5074, 0x27273F3F);
+ regmap_write(priv->xfi_pextp_regmap, 0x5078, 0xA7883C68);
+ regmap_write(priv->xfi_pextp_regmap, 0x507C, 0x11661166);
+ regmap_write(priv->xfi_pextp_regmap, 0x5080, 0x0E000AAF);
+ regmap_write(priv->xfi_pextp_regmap, 0x5084, 0x08080D0D);
+ regmap_write(priv->xfi_pextp_regmap, 0x5088, 0x02030909);
+ regmap_write(priv->xfi_pextp_regmap, 0x50E4, 0x0C0C0000);
+ regmap_write(priv->xfi_pextp_regmap, 0x50E8, 0x04040000);
+ regmap_write(priv->xfi_pextp_regmap, 0x50EC, 0x0F0F0C06);
+ regmap_write(priv->xfi_pextp_regmap, 0x50A8, 0x506E8C8C);
+ regmap_write(priv->xfi_pextp_regmap, 0x6004, 0x18190000);
+ regmap_write(priv->xfi_pextp_regmap, 0x00F8, 0x01423342);
+ regmap_write(priv->xfi_pextp_regmap, 0x00F4, 0x80201F20);
+ regmap_write(priv->xfi_pextp_regmap, 0x0030, 0x00050C00);
+ regmap_write(priv->xfi_pextp_regmap, 0x0070, 0x02002800);
+ ndelay(1020);
+ regmap_write(priv->xfi_pextp_regmap, 0x30B0, 0x00000020);
+ regmap_write(priv->xfi_pextp_regmap, 0x3028, 0x00008A01);
+ regmap_write(priv->xfi_pextp_regmap, 0x302C, 0x0000A884);
+ regmap_write(priv->xfi_pextp_regmap, 0x3024, 0x00083002);
+ regmap_write(priv->xfi_pextp_regmap, 0x3010, 0x00022220);
+ regmap_write(priv->xfi_pextp_regmap, 0x5064, 0x0F020A01);
+ regmap_write(priv->xfi_pextp_regmap, 0x50B4, 0x06100600);
+ regmap_write(priv->xfi_pextp_regmap, 0x3048, 0x40704000);
+ regmap_write(priv->xfi_pextp_regmap, 0x3050, 0xA8000000);
+ regmap_write(priv->xfi_pextp_regmap, 0x3054, 0x000000AA);
+ regmap_write(priv->xfi_pextp_regmap, 0x306C, 0x00000F00);
+ regmap_write(priv->xfi_pextp_regmap, 0xA060, 0x00040000);
+ regmap_write(priv->xfi_pextp_regmap, 0x90D0, 0x00000001);
+ regmap_write(priv->xfi_pextp_regmap, 0x0070, 0x0200E800);
+ udelay(150);
+ regmap_write(priv->xfi_pextp_regmap, 0x0070, 0x0200C111);
+ ndelay(1020);
+ regmap_write(priv->xfi_pextp_regmap, 0x0070, 0x0200C101);
+ udelay(15);
+ regmap_write(priv->xfi_pextp_regmap, 0x0070, 0x0202C111);
+ ndelay(1020);
+ regmap_write(priv->xfi_pextp_regmap, 0x0070, 0x0202C101);
+ udelay(100);
+ regmap_write(priv->xfi_pextp_regmap, 0x30B0, 0x00000030);
+ regmap_write(priv->xfi_pextp_regmap, 0x00F4, 0x80201F00);
+ regmap_write(priv->xfi_pextp_regmap, 0x3040, 0x30000000);
+ udelay(400);
+}
+
+static void mtk_usxgmii_an_init(struct mtk_eth_priv *priv)
+{
+ mtk_xfi_pll_enable(priv);
+ mtk_usxgmii_reset(priv);
+ mtk_usxgmii_setup_phya_an_10000(priv);
+}
+
static void mtk_mac_init(struct mtk_eth_priv *priv)
{
int i, ge_mode = 0;
@@ -1222,6 +1373,36 @@ static void mtk_mac_init(struct mtk_eth_
}
}
+static void mtk_xmac_init(struct mtk_eth_priv *priv)
+{
+ u32 sts;
+
+ switch (priv->phy_interface) {
+ case PHY_INTERFACE_MODE_USXGMII:
+ mtk_usxgmii_an_init(priv);
+ break;
+ default:
+ break;
+ }
+
+ /* Set GMAC to the correct mode */
+ mtk_ethsys_rmw(priv, ETHSYS_SYSCFG0_REG,
+ SYSCFG0_GE_MODE_M << SYSCFG0_GE_MODE_S(priv->gmac_id),
+ 0);
+
+ if (priv->gmac_id == 1) {
+ mtk_infra_rmw(priv, TOPMISC_NETSYS_PCS_MUX,
+ NETSYS_PCS_MUX_MASK, MUX_G2_USXGMII_SEL);
+ } else if (priv->gmac_id == 2) {
+ sts = mtk_gmac_read(priv, XGMAC_STS(priv->gmac_id));
+ sts |= XGMAC_FORCE_LINK;
+ mtk_gmac_write(priv, XGMAC_STS(priv->gmac_id), sts);
+ }
+
+ /* Force GMAC link down */
+ mtk_gmac_write(priv, GMAC_PORT_MCR(priv->gmac_id), FORCE_MODE);
+}
+
static void mtk_eth_fifo_init(struct mtk_eth_priv *priv)
{
char *pkt_base = priv->pkt_pool;
@@ -1463,7 +1644,10 @@ static int mtk_eth_probe(struct udevice
ARCH_DMA_MINALIGN);
/* Set MAC mode */
- mtk_mac_init(priv);
+ if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII)
+ mtk_xmac_init(priv);
+ else
+ mtk_mac_init(priv);
/* Probe phy if switch is not specified */
if (priv->sw == SW_NONE)
@@ -1581,6 +1765,46 @@ static int mtk_eth_of_to_plat(struct ude
}
priv->pn_swap = ofnode_read_bool(args.node, "pn_swap");
+ } else if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII) {
+ /* get corresponding usxgmii phandle */
+ ret = dev_read_phandle_with_args(dev, "mediatek,usxgmiisys",
+ NULL, 0, 0, &args);
+ if (ret)
+ return ret;
+
+ priv->usxgmii_regmap = syscon_node_to_regmap(args.node);
+ if (IS_ERR(priv->usxgmii_regmap))
+ return PTR_ERR(priv->usxgmii_regmap);
+
+ /* get corresponding xfi_pextp phandle */
+ ret = dev_read_phandle_with_args(dev, "mediatek,xfi_pextp",
+ NULL, 0, 0, &args);
+ if (ret)
+ return ret;
+
+ priv->xfi_pextp_regmap = syscon_node_to_regmap(args.node);
+ if (IS_ERR(priv->xfi_pextp_regmap))
+ return PTR_ERR(priv->xfi_pextp_regmap);
+
+ /* get corresponding xfi_pll phandle */
+ ret = dev_read_phandle_with_args(dev, "mediatek,xfi_pll",
+ NULL, 0, 0, &args);
+ if (ret)
+ return ret;
+
+ priv->xfi_pll_regmap = syscon_node_to_regmap(args.node);
+ if (IS_ERR(priv->xfi_pll_regmap))
+ return PTR_ERR(priv->xfi_pll_regmap);
+
+ /* get corresponding toprgu phandle */
+ ret = dev_read_phandle_with_args(dev, "mediatek,toprgu",
+ NULL, 0, 0, &args);
+ if (ret)
+ return ret;
+
+ priv->toprgu_regmap = syscon_node_to_regmap(args.node);
+ if (IS_ERR(priv->toprgu_regmap))
+ return PTR_ERR(priv->toprgu_regmap);
}
/* check for switch first, otherwise phy will be used */
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -68,6 +68,11 @@ enum mkt_eth_capabilities {
#define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11)
/* Top misc registers */
+#define TOPMISC_NETSYS_PCS_MUX 0x84
+#define NETSYS_PCS_MUX_MASK GENMASK(1, 0)
+#define MUX_G2_USXGMII_SEL BIT(1)
+#define MUX_HSGMII1_G1_SEL BIT(0)
+
#define USB_PHY_SWITCH_REG 0x218
#define QPHY_SEL_MASK 0x3
#define SGMII_QPHY_SEL 0x2
@@ -98,6 +103,15 @@ enum mkt_eth_capabilities {
#define SGMSYS_GEN2_SPEED_V2 0x128
#define SGMSYS_SPEED_2500 BIT(2)
+/* USXGMII subsystem config registers */
+/* Register to control USXGMII XFI PLL digital */
+#define XFI_PLL_DIG_GLB8 0x08
+#define RG_XFI_PLL_EN BIT(31)
+
+/* Register to control USXGMII XFI PLL analog */
+#define XFI_PLL_ANA_GLB8 0x108
+#define RG_XFI_PLL_ANA_SWWA 0x02283248
+
/* Frame Engine Registers */
#define FE_GLO_MISC_REG 0x124
#define PDMA_VER_V2 BIT(4)
@@ -221,6 +235,16 @@ enum mkt_eth_capabilities {
#define TD_DM_DRVP_S 0
#define TD_DM_DRVP_M 0x0f
+/* XGMAC Status Registers */
+#define XGMAC_STS(x) (((x) == 2) ? 0x001C : 0x000C)
+#define XGMAC_FORCE_LINK BIT(15)
+
+/* XGMAC Registers */
+#define XGMAC_PORT_MCR(x) (0x2000 + (((x) - 1) * 0x1000))
+#define XGMAC_TRX_DISABLE 0xf
+#define XGMAC_FORCE_TX_FC BIT(5)
+#define XGMAC_FORCE_RX_FC BIT(4)
+
/* MT7530 Registers */
#define PCR_REG(p) (0x2004 + (p) * 0x100)

View File

@@ -0,0 +1,221 @@
From 7d201749cc49a58fb5e791d1e099ec3e3489e16d Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:37 +0800
Subject: [PATCH 25/29] net: mediatek: add support for NETSYS v3
This patch adds support for NETSYS v3 hardware.
Comparing to NETSYS v2, NETSYS v3 has three GMACs.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 49 ++++++++++++++++++++++++++++++++-----------
drivers/net/mtk_eth.h | 7 +++++++
2 files changed, 44 insertions(+), 12 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -76,6 +76,7 @@ enum mtk_switch {
* @caps Flags shown the extra capability for the SoC
* @ana_rgc3: The offset for register ANA_RGC3 related to
* sgmiisys syscon
+ * @gdma_count: Number of GDMAs
* @pdma_base: Register base of PDMA block
* @txd_size: Tx DMA descriptor size.
* @rxd_size: Rx DMA descriptor size.
@@ -83,6 +84,7 @@ enum mtk_switch {
struct mtk_soc_data {
u32 caps;
u32 ana_rgc3;
+ u32 gdma_count;
u32 pdma_base;
u32 txd_size;
u32 rxd_size;
@@ -159,7 +161,9 @@ static void mtk_gdma_write(struct mtk_et
{
u32 gdma_base;
- if (no == 1)
+ if (no == 2)
+ gdma_base = GDMA3_BASE;
+ else if (no == 1)
gdma_base = GDMA2_BASE;
else
gdma_base = GDMA1_BASE;
@@ -1429,7 +1433,10 @@ static void mtk_eth_fifo_init(struct mtk
txd->txd1 = virt_to_phys(pkt_base);
txd->txd2 = PDMA_TXD2_DDONE | PDMA_TXD2_LS0;
- if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3))
+ txd->txd5 = PDMA_V2_TXD5_FPORT_SET(priv->gmac_id == 2 ?
+ 15 : priv->gmac_id + 1);
+ else if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
txd->txd5 = PDMA_V2_TXD5_FPORT_SET(priv->gmac_id + 1);
else
txd->txd4 = PDMA_V1_TXD4_FPORT_SET(priv->gmac_id + 1);
@@ -1442,7 +1449,8 @@ static void mtk_eth_fifo_init(struct mtk
rxd->rxd1 = virt_to_phys(pkt_base);
- if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2) ||
+ MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3))
rxd->rxd2 = PDMA_V2_RXD2_PLEN0_SET(PKTSIZE_ALIGN);
else
rxd->rxd2 = PDMA_V1_RXD2_PLEN0_SET(PKTSIZE_ALIGN);
@@ -1466,7 +1474,7 @@ static void mtk_eth_fifo_init(struct mtk
static int mtk_eth_start(struct udevice *dev)
{
struct mtk_eth_priv *priv = dev_get_priv(dev);
- int ret;
+ int i, ret;
/* Reset FE */
reset_assert(&priv->rst_fe);
@@ -1474,16 +1482,24 @@ static int mtk_eth_start(struct udevice
reset_deassert(&priv->rst_fe);
mdelay(10);
- if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2) ||
+ MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3))
setbits_le32(priv->fe_base + FE_GLO_MISC_REG, PDMA_VER_V2);
/* Packets forward to PDMA */
mtk_gdma_write(priv, priv->gmac_id, GDMA_IG_CTRL_REG, GDMA_FWD_TO_CPU);
- if (priv->gmac_id == 0)
- mtk_gdma_write(priv, 1, GDMA_IG_CTRL_REG, GDMA_FWD_DISCARD);
- else
- mtk_gdma_write(priv, 0, GDMA_IG_CTRL_REG, GDMA_FWD_DISCARD);
+ for (i = 0; i < priv->soc->gdma_count; i++) {
+ if (i == priv->gmac_id)
+ continue;
+
+ mtk_gdma_write(priv, i, GDMA_IG_CTRL_REG, GDMA_FWD_DISCARD);
+ }
+
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3)) {
+ mtk_gdma_write(priv, priv->gmac_id, GDMA_EG_CTRL_REG,
+ GDMA_CPU_BRIDGE_EN);
+ }
udelay(500);
@@ -1557,7 +1573,8 @@ static int mtk_eth_send(struct udevice *
flush_dcache_range((ulong)pkt_base, (ulong)pkt_base +
roundup(length, ARCH_DMA_MINALIGN));
- if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2) ||
+ MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3))
txd->txd2 = PDMA_TXD2_LS0 | PDMA_V2_TXD2_SDL0_SET(length);
else
txd->txd2 = PDMA_TXD2_LS0 | PDMA_V1_TXD2_SDL0_SET(length);
@@ -1583,7 +1600,8 @@ static int mtk_eth_recv(struct udevice *
return -EAGAIN;
}
- if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2) ||
+ MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3))
length = PDMA_V2_RXD2_PLEN0_GET(rxd->rxd2);
else
length = PDMA_V1_RXD2_PLEN0_GET(rxd->rxd2);
@@ -1606,7 +1624,8 @@ static int mtk_eth_free_pkt(struct udevi
rxd = priv->rx_ring_noc + idx * priv->soc->rxd_size;
- if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2))
+ if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V2) ||
+ MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3))
rxd->rxd2 = PDMA_V2_RXD2_PLEN0_SET(PKTSIZE_ALIGN);
else
rxd->rxd2 = PDMA_V1_RXD2_PLEN0_SET(PKTSIZE_ALIGN);
@@ -1863,6 +1882,7 @@ static int mtk_eth_of_to_plat(struct ude
static const struct mtk_soc_data mt7986_data = {
.caps = MT7986_CAPS,
.ana_rgc3 = 0x128,
+ .gdma_count = 2,
.pdma_base = PDMA_V2_BASE,
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
@@ -1871,6 +1891,7 @@ static const struct mtk_soc_data mt7986_
static const struct mtk_soc_data mt7981_data = {
.caps = MT7981_CAPS,
.ana_rgc3 = 0x128,
+ .gdma_count = 2,
.pdma_base = PDMA_V2_BASE,
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
@@ -1878,6 +1899,7 @@ static const struct mtk_soc_data mt7981_
static const struct mtk_soc_data mt7629_data = {
.ana_rgc3 = 0x128,
+ .gdma_count = 2,
.pdma_base = PDMA_V1_BASE,
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
@@ -1885,6 +1907,7 @@ static const struct mtk_soc_data mt7629_
static const struct mtk_soc_data mt7623_data = {
.caps = MT7623_CAPS,
+ .gdma_count = 2,
.pdma_base = PDMA_V1_BASE,
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
@@ -1892,6 +1915,7 @@ static const struct mtk_soc_data mt7623_
static const struct mtk_soc_data mt7622_data = {
.ana_rgc3 = 0x2028,
+ .gdma_count = 2,
.pdma_base = PDMA_V1_BASE,
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
@@ -1899,6 +1923,7 @@ static const struct mtk_soc_data mt7622_
static const struct mtk_soc_data mt7621_data = {
.caps = MT7621_CAPS,
+ .gdma_count = 2,
.pdma_base = PDMA_V1_BASE,
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -18,6 +18,7 @@ enum mkt_eth_capabilities {
MTK_U3_COPHY_V2_BIT,
MTK_INFRA_BIT,
MTK_NETSYS_V2_BIT,
+ MTK_NETSYS_V3_BIT,
/* PATH BITS */
MTK_ETH_PATH_GMAC1_TRGMII_BIT,
@@ -29,6 +30,7 @@ enum mkt_eth_capabilities {
#define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT)
#define MTK_INFRA BIT(MTK_INFRA_BIT)
#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT)
+#define MTK_NETSYS_V3 BIT(MTK_NETSYS_V3_BIT)
/* Supported path present on SoCs */
#define MTK_ETH_PATH_GMAC1_TRGMII BIT(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
@@ -52,8 +54,10 @@ enum mkt_eth_capabilities {
/* Frame Engine Register Bases */
#define PDMA_V1_BASE 0x0800
#define PDMA_V2_BASE 0x6000
+#define PDMA_V3_BASE 0x6800
#define GDMA1_BASE 0x0500
#define GDMA2_BASE 0x1500
+#define GDMA3_BASE 0x0540
#define GMAC_BASE 0x10000
/* Ethernet subsystem registers */
@@ -153,6 +157,9 @@ enum mkt_eth_capabilities {
#define UN_DP_S 0
#define UN_DP_M 0x0f
+#define GDMA_EG_CTRL_REG 0x004
+#define GDMA_CPU_BRIDGE_EN BIT(31)
+
#define GDMA_MAC_LSB_REG 0x008
#define GDMA_MAC_MSB_REG 0x00c

View File

@@ -0,0 +1,327 @@
From 59dba9d87c9caf04a5d797af46699055a53870f4 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:41 +0800
Subject: [PATCH 26/29] net: mediatek: add support for MediaTek MT7988 SoC
This patch adds support for MediaTek MT7988.
MT7988 features MediaTek NETSYS v3, including three GMACs, and two
of them supports 10Gbps USXGMII.
MT7988 embeds a MT7531 switch (not MCM) which supports accessing
internal registers through MMIO instead of MDIO.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 158 +++++++++++++++++++++++++++++++++++++++++-
drivers/net/mtk_eth.h | 20 ++++++
2 files changed, 177 insertions(+), 1 deletion(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -54,6 +54,16 @@
(DP_PDMA << MC_DP_S) | \
(DP_PDMA << UN_DP_S))
+#define GDMA_BRIDGE_TO_CPU \
+ (0xC0000000 | \
+ GDM_ICS_EN | \
+ GDM_TCS_EN | \
+ GDM_UCS_EN | \
+ (DP_PDMA << MYMAC_DP_S) | \
+ (DP_PDMA << BC_DP_S) | \
+ (DP_PDMA << MC_DP_S) | \
+ (DP_PDMA << UN_DP_S))
+
#define GDMA_FWD_DISCARD \
(0x20000000 | \
GDM_ICS_EN | \
@@ -68,7 +78,8 @@
enum mtk_switch {
SW_NONE,
SW_MT7530,
- SW_MT7531
+ SW_MT7531,
+ SW_MT7988,
};
/* struct mtk_soc_data - This is the structure holding all differences
@@ -102,6 +113,7 @@ struct mtk_eth_priv {
void __iomem *fe_base;
void __iomem *gmac_base;
void __iomem *sgmii_base;
+ void __iomem *gsw_base;
struct regmap *ethsys_regmap;
@@ -171,6 +183,11 @@ static void mtk_gdma_write(struct mtk_et
writel(val, priv->fe_base + gdma_base + reg);
}
+static void mtk_fe_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, u32 set)
+{
+ clrsetbits_le32(priv->fe_base + reg, clr, set);
+}
+
static u32 mtk_gmac_read(struct mtk_eth_priv *priv, u32 reg)
{
return readl(priv->gmac_base + reg);
@@ -208,6 +225,16 @@ static void mtk_infra_rmw(struct mtk_eth
regmap_write(priv->infra_regmap, reg, val);
}
+static u32 mtk_gsw_read(struct mtk_eth_priv *priv, u32 reg)
+{
+ return readl(priv->gsw_base + reg);
+}
+
+static void mtk_gsw_write(struct mtk_eth_priv *priv, u32 reg, u32 val)
+{
+ writel(val, priv->gsw_base + reg);
+}
+
/* Direct MDIO clause 22/45 access via SoC */
static int mtk_mii_rw(struct mtk_eth_priv *priv, u8 phy, u8 reg, u16 data,
u32 cmd, u32 st)
@@ -342,6 +369,11 @@ static int mt753x_reg_read(struct mtk_et
{
int ret, low_word, high_word;
+ if (priv->sw == SW_MT7988) {
+ *data = mtk_gsw_read(priv, reg);
+ return 0;
+ }
+
/* Write page address */
ret = mtk_mii_write(priv, priv->mt753x_smi_addr, 0x1f, reg >> 6);
if (ret)
@@ -367,6 +399,11 @@ static int mt753x_reg_write(struct mtk_e
{
int ret;
+ if (priv->sw == SW_MT7988) {
+ mtk_gsw_write(priv, reg, data);
+ return 0;
+ }
+
/* Write page address */
ret = mtk_mii_write(priv, priv->mt753x_smi_addr, 0x1f, reg >> 6);
if (ret)
@@ -537,6 +574,7 @@ static int mtk_mdio_register(struct udev
priv->mmd_write = mtk_mmd_ind_write;
break;
case SW_MT7531:
+ case SW_MT7988:
priv->mii_read = mt7531_mii_ind_read;
priv->mii_write = mt7531_mii_ind_write;
priv->mmd_read = mt7531_mmd_ind_read;
@@ -957,6 +995,103 @@ static int mt7531_setup(struct mtk_eth_p
return 0;
}
+static void mt7988_phy_setting(struct mtk_eth_priv *priv)
+{
+ u16 val;
+ u32 i;
+
+ for (i = 0; i < MT753X_NUM_PHYS; i++) {
+ /* Enable HW auto downshift */
+ priv->mii_write(priv, i, 0x1f, 0x1);
+ val = priv->mii_read(priv, i, PHY_EXT_REG_14);
+ val |= PHY_EN_DOWN_SHFIT;
+ priv->mii_write(priv, i, PHY_EXT_REG_14, val);
+
+ /* PHY link down power saving enable */
+ val = priv->mii_read(priv, i, PHY_EXT_REG_17);
+ val |= PHY_LINKDOWN_POWER_SAVING_EN;
+ priv->mii_write(priv, i, PHY_EXT_REG_17, val);
+ }
+}
+
+static void mt7988_mac_control(struct mtk_eth_priv *priv, bool enable)
+{
+ u32 pmcr = FORCE_MODE_LNK;
+
+ if (enable)
+ pmcr = priv->mt753x_pmcr;
+
+ mt753x_reg_write(priv, PMCR_REG(6), pmcr);
+}
+
+static int mt7988_setup(struct mtk_eth_priv *priv)
+{
+ u16 phy_addr, phy_val;
+ u32 pmcr;
+ int i;
+
+ priv->gsw_base = regmap_get_range(priv->ethsys_regmap, 0) + GSW_BASE;
+
+ priv->mt753x_phy_base = (priv->mt753x_smi_addr + 1) &
+ MT753X_SMI_ADDR_MASK;
+
+ /* Turn off PHYs */
+ for (i = 0; i < MT753X_NUM_PHYS; i++) {
+ phy_addr = MT753X_PHY_ADDR(priv->mt753x_phy_base, i);
+ phy_val = priv->mii_read(priv, phy_addr, MII_BMCR);
+ phy_val |= BMCR_PDOWN;
+ priv->mii_write(priv, phy_addr, MII_BMCR, phy_val);
+ }
+
+ switch (priv->phy_interface) {
+ case PHY_INTERFACE_MODE_USXGMII:
+ /* Use CPU bridge instead of actual USXGMII path */
+
+ /* Set GDM1 no drop */
+ mtk_fe_rmw(priv, PSE_NO_DROP_CFG_REG, 0, PSE_NO_DROP_GDM1);
+
+ /* Enable GDM1 to GSW CPU bridge */
+ mtk_gmac_rmw(priv, GMAC_MAC_MISC_REG, 0, BIT(0));
+
+ /* XGMAC force link up */
+ mtk_gmac_rmw(priv, GMAC_XGMAC_STS_REG, 0, P1_XGMAC_FORCE_LINK);
+
+ /* Setup GSW CPU bridge IPG */
+ mtk_gmac_rmw(priv, GMAC_GSW_CFG_REG, GSWTX_IPG_M | GSWRX_IPG_M,
+ (0xB << GSWTX_IPG_S) | (0xB << GSWRX_IPG_S));
+ break;
+ default:
+ printf("Error: MT7988 GSW does not support %s interface\n",
+ phy_string_for_interface(priv->phy_interface));
+ break;
+ }
+
+ pmcr = MT7988_FORCE_MODE |
+ (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) |
+ MAC_MODE | MAC_TX_EN | MAC_RX_EN |
+ BKOFF_EN | BACKPR_EN |
+ FORCE_RX_FC | FORCE_TX_FC |
+ (SPEED_1000M << FORCE_SPD_S) | FORCE_DPX |
+ FORCE_LINK;
+
+ priv->mt753x_pmcr = pmcr;
+
+ /* Keep MAC link down before starting eth */
+ mt753x_reg_write(priv, PMCR_REG(6), FORCE_MODE_LNK);
+
+ /* Turn on PHYs */
+ for (i = 0; i < MT753X_NUM_PHYS; i++) {
+ phy_addr = MT753X_PHY_ADDR(priv->mt753x_phy_base, i);
+ phy_val = priv->mii_read(priv, phy_addr, MII_BMCR);
+ phy_val &= ~BMCR_PDOWN;
+ priv->mii_write(priv, phy_addr, MII_BMCR, phy_val);
+ }
+
+ mt7988_phy_setting(priv);
+
+ return 0;
+}
+
static int mt753x_switch_init(struct mtk_eth_priv *priv)
{
int ret;
@@ -1497,6 +1632,11 @@ static int mtk_eth_start(struct udevice
}
if (MTK_HAS_CAPS(priv->soc->caps, MTK_NETSYS_V3)) {
+ if (priv->sw == SW_MT7988 && priv->gmac_id == 0) {
+ mtk_gdma_write(priv, priv->gmac_id, GDMA_IG_CTRL_REG,
+ GDMA_BRIDGE_TO_CPU);
+ }
+
mtk_gdma_write(priv, priv->gmac_id, GDMA_EG_CTRL_REG,
GDMA_CPU_BRIDGE_EN);
}
@@ -1845,6 +1985,12 @@ static int mtk_eth_of_to_plat(struct ude
priv->switch_mac_control = mt7531_mac_control;
priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
priv->mt753x_reset_wait_time = 200;
+ } else if (!strcmp(str, "mt7988")) {
+ priv->sw = SW_MT7988;
+ priv->switch_init = mt7988_setup;
+ priv->switch_mac_control = mt7988_mac_control;
+ priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
+ priv->mt753x_reset_wait_time = 50;
} else {
printf("error: unsupported switch\n");
return -EINVAL;
@@ -1879,6 +2025,15 @@ static int mtk_eth_of_to_plat(struct ude
return 0;
}
+static const struct mtk_soc_data mt7988_data = {
+ .caps = MT7988_CAPS,
+ .ana_rgc3 = 0x128,
+ .gdma_count = 3,
+ .pdma_base = PDMA_V3_BASE,
+ .txd_size = sizeof(struct mtk_tx_dma_v2),
+ .rxd_size = sizeof(struct mtk_rx_dma_v2),
+};
+
static const struct mtk_soc_data mt7986_data = {
.caps = MT7986_CAPS,
.ana_rgc3 = 0x128,
@@ -1930,6 +2085,7 @@ static const struct mtk_soc_data mt7621_
};
static const struct udevice_id mtk_eth_ids[] = {
+ { .compatible = "mediatek,mt7988-eth", .data = (ulong)&mt7988_data },
{ .compatible = "mediatek,mt7986-eth", .data = (ulong)&mt7986_data },
{ .compatible = "mediatek,mt7981-eth", .data = (ulong)&mt7981_data },
{ .compatible = "mediatek,mt7629-eth", .data = (ulong)&mt7629_data },
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -51,6 +51,8 @@ enum mkt_eth_capabilities {
#define MT7986_CAPS (MTK_NETSYS_V2)
+#define MT7988_CAPS (MTK_NETSYS_V3 | MTK_INFRA)
+
/* Frame Engine Register Bases */
#define PDMA_V1_BASE 0x0800
#define PDMA_V2_BASE 0x6000
@@ -59,6 +61,7 @@ enum mkt_eth_capabilities {
#define GDMA2_BASE 0x1500
#define GDMA3_BASE 0x0540
#define GMAC_BASE 0x10000
+#define GSW_BASE 0x20000
/* Ethernet subsystem registers */
@@ -117,6 +120,9 @@ enum mkt_eth_capabilities {
#define RG_XFI_PLL_ANA_SWWA 0x02283248
/* Frame Engine Registers */
+#define PSE_NO_DROP_CFG_REG 0x108
+#define PSE_NO_DROP_GDM1 BIT(1)
+
#define FE_GLO_MISC_REG 0x124
#define PDMA_VER_V2 BIT(4)
@@ -187,6 +193,17 @@ enum mkt_eth_capabilities {
#define MDIO_RW_DATA_S 0
#define MDIO_RW_DATA_M 0xffff
+#define GMAC_XGMAC_STS_REG 0x000c
+#define P1_XGMAC_FORCE_LINK BIT(15)
+
+#define GMAC_MAC_MISC_REG 0x0010
+
+#define GMAC_GSW_CFG_REG 0x0080
+#define GSWTX_IPG_M 0xF0000
+#define GSWTX_IPG_S 16
+#define GSWRX_IPG_M 0xF
+#define GSWRX_IPG_S 0
+
/* MDIO_CMD: MDIO commands */
#define MDIO_CMD_ADDR 0
#define MDIO_CMD_WRITE 1
@@ -285,6 +302,9 @@ enum mkt_eth_capabilities {
FORCE_MODE_TX_FC | FORCE_MODE_RX_FC | \
FORCE_MODE_DPX | FORCE_MODE_SPD | \
FORCE_MODE_LNK
+#define MT7988_FORCE_MODE FORCE_MODE_TX_FC | FORCE_MODE_RX_FC | \
+ FORCE_MODE_DPX | FORCE_MODE_SPD | \
+ FORCE_MODE_LNK
/* MT7531 SGMII Registers */
#define MT7531_SGMII_REG_BASE 0x5000

View File

@@ -0,0 +1,55 @@
From 757b997f1f5a958e6fec3d5aee1ff5cdf5766711 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:45 +0800
Subject: [PATCH 27/29] tools: mtk_image: use uint32_t for ghf header magic and
version
This patch converts magic and version fields of ghf common header
to one field with the type of uint32_t to make this header flexible
for futher updates.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
tools/mtk_image.c | 10 ++++++----
tools/mtk_image.h | 6 +++---
2 files changed, 9 insertions(+), 7 deletions(-)
--- a/tools/mtk_image.c
+++ b/tools/mtk_image.c
@@ -542,11 +542,13 @@ static void put_brom_layout_header(struc
hdr->type = cpu_to_le32(type);
}
-static void put_ghf_common_header(struct gfh_common_header *gfh, int size,
- int type, int ver)
+static void put_ghf_common_header(struct gfh_common_header *gfh, uint16_t size,
+ uint16_t type, uint8_t ver)
{
- memcpy(gfh->magic, GFH_HEADER_MAGIC, sizeof(gfh->magic));
- gfh->version = ver;
+ uint32_t magic_version = GFH_HEADER_MAGIC |
+ (uint32_t)ver << GFH_HEADER_VERSION_SHIFT;
+
+ gfh->magic_version = cpu_to_le32(magic_version);
gfh->size = cpu_to_le16(size);
gfh->type = cpu_to_le16(type);
}
--- a/tools/mtk_image.h
+++ b/tools/mtk_image.h
@@ -63,13 +63,13 @@ struct gen_device_header {
/* BootROM header definitions */
struct gfh_common_header {
- uint8_t magic[3];
- uint8_t version;
+ uint32_t magic_version;
uint16_t size;
uint16_t type;
};
-#define GFH_HEADER_MAGIC "MMM"
+#define GFH_HEADER_MAGIC 0x4D4D4D
+#define GFH_HEADER_VERSION_SHIFT 24
#define GFH_TYPE_FILE_INFO 0
#define GFH_TYPE_BL_INFO 1

View File

@@ -0,0 +1,606 @@
From 884430dadcc2c5d0a2b248795001955a9fa5a1a9 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:49 +0800
Subject: [PATCH 28/29] arm: mediatek: add support for MediaTek MT7988 SoC
This patch adds basic support for MediaTek MT7988 SoC.
This includes files that will initialize the SoC after boot and
its device tree.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/mt7988-u-boot.dtsi | 25 ++
arch/arm/dts/mt7988.dtsi | 391 ++++++++++++++++++
arch/arm/mach-mediatek/Kconfig | 13 +-
arch/arm/mach-mediatek/Makefile | 1 +
arch/arm/mach-mediatek/mt7988/Makefile | 4 +
arch/arm/mach-mediatek/mt7988/init.c | 63 +++
arch/arm/mach-mediatek/mt7988/lowlevel_init.S | 30 ++
7 files changed, 526 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/mt7988-u-boot.dtsi
create mode 100644 arch/arm/dts/mt7988.dtsi
create mode 100644 arch/arm/mach-mediatek/mt7988/Makefile
create mode 100644 arch/arm/mach-mediatek/mt7988/init.c
create mode 100644 arch/arm/mach-mediatek/mt7988/lowlevel_init.S
--- /dev/null
+++ b/arch/arm/dts/mt7988-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+&system_clk {
+ bootph-all;
+};
+
+&spi_clk {
+ bootph-all;
+};
+
+&uart0 {
+ bootph-all;
+};
+
+&uart1 {
+ bootph-all;
+};
+
+&uart2 {
+ bootph-all;
+};
--- /dev/null
+++ b/arch/arm/dts/mt7988.dtsi
@@ -0,0 +1,391 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mt7988-clk.h>
+#include <dt-bindings/reset/mt7988-reset.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "mediatek,mt7988-rfb";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x0>;
+ mediatek,hwver = <&hwver>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x1>;
+ mediatek,hwver = <&hwver>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x2>;
+ mediatek,hwver = <&hwver>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x3>;
+ mediatek,hwver = <&hwver>;
+ };
+ };
+
+ system_clk: dummy40m {
+ compatible = "fixed-clock";
+ clock-frequency = <40000000>;
+ #clock-cells = <0>;
+ };
+
+ spi_clk: dummy208m {
+ compatible = "fixed-clock";
+ clock-frequency = <208000000>;
+ #clock-cells = <0>;
+ };
+
+ hwver: hwver {
+ compatible = "mediatek,hwver", "syscon";
+ reg = <0 0x8000000 0 0x1000>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&gic>;
+ clock-frequency = <13000000>;
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ watchdog: watchdog@1001c000 {
+ compatible = "mediatek,mt7622-wdt",
+ "mediatek,mt6589-wdt",
+ "syscon";
+ reg = <0 0x1001c000 0 0x1000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ #reset-cells = <1>;
+ };
+
+ gic: interrupt-controller@c000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ reg = <0 0x0c000000 0 0x40000>, /* GICD */
+ <0 0x0c080000 0 0x200000>; /* GICR */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ infracfg_ao_cgs: infracfg_ao_cgs@10001000 {
+ compatible = "mediatek,mt7988-infracfg_ao_cgs", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ clock-parent = <&infracfg_ao>;
+ #clock-cells = <1>;
+ };
+
+ apmixedsys: apmixedsys@1001e000 {
+ compatible = "mediatek,mt7988-fixed-plls", "syscon";
+ reg = <0 0x1001e000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ topckgen: topckgen@1001b000 {
+ compatible = "mediatek,mt7988-topckgen", "syscon";
+ reg = <0 0x1001b000 0 0x1000>;
+ clock-parent = <&apmixedsys>;
+ #clock-cells = <1>;
+ };
+
+ pinctrl: pinctrl@1001f000 {
+ compatible = "mediatek,mt7988-pinctrl";
+ reg = <0 0x1001f000 0 0x1000>,
+ <0 0x11c10000 0 0x1000>,
+ <0 0x11d00000 0 0x1000>,
+ <0 0x11d20000 0 0x1000>,
+ <0 0x11e00000 0 0x1000>,
+ <0 0x11f00000 0 0x1000>,
+ <0 0x1000b000 0 0x1000>;
+ reg-names = "gpio_base", "iocfg_tr_base", "iocfg_br_base",
+ "iocfg_rb_base", "iocfg_lb_base", "iocfg_tl_base",
+ "eint";
+ gpio: gpio-controller {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ sgmiisys0: syscon@10060000 {
+ compatible = "mediatek,mt7988-sgmiisys_0", "syscon";
+ reg = <0 0x10060000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ sgmiisys1: syscon@10070000 {
+ compatible = "mediatek,mt7988-sgmiisys_1", "syscon";
+ reg = <0 0x10070000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ usxgmiisys0: syscon@10080000 {
+ compatible = "mediatek,mt7988-usxgmiisys_0", "syscon";
+ reg = <0 0x10080000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ usxgmiisys1: syscon@10081000 {
+ compatible = "mediatek,mt7988-usxgmiisys_1", "syscon";
+ reg = <0 0x10081000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ xfi_pextp0: syscon@11f20000 {
+ compatible = "mediatek,mt7988-xfi_pextp_0", "syscon";
+ reg = <0 0x11f20000 0 0x10000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ xfi_pextp1: syscon@11f30000 {
+ compatible = "mediatek,mt7988-xfi_pextp_1", "syscon";
+ reg = <0 0x11f30000 0 0x10000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ xfi_pll: syscon@11f40000 {
+ compatible = "mediatek,mt7988-xfi_pll", "syscon";
+ reg = <0 0x11f40000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ topmisc: topmisc@11d10000 {
+ compatible = "mediatek,mt7988-topmisc", "syscon",
+ "mediatek,mt7988-power-controller";
+ reg = <0 0x11d10000 0 0x10000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ infracfg_ao: infracfg@10001000 {
+ compatible = "mediatek,mt7988-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ };
+
+ uart0: serial@11000000 {
+ compatible = "mediatek,hsuart";
+ reg = <0 0x11000000 0 0x100>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART0_CK>;
+ assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+ <&infracfg_ao CK_INFRA_MUX_UART0_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ <&infracfg_ao CK_INFRA_UART_O0>;
+ status = "disabled";
+ };
+
+ uart1: serial@11000100 {
+ compatible = "mediatek,hsuart";
+ reg = <0 0x11000100 0 0x100>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART1_CK>;
+ assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+ <&infracfg_ao CK_INFRA_MUX_UART1_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ <&infracfg_ao CK_INFRA_UART_O1>;
+ status = "disabled";
+ };
+
+ uart2: serial@11000200 {
+ compatible = "mediatek,hsuart";
+ reg = <0 0x11000200 0 0x100>;
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART2_CK>;
+ assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+ <&infracfg_ao CK_INFRA_MUX_UART2_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ <&infracfg_ao CK_INFRA_UART_O2>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@11003000 {
+ compatible = "mediatek,mt7988-i2c",
+ "mediatek,mt7981-i2c";
+ reg = <0 0x11003000 0 0x1000>,
+ <0 0x10217080 0 0x80>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ clock-div = <1>;
+ clocks = <&infracfg_ao CK_INFRA_I2C_BCK>,
+ <&infracfg_ao CK_INFRA_66M_AP_DMA_BCK>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@11004000 {
+ compatible = "mediatek,mt7988-i2c",
+ "mediatek,mt7981-i2c";
+ reg = <0 0x11004000 0 0x1000>,
+ <0 0x10217100 0 0x80>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clock-div = <1>;
+ clocks = <&infracfg_ao CK_INFRA_I2C_BCK>,
+ <&infracfg_ao CK_INFRA_66M_AP_DMA_BCK>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@11005000 {
+ compatible = "mediatek,mt7988-i2c",
+ "mediatek,mt7981-i2c";
+ reg = <0 0x11005000 0 0x1000>,
+ <0 0x10217180 0 0x80>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clock-div = <1>;
+ clocks = <&infracfg_ao CK_INFRA_I2C_BCK>,
+ <&infracfg_ao CK_INFRA_66M_AP_DMA_BCK>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pwm: pwm@10048000 {
+ compatible = "mediatek,mt7988-pwm";
+ reg = <0 0x10048000 0 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&infracfg_ao CK_INFRA_66M_PWM_BCK>,
+ <&infracfg_ao CK_INFRA_66M_PWM_HCK>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK1>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK2>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK3>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK4>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK5>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK6>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK7>,
+ <&infracfg_ao CK_INFRA_66M_PWM_CK8>;
+ clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
+ "pwm4","pwm5","pwm6","pwm7","pwm8";
+ status = "disabled";
+ };
+
+ snand: snand@11001000 {
+ compatible = "mediatek,mt7988-snand",
+ "mediatek,mt7986-snand";
+ reg = <0 0x11001000 0 0x1000>,
+ <0 0x11002000 0 0x1000>;
+ reg-names = "nfi", "ecc";
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg_ao CK_INFRA_SPINFI>,
+ <&infracfg_ao CK_INFRA_NFI>,
+ <&infracfg_ao CK_INFRA_66M_NFI_HCK>;
+ clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
+ assigned-clocks = <&topckgen CK_TOP_SPINFI_SEL>,
+ <&topckgen CK_TOP_NFI1X_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_M_D8>,
+ <&topckgen CK_TOP_CB_M_D8>;
+ status = "disabled";
+ };
+
+ spi0: spi@1100a000 {
+ compatible = "mediatek,ipm-spi";
+ reg = <0 0x11007000 0 0x100>;
+ clocks = <&spi_clk>,
+ <&spi_clk>;
+ clock-names = "sel-clk", "spi-clk";
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ spi1: spi@1100b000 {
+ compatible = "mediatek,ipm-spi";
+ reg = <0 0x11008000 0 0x100>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ spi2: spi@11009000 {
+ compatible = "mediatek,ipm-spi";
+ reg = <0 0x11009000 0 0x100>;
+ clocks = <&spi_clk>,
+ <&spi_clk>;
+ clock-names = "sel-clk", "spi-clk";
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt7988-mmc",
+ "mediatek,mt7986-mmc";
+ reg = <0 0x11230000 0 0x1000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg_ao_cgs CK_INFRA_MSDC400>,
+ <&infracfg_ao_cgs CK_INFRA_MSDC2_HCK>,
+ <&infracfg_ao_cgs CK_INFRA_133M_MSDC_0_HCK>,
+ <&infracfg_ao_cgs CK_INFRA_66M_MSDC_0_HCK>;
+ clock-names = "source", "hclk", "source_cg", "axi_cg";
+ status = "disabled";
+ };
+
+ ethdma: syscon@15000000 {
+ compatible = "mediatek,mt7988-ethdma", "syscon";
+ reg = <0 0x15000000 0 0x20000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ ethwarp: syscon@15031000 {
+ compatible = "mediatek,mt7988-ethwarp", "syscon";
+ reg = <0 0x15031000 0 0x1000>;
+ clock-parent = <&topckgen>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ eth: ethernet@15100000 {
+ compatible = "mediatek,mt7988-eth", "syscon";
+ reg = <0 0x15100000 0 0x20000>;
+ mediatek,ethsys = <&ethdma>;
+ mediatek,sgmiisys = <&sgmiisys0>;
+ mediatek,usxgmiisys = <&usxgmiisys0>;
+ mediatek,xfi_pextp = <&xfi_pextp0>;
+ mediatek,xfi_pll = <&xfi_pll>;
+ mediatek,infracfg = <&topmisc>;
+ mediatek,toprgu = <&watchdog>;
+ resets = <&ethdma ETHDMA_FE_RST>, <&ethwarp ETHWARP_GSW_RST>;
+ reset-names = "fe", "mcm";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mediatek,mcm;
+ status = "disabled";
+ };
+};
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -58,6 +58,15 @@ config TARGET_MT7986
including UART, SPI, SPI flash, USB3.0, MMC, NAND, SNFI, PWM, PCIe,
Gigabit Ethernet, I2C, built-in 4x4 Wi-Fi, and PCIe.
+config TARGET_MT7988
+ bool "MediaTek MT7988 SoC"
+ select ARM64
+ select CPU
+ help
+ The MediaTek MT7988 is a ARM64-based SoC with a quad-core Cortex-A73.
+ including UART, SPI, SPI flash, USB3.0, MMC, NAND, SNFI, PWM, PCIe,
+ 10 Gigabit Ethernet , I2C, and PCIe.
+
config TARGET_MT8183
bool "MediaTek MT8183 SoC"
select ARM64
@@ -104,6 +113,7 @@ config SYS_BOARD
default "mt7629" if TARGET_MT7629
default "mt7981" if TARGET_MT7981
default "mt7986" if TARGET_MT7986
+ default "mt7988" if TARGET_MT7988
default "mt8183" if TARGET_MT8183
default "mt8512" if TARGET_MT8512
default "mt8516" if TARGET_MT8516
@@ -121,6 +131,7 @@ config SYS_CONFIG_NAME
default "mt7629" if TARGET_MT7629
default "mt7981" if TARGET_MT7981
default "mt7986" if TARGET_MT7986
+ default "mt7988" if TARGET_MT7988
default "mt8183" if TARGET_MT8183
default "mt8512" if TARGET_MT8512
default "mt8516" if TARGET_MT8516
@@ -135,7 +146,7 @@ config MTK_BROM_HEADER_INFO
string
default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || TARGET_MT7622
default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183
- default "media=snand;nandinfo=2k+64" if TARGET_MT7981 || TARGET_MT7986
+ default "media=snand;nandinfo=2k+64" if TARGET_MT7981 || TARGET_MT7986 || TARGET_MT7988
default "lk=1" if TARGET_MT7623
source "board/mediatek/mt7629/Kconfig"
--- a/arch/arm/mach-mediatek/Makefile
+++ b/arch/arm/mach-mediatek/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_TARGET_MT7623) += mt7623/
obj-$(CONFIG_TARGET_MT7629) += mt7629/
obj-$(CONFIG_TARGET_MT7981) += mt7981/
obj-$(CONFIG_TARGET_MT7986) += mt7986/
+obj-$(CONFIG_TARGET_MT7988) += mt7988/
obj-$(CONFIG_TARGET_MT8183) += mt8183/
obj-$(CONFIG_TARGET_MT8516) += mt8516/
obj-$(CONFIG_TARGET_MT8518) += mt8518/
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7988/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += init.o
+obj-y += lowlevel_init.o
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7988/init.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+#include <fdtdec.h>
+#include <init.h>
+#include <asm/armv8/mmu.h>
+#include <asm/global_data.h>
+#include <asm/u-boot.h>
+#include <asm/system.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SZ_8G _AC(0x200000000, ULL)
+
+int dram_init(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_mem_size_base();
+ if (ret)
+ return ret;
+
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G);
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ psci_system_reset();
+}
+
+static struct mm_region mt7988_mem_map[] = {
+ {
+ /* DDR */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0x200000000ULL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
+ }, {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x40000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ 0,
+ }
+};
+
+struct mm_region *mem_map = mt7988_mem_map;
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7988/lowlevel_init.S
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/*
+ * Switch from AArch64 EL2 to AArch32 EL2
+ * @param inputs:
+ * x0: argument, zero
+ * x1: machine nr
+ * x2: fdt address
+ * x3: input argument
+ * x4: kernel entry point
+ * @param outputs for secure firmware:
+ * x0: function id
+ * x1: kernel entry point
+ * x2: machine nr
+ * x3: fdt address
+*/
+
+.global armv8_el2_to_aarch32
+armv8_el2_to_aarch32:
+ mov x3, x2
+ mov x2, x1
+ mov x1, x4
+ mov x4, #0
+ ldr x0, =0x82000200
+ SMC #0
+ ret

View File

@@ -0,0 +1,575 @@
From fd7d9124ffa6761f27747daeea599e0ab874c1fa Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 19 Jul 2023 17:17:54 +0800
Subject: [PATCH 29/29] board: mediatek: add MT7988 reference boards
This patch adds general board files based on MT7988 SoCs.
MT7988 uses one mmc controller for booting from both SD and eMMC,
and the pins of mmc controller booting from SD are also shared with
one of spi controllers.
So two configs are need for these boot types:
1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC
2. mt7988_sd_rfb_defconfig - SPI-NAND and SD
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/mt7988-rfb.dts | 182 +++++++++++++++++++++++++++++
arch/arm/dts/mt7988-sd-rfb.dts | 134 +++++++++++++++++++++
board/mediatek/mt7988/MAINTAINERS | 7 ++
board/mediatek/mt7988/Makefile | 3 +
board/mediatek/mt7988/mt7988_rfb.c | 10 ++
configs/mt7988_rfb_defconfig | 83 +++++++++++++
configs/mt7988_sd_rfb_defconfig | 71 +++++++++++
include/configs/mt7988.h | 14 +++
9 files changed, 506 insertions(+)
create mode 100644 arch/arm/dts/mt7988-rfb.dts
create mode 100644 arch/arm/dts/mt7988-sd-rfb.dts
create mode 100644 board/mediatek/mt7988/MAINTAINERS
create mode 100644 board/mediatek/mt7988/Makefile
create mode 100644 board/mediatek/mt7988/mt7988_rfb.c
create mode 100644 configs/mt7988_rfb_defconfig
create mode 100644 configs/mt7988_sd_rfb_defconfig
create mode 100644 include/configs/mt7988.h
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1319,6 +1319,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7986b-sd-rfb.dtb \
mt7986a-emmc-rfb.dtb \
mt7986b-emmc-rfb.dtb \
+ mt7988-rfb.dtb \
+ mt7988-sd-rfb.dtb \
mt8183-pumpkin.dtb \
mt8512-bm1-emmc.dtb \
mt8516-pumpkin.dtb \
--- /dev/null
+++ b/arch/arm/dts/mt7988-rfb.dts
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7988.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "mt7988-rfb";
+ compatible = "mediatek,mt7988-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x10000000>;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "usxgmii";
+ mediatek,switch = "mt7988";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+};
+
+&pinctrl {
+ i2c1_pins: i2c1-pins {
+ mux {
+ function = "i2c";
+ groups = "i2c1_0";
+ };
+ };
+
+ pwm_pins: pwm-pins {
+ mux {
+ function = "pwm";
+ groups = "pwm0", "pwm1", "pwm2", "pwm3", "pwm4",
+ "pwm5", "pwm6", "pwm7";
+ };
+ };
+
+ spi0_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ };
+
+ spi2_pins: spi2-pins {
+ mux {
+ function = "spi";
+ groups = "spi2", "spi2_wp_hold";
+ };
+ };
+
+ mmc0_pins_default: mmc0default {
+ mux {
+ function = "flash";
+ groups = "emmc_51";
+ };
+
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ };
+
+ conf-clk {
+ pins = "EMMC_CK";
+ };
+
+ conf-dsl {
+ pins = "EMMC_DSL";
+ };
+
+ conf-rst {
+ pins = "EMMC_RSTB";
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+ };
+};
+
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_default>;
+ max-frequency = <52000000>;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ cap-mmc-hw-reset;
+ vmmc-supply = <&reg_3p3v>;
+ vqmmc-supply = <&reg_1p8v>;
+ non-removable;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/mt7988-sd-rfb.dts
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7988.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "mt7988-rfb";
+ compatible = "mediatek,mt7988-rfb", "mediatek,mt7988-sd-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x10000000>;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "usxgmii";
+ mediatek,switch = "mt7988";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+};
+
+&pinctrl {
+ i2c1_pins: i2c1-pins {
+ mux {
+ function = "i2c";
+ groups = "i2c1_0";
+ };
+ };
+
+ pwm_pins: pwm-pins {
+ mux {
+ function = "pwm";
+ groups = "pwm0", "pwm1", "pwm2", "pwm3", "pwm4",
+ "pwm5", "pwm6", "pwm7";
+ };
+ };
+
+ spi0_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ };
+
+ mmc1_pins_default: mmc1default {
+ mux {
+ function = "flash";
+ groups = "emmc_45";
+ };
+
+ conf-cmd-dat {
+ pins = "SPI2_CSB", "SPI2_MISO", "SPI2_MOSI",
+ "SPI2_CLK", "SPI2_HOLD";
+ input-enable;
+ };
+
+ conf-clk {
+ pins = "SPI2_WP";
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_default>;
+ max-frequency = <52000000>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ vmmc-supply = <&reg_3p3v>;
+ vqmmc-supply = <&reg_3p3v>;
+ status = "okay";
+};
--- /dev/null
+++ b/board/mediatek/mt7988/MAINTAINERS
@@ -0,0 +1,7 @@
+MT7988
+M: Sam Shih <sam.shih@mediatek.com>
+S: Maintained
+F: board/mediatek/mt7988
+F: include/configs/mt7988.h
+F: configs/mt7988_rfb_defconfig
+F: configs/mt7988_sd_rfb_defconfig
--- /dev/null
+++ b/board/mediatek/mt7988/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += mt7988_rfb.o
--- /dev/null
+++ b/board/mediatek/mt7988/mt7988_rfb.c
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+int board_init(void)
+{
+ return 0;
+}
--- /dev/null
+++ b/configs/mt7988_rfb_defconfig
@@ -0,0 +1,83 @@
+CONFIG_ARM=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7988-rfb"
+CONFIG_SYS_PROMPT="MT7988> "
+CONFIG_TARGET_MT7988=y
+CONFIG_DEBUG_UART_BASE=0x11000000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_DEBUG_UART=y
+# CONFIG_AUTOBOOT is not set
+CONFIG_DEFAULT_FDT_FILE="mt7988-rfb"
+CONFIG_LOGLEVEL=7
+CONFIG_LOG=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SMC=y
+CONFIG_DOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_NETMASK=y
+CONFIG_NETMASK="255.255.255.0"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.2"
+CONFIG_PROT_TCP=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_MTK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_FIXED=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7988=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_MTK=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPIM=y
+CONFIG_LZO=y
+CONFIG_HEXDUMP=y
+# CONFIG_EFI_LOADER is not set
--- /dev/null
+++ b/configs/mt7988_sd_rfb_defconfig
@@ -0,0 +1,71 @@
+CONFIG_ARM=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7988-sd-rfb"
+CONFIG_SYS_PROMPT="MT7988> "
+CONFIG_TARGET_MT7988=y
+CONFIG_DEBUG_UART_BASE=0x11000000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_DEBUG_UART=y
+# CONFIG_AUTOBOOT is not set
+CONFIG_DEFAULT_FDT_FILE="mt7988-sd-rfb"
+CONFIG_LOGLEVEL=7
+CONFIG_LOG=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SMC=y
+CONFIG_DOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_NETMASK=y
+CONFIG_NETMASK="255.255.255.0"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.2"
+CONFIG_PROT_TCP=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_MTK=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_PHY_FIXED=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7988=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_MTK=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPIM=y
+CONFIG_LZO=y
+CONFIG_HEXDUMP=y
+# CONFIG_EFI_LOADER is not set
--- /dev/null
+++ b/include/configs/mt7988.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for MediaTek MT7988 SoC
+ *
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+#ifndef __MT7988_H
+#define __MT7988_H
+
+#define CFG_MAX_MEM_MAPPED 0xC0000000
+
+#endif

View File

@@ -0,0 +1,47 @@
From 4bd66fd5b69eda41b4320fd6f8db50a7b7fa7bf7 Mon Sep 17 00:00:00 2001
Message-ID: <4bd66fd5b69eda41b4320fd6f8db50a7b7fa7bf7.1690828424.git.daniel@makrotopia.org>
From: Daniel Golle <daniel@makrotopia.org>
Date: Mon, 31 Jul 2023 19:25:04 +0100
Subject: [PATCH] ram: mediatek: include <linux/sizes.h> for SZ_* macros
To: Ryder Lee <ryder.lee@mediatek.com>,
Weijie Gao <weijie.gao@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
u-boot@lists.denx.de
Something between U-Boot 2023.04 and 2023.07.02 resulted in no longer
implicitely including <linux/sizes.h> in the DDR3 RAM driver for the
MT7929 SoC. The result is a build failure:
drivers/ram/mediatek/ddr3-mt7629.c: In function 'mtk_ddr3_get_info':
drivers/ram/mediatek/ddr3-mt7629.c:734:30: error: 'SZ_128M' undeclared (first use in this function)
734 | info->size = SZ_128M;
| ^~~~~~~
drivers/ram/mediatek/ddr3-mt7629.c:734:30: note: each undeclared identifier is reported only once for each function it appears in
drivers/ram/mediatek/ddr3-mt7629.c:737:30: error: 'SZ_256M' undeclared (first use in this function)
737 | info->size = SZ_256M;
| ^~~~~~~
drivers/ram/mediatek/ddr3-mt7629.c:740:30: error: 'SZ_512M' undeclared (first use in this function)
740 | info->size = SZ_512M;
| ^~~~~~~
drivers/ram/mediatek/ddr3-mt7629.c:743:30: error: 'SZ_1G' undeclared (first use in this function)
743 | info->size = SZ_1G;
| ^~~~~
Include <linux/sizes.h> so SZ_* is defined.
Reported-by: Tianling Shen <cnsztl@immortalwrt.org>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/ram/mediatek/ddr3-mt7629.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/ram/mediatek/ddr3-mt7629.c
+++ b/drivers/ram/mediatek/ddr3-mt7629.c
@@ -14,6 +14,7 @@
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/delay.h>
+#include <linux/sizes.h>
/* EMI */
#define EMI_CONA 0x000

View File

@@ -0,0 +1,33 @@
--- a/arch/arm/dts/mt7988.dtsi
+++ b/arch/arm/dts/mt7988.dtsi
@@ -61,6 +61,30 @@
#clock-cells = <0>;
};
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 64 KiB reserved for ramoops/pstore */
+ ramoops@42ff0000 {
+ compatible = "ramoops";
+ reg = <0 0x42ff0000 0 0x10000>;
+ record-size = <0x1000>;
+ };
+
+ /* 320 KiB reserved for ARM Trusted Firmware (BL31+BL32) */
+ secmon_reserved: secmon@43000000 {
+ reg = <0 0x43000000 0 0x50000>;
+ no-map;
+ };
+ };
+
hwver: hwver {
compatible = "mediatek,hwver", "syscon";
reg = <0 0x8000000 0 0x1000>;

View File

@@ -1,6 +1,6 @@
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -115,7 +115,6 @@ dumpimage-mkimage-objs := aisimage.o \
@@ -116,7 +116,6 @@ dumpimage-mkimage-objs := aisimage.o \
imximage.o \
imx8image.o \
imx8mimage.o \

View File

@@ -1,6 +1,6 @@
--- a/Makefile
+++ b/Makefile
@@ -1067,7 +1067,7 @@ quiet_cmd_pad_cat = CAT $@
@@ -1070,7 +1070,7 @@ quiet_cmd_pad_cat = CAT $@
cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; }
quiet_cmd_lzma = LZMA $@

View File

@@ -70,7 +70,7 @@
{
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -2051,6 +2051,50 @@ static const char *fit_get_image_type_pr
@@ -2051,6 +2051,49 @@ static const char *fit_get_image_type_pr
return "unknown";
}
@@ -89,9 +89,8 @@
+
+ hdrsize = fdt_totalsize(fit);
+
+ /* simple FIT with internal images */
+ if (hdrsize > 0x1000)
+ return hdrsize;
+ /* take care of simple FIT with internal images */
+ max_size = hdrsize;
+
+ images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+ if (images_noffset < 0) {
@@ -123,7 +122,7 @@
int arch, int ph_type, int bootstage_id,
--- a/include/image.h
+++ b/include/image.h
@@ -1046,6 +1046,7 @@ int fit_parse_subimage(const char *spec,
@@ -1047,6 +1047,7 @@ int fit_parse_subimage(const char *spec,
ulong *addr, const char **image_name);
int fit_get_subimage_count(const void *fit, int images_noffset);

View File

@@ -1,11 +0,0 @@
--- a/common/menu.c
+++ b/common/menu.c
@@ -15,7 +15,7 @@
#include "menu.h"
-#define ansi 0
+#define ansi 1
/*
* Internally, each item in a menu is represented by a struct menu_item.

View File

@@ -1,6 +1,6 @@
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -601,6 +601,12 @@ config CMD_ENV_EXISTS
@@ -602,6 +602,12 @@ config CMD_ENV_EXISTS
Check if a variable is defined in the environment for use in
shell scripting.
@@ -76,7 +76,7 @@
#if defined(CONFIG_CMD_ENV_CALLBACK)
static int print_static_binding(const char *var_name, const char *callback_name,
void *priv)
@@ -1231,6 +1285,9 @@ static struct cmd_tbl cmd_env_sub[] = {
@@ -1228,6 +1282,9 @@ static struct cmd_tbl cmd_env_sub[] = {
U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""),
#endif
U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""),
@@ -86,7 +86,7 @@
#if defined(CONFIG_CMD_RUN)
U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""),
#endif
@@ -1322,6 +1379,9 @@ static char env_help_text[] =
@@ -1319,6 +1376,9 @@ static char env_help_text[] =
#if defined(CONFIG_CMD_NVEDIT_EFI)
"env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n"
#endif
@@ -96,7 +96,7 @@
#if defined(CONFIG_CMD_RUN)
"env run var [...] - run commands in an environment variable\n"
#endif
@@ -1431,6 +1491,17 @@ U_BOOT_CMD(
@@ -1428,6 +1488,17 @@ U_BOOT_CMD(
);
#endif

View File

@@ -16,7 +16,7 @@ Reviewed-by: Tom Rini <trini@konsulko.com>
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -636,6 +636,12 @@ int image_setup_libfdt(struct bootm_head
@@ -637,6 +637,12 @@ int image_setup_libfdt(struct bootm_head
images->fit_uname_cfg,
strlen(images->fit_uname_cfg) + 1, 1);

View File

@@ -1,6 +1,6 @@
--- a/Makefile
+++ b/Makefile
@@ -2000,26 +2000,7 @@ endif
@@ -2006,26 +2006,7 @@ endif
# Check dtc and pylibfdt, if DTC is provided, else build them
PHONY += scripts_dtc
scripts_dtc: scripts_basic

View File

@@ -17,7 +17,7 @@
#include <mtd.h>
#include <linux/mtd/mtd.h>
@@ -25,7 +32,22 @@ int board_init(void)
@@ -24,7 +31,22 @@ int board_init(void)
int board_late_init(void)
{
@@ -43,7 +43,7 @@
}
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -140,4 +140,11 @@ config MTK_BROM_HEADER_INFO
@@ -151,4 +151,11 @@ config MTK_BROM_HEADER_INFO
source "board/mediatek/mt7629/Kconfig"

View File

@@ -0,0 +1,46 @@
--- a/board/mediatek/mt7988/mt7988_rfb.c
+++ b/board/mediatek/mt7988/mt7988_rfb.c
@@ -4,7 +4,43 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
+#include <common.h>
+#include <config.h>
+#include <dm.h>
+#include <button.h>
+#include <env.h>
+#include <init.h>
+#include <asm/global_data.h>
+#include <linux/delay.h>
+
+#ifndef CONFIG_RESET_BUTTON_LABEL
+#define CONFIG_RESET_BUTTON_LABEL "reset"
+#endif
+
int board_init(void)
{
return 0;
}
+
+int board_late_init(void)
+{
+ gd->env_valid = 1; //to load environment variable from persistent store
+ struct udevice *dev;
+
+ gd->env_valid = ENV_VALID;
+ if (!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev)) {
+ puts("reset button found\n");
+#ifdef CONFIG_RESET_BUTTON_SETTLE_DELAY
+ if (CONFIG_RESET_BUTTON_SETTLE_DELAY > 0) {
+ button_get_state(dev);
+ mdelay(CONFIG_RESET_BUTTON_SETTLE_DELAY);
+ }
+#endif
+ if (button_get_state(dev) == BUTTON_ON) {
+ puts("button pushed, resetting environment\n");
+ gd->env_valid = ENV_INVALID;
+ }
+ }
+ env_relocate();
+ return 0;
+}

View File

@@ -20,14 +20,14 @@
+&snand {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snfi_pins>;
+ quad-spi;
status = "okay";
-
- spi-flash@0{
- compatible = "jedec,spi-nor";
- reg = <0>;
- u-boot,dm-pre-reloc;
- bootph-all;
- };
+ quad-spi;
};
&uart0 {

View File

@@ -173,9 +173,9 @@
+loadaddr=0x48000000
+bootargs=root=/dev/mmcblk1p65
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_sdmmc ; fi
+bootconf=config-mt7622-bananapi-bpi-r64-pcie1
+bootconf_pcie=config-mt7622-bananapi-bpi-r64-pcie1
+bootconf_sata=config-mt7622-bananapi-bpi-r64-sata
+bootconf=config-1#mt7622-bananapi-bpi-r64-pcie1
+bootconf_pcie=config-1#mt7622-bananapi-bpi-r64-pcie1
+bootconf_sata=config-1#mt7622-bananapi-bpi-r64-sata
+bootdelay=0
+bootfile=openwrt-mediatek-mt7622-bananapi_bpi-r64-initramfs-recovery.itb
+bootfile_emmcbl2=openwrt-mediatek-mt7622-bananapi_bpi-r64-emmc-preloader.bin
@@ -412,9 +412,9 @@
+loadaddr=0x48000000
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi
+bootargs=root=/dev/mmcblk0p65
+bootconf=config-mt7622-bananapi-bpi-r64-pcie1
+bootconf_pcie=config-mt7622-bananapi-bpi-r64-pcie1
+bootconf_sata=config-mt7622-bananapi-bpi-r64-sata
+bootconf=config-1#mt7622-bananapi-bpi-r64-pcie1
+bootconf_pcie=config-1#mt7622-bananapi-bpi-r64-pcie1
+bootconf_sata=config-1#mt7622-bananapi-bpi-r64-sata
+bootdelay=0
+bootfile=openwrt-mediatek-mt7622-bananapi_bpi-r64-initramfs-recovery.itb
+bootfile_upg=openwrt-mediatek-mt7622-bananapi_bpi-r64-squashfs-sysupgrade.itb
@@ -619,9 +619,9 @@
+loadaddr=0x48000000
+bootargs=root=/dev/ubiblock0_2p1
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootconf=config-mt7622-bananapi-bpi-r64-pcie1
+bootconf_pcie=config-mt7622-bananapi-bpi-r64-pcie1
+bootconf_sata=config-mt7622-bananapi-bpi-r64-sata
+bootconf=config-1#mt7622-bananapi-bpi-r64-pcie1
+bootconf_pcie=config-1#mt7622-bananapi-bpi-r64-pcie1
+bootconf_sata=config-1#mt7622-bananapi-bpi-r64-sata
+bootdelay=0
+bootfile=openwrt-mediatek-mt7622-bananapi_bpi-r64-initramfs-recovery.itb
+bootfile_fip=openwrt-mediatek-mt7622-bananapi_bpi-r64-snand-bl31-uboot.fip

View File

@@ -323,12 +323,12 @@
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ speed = <2500>;
+ full-duplex;
+ };
+};
@@ -344,7 +344,7 @@
+};
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1285,6 +1285,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
@@ -1305,6 +1305,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
mt7623a-unielec-u7623-02-emmc.dtb \
mt7622-bananapi-bpi-r64.dtb \

View File

@@ -150,7 +150,7 @@
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr.dts
@@ -0,0 +1,188 @@
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 MediaTek Inc.
@@ -173,6 +173,11 @@
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x20000000>;
+ };
+
+ aliases {
+ spi0 = &snor;
+ };
@@ -320,11 +325,11 @@
+ pinctrl-0 = <&eth_pins>;
+
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ phy-mode = "2500base-x";
+ phy-handle = <&gphy>;
+
+ fixed-link {
+ speed = <1000>;
+ speed = <2500>;
+ full-duplex;
+ };
+
@@ -341,7 +346,7 @@
+};
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1286,6 +1286,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
@@ -1306,6 +1306,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7623a-unielec-u7623-02-emmc.dtb \
mt7622-bananapi-bpi-r64.dtb \
mt7622-linksys-e8450-ubi.dtb \
@@ -433,7 +438,7 @@
#ifdef CONFIG_MMC
static int initr_mmc(void)
{
@@ -720,6 +735,9 @@ static init_fnc_t init_sequence_r[] = {
@@ -713,6 +728,9 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_NMBM_MTD
initr_nmbm,
#endif

View File

@@ -1,14 +1,3 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1293,6 +1293,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7981-snfi-nand-rfb.dtb \
mt7981-emmc-rfb.dtb \
mt7981-sd-rfb.dtb \
+ mt7986a-bpi-r3-sd.dtb \
+ mt7986a-bpi-r3-emmc.dtb \
mt7986a-rfb.dtb \
mt7986b-rfb.dtb \
mt7986a-sd-rfb.dtb \
--- /dev/null
+++ b/configs/mt7986a_bpi-r3-emmc_defconfig
@@ -0,0 +1,196 @@
@@ -806,319 +795,8 @@
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7986a-bpi-r3-emmc.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7986a-bpi-r3-sd.dts"
+#include <dt-bindings/gpio/gpio.h>
+/ {
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_default>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ cap-mmc-hw-reset;
+ vmmc-supply = <&reg_3p3v>;
+ vqmmc-supply = <&reg_1p8v>;
+ non-removable;
+ status = "okay";
+};
+
--- /dev/null
+++ b/arch/arm/dts/mt7986a-bpi-r3-sd.dts
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include "mt7986.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "BananaPi BPi-R3";
+ compatible = "mediatek,mt7986", "mediatek,mt7986-sd-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer0;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+/*
+ factory {
+ label = "reset";
+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+ };
+*/
+ wps {
+ label = "reset";
+ gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_green: green {
+ label = "green:status";
+ gpios = <&gpio 69 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_status_blue: blue {
+ label = "blue:status";
+ gpios = <&gpio 86 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+};
+
+&uart0 {
+ mediatek,force-highspeed;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&pinctrl {
+ spic_pins: spi1-pins-func-1 {
+ mux {
+ function = "spi";
+ groups = "spi1_2";
+ };
+ };
+
+ uart1_pins: spi1-pins-func-3 {
+ mux {
+ function = "uart";
+ groups = "uart1_2";
+ };
+ };
+
+ pwm_pins: pwm0-pins-func-1 {
+ mux {
+ function = "pwm";
+ groups = "pwm0";
+ };
+ };
+
+ mmc0_pins_default: mmc0default {
+ mux {
+ function = "flash";
+ groups = "emmc_51";
+ };
+
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <MTK_DRIVE_6mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ conf-dsl {
+ pins = "EMMC_DSL";
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+ };
+
+ spi_flash_pins: spi0-pins-func-1 {
+ mux {
+ function = "flash";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
+ };
+
+ conf-pd {
+ pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <1>;
+ sample_sel = <0>;
+
+ spi_nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x40000>;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x40000 0x40000>;
+ };
+
+ partition@80000 {
+ label = "reserved";
+ reg = <0x80000 0x80000>;
+ };
+
+ partition@100000 {
+ label = "fip";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition@180000 {
+ label = "recovery";
+ reg = <0x180000 0xa80000>;
+ };
+
+ partition@c00000 {
+ label = "fit";
+ reg = <0xc00000 0x1400000>;
+ };
+ };
+ };
+
+ spi_nand@1 {
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x80000>;
+ };
+
+ partition@80000 {
+ label = "factory";
+ reg = <0x80000 0x300000>;
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7a80000>;
+ };
+ };
+ };
+};
+
+&watchdog {
+ status = "disabled";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_default>;
+ bus-width = <4>;
+ max-frequency = <52000000>;
+ cap-sd-highspeed;
+ r_smpl = <1>;
+ vmmc-supply = <&reg_3p3v>;
+ vqmmc-supply = <&reg_3p3v>;
+ status = "okay";
+};
+
--- /dev/null
+++ b/bananapi_bpi-r3_sdmmc_env
@@ -0,0 +1,75 @@
@@ -0,0 +1,80 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
@@ -1126,6 +804,11 @@
+bootargs=root=/dev/mmcblk0p65
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_sdmmc ; fi
+bootconf=config-mt7986a-bananapi-bpi-r3
+bootconf_base=config-mt7986a-bananapi-bpi-r3
+bootconf_nor=mt7986a-bananapi-bpi-r3-nor
+bootconf_nand=mt7986a-bananapi-bpi-r3-nand
+bootconf_sd=mt7986a-bananapi-bpi-r3-sd
+bootconf_emmc=mt7986a-bananapi-bpi-r3-emmc
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-bananapi_bpi-r3-initramfs-recovery.itb
+bootfile_upg=openwrt-mediatek-filogic-bananapi_bpi-r3-squashfs-sysupgrade.itb
@@ -1146,7 +829,7 @@
+bootmenu_7=Install bootloader, recovery and production to NAND.=if nand info ; then run ubi_init ; else echo "NAND not detected" ; fi ; run bootmenu_confirm_return
+bootmenu_8=Reboot.=reset
+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
+boot_update_conf=if nand info ; then setenv bootconf config-mt7986a-bananapi-bpi-r3-snand ; else if sf probe ; then setenv bootconf config-mt7986a-bananapi-bpi-r3-nor ; else setenv bootconf config-mt7986a-bananapi-bpi-r3 ; fi ; fi
+boot_update_conf=if nand info ; then setenv bootconf $bootconf_base#$bootconf_sd#$bootconf_nand ; else if sf probe ; then setenv bootconf $bootconf_base#$bootconf_sd#$bootconf_nor ; else setenv bootconf $bootconf_base#$bootconf_sd ; fi ; fi
+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
+boot_production=led $bootled_pwr on ; run boot_update_conf ; run sdmmc_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
@@ -1157,7 +840,7 @@
+boot_tftp_recovery=run boot_update_conf ; tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run sdmmc_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp=run boot_update_conf ; tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$image_size && mmc write $loadaddr 0x$part_addr 0x$image_size
+mmc_read_vol=mmc read $loadaddr $part_addr 0x8 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200
+mmc_read_vol=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200
+part_default=production
+part_recovery=recovery
+reset_factory=eraseenv && reset
@@ -1196,14 +879,19 @@
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"
--- /dev/null
+++ b/bananapi_bpi-r3_nor_env
@@ -0,0 +1,55 @@
@@ -0,0 +1,60 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootargs=root=/dev/mtdblock0p1
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_nor ; fi
+bootconf=config-mt7986a-bananapi-bpi-r3-emmc-nor
+bootconf=config-mt7986a-bananapi-bpi-r3
+bootconf_base=config-mt7986a-bananapi-bpi-r3
+bootconf_nor=mt7986a-bananapi-bpi-r3-nor
+bootconf_nand=mt7986a-bananapi-bpi-r3-nand
+bootconf_sd=mt7986a-bananapi-bpi-r3-sd
+bootconf_emmc=mt7986a-bananapi-bpi-r3-emmc
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-bananapi_bpi-r3-initramfs-recovery.itb
+bootfile_bl2=openwrt-mediatek-filogic-bananapi_bpi-r3-nor-preloader.bin
@@ -1238,13 +926,13 @@
+boot_tftp=run boot_update_conf ; tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
+boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader
+boot_update_conf=if mmc partconf 0 ; then setenv bootconf config-mt7986a-bananapi-bpi-r3-emmc-nor ; else setenv bootconf config-mt7986a-bananapi-bpi-r3-nor ; fi
+boot_update_conf=if mmc partconf 0 ; then setenv bootconf $bootconf_base#$bootconf_nor#$bootconf_emmc ; else setenv bootconf $bootconf_base#$bootconf_nor#$bootconf_sd ; fi
+boot_nor=run boot_production ; run boot_recovery
+boot_write_fip=mtd erase fip && mtd write fip $loadaddr
+boot_write_preloader=mtd erase bl2 && mtd write bl2 $loadaddr
+reset_factory=mtd erase u-boot-env
+nor_read_production=mtd read fit $loadaddr 0x0 0x1000 && imsz $loadaddr image_size && mtd read fit $loadaddr 0x0 $image_size
+nor_read_recovery=mtd read recovery $loadaddr 0x0 0x1000 && imsz $loadaddr image_size && mtd read recovery $loadaddr 0x0 $image_size
+nor_read_production=mtd read fit $loadaddr 0x0 0x20000 && imsz $loadaddr image_size && mtd read fit $loadaddr 0x0 $image_size
+nor_read_recovery=mtd read recovery $loadaddr 0x0 0x20000 && imsz $loadaddr image_size && mtd read recovery $loadaddr 0x0 $image_size
+nor_pad_size=imsz $loadaddr image_size ; setexpr image_eb 0x$image_size / 0x10000 ; setexpr tmp1 0x$image_size % 0x10000 ; test 0x$tmp1 -gt 0 && setexpr image_eb 0x$image_eb + 1 ; setexpr image_eb $image_eb * 0x10000
+nor_write_production=run nor_pad_size ; test 0x$image_eb -le 0x3000000 && mtd erase fit && mtd write fit $loadaddr 0x0 $image_eb
+nor_write_recovery=run nor_pad_size ; test 0x$image_eb -le 0x900000 && mtd erase recovery 0x0 0x$image_eb && mtd write recovery $loadaddr 0x0 $image_eb
@@ -1254,13 +942,18 @@
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"
--- /dev/null
+++ b/bananapi_bpi-r3_snand_env
@@ -0,0 +1,69 @@
@@ -0,0 +1,74 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootargs=root=/dev/ubiblock0_2p1
+bootconf=config-mt7986a-bananapi-bpi-r3-snand
+bootconf=config-mt7986a-bananapi-bpi-r3
+bootconf_base=config-mt7986a-bananapi-bpi-r3
+bootconf_nor=mt7986a-bananapi-bpi-r3-nor
+bootconf_nand=mt7986a-bananapi-bpi-r3-nand
+bootconf_sd=mt7986a-bananapi-bpi-r3-sd
+bootconf_emmc=mt7986a-bananapi-bpi-r3-emmc
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-bananapi_bpi-r3-initramfs-recovery.itb
@@ -1296,7 +989,7 @@
+boot_tftp=run boot_update_conf ; tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
+boot_update_conf=if mmc partconf 0 ; then setenv bootconf config-mt7986a-bananapi-bpi-r3-emmc-snand ; else setenv bootconf config-mt7986a-bananapi-bpi-r3-snand ; fi
+boot_update_conf=if mmc partconf 0 ; then setenv bootconf $bootconf_base#$bootconf_nand#$bootconf_emmc ; else setenv bootconf $bootconf_base#$bootconf_nand#$bootconf_sd ; fi
+part_default=production
+part_recovery=recovery
+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
@@ -1326,14 +1019,19 @@
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"
--- /dev/null
+++ b/bananapi_bpi-r3_emmc_env
@@ -0,0 +1,56 @@
@@ -0,0 +1,61 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootargs=root=/dev/mmcblk0p65
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi
+bootconf=config-mt7986a-bananapi-bpi-r3-emmc
+bootconf=config-mt7986a-bananapi-bpi-r3
+bootconf_base=config-mt7986a-bananapi-bpi-r3
+bootconf_nor=mt7986a-bananapi-bpi-r3-nor
+bootconf_nand=mt7986a-bananapi-bpi-r3-nand
+bootconf_sd=mt7986a-bananapi-bpi-r3-sd
+bootconf_emmc=mt7986a-bananapi-bpi-r3-emmc
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-bananapi_bpi-r3-initramfs-recovery.itb
+bootfile_bl2=openwrt-mediatek-filogic-bananapi_bpi-r3-emmc-preloader.bin
@@ -1367,9 +1065,9 @@
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2
+boot_tftp=run boot_update_conf ; tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_update_conf=if nand info ; then setenv bootconf config-mt7986a-bananapi-bpi-r3-emmc-snand ; else setenv bootconf config-mt7986a-bananapi-bpi-r3-emmc-nor ; fi
+boot_update_conf=if nand info ; then setenv bootconf $bootconf_base#$bootconf_emmc#$bootconf_nand ; else setenv bootconf $bootconf_base#$bootconf_emmc#$bootconf_nor ; fi
+mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$image_size && mmc write $loadaddr 0x$part_addr 0x$image_size
+mmc_read_vol=mmc read $loadaddr $part_addr 0x8 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200
+mmc_read_vol=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200
+part_default=production
+part_recovery=recovery
+reset_factory=eraseenv && reset

View File

@@ -182,7 +182,7 @@
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7986a-xiaomi_redmi-ax6000.dts
@@ -0,0 +1,156 @@
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
@@ -205,6 +205,11 @@
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x20000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ factory {

View File

@@ -555,7 +555,7 @@
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7986a-tplink-tl-xdr608x.dts
@@ -0,0 +1,191 @@
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
@@ -578,6 +578,11 @@
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x20000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
@@ -634,12 +639,12 @@
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ speed = <2500>;
+ full-duplex;
+ };
+};

View File

@@ -178,7 +178,7 @@
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7981_qihoo-360t7.dts
@@ -0,0 +1,180 @@
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
@@ -201,6 +201,11 @@
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
@@ -246,12 +251,12 @@
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ speed = <2500>;
+ full-duplex;
+ };
+};

View File

@@ -0,0 +1,461 @@
--- /dev/null
+++ b/configs/mt7981_xiaomi_mi-router-wr30u_defconfig
@@ -0,0 +1,175 @@
+CONFIG_ARM=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TARGET_MT7981=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7981_xiaomi_mi-router-wr30u"
+CONFIG_DEFAULT_ENV_FILE="xiaomi_mi-router-wr30u_env"
+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_xiaomi_mi-router-wr30u.dtb"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_BOOTDELAY=30
+CONFIG_AUTOBOOT_MENU_SHOW=y
+CONFIG_CFB_CONSOLE_ANSI=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_GPIO_HOG=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_FIT=y
+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_LOGLEVEL=7
+CONFIG_LOG=y
+CONFIG_SYS_PROMPT="MT7981> "
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_BOOTP=y
+CONFIG_CMD_BUTTON=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_CPU=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ENV_READMEM=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FDT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_LED=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_LINK_LOCAL=y
+# CONFIG_CMD_MBR is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_TFTPBOOT=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBI_RENAME=y
+CONFIG_CMD_UBIFS=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_SOURCE=y
+CONFIG_CMD_STRINGS=y
+CONFIG_CMD_UUID=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DM_MTD=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_MTK=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_PARTITION_UUIDS=y
+CONFIG_NETCONSOLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_SCSI=y
+CONFIG_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SCSI=y
+CONFIG_CMD_SCSI=y
+CONFIG_PHY=y
+CONFIG_PHY_MTK_TPHY=y
+CONFIG_PHY_FIXED=y
+CONFIG_MTK_AHCI=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PCI=y
+# CONFIG_MMC is not set
+# CONFIG_DM_MMC is not set
+CONFIG_MTD=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_DM_PCI=y
+CONFIG_PCIE_MEDIATEK=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7622=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPI_NAND=y
+CONFIG_MTK_SPI_NAND_MTD=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_WDT_MTK=y
+CONFIG_LZO=y
+CONFIG_ZSTD=y
+CONFIG_HEXDUMP=y
+CONFIG_RANDOM_UUID=y
+CONFIG_REGEX=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="ubi"
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_ENV_SIZE_REDUND=0x1f000
+CONFIG_ENV_UBI_VOLUME="ubootenv"
+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7981=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_HEXDUMP=y
+CONFIG_USE_DEFAULT_ENV_FILE=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTK_SPIM=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_LMB_MAX_REGIONS=64
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.254"
--- /dev/null
+++ b/arch/arm/dts/mt7981_xiaomi_mi-router-wr30u.dts
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7981.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Xiaomi Router WR30U";
+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer0;
+ };
+
+ config {
+ blink_led = "yellow:network";
+ system_led = "yellow:system";
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ mesh {
+ label = "mesh";
+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_9>;
+ linux,input-type = <EV_SW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_system_blue {
+ label = "blue:system";
+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+ };
+
+ led_system_yellow {
+ label = "yellow:system";
+ gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+ };
+
+ led_network_blue {
+ label = "blue:network";
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+
+ led_network_yellow {
+ label = "yellow:network";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&uart0 {
+ mediatek,force-highspeed;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&pinctrl {
+ spi_flash_pins: spi0-pins-func-1 {
+ mux {
+ function = "flash";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+
+ spic_pins: spi1-pins-func-1 {
+ mux {
+ function = "spi";
+ groups = "spi1_1";
+ };
+ };
+
+ uart1_pins: spi1-pins-func-3 {
+ mux {
+ function = "uart";
+ groups = "uart1_2";
+ };
+ };
+
+ pwm_pins: pwm0-pins-func-1 {
+ mux {
+ function = "pwm";
+ groups = "pwm0_1", "pwm1_0";
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x00 0x100000>;
+ };
+
+ partition@100000 {
+ label = "Nvram";
+ reg = <0x100000 0x40000>;
+ };
+
+ partition@140000 {
+ label = "Bdata";
+ reg = <0x140000 0x40000>;
+ };
+
+ partition@180000 {
+ label = "factory";
+ reg = <0x180000 0x200000>;
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x200000>;
+ };
+
+ partition@580000 {
+ label = "crash";
+ reg = <0x580000 0x40000>;
+ };
+
+ partition@5c0000 {
+ label = "crash_log";
+ reg = <0x5c0000 0x40000>;
+ };
+
+ partition@600000 {
+ label = "ubi";
+ reg = <0x600000 0x7000000>;
+ };
+
+ partition@7600000 {
+ label = "KF";
+ reg = <0x7600000 0x40000>;
+ };
+ };
+ };
+};
+
+&watchdog {
+ status = "disabled";
+};
--- /dev/null
+++ b/xiaomi_mi-router-wr30u_env
@@ -0,0 +1,56 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootconf=config-1
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-xiaomi_mi-router-wr30u-ubootmod-initramfs-recovery.itb
+bootfile_bl2=openwrt-mediatek-filogic-xiaomi_mi-router-wr30u-ubootmod-preloader.bin
+bootfile_fip=openwrt-mediatek-filogic-xiaomi_mi-router-wr30u-ubootmod-bl31-uboot.fip
+bootfile_upg=openwrt-mediatek-filogic-xiaomi_mi-router-wr30u-ubootmod-squashfs-sysupgrade.itb
+bootled_pwr=yellow:system
+bootled_rec=yellow:network
+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
+bootmenu_default=0
+bootmenu_delay=0
+bootmenu_title= ( ( ( OpenWrt ) ) )
+bootmenu_0=Initialize environment.=run _firstboot
+bootmenu_0d=Run default boot command.=run boot_default
+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
+bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
+bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
+bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
+bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
+bootmenu_8=Reboot.=reset
+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
+boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
+boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
+boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
+boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
+part_default=production
+part_recovery=recovery
+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
+mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
+mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
+_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
+_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"

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