OpenWrt v24.10.0-rc7: adjust config defaults

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

feeds.conf.default

@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git^c84e022ee9fae5884a7c698746bfac4d74a12a2d
-src-git luci https://git.openwrt.org/project/luci.git^65c86ed3244f5ad3dc5fdfca93f40b20ab2f550c
-src-git routing https://git.openwrt.org/feed/routing.git^84d97e684bcb6a63dbfdfbfd9ec7407192861239
+src-git packages https://git.openwrt.org/feed/packages.git^cf301cd92c4c501271cf6c1caf19eabef3ce0c09
+src-git luci https://git.openwrt.org/project/luci.git^bdf1db5fb536b155d4b035f3bbf9590782e41cf7
+src-git routing https://git.openwrt.org/feed/routing.git^e87b55c6a642947ad7e24cd5054a637df63d5dbe
 src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147

include/kernel-6.6

@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .69
-LINUX_KERNEL_HASH-6.6.69 = 9c6305567b75d99514cde6eb9de39973f3d5c857a75bd9dcdfca57041f8d4f34
+LINUX_VERSION-6.6 = .73
+LINUX_KERNEL_HASH-6.6.73 = d2028db190c201650898be8db1c705e9fe73ab44fc04290b4f7af63514122490

include/kernel-defaults.mk

@@ -175,7 +175,6 @@ define Kernel/PrepareConfigPerRootfs
 		[ ! -d "$(1)" ] || rm -rf $(1); \
 		mkdir $(1) && $(CP) -T $(LINUX_DIR) $(1); \
 		touch $(1)/.config; \
-		rm -rf $(1)/usr/initramfs_data.cpio*; \
 	}
 endef
 
@@ -190,6 +189,7 @@ define Kernel/CompileImage/Initramfs
 		$(call Kernel/Configure/Initramfs,$(if $(1),$(1),$(TARGET_DIR)),$(LINUX_DIR)$(2)); \
 		$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(if $(1),$(1),$(TARGET_DIR))/init; \
 		$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(if $(1),$(1),$(TARGET_DIR)) $(if $(1),$(1),$(TARGET_DIR))/init;) \
+		rm -rf $(LINUX_DIR)$(2)/usr/initramfs_data.cpio*; \
 		$(if $(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE), \
 			$(call locked,{ \
 				$(if $(call qstrip,$(CONFIG_EXTERNAL_CPIO)), \

include/version.mk

@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc5)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc7)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28304-6dacba30a7)
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28417-daef29c75d)
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc5)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc7)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)

package/base-files/image-config.in

@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10.0-rc5"
+		default "https://downloads.openwrt.org/releases/24.10.0-rc7"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:

package/kernel/lantiq/vrx518_tc/Makefile

@@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=vrx518_tc
 PKG_VERSION:=1.5.12.4
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 PKG_BASE_NAME:=vrx518_tc_drv
 
 UGW_VERSION=8.5.2.10

package/kernel/lantiq/vrx518_tc/patches/100-compat.patch

@@ -166,7 +166,7 @@
  
 -	return (skb->DW0 >> 3) & 0xF;
 +// 	return (skb->DW0 >> 3) & 0xF;
-+	return 1;
++	return 0;	/* We use only one connection for now, so return the first connection id */
  }
  
  static int atm_get_qid_by_vcc(struct net_device *dev, struct sk_buff *skb,

package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch

@@ -0,0 +1,144 @@
+Extra ATM traffic classes requires atm_qos struct extension and a set of
+new defines. What itself requires atm.h updates both in the kernel and
+in the toolchain. On another hand we do not have any real users of these
+traffic classes.
+
+In absence of real user there are no benefits to support this
+functionality. There is only the burden of maintenance of extra patches
+all around the building framework. So just drop these extra QoS traffic
+classes in order to facilitate maintenance and avoid side effects like
+breaking compatibility with existing userspace tools like linux-atm.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+--
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -463,34 +463,9 @@ static void set_qsb(struct atm_priv *pri
+ 	/* Weighted Fair Queueing Factor (WFQF) */
+ 	switch (qos->txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		/*  real time queue gets weighted fair queueing bypass  */
+ 		q_parm_tbl.bit.wfqf = 0;
+ 		break;
+-	case ATM_VBR_NRT:
+-	case ATM_UBR_PLUS:
+-		/*  WFQF calculation here is based on virtual cell rates,
+-		      to reduce granularity for high rates
+-		*/
+-		/*  WFQF is maximum cell rate / garenteed cell rate */
+-		/*  wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX /
+-			requested_minimum_peak_cell_rate
+-		*/
+-		if (qos->txtp.min_pcr == 0)
+-			q_parm_tbl.bit.wfqf = QSB_WFQ_NONUBR_MAX;
+-		else {
+-			tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX /
+-				qos->txtp.min_pcr;
+-			if (tmp == 0)
+-				q_parm_tbl.bit.wfqf = 1;
+-			else if (tmp > QSB_WFQ_NONUBR_MAX)
+-				q_parm_tbl.bit.wfqf
+-					= QSB_WFQ_NONUBR_MAX;
+-			else
+-				q_parm_tbl.bit.wfqf = tmp;
+-		}
+-		break;
+-
+ 	case ATM_UBR:
+ 	default:
+ 		q_parm_tbl.bit.wfqf = QSB_WFQ_UBR_BYPASS;
+@@ -498,42 +473,9 @@ static void set_qsb(struct atm_priv *pri
+ 	}
+ 
+ 	/* Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 */
+-	if (qos->txtp.traffic_class == ATM_VBR_RT ||
+-		qos->txtp.traffic_class == ATM_VBR_NRT) {
+-		if (qos->txtp.scr == 0) {
+-			/* disable shaper */
+-			q_vbr_parm_tbl.bit.taus = 0;
+-			q_vbr_parm_tbl.bit.ts = 0;
+-		} else {
+-			/* Cell Loss Priority  (CLP) */
+-			if ((vcc->atm_options & ATM_ATMOPT_CLP))
+-				/* CLP1 */
+-				q_parm_tbl.bit.vbr = 1;
+-			else
+-				/* CLP0 */
+-				q_parm_tbl.bit.vbr = 0;
+-			/* Rate Shaper Parameter (TS) and
+-			    Burst Tolerance Parameter for SCR (tauS)
+-			*/
+-			tmp = ((qsb_clk * param->qsb_tstep) >> 5) /
+-					qos->txtp.scr + 1;
+-			q_vbr_parm_tbl.bit.ts
+-				= tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
+-			tmp = (qos->txtp.mbs - 1) *
+-				(q_vbr_parm_tbl.bit.ts -
+-					q_parm_tbl.bit.tp) / 64;
+-			if (tmp == 0)
+-				q_vbr_parm_tbl.bit.taus = 1;
+-			else if (tmp > QSB_TAUS_MAX)
+-				q_vbr_parm_tbl.bit.taus
+-					= QSB_TAUS_MAX;
+-			else
+-				q_vbr_parm_tbl.bit.taus = tmp;
+-		}
+-	} else {
+-		q_vbr_parm_tbl.bit.taus = 0;
+-		q_vbr_parm_tbl.bit.ts = 0;
+-	}
++	/* NB: shaper disabled since there no user interface to activate it */
++	q_vbr_parm_tbl.bit.taus = 0;
++	q_vbr_parm_tbl.bit.ts = 0;
+ 
+ 	/* Queue Parameter Table (QPT) */
+ 	tc_w32(QSB_QPT_SET_MASK, QSB_RTM);
+@@ -1064,15 +1006,6 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/* check bandwidth */
+ 	if ((vcc->qos.txtp.traffic_class == ATM_CBR &&
+ 		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_RT &&
+-		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_NRT &&
+-		vcc->qos.txtp.scr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS &&
+-		vcc->qos.txtp.min_pcr >
+ 			(port->tx_max_cell_rate - port->tx_used_cell_rate))) {
+ 		tc_dbg(priv->tc_priv, MSG_INIT, "exceed TX line rate\n");
+ 		return -EINVAL;
+@@ -1128,15 +1061,8 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/*  reserve bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate += vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate += vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate += vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* update atm_vcc structure */
+@@ -1222,15 +1148,8 @@ static void ppe_close(struct atm_vcc *vc
+ 	/* release bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate -= vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* idle for a while to let parallel operation finish */

package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch

@@ -3,7 +3,7 @@ This replaces it by a basic working implementation.
 
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -603,7 +603,11 @@ static void atm_aca_init(struct atm_priv
+@@ -545,7 +545,11 @@ static void atm_aca_init(struct atm_priv
  	cfg = &priv->tc_priv->cfg;
  
  	txin = &param.aca_txin;
@@ -15,7 +15,7 @@ This replaces it by a basic working implementation.
  	txin->hd_size_in_dw = cfg->txin.soc_desc_dwsz;
  	txin->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_IN_PD_LIST_BASE);
  	txin->pd_desc_num = __ACA_TX_IN_PD_LIST_NUM;
-@@ -625,7 +629,11 @@ static void atm_aca_init(struct atm_priv
+@@ -567,7 +571,11 @@ static void atm_aca_init(struct atm_priv
  		txin->soc_cmlt_cnt_addr);
  
  	txout = &param.aca_txout;
@@ -27,7 +27,7 @@ This replaces it by a basic working implementation.
  	txout->hd_size_in_dw = cfg->txout.soc_desc_dwsz;
  	txout->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_OUT_PD_LIST_BASE);
  	txout->pd_desc_num = __ACA_TX_OUT_PD_LIST_NUM;
-@@ -647,7 +655,11 @@ static void atm_aca_init(struct atm_priv
+@@ -589,7 +597,11 @@ static void atm_aca_init(struct atm_priv
  		txout->soc_cmlt_cnt_addr);
  
  	rxout = &param.aca_rxout;
@@ -39,7 +39,7 @@ This replaces it by a basic working implementation.
  	rxout->hd_size_in_dw = cfg->rxout.soc_desc_dwsz;
  	rxout->pd_desc_base = SB_XBAR_ADDR(__ACA_RX_OUT_PD_LIST_BASE);
  	rxout->pd_desc_num = __ACA_RX_OUT_PD_LIST_NUM;
-@@ -669,7 +681,11 @@ static void atm_aca_init(struct atm_priv
+@@ -611,7 +623,11 @@ static void atm_aca_init(struct atm_priv
  		rxout->soc_cmlt_cnt_addr);
  
  	rxin = &param.aca_rxin;
@@ -51,7 +51,7 @@ This replaces it by a basic working implementation.
  	rxin->hd_size_in_dw = cfg->rxin.soc_desc_dwsz;
  	rxin->pd_desc_base = SB_XBAR_ADDR(__RX_IN_PD_DES_LIST_BASE);
  	rxin->pd_desc_num = __ACA_RX_IN_PD_LIST_NUM;
-@@ -1261,7 +1277,7 @@ static int ppe_ioctl(struct atm_dev *dev
+@@ -1180,7 +1196,7 @@ static int ppe_ioctl(struct atm_dev *dev
  static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb)
  {
  	int ret, qid, mpoa_pt, mpoa_type, vid;
@@ -60,7 +60,7 @@ This replaces it by a basic working implementation.
  	struct atm_priv *priv;
  
  	if (!vcc) {
-@@ -1327,12 +1343,14 @@ static int ppe_send(struct atm_vcc *vcc,
+@@ -1246,12 +1262,14 @@ static int ppe_send(struct atm_vcc *vcc,
  	tc_dbg(priv->tc_priv, MSG_TX, "vid: 0x%x, qid: 0x%x\n",
  			vid, qid);
  
@@ -855,12 +855,12 @@ This replaces it by a basic working implementation.
 -			continue;
 +
 +		// this seems to be a pointer to a DS PKT buffer
-+		phyaddr = desc->data_ptr + desc->byte_off;
++		phyaddr = desc->data_ptr;
 +		ptr = plat_mem_virt(phyaddr);
-+
 +		len = desc->data_len;
 +
-+		dma_sync_single_range_for_cpu(pdev, phyaddr, 0, len, DMA_FROM_DEVICE);
++		dma_sync_single_for_cpu(pdev, phyaddr, desc->byte_off + len,
++					DMA_FROM_DEVICE);
 +
 +		skb = netdev_alloc_skb(g_plat_priv->netdev, len);
 +		if (unlikely(!skb)) {
@@ -871,7 +871,7 @@ This replaces it by a basic working implementation.
 -		ring_idx_inc(rxout, idx);
 +
 +		dst = skb_put(skb, len);
-+		memcpy(dst, ptr, len);
++		memcpy(dst, ptr + desc->byte_off, len);
 +
 +		priv->tc_ops.recv(g_plat_priv->netdev, skb);
 +

package/kernel/lantiq/vrx518_tc/patches/202-napi.patch

@@ -296,7 +296,7 @@
  	priv->tc_ops.umt_start = plat_umt_start;
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -3650,7 +3650,7 @@ static void atm_aca_ring_config_init(str
+@@ -3569,7 +3569,7 @@ static void atm_aca_ring_config_init(str
  static int atm_ring_init(struct atm_priv *priv)
  {
  	atm_aca_ring_config_init(priv);
@@ -305,7 +305,7 @@
  }
  
  static int atm_init(struct tc_priv *tcpriv, u32 ep_id)
-@@ -4020,7 +4020,7 @@ void atm_tc_unload(void)
+@@ -3939,7 +3939,7 @@ void atm_tc_unload(void)
  	/* unregister device */
  	if (priv->tc_priv->tc_ops.dev_unreg != NULL)
  		priv->tc_priv->tc_ops.dev_unreg(NULL,

package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch

@@ -1,6 +1,6 @@
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -746,7 +746,8 @@ static void atm_aca_init(struct atm_priv
+@@ -688,7 +688,8 @@ static void atm_aca_init(struct atm_priv
  		ACA_TXOUT_EN | ACA_RXIN_EN | ACA_RXOUT_EN, 1);
  }
  
@@ -10,7 +10,7 @@
  {
  	struct tm nowtm;
  	char tmbuf[64];
-@@ -765,7 +766,8 @@ static int print_datetime(char *buffer,
+@@ -707,7 +708,8 @@ static int print_datetime(char *buffer,
  			nowtm.tm_hour,
  			nowtm.tm_min,
  			nowtm.tm_sec);
@@ -20,7 +20,7 @@
  
  	return 0;
  }
-@@ -967,7 +969,7 @@ void show_atm_pvc(struct seq_file *seq,
+@@ -909,7 +911,7 @@ void show_atm_pvc(struct seq_file *seq,
  	char buf[64];
  
  	seq_printf(seq, "\tNet device: %s\n", pvc->dev->name);

package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch

@@ -0,0 +1,75 @@
+From: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+Date: Fri, 10 Jan 2025 00:57:27 +0000
+Subject: [PATCH] vrx518_tc: atm_tc: fix crash on subif_reg absence
+
+VRX518 (sw_plat) platform does not provid the subif_reg/subif_unreg ops
+in the same time ATM TC layer unconditionally calls them, what leads to
+the kernel crash on the atm_hook_mpoa_setup hook invocation from the ATM
+stack:
+
+  vrx518_tc:mpoa_setup_sync : sync: conn: 0, vpi: 0, vci: 35, mpoa_type: 0, mpoa_mode: 0
+  Unable to handle kernel NULL pointer dereference at virtual address 00000000
+
+Subif registration is optional and PTM TC do this only when the
+corresponding ops are defined. Do the same for ATM TC and call
+subif_reg/subif_unreg only if they are not NULL.
+
+While at it, move subif related data preparation under the 'if' block
+in order to group and isolate that aux code.
+
+Run tested with FRITZ!Box 7530.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+---
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -1158,8 +1158,9 @@ static void ppe_close(struct atm_vcc *vc
+ 		validate_oam_htu_entry(priv, 0);
+ 	spin_unlock_bh(&priv->atm_lock);
+ 
+-	priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
+-					priv->conn[cid].subif_id, 0);
++	if (priv->tc_priv->tc_ops.subif_unreg)
++		priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
++						  priv->conn[cid].subif_id, 0);
+ 				
+ 	memset(conn, 0, sizeof(*conn));
+ 
+@@ -2710,24 +2711,26 @@ static void mpoa_setup_sync(struct atm_p
+ 	struct wtx_queue_config_t tx_qcfg;
+ 	struct uni_cell_header *cell_header;
+ 	struct atm_vcc *vcc;
+-	struct net_device *dev;
+-	char dev_name[32];
+ 
+ 	tc_dbg(priv->tc_priv, MSG_INIT,
+ 		"sync: conn: %d, vpi: %d, vci: %d, mpoa_type: %d, mpoa_mode: %d\n",
+ 		conn, priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci,
+ 		priv->conn[conn].mpoa_type, priv->conn[conn].mpoa_mode);
+ 
+-	dev = priv->conn[conn].dev;
++	if (priv->tc_priv->tc_ops.subif_reg) {
++		struct net_device *dev;
++		char dev_name[32];
++
++		dev = priv->conn[conn].dev;
++		if (!dev)
++			sprintf(dev_name, "atm_%d%d",
++				priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+ 
+-	if (!dev)
+-		sprintf(dev_name, "atm_%d%d",
+-			priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+-
+-	priv->tc_priv->tc_ops.subif_reg(dev, (!dev) ? dev_name : dev->name,
+-				&priv->conn[conn].subif_id, 0);
+-	tc_dbg(priv->tc_priv, MSG_INIT,
+-		"conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++		priv->tc_priv->tc_ops.subif_reg(dev, !dev ? dev_name : dev->name,
++						&priv->conn[conn].subif_id, 0);
++		tc_dbg(priv->tc_priv, MSG_INIT,
++		       "conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++	}
+ 	vcc = priv->conn[conn].vcc;
+ 
+ 	/*  set htu entry   */

package/kernel/linux/modules/netdevices.mk

@@ -447,9 +447,10 @@ $(eval $(call KernelPackage,phy-micrel))
 define KernelPackage/phy-realtek
    SUBMENU:=$(NETWORK_DEVICES_MENU)
    TITLE:=Realtek Ethernet PHY driver
-   KCONFIG:=CONFIG_REALTEK_PHY
-   DEPENDS:=+kmod-libphy
-   FILES:=$(LINUX_DIR)/drivers/net/phy/realtek.ko
+   KCONFIG:=CONFIG_REALTEK_PHY \
+    CONFIG_REALTEK_PHY_HWMON=y
+   DEPENDS:=+kmod-libphy +kmod-hwmon-core
+   FILES:=$(LINUX_DIR)/drivers/net/phy/realtek/realtek.ko
    AUTOLOAD:=$(call AutoLoad,18,realtek,1)
 endef
 
@@ -970,7 +971,7 @@ $(eval $(call KernelPackage,8139cp))
 define KernelPackage/r8169
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=RealTek RTL-8169 PCI Gigabit Ethernet Adapter kernel support
-  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres +kmod-hwmon-core
+  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres
   KCONFIG:= \
     CONFIG_R8169 \
     CONFIG_R8169_LEDS=y

package/kernel/linux/modules/netsupport.mk

@@ -1026,7 +1026,7 @@ endef
 $(eval $(call KernelPackage,bpf-test))
 
 
-SCHED_MODULES_EXTRA = sch_codel sch_gred sch_multiq sch_sfq sch_teql sch_fq act_pedit act_simple act_skbmod act_csum em_cmp em_nbyte em_meta em_text
+SCHED_MODULES_EXTRA = sch_codel sch_gred sch_multiq sch_sfq sch_teql sch_fq sch_ets act_pedit act_simple act_skbmod act_csum em_cmp em_nbyte em_meta em_text
 SCHED_FILES_EXTRA = $(foreach mod,$(SCHED_MODULES_EXTRA),$(LINUX_DIR)/net/sched/$(mod).ko)
 
 define KernelPackage/sched
@@ -1040,6 +1040,7 @@ define KernelPackage/sched
 	CONFIG_NET_SCH_SFQ \
 	CONFIG_NET_SCH_TEQL \
 	CONFIG_NET_SCH_FQ \
+	CONFIG_NET_SCH_ETS \
 	CONFIG_NET_ACT_PEDIT \
 	CONFIG_NET_ACT_SIMP \
 	CONFIG_NET_ACT_SKBMOD \

package/kernel/linux/modules/usb.mk

@@ -1737,7 +1737,7 @@ $(eval $(call KernelPackage,usbip-server))
 
 define KernelPackage/usb-chipidea
   TITLE:=Host and device support for Chipidea controllers
-  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles
+  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles +kmod-phy-ath79-usb
   KCONFIG:= \
 	CONFIG_EXTCON \
 	CONFIG_USB_CHIPIDEA \

package/kernel/mt76/Makefile

@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-04
-PKG_SOURCE_VERSION:=e354436db4402552bcb0cbe9abab2a46fb1ad31c
-PKG_MIRROR_HASH:=7e3894e1f2641e172f87be1ae0cc6adda318d989350ebd53500a7df02f0afd8f
+PKG_SOURCE_DATE:=2025-01-14
+PKG_SOURCE_VERSION:=8e4f72b682e9070108536507c5e2720b18c3816d
+PKG_MIRROR_HASH:=fa8c5a2ece9e7287605910d9f906b601711c7863613addaadd666f9e3858a9e7
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 PKG_USE_NINJA:=0

package/libs/wolfssl/Makefile

@@ -8,12 +8,15 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.7.2-stable
+PKG_VERSION:=5.7.6
+PKG_REAL_VERSION:=$(PKG_VERSION)-stable
 PKG_RELEASE:=1
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
-PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
+PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
+PKG_HASH:=52b1e439e30d1ed8162a16308a8525a862183b67aa30373b11166ecbab000d63
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)
 
 PKG_FIXUP:=libtool libtool-abiver
 PKG_INSTALL:=1
@@ -40,7 +43,7 @@ PKG_CONFIG_DEPENDS:=\
 	CONFIG_WOLFSSL_HAS_TLSV13 \
 	CONFIG_WOLFSSL_HAS_WPAS
 
-PKG_ABI_VERSION:=$(patsubst %-stable,%,$(PKG_VERSION)).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
+PKG_ABI_VERSION:=$(PKG_VERSION).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
 
 PKG_CONFIG_DEPENDS+=\
 	CONFIG_PACKAGE_libwolfssl-benchmark \

package/libs/wolfssl/patches/100-disable-hardening-check.patch

@@ -1,6 +1,6 @@
 --- a/wolfssl/wolfcrypt/settings.h
 +++ b/wolfssl/wolfcrypt/settings.h
-@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
+@@ -3722,7 +3722,7 @@ extern void uITRON4_free(void *p) ;
  
  /* warning for not using harden build options (default with ./configure) */
  /* do not warn if big integer support is disabled */

package/network/config/netifd/files/etc/init.d/network

@@ -30,7 +30,6 @@ reload_service() {
 
 	init_switch
 	ubus call network reload || rv=1
-	[ -x /sbin/wifi ] && /sbin/wifi reload_legacy
 	return $rv
 }
 

package/network/config/netifd/files/usr/libexec/network/packet-steering.uc

@@ -65,8 +65,9 @@ function cpu_mask(cpu)
 	return sprintf("%x", mask);
 }
 
-function set_netdev_cpu(dev, cpu) {
-	let queues = glob(`/sys/class/net/${dev}/queues/rx-*/rps_cpus`);
+function set_netdev_cpu(dev, cpu, rx_queue) {
+	rx_queue ??= "rx-*";
+	let queues = glob(`/sys/class/net/${dev}/queues/${rx_queue}/rps_cpus`);
 	let val = cpu_mask(cpu);
 	if (disable)
 		val = 0;
@@ -76,7 +77,7 @@ function set_netdev_cpu(dev, cpu) {
 		if (!do_nothing)
 			writefile(queue, `${val}`);
 	}
-	queues = glob(`/sys/class/net/${dev}/queues/rx-*/rps_flow_cnt`);
+	queues = glob(`/sys/class/net/${dev}/queues/${rx_queue}/rps_flow_cnt`);
 	for (let queue in queues) {
 		if (debug || do_nothing)
 			warn(`echo ${local_flows} > ${queue}\n`);
@@ -87,7 +88,7 @@ function set_netdev_cpu(dev, cpu) {
 
 function task_device_match(name, device)
 {
-	let napi_match = match(name, /napi\/([^-+])-\d+/);
+	let napi_match = match(name, /napi\/([^-]*)-\d+/);
 	if (!napi_match)
 		napi_match = match(name, /mt76-tx (phy\d+)/);
 	if (napi_match &&
@@ -160,6 +161,9 @@ for (let dev in netdevs) {
 			netdev: [],
 			phy: [],
 			tasks: [],
+			rx_tasks: [],
+			rx_queues: map(glob(`/sys/class/net/${dev}/queues/rx-*/rps_cpus`),
+			               (v) => basename(dirname(v))),
 		};
 	}
 
@@ -187,11 +191,51 @@ for (let path in glob("/proc/*/exe")) {
 			continue;
 
 		push(dev.tasks, pid);
+
+		let napi_match = match(name, /napi\/([^-]*)-(\d+)/);
+		if (napi_match && napi_match[2] > 0)
+			push(dev.rx_tasks, pid);
 		break;
 	}
 }
 
+function assign_dev_queues_cpu(dev) {
+	let num = length(dev.rx_queues);
+	if (num < length(dev.rx_tasks))
+		num = length(dev.rx_tasks);
+
+	for (let i = 0; i < num; i++) {
+		let cpu;
+
+		let task = dev.rx_tasks[i];
+		if (num >= length(cpus))
+			cpu = i % length(cpus);
+		else if (task)
+			cpu = get_next_cpu(napi_weight);
+		else
+			cpu = -1;
+		set_task_cpu(task, cpu);
+
+		let rxq = dev.rx_queues[i];
+		if (!rxq)
+			continue;
+
+		if (num >= length(cpus))
+			cpu = (i + 1) % length(cpus);
+		else if (all_cpus)
+			cpu = -1;
+		else
+			cpu = get_next_cpu(napi_weight, cpu);
+		for (let netdev in dev.netdev)
+			set_netdev_cpu(netdev, cpu, rxq);
+	}
+}
+
 function assign_dev_cpu(dev) {
+	if (length(dev.rx_queues) > 1 &&
+		length(dev.rx_tasks) > 1)
+		return assign_dev_queues_cpu(dev);
+
 	if (length(dev.tasks) > 0) {
 		let cpu = dev.napi_cpu = get_next_cpu(napi_weight);
 		for (let task in dev.tasks)
@@ -204,7 +248,6 @@ function assign_dev_cpu(dev) {
 			cpu = -1;
 		else
 			cpu = get_next_cpu(rx_weight, dev.napi_cpu);
-		dev.rx_cpu = cpu;
 		for (let netdev in dev.netdev)
 			set_netdev_cpu(netdev, cpu);
 	}

package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh

@@ -29,6 +29,8 @@ drv_mac80211_init_device_config() {
 	config_add_string path phy 'macaddr:macaddr'
 	config_add_string tx_burst
 	config_add_string distance
+	config_add_string ifname_prefix
+	config_add_string macaddr_base
 	config_add_int radio beacon_int chanbw frag rts
 	config_add_int rxantenna txantenna txpower min_tx_power
 	config_add_int num_global_macaddr multiple_bssid
@@ -529,6 +531,7 @@ ${hostapd_noscan:+noscan=1}
 ${tx_burst:+tx_queue_data2_burst=$tx_burst}
 ${multiple_bssid:+mbssid=$multiple_bssid}
 #num_global_macaddr=$num_global_macaddr
+#macaddr_base=$macaddr_base
 $base_cfg
 
 EOF
@@ -576,7 +579,7 @@ mac80211_generate_mac() {
 	local phy="$1"
 	local id="${macidx:-0}"
 
-	wdev_tool "$phy$phy_suffix" get_macaddr id=$id num_global=$num_global_macaddr mbssid=${multiple_bssid:-0}
+	wdev_tool "$phy$phy_suffix" get_macaddr id=$id num_global=$num_global_macaddr mbssid=${multiple_bssid:-0} macaddr_base=${macaddr_base}
 }
 
 get_board_phy_name() (
@@ -660,9 +663,9 @@ mac80211_check_ap() {
 }
 
 mac80211_set_ifname() {
-	local phy="$1"
-	local prefix="$2"
-	eval "ifname=\"$phy-$prefix\${idx_$prefix:-0}\"; idx_$prefix=\$((\${idx_$prefix:-0 } + 1))"
+	local prefix="$1"
+	local type="$2"
+	eval "ifname=\"$prefix$type\${idx_$type:-0}\"; idx_$type=\$((\${idx_$type:-0 } + 1))"
 }
 
 mac80211_prepare_vif() {
@@ -679,7 +682,7 @@ mac80211_prepare_vif() {
 		monitor) prefix=mon;;
 		esac
 
-		mac80211_set_ifname "$phy$vif_phy_suffix" "$prefix"
+		mac80211_set_ifname "$ifname_prefix" "$prefix"
 	}
 
 	append active_ifnames "$ifname"
@@ -841,11 +844,22 @@ mac80211_setup_adhoc() {
 
 mac80211_setup_mesh() {
 	json_get_vars ssid mesh_id mcast_rate
+	json_get_values iface_basic_rate_list basic_rate
 
 	mcval=
 	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
 	[ -n "$mesh_id" ] && ssid="$mesh_id"
 
+	br_list="$basic_rate_list"
+	if [ -n "$iface_basic_rate_list" ]; then
+		br_list="$iface_basic_rate_list"
+	fi
+
+	brstr=
+	for br in $br_list; do
+		wpa_supplicant_add_rate brstr "$br"
+	done
+
 	local prev
 	json_set_namespace wdev_uc prev
 
@@ -856,6 +870,7 @@ mac80211_setup_mesh() {
 	json_add_string freq "$freq"
 	json_add_string htmode "$iw_htmode"
 	[ -n "$mcval" ] && json_add_string mcast-rate "$mcval"
+	[ -n "$brstr" ] && json_add_string basic-rates "$brstr"
 	json_add_int beacon-interval "$beacon_int"
 	mac80211_add_mesh_params
 
@@ -938,6 +953,7 @@ wpa_supplicant_set_config() {
 	json_add_string phy "$phy"
 	json_add_int radio "$radio"
 	json_add_int num_global_macaddr "$num_global_macaddr"
+	json_add_string macaddr_base "$macaddr_base"
 	json_add_boolean defer 1
 	local data="$(json_dump)"
 
@@ -984,7 +1000,7 @@ wpa_supplicant_start() {
 
 	[ -n "$wpa_supp_init" ] || return 0
 
-	ubus_call wpa_supplicant config_set '{ "phy": "'"$phy"'", "radio": '"$radio"', "num_global_macaddr": '"$num_global_macaddr"' }' > /dev/null
+	ubus_call wpa_supplicant config_set '{ "phy": "'"$phy"'", "radio": '"$radio"', "num_global_macaddr": '"$num_global_macaddr"', "macaddr_base": "'"$macaddr_base"'" }' > /dev/null
 }
 
 mac80211_setup_supplicant() {
@@ -1110,7 +1126,8 @@ drv_mac80211_setup() {
 		txpower \
 		rxantenna txantenna \
 		frag rts beacon_int:100 htmode \
-		num_global_macaddr:1 multiple_bssid
+		num_global_macaddr:1 multiple_bssid \
+		ifname_prefix macaddr_base
 	json_get_values basic_rate_list basic_rate
 	json_get_values scan_list scan_list
 	json_select ..
@@ -1129,6 +1146,8 @@ drv_mac80211_setup() {
 		return 1
 	}
 
+	set_default ifname_prefix "$phy$vif_phy_suffix-"
+
 	local wdev
 	local cwdev
 	local found

package/network/config/wifi-scripts/files/sbin/wifi

@@ -37,135 +37,22 @@ wifi_isup() {
 	return 0
 }
 
-find_net_config() {(
-	local vif="$1"
-	local cfg
-	local ifname
-
-	config_get cfg "$vif" network
-
-	[ -z "$cfg" ] && {
-		include /lib/network
-		scan_interfaces
-
-		config_get ifname "$vif" ifname
-
-		cfg="$(find_config "$ifname")"
-	}
-	[ -z "$cfg" ] && return 0
-	echo "$cfg"
-)}
-
-
-bridge_interface() {(
-	local cfg="$1"
-	[ -z "$cfg" ] && return 0
-
-	include /lib/network
-	scan_interfaces
-
-	for cfg in $cfg; do
-		config_get iftype "$cfg" type
-		[ "$iftype" = bridge ] && config_get "$cfg" ifname
-		prepare_interface_bridge "$cfg"
-		return $?
-	done
-)}
-
-prepare_key_wep() {
-	local key="$1"
-	local hex=1
-
-	echo -n "$key" | grep -qE "[^a-fA-F0-9]" && hex=0
-	[ "${#key}" -eq 10 -a $hex -eq 1 ] || \
-	[ "${#key}" -eq 26 -a $hex -eq 1 ] || {
-		[ "${key:0:2}" = "s:" ] && key="${key#s:}"
-		key="$(echo -n "$key" | hexdump -ve '1/1 "%02x" ""')"
-	}
-	echo "$key"
-}
-
-wifi_fixup_hwmode() {
-	local device="$1"
-	local default="$2"
-	local hwmode hwmode_11n
-
-	config_get channel "$device" channel
-	config_get hwmode "$device" hwmode
-	case "$hwmode" in
-		11bg) hwmode=bg;;
-		11a) hwmode=a;;
-		11ad) hwmode=ad;;
-		11b) hwmode=b;;
-		11g) hwmode=g;;
-		11n*)
-			hwmode_11n="${hwmode##11n}"
-			case "$hwmode_11n" in
-				a|g) ;;
-				default) hwmode_11n="$default"
-			esac
-			config_set "$device" hwmode_11n "$hwmode_11n"
-		;;
-		*)
-			hwmode=
-			if [ "${channel:-0}" -gt 0 ]; then
-				if [ "${channel:-0}" -gt 14 ]; then
-					hwmode=a
-				else
-					hwmode=g
-				fi
-			else
-				hwmode="$default"
-			fi
-		;;
-	esac
-	config_set "$device" hwmode "$hwmode"
-}
-
-_wifi_updown() {
-	for device in ${2:-$DEVICES}; do (
-		config_get disabled "$device" disabled
-		[ "$disabled" = "1" ] && {
-			echo "'$device' is disabled"
-			set disable
-		}
-		config_get iftype "$device" type
-		if eval "type ${1}_$iftype" 2>/dev/null >/dev/null; then
-			eval "scan_$iftype '$device'"
-			eval "${1}_$iftype '$device'" || echo "$device($iftype): ${1} failed"
-		elif [ ! -f /lib/netifd/wireless/$iftype.sh ]; then
-			echo "$device($iftype): Interface type not supported"
-		fi
-	); done
-}
-
 wifi_updown() {
 	cmd=down
 	[ enable = "$1" ] && {
-		_wifi_updown disable "$2"
 		ubus_wifi_cmd "$cmd" "$2"
 		ubus call network reload
-		scan_wifi
 		cmd=up
 	}
 	[ reconf = "$1" ] && {
 		ubus call network reload
-		scan_wifi
 		cmd=reconf
 	}
 	ubus_wifi_cmd "$cmd" "$2"
-	_wifi_updown "$@"
-}
-
-wifi_reload_legacy() {
-	_wifi_updown "disable" "$1"
-	scan_wifi
-	_wifi_updown "enable" "$1"
 }
 
 wifi_reload() {
 	ubus call network reload
-	wifi_reload_legacy
 }
 
 wifi_detect_notice() {
@@ -189,75 +76,9 @@ wifi_config() {
 	); done
 }
 
-start_net() {(
-	local iface="$1"
-	local config="$2"
-	local vifmac="$3"
-
-	[ -f "/var/run/$iface.pid" ] && kill "$(cat /var/run/${iface}.pid)" 2>/dev/null
-	[ -z "$config" ] || {
-		include /lib/network
-		scan_interfaces
-		for config in $config; do
-			setup_interface "$iface" "$config" "" "$vifmac"
-		done
-	}
-)}
-
-set_wifi_up() {
-	local cfg="$1"
-	local ifname="$2"
-	uci_set_state wireless "$cfg" up 1
-	uci_set_state wireless "$cfg" ifname "$ifname"
-}
-
-set_wifi_down() {
-	local cfg="$1"
-	local vifs vif vifstr
-
-	[ -f "/var/run/wifi-${cfg}.pid" ] &&
-		kill "$(cat "/var/run/wifi-${cfg}.pid")" 2>/dev/null
-	uci_revert_state wireless "$cfg"
-	config_get vifs "$cfg" vifs
-	for vif in $vifs; do
-		uci_revert_state wireless "$vif"
-	done
-}
-
-scan_wifi() {
-	local cfgfile="$1"
-	DEVICES=
-	config_cb() {
-		local type="$1"
-		local section="$2"
-
-		# section start
-		case "$type" in
-			wifi-device)
-				append DEVICES "$section"
-				config_set "$section" vifs ""
-				config_set "$section" ht_capab ""
-			;;
-		esac
-
-		# section end
-		config_get TYPE "$CONFIG_SECTION" TYPE
-		case "$TYPE" in
-			wifi-iface)
-				config_get device "$CONFIG_SECTION" device
-				config_get vifs "$device" vifs
-				append vifs "$CONFIG_SECTION"
-				config_set "$device" vifs "$vifs"
-			;;
-		esac
-	}
-	config_load "${cfgfile:-wireless}"
-}
-
 DEVICES=
 DRIVERS=
 include /lib/wifi
-scan_wifi
 
 case "$1" in
 	down) wifi_updown "disable" "$2";;
@@ -266,7 +87,6 @@ case "$1" in
 	status) ubus_wifi_cmd "status" "$2";;
 	isup) wifi_isup "$2"; exit $?;;
 	reload) wifi_reload "$2";;
-	reload_legacy) wifi_reload_legacy "$2";;
 	--help|help) usage;;
 	reconf) wifi_updown "reconf" "$2";;
 	''|up) wifi_updown "enable" "$2";;

package/network/config/wifi-scripts/files/usr/share/hostap/common.uc

@@ -213,7 +213,9 @@ const phy_proto = {
 		if (!base_mask)
 			return null;
 
-		if (base_mask == "00:00:00:00:00:00" &&
+		if (data.macaddr_base)
+			base_addr = data.macaddr_base;
+		else if (base_mask == "00:00:00:00:00:00" &&
 		    (radio_idx > 0 || idx >= num_global)) {
 			let addrs = split(phy_sysfs_file(phy, "addresses"), "\n");
 

package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc

@@ -45,7 +45,7 @@ function iface_start(wdev)
 		system(cmd);
 	} else if (wdev.mode == "mesh") {
 		let cmd = [ "iw", "dev", ifname, "mesh", "join", wdev.ssid, "freq", wdev.freq, htmode ];
-		for (let key in [ "mcast-rate", "beacon-interval" ])
+		for (let key in [ "basic-rates", "mcast-rate", "beacon-interval" ])
 			if (wdev[key])
 				push(cmd, key, wdev[key]);
 		system(cmd);

package/network/services/dnsmasq/Makefile

@@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=dnsmasq
 PKG_UPSTREAM_VERSION:=2.90
 PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
 PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/

package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch

@@ -0,0 +1,98 @@
+From 8ce27433f8b2e17c557cb55e4f16941d309deeac Mon Sep 17 00:00:00 2001
+From: Simon Kelley <simon@thekelleys.org.uk>
+Date: Fri, 17 Jan 2025 17:49:29 +0000
+Subject: [PATCH] Handle DS queries to auth zones.
+Origin: upstream, v2.91test8
+
+When dnsmasq is configured to act as an authoritative server and has
+an authoritative zone configured, and recieves a query for
+that zone _as_forwarder_ it answers the query directly rather
+than forwarding it. This doesn't affect the answer, but it
+saves dnsmasq forwarding the query to the recusor upstream,
+whch then bounces it back to dnsmasq in auth mode. The
+exception should be when the query is for the root of zone, for a DS
+RR. The answer to that has to come from the parent, via the
+recursor, and will typically be a proof-of-nonexistence since
+dnsmasq doesn't support signed zones. This patch suppresses
+local answers and forces forwarding to the upstream recursor
+for such queries. It stops breakage when a DNSSEC validating
+client makes queries to dnsmasq acting as forwarder for a zone
+for which it is authoritative.
+
+[ukleinek: drop changes to CHANGELOG to prevent conflicts]
+---
+ src/forward.c | 52 +++++++++++++++++++++++++++++++++++++--------------
+ 1 file changed, 38 insertions(+), 14 deletions(-)
+
+--- a/src/forward.c
++++ b/src/forward.c
+@@ -1744,15 +1744,27 @@ void receive_query(struct listener *list
+ #endif
+ 
+ #ifdef HAVE_AUTH
+-      /* find queries for zones we're authoritative for, and answer them directly */
++      /* Find queries for zones we're authoritative for, and answer them directly.
++	 The exception to this is DS queries for the zone route. They
++	 have to come from the parent zone. Since dnsmasq's auth server
++	 can't do DNSSEC, the zone will be unsigned, and anything using
++	 dnsmasq as a forwarder and doing validation will be expecting to
++	 see the proof of non-existence from the parent. */
+       if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 	for (zone = daemon->auth_zones; zone; zone = zone->next)
+-	  if (in_zone(zone, daemon->namebuff, NULL))
+-	    {
+-	      auth_dns = 1;
+-	      local_auth = 1;
+-	      break;
+-	    }
++	  {
++	    char *cut;
++	    
++	    if (in_zone(zone, daemon->namebuff, &cut))
++	      {
++		if (type != T_DS || cut)
++		  {
++		    auth_dns = 1;
++		    local_auth = 1;
++		  }
++		break;
++	      }
++	  }
+ #endif
+       
+ #ifdef HAVE_LOOP
+@@ -2268,15 +2280,27 @@ unsigned char *tcp_request(int confd, ti
+ 				   &peer_addr, auth_dns ? "auth" : "query", qtype);
+ 	      
+ #ifdef HAVE_AUTH
+-	      /* find queries for zones we're authoritative for, and answer them directly */
++	      /* Find queries for zones we're authoritative for, and answer them directly.
++		 The exception to this is DS queries for the zone route. They
++		 have to come from the parent zone. Since dnsmasq's auth server
++		 can't do DNSSEC, the zone will be unsigned, and anything using
++		 dnsmasq as a forwarder and doing validation will be expecting to
++		 see the proof of non-existence from the parent. */
+ 	      if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 		for (zone = daemon->auth_zones; zone; zone = zone->next)
+-		  if (in_zone(zone, daemon->namebuff, NULL))
+-		    {
+-		      auth_dns = 1;
+-		      local_auth = 1;
+-		      break;
+-		    }
++		  {
++		    char *cut;
++		    
++		    if (in_zone(zone, daemon->namebuff, &cut))
++		      {
++			if (qtype != T_DS || cut)
++			  {
++			    auth_dns = 1;
++			    local_auth = 1;
++			  }
++			break;
++		      }
++		  }
+ #endif
+ 	    }
+ 	}

package/network/services/hostapd/Makefile

@@ -5,7 +5,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=hostapd
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE_URL:=https://w1.fi/hostap.git
 PKG_SOURCE_PROTO:=git

package/network/services/hostapd/files/hostapd.uc

@@ -279,6 +279,7 @@ function iface_macaddr_init(phydev, config, macaddr_list)
 {
 	let macaddr_data = {
 		num_global: config.num_global_macaddr ?? 1,
+		macaddr_base: config.macaddr_base,
 		mbssid: config.mbssid ?? 0,
 	};
 
@@ -747,9 +748,12 @@ function iface_load_config(phy, radio, filename)
 			continue;
 		}
 
-		if (val[0] == "#num_global_macaddr" ||
-		    val[0] == "mbssid")
+		if (val[0] == "#num_global_macaddr")
 			config[substr(val[0], 1)] = int(val[1]);
+		else if (val[0] == "#macaddr_base")
+			config[substr(val[0], 1)] = val[1];
+		else if (val[0] == "mbssid")
+			config[val[0]] = int(val[1]);
 
 		push(config.radio.data, line);
 	}

package/network/services/hostapd/files/wpa_supplicant.uc

@@ -68,7 +68,7 @@ function prepare_config(config, radio)
 	return { config };
 }
 
-function set_config(config_name, phy_name, radio, num_global_macaddr, config_list)
+function set_config(config_name, phy_name, radio, num_global_macaddr, macaddr_base, config_list)
 {
 	let phy = wpas.data.config[config_name];
 
@@ -83,6 +83,7 @@ function set_config(config_name, phy_name, radio, num_global_macaddr, config_lis
 
 	phy.radio = radio;
 	phy.num_global_macaddr = num_global_macaddr;
+	phy.macaddr_base = macaddr_base;
 
 	let values = [];
 	for (let config in config_list)
@@ -106,7 +107,10 @@ function start_pending(phy_name)
 	}
 
 	let macaddr_list = wpas.data.macaddr_list[phy_name];
-	phydev.macaddr_init(macaddr_list, { num_global: phy.num_global_macaddr });
+	phydev.macaddr_init(macaddr_list, {
+		num_global: phy.num_global_macaddr,
+		macaddr_base: phy.macaddr_base,
+	});
 
 	for (let ifname in phy.data)
 		iface_start(phydev, phy.data[ifname]);
@@ -210,6 +214,7 @@ let main_obj = {
 			phy: "",
 			radio: 0,
 			num_global_macaddr: 0,
+			macaddr_base: "",
 			config: [],
 			defer: true,
 		},
@@ -221,7 +226,7 @@ let main_obj = {
 			wpas.printf(`Set new config for phy ${phy}`);
 			try {
 				if (req.args.config)
-					set_config(phy, req.args.phy, req.args.radio, req.args.num_global_macaddr, req.args.config);
+					set_config(phy, req.args.phy, req.args.radio, req.args.num_global_macaddr, req.args.macaddr_base, req.args.config);
 
 				if (!req.args.defer)
 					start_pending(phy);

package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch

@@ -25,7 +25,7 @@
 +
 --- a/src/ap/sta_info.h
 +++ b/src/ap/sta_info.h
-@@ -408,23 +408,8 @@ int ap_sta_re_add(struct hostapd_data *h
+@@ -409,23 +409,8 @@ int ap_sta_re_add(struct hostapd_data *h
  
  void ap_free_sta_pasn(struct hostapd_data *hapd, struct sta_info *sta);
  

package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch

@@ -0,0 +1,28 @@
+From 161327f91d956771996c96ea1b6e4e1cb8dc074c Mon Sep 17 00:00:00 2001
+From: Stone Zhang <quic_stonez@quicinc.com>
+Date: Mon, 14 Oct 2024 18:47:32 +0800
+Subject: [PATCH] hostapd: Fix clearing up settings for color switch
+
+Settings for color switch (struct cca_settings settings)
+is used without zero clearing, which causes the member
+settings->ubpr->unsol_bcast_probe_resp_intervalettings
+to be a random value. It is againsts the NLA policy of
+NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_INT and causes
+BSS color switch failure.
+
+Fixes: 654d2395dddf ("BSS coloring: Handling of collision events and triggering CCA")
+Signed-off-by: Stone Zhang <quic_stonez@quicinc.com>
+---
+ src/ap/hostapd.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/src/ap/hostapd.c
++++ b/src/ap/hostapd.c
+@@ -4813,6 +4813,7 @@ static void hostapd_switch_color_timeout
+ 		struct cca_settings settings;
+ 		int ret;
+ 
++		os_memset(&settings, 0, sizeof(settings));
+ 		hostapd_cleanup_cca_params(bss);
+ 		bss->cca_color = r;
+ 		bss->cca_count = 10;

package/network/services/lldpd/Makefile

@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
-PKG_VERSION:=1.0.17
-PKG_RELEASE:=5
+PKG_VERSION:=1.0.18
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/
-PKG_HASH:=89ae691a4917ac9e0ec3b8b2c1e634cc402d43b804f98850c73bd1c7df380882
+PKG_HASH:=38cd319aa02ab61d9a2ad130e22f906795ccca9ac73a0a0d9dac19ca99a8a870
 
 PKG_MAINTAINER:=Stijn Tintel <stijn@linux-ipv6.be>
 PKG_LICENSE:=ISC
@@ -90,6 +90,8 @@ endif
 ifneq ($(CONFIG_LLDPD_WITH_LLDPMED),y)
 	sed -i -e 's/CONFIG_LLDPD_WITH_LLDPMED=y/CONFIG_LLDPD_WITH_LLDPMED=n/g' $(1)/etc/init.d/lldpd
 	sed -i -e '/agentxsocket/d' $(1)/etc/config/lldpd
+	sed -i -e '/lldp_class/d' $(1)/etc/config/lldpd
+	sed -i -e '/lldp_location/d' $(1)/etc/config/lldpd
 endif
 endef
 

package/network/services/lldpd/files/lldpd.init

@@ -39,7 +39,6 @@ get_config_restart_hash() {
 
 	config_load 'lldpd'
 
-	config_get      v 'config' 'lldp_class'; append _string "$v" ","
 	if [ "$CONFIG_LLDPD_WITH_SNMP" = "y" ]; then
 		config_get      v 'config' 'agentxsocket'; append _string "$v" ","
 	fi
@@ -49,6 +48,7 @@ get_config_restart_hash() {
 	config_get_bool v 'config' 'lldp_no_version'; append _string "$v" ","
 	if [ "$CONFIG_LLDPD_WITH_LLDPMED" = "y" ]; then
 		config_get_bool v 'config' 'lldpmed_no_inventory'; append _string "$v" ","
+		config_get      v 'config' 'lldp_class'; append _string "$v" ","
 	fi
 	config_get_bool v 'config' 'enable_lldp' 1; append _string "$v" ","
 	config_get_bool v 'config' 'force_lldp'; append _string "$v" ","
@@ -243,10 +243,10 @@ start_service() {
 		config_get_bool enable_edp 'config' 'enable_edp' 0
 		config_get_bool force_edp 'config' 'force_edp' 0
 	fi
-	config_get lldp_class 'config' 'lldp_class'
 	config_get_bool lldp_no_version 'config' 'lldp_no_version' 0
 	if [ "$CONFIG_LLDPD_WITH_LLDPMED" = "y" ]; then
 		config_get_bool lldpmed_no_inventory 'config' 'lldpmed_no_inventory' 0
+		config_get lldp_class 'config' 'lldp_class'
 	fi
 	config_get_bool readonly_mode 'config' 'readonly_mode' 0
 	if [ "$CONFIG_LLDPD_WITH_SNMP" = "y" ]; then

package/network/services/unetd/files/unetd.sh

@@ -82,11 +82,10 @@ proto_unet_setup() {
 
 proto_unet_teardown() {
 	local config="$1"
-	local iface="$2"
 
 	local device
 	json_get_vars device
-	device="${device:-$iface}"
+	device="${device:-$config}"
 
 	json_init
 	json_add_string name "$device"

package/system/uci/Makefile

@@ -13,9 +13,10 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2023-08-10
-PKG_SOURCE_VERSION:=5781664d5087ccc4b5ab58505883231212dbedbc
-PKG_MIRROR_HASH:=0ca4a29c077e85a7cfe69916c3ceb2bee98662b6268befc3c02519939647f984
+PKG_SOURCE_DATE:=2025-01-20
+PKG_SOURCE_VERSION:=16ff0badbde7e17ec3bd1f827ffe45922956cf86
+PKG_MIRROR_HASH:=e91ee4a2c0baaafe1d8ccd5321de70a8412a50323b0b27bbc7ad145e77018a22
+PKG_ABI_VERSION:=20250120
 
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=
@@ -33,7 +34,7 @@ define Package/libuci
   CATEGORY:=Libraries
   TITLE:=C library for the Unified Configuration Interface (UCI)
   DEPENDS:=+libubox
-  ABI_VERSION:=20130104
+  ABI_VERSION:=$(PKG_ABI_VERSION)
 endef
 
 define Package/uci
@@ -55,11 +56,12 @@ TARGET_LDFLAGS += -L$(STAGING_DIR)/usr/lib
 
 CMAKE_OPTIONS += \
 	-DLUAPATH=/usr/lib/lua \
+	-DABIVERSION=$(PKG_ABI_VERSION) \
 	$(if $(DEBUG),-DUCI_DEBUG=ON)
 
 define Package/libuci/install
 	$(INSTALL_DIR) $(1)/lib
-	$(CP) $(PKG_BUILD_DIR)/libuci.so* $(1)/lib/
+	$(CP) $(PKG_BUILD_DIR)/libuci.so.* $(1)/lib/
 endef
 
 define Package/libuci-lua/install

package/utils/fritz-tools/Makefile

@@ -1,7 +1,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=fritz-tools
-PKG_RELEASE:=2
+PKG_RELEASE:=3
 CMAKE_INSTALL:=1
 
 include $(INCLUDE_DIR)/package.mk

package/utils/fritz-tools/src/fritz_cal_extract.c

@@ -8,6 +8,9 @@
  * that is Not copyrighted -- provided to the public domain
  * Version 1.4  11 December 2005  Mark Adler
  *
+ * Modifications to also handle calibration data in reversed byte order
+ * (c) 2024 by <dzsoftware@posteo.org>.
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -28,31 +31,54 @@
 #include <assert.h>
 #include <unistd.h>
 #include <stdint.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <endian.h>
 #include <errno.h>
 #include "zlib.h"
 
 #define CHUNK 1024
+#define DEFAULT_BUFFERSIZE (129 * 1024)
 
-static inline size_t special_min(size_t a, size_t b)
+#define MIN(a,b) (((a)<(b))?(a):(b))
+
+/* Reverse byte order in data buffer.
+ * 'top' is position of last valid data byte = (datasize - 1)
+ */
+static void buffer_reverse(unsigned char *data, unsigned int top)
 {
-	return a == 0 ? b : (a < b ? a : b);
+	register unsigned char swapbyte;
+	const unsigned int center = top / 2;
+
+	for (unsigned int bottom = 0; bottom < center; ++bottom, --top) {
+		swapbyte = data[bottom];
+		data[bottom] = data[top];
+		data[top] = swapbyte;
+	}
 }
 
-/* Decompress from file source to file dest until stream ends or EOF.
-   inf() returns Z_OK on success, Z_MEM_ERROR if memory could not be
-   allocated for processing, Z_DATA_ERROR if the deflate data is
-   invalid or incomplete, Z_VERSION_ERROR if the version of zlib.h and
-   the version of the library linked do not match, or Z_ERRNO if there
-   is an error reading or writing the files. */
-static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
+/* Decompress from file source to data buffer until stream ends
+ * or *limit bytes have been written to buffer.
+ *
+ * On call, 'limit' must reference a variable containing the intended
+ * number of bytes to retrieve (must be <= allocated buffer size).
+ *
+ * Return values (success):
+ * Z_END_STREAM if complete data was retrieved (*limit == size of complete data),
+ * or Z_OK if data was retrieved up to limit (*limit == original value).
+ *
+ * Return values (failure):
+ * Z_MEM_ERROR if memory could not be allocated for processing, 
+ * Z_DATA_ERROR if the deflate data is invalid or incomplete, 
+ * Z_VERSION_ERROR if the version of zlib.h and the version of the 
+ * library linked do not match, or 
+ * Z_ERRNO if there is an error reading or writing the files.
+ */
+static int inflate_to_buffer(FILE *source, unsigned char *buf, size_t *limit)
 {
 	int ret;
-	size_t have;
 	z_stream strm;
 	unsigned char in[CHUNK];
-	unsigned char out[CHUNK];
 
 	/* allocate inflate state */
 	strm.zalloc = Z_NULL;
@@ -64,6 +90,10 @@ static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
 	if (ret != Z_OK)
 		return ret;
 
+	/* set data buffer as stream output */
+	strm.avail_out = *limit;
+	strm.next_out = buf;
+
 	/* decompress until deflate stream ends or end of file */
 	do {
 		strm.avail_in = fread(in, 1, CHUNK, source);
@@ -75,35 +105,28 @@ static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
 			break;
 		strm.next_in = in;
 
-		/* run inflate() on input until output buffer not full */
-		do {
-			strm.avail_out = CHUNK;
-			strm.next_out = out;
-			ret = inflate(&strm, Z_NO_FLUSH);
-			assert(ret != Z_STREAM_ERROR);  /* state not clobbered */
-			switch (ret) {
+		/* run inflate(), fill data buffer with all available output */
+		ret = inflate(&strm, Z_FINISH);
+		assert(ret != Z_STREAM_ERROR);  /* state not clobbered */
+
+		switch (ret) {
 			case Z_NEED_DICT:
 				ret = Z_DATA_ERROR;     /* and fall through */
 			case Z_DATA_ERROR:
 			case Z_MEM_ERROR:
 				(void)inflateEnd(&strm);
 				return ret;
-			}
-			have = special_min(limit, CHUNK - strm.avail_out) - skip;
-			if (fwrite(&out[skip], have, 1, dest) != 1 || ferror(dest)) {
-				(void)inflateEnd(&strm);
-				return Z_ERRNO;
-			}
-		skip = 0;
-		limit -= have;
-		} while (strm.avail_out == 0 && limit > 0);
+		}
+		/* done when inflate() says it's done or limit reached */
+	} while (ret != Z_STREAM_END && strm.avail_out > 0);
 
-		/* done when inflate() says it's done */
-	} while (ret != Z_STREAM_END && limit > 0);
+	/* set limit to end of retrieved data */
+	assert(strm.total_out <= *limit);
+	*limit = strm.total_out;
 
 	/* clean up and return */
 	(void)inflateEnd(&strm);
-	return (limit == 0 ? Z_OK : (ret == Z_STREAM_END ? Z_OK : Z_DATA_ERROR));
+	return (ret == Z_STREAM_END ? Z_STREAM_END : (strm.avail_out == 0 ? Z_OK : Z_DATA_ERROR));
 }
 
 /* report a zlib or i/o error */
@@ -140,7 +163,8 @@ static unsigned int get_num(char *str)
 
 static void usage(void)
 {
-	fprintf(stderr, "Usage: fritz_cal_extract [-s seek offset] [-i skip] [-o output file] [-l limit] [infile] -e entry_id\n"
+	fprintf(stderr, "Usage: fritz_cal_extract -e entry_id [-s seek offset] [-l limit]\n"
+			"\t[-r reverse extracted data] [-i skip n bytes] [-o output file] [infile]\n"
 			"Finds and extracts zlib compressed calibration data in the EVA loader\n");
 	exit(EXIT_FAILURE);
 }
@@ -154,15 +178,18 @@ struct cal_entry {
 int main(int argc, char **argv)
 {
 	struct cal_entry cal = { .len = 0 };
+	unsigned char *buf = NULL;
 	FILE *in = stdin;
 	FILE *out = stdout;
+	size_t datasize = DEFAULT_BUFFERSIZE;
 	size_t limit = 0, skip = 0;
 	int initial_offset = 0;
 	int entry = -1;
+	bool reversed = false, limit_was_set = true;
 	int ret;
 	int opt;
 
-	while ((opt = getopt(argc, argv, "s:e:o:l:i:")) != -1) {
+	while ((opt = getopt(argc, argv, "s:e:o:l:i:r")) != -1) {
 		switch (opt) {
 		case 's':
 			initial_offset = (int)get_num(optarg);
@@ -199,6 +226,9 @@ int main(int argc, char **argv)
 				goto out_bad;
 			}
 			break;
+		case 'r':
+			reversed = true;
+			break;
 		default: /* '?' */
 			usage();
 		}
@@ -243,11 +273,50 @@ int main(int argc, char **argv)
 		goto out_bad;
 	}
 
-	ret = inf(in, out, limit, skip);
-	if (ret == Z_OK)
-		goto out;
+	/* Set boundaries. Only keep default datasize if we need complete data
+	 * for reversal and didn't set a higher limit. */
+	if (!limit) {
+		limit_was_set = false;
+		limit = datasize - skip;
+	}
+	datasize = (reversed && datasize >= limit + skip) ? datasize : (limit + skip);
 
-	zerr(ret);
+	/* Create data buffer. */
+	buf = malloc(datasize);
+	assert(buf != NULL);
+
+	ret = inflate_to_buffer(in, buf, &datasize);
+
+	if ((reversed || !limit_was_set) && ret != Z_STREAM_END) { /* didn't read to stream end */
+		fprintf(stderr, "Failed: Data exceeds buffer size of %u. Refusing to reverse"
+				" or store incomplete data."
+				" Use a higher limit [-l] to increase buffer size.\n",
+				(unsigned int) datasize);
+		goto out_bad;
+	}
+
+	ret = (ret == Z_STREAM_END) ? Z_OK : ret; /* normalize return value */
+	if (ret != Z_OK) {
+		zerr(ret);
+		goto out_bad;
+	}
+
+	if (reversed)
+		buffer_reverse(buf, datasize - 1);
+
+	if (datasize <= skip) {
+		fprintf(stderr, "Failed to skip %u bytes, total data size is %u!\n", 
+				(unsigned int)skip, (unsigned int)datasize);
+		goto out_bad;
+	}
+
+	limit = MIN(limit, datasize - skip);
+	if (fwrite(&buf[skip], limit, 1, out) != 1 || ferror(out)) {
+		fprintf(stderr, "Failed to write data buffer to output file");
+		goto out_bad;
+	}
+
+	goto out;
 
 out_bad:
 	ret = EXIT_FAILURE;
@@ -257,5 +326,6 @@ out:
 		fclose(in);
 	if (out)
 		fclose(out);
+	free(buf);
 	return ret;
 }

target/linux/airoha/an7581/config-6.6

@@ -1,4 +1,5 @@
 CONFIG_64BIT=y
+CONFIG_AIROHA_CPU_PM_DOMAIN=y
 CONFIG_AIROHA_THERMAL=y
 CONFIG_AIROHA_WATCHDOG=y
 CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
@@ -131,6 +132,8 @@ CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
 CONFIG_COREDUMP=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPUFREQ_DT_PLATDEV=y
 CONFIG_CPUSETS=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
@@ -190,8 +193,6 @@ CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_DCACHE_WORD_ACCESS=y
 CONFIG_DEBUG_BUGVERBOSE=y
-# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set
-CONFIG_DEBUG_INFO_NONE=y
 CONFIG_DEBUG_MISC=y
 CONFIG_DEVMEM=y
 CONFIG_DMADEVICES=y
@@ -351,6 +352,10 @@ CONFIG_MDIO_DEVRES=y
 # CONFIG_MEMCG is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_CQHCI=y
+CONFIG_MMC_MTK=y
 CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_TREE_LOOKUP=y
 CONFIG_MODULES_USE_ELF_RELA=y
@@ -433,7 +438,8 @@ CONFIG_PCIEASPM_PERFORMANCE=y
 # CONFIG_PCIEASPM_POWERSAVE is not set
 # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
 CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIE_MEDIATEK is not set
+CONFIG_PCIE_MEDIATEK=y
+CONFIG_PCIE_MEDIATEK_GEN3=y
 CONFIG_PCIE_PME=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DOMAINS_GENERIC=y
@@ -490,6 +496,8 @@ CONFIG_RATIONAL=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RELOCATABLE=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RFS_ACCEL=y

target/linux/airoha/dts/an7581-evb-emmc.dts

@@ -100,8 +100,9 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "state_uhs";
 	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
 	status = "okay";
 
 	#address-cells = <1>;

target/linux/airoha/dts/an7581-evb.dts

@@ -150,35 +150,40 @@
 
 &spi_nand {
 	partitions {
-		compatible = "airoha,fixed-partitions";
+		compatible = "fixed-partitions";
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		bootloader@0 {
 			label = "bootloader";
 			reg = <0x00000000 0x00080000>;
+			read-only;
 		};
 
-		tclinux@80000 {
-			label = "tclinux";
-			compatible = "denx,fit";
-			reg = <0x00080000 0x02800000>;
-		};
-
-		tclinux_slave@2880000 {
-			label = "tclinux_slave";
-			reg = <0x02880000 0x02800000>;
-		};
-
-		rootfs_data@5080000 {
-			label = "rootfs_data";
-			reg = <0x5080000 0x00800000>;
-		};
-
-		art@ffffffff {
-			compatible = "airoha,dynamic-art";
+		art@200000 {
 			label = "art";
-			reg = <0xffffffff 0x00300000>;
+			reg = <0x00200000 0x00400000>;
+		};
+
+		tclinux@600000 {
+			label = "tclinux";
+			reg = <0x00600000 0x03200000>;
+		};
+
+		tclinux_slave@3800000 {
+			label = "tclinux_alt";
+			reg = <0x03800000 0x03200000>;
+		};
+
+		rootfs_data@6a00000 {
+			label = "rootfs_data";
+			reg = <0x06a00000 0x01400000>;
+		};
+
+		reserved_bmt@7e00000 {
+			label = "reserved_bmt";
+			reg = <0x07e00000 0x00200000>;
+			read-only;
 		};
 	};
 };

target/linux/airoha/dts/an7581.dtsi

@@ -78,7 +78,10 @@
 			reg = <0x0>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -89,7 +92,10 @@
 			reg = <0x1>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -100,7 +106,10 @@
 			reg = <0x2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -111,7 +120,10 @@
 			reg = <0x3>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -125,68 +137,156 @@
 		};
 	};
 
+	cpufreq: cpufreq {
+		compatible = "airoha,en7581-cpufreq";
+
+		operating-points-v2 = <&cpu_smcc_opp_table>;
+
+		#power-domain-cells = <0>;
+		#clock-cells = <0>;
+	};
+
 	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";
 		opp-shared;
 
 		opp-500000000 {
 			opp-hz = /bits/ 64 <500000000>;
+			required-opps = <&smcc_opp0>;
 		};
 
 		opp-550000000 {
 			opp-hz = /bits/ 64 <550000000>;
+			required-opps = <&smcc_opp1>;
 		};
 
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
+			required-opps = <&smcc_opp2>;
 		};
 
 		opp-650000000 {
 			opp-hz = /bits/ 64 <650000000>;
+			required-opps = <&smcc_opp3>;
 		};
 
 		opp-7000000000 {
 			opp-hz = /bits/ 64 <700000000>;
+			required-opps = <&smcc_opp4>;
 		};
 
 		opp-7500000000 {
 			opp-hz = /bits/ 64 <750000000>;
+			required-opps = <&smcc_opp5>;
 		};
 
 		opp-8000000000 {
 			opp-hz = /bits/ 64 <800000000>;
+			required-opps = <&smcc_opp6>;
 		};
 
 		opp-8500000000 {
 			opp-hz = /bits/ 64 <850000000>;
+			required-opps = <&smcc_opp7>;
 		};
 
 		opp-9000000000 {
 			opp-hz = /bits/ 64 <900000000>;
+			required-opps = <&smcc_opp8>;
 		};
 
 		opp-9500000000 {
 			opp-hz = /bits/ 64 <950000000>;
+			required-opps = <&smcc_opp9>;
 		};
 
 		opp-10000000000 {
 			opp-hz = /bits/ 64 <1000000000>;
+			required-opps = <&smcc_opp10>;
 		};
 
 		opp-10500000000 {
 			opp-hz = /bits/ 64 <1050000000>;
+			required-opps = <&smcc_opp11>;
 		};
 
 		opp-11000000000 {
 			opp-hz = /bits/ 64 <1100000000>;
+			required-opps = <&smcc_opp12>;
 		};
 
 		opp-11500000000 {
 			opp-hz = /bits/ 64 <1150000000>;
+			required-opps = <&smcc_opp13>;
 		};
 
 		opp-12000000000 {
 			opp-hz = /bits/ 64 <1200000000>;
+			required-opps = <&smcc_opp14>;
+		};
+	};
+
+	cpu_smcc_opp_table: opp-table-cpu-smcc {
+		compatible = "operating-points-v2";
+
+		smcc_opp0: opp0 {
+			opp-level = <0>;
+		};
+
+		smcc_opp1: opp1 {
+			opp-level = <1>;
+		};
+
+		smcc_opp2: opp2 {
+			opp-level = <2>;
+		};
+
+		smcc_opp3: opp3 {
+			opp-level = <3>;
+		};
+
+		smcc_opp4: opp4 {
+			opp-level = <4>;
+		};
+
+		smcc_opp5: opp5 {
+			opp-level = <5>;
+		};
+
+		smcc_opp6: opp6 {
+			opp-level = <6>;
+		};
+
+		smcc_opp7: opp7 {
+			opp-level = <7>;
+		};
+
+		smcc_opp8: opp8 {
+			opp-level = <8>;
+		};
+
+		smcc_opp9: opp9 {
+			opp-level = <9>;
+		};
+
+		smcc_opp10: opp10 {
+			opp-level = <10>;
+		};
+
+		smcc_opp11: opp11 {
+			opp-level = <11>;
+		};
+
+		smcc_opp12: opp12 {
+			opp-level = <12>;
+		};
+
+		smcc_opp13: opp13 {
+			opp-level = <13>;
+		};
+
+		smcc_opp14: opp14 {
+			opp-level = <14>;
 		};
 	};
 
@@ -232,6 +332,21 @@
 		};
 	};
 
+	clk25m: oscillator {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+		clock-output-names = "clkxtal";
+	};
+
+	vmmc_3v3: regulator-vmmc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -431,7 +546,6 @@
 				spi-max-frequency = <50000000>;
 				spi-tx-bus-width = <1>;
 				spi-rx-bus-width = <2>;
-				airoha,bmt;
 			};
 		};
 
@@ -440,8 +554,11 @@
 			reg = <0x0 0x1fa0e000 0x0 0x1000>,
 			      <0x0 0x1fa0c000 0x0 0x60>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
+			clock-names = "source", "hclk";
 			bus-width = <4>;
 			max-frequency = <52000000>;
+			vmmc-supply = <&vmmc_3v3>;
 			disable-wp;
 			cap-mmc-highspeed;
 			non-removable;
@@ -587,7 +704,7 @@
 				status = "disabled";
 
 				fixed-link {
-					speed = <1000>;
+					speed = <10000>;
 					full-duplex;
 					pause;
 				};
@@ -648,7 +765,7 @@
 					phy-mode = "internal";
 
 					fixed-link {
-						speed = <1000>;
+						speed = <10000>;
 						full-duplex;
 						pause;
 					};

target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch

@@ -16,7 +16,7 @@ Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -839,7 +839,7 @@ config I2C_MT65XX
+@@ -841,7 +841,7 @@ config I2C_MT65XX
  
  config I2C_MT7621
  	tristate "MT7621/MT7628 I2C Controller"

target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch

@@ -1,12 +1,12 @@
-From 6d74b9e6d3bb07f50b22b9ea047b84a83aba185c Mon Sep 17 00:00:00 2001
+From 2eb75f86d52565367211c51334d15fe672633085 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Thu, 17 Oct 2024 19:26:24 +0200
+Date: Sat, 16 Nov 2024 11:56:53 +0100
 Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581
 
 The Documentation for EN7581 had a typo and still referenced the EN7523
 BUS base source frequency. This was in conflict with a different page in
-the Documentration that state that the BUS runs at 300MHz (600MHz source with
-divisor set to 2) and the actual watchdog that tick at half the BUS
+the Documentration that state that the BUS runs at 300MHz (600MHz source
+with divisor set to 2) and the actual watchdog that tick at half the BUS
 clock (150MHz). This was verified with the watchdog by timing the
 seconds that the system takes to reboot (due too watchdog) and by
 operating on different values of the BUS divisor.
@@ -18,6 +18,9 @@ This was also confirmed by Airoha.
 Cc: stable@vger.kernel.org
 Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support")
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20241116105710.19748-1-ansuelsmth@gmail.com
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 ---
  drivers/clk/clk-en7523.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)

target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch

@@ -0,0 +1,35 @@
+From 30d9d8f6a2d7e44a9f91737dd409dbc87ac6f6b7 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Tue, 15 Oct 2024 09:58:09 +0200
+Subject: [PATCH] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration
+
+Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
+of REG_CDM2_FWD_CFG register.
+This bug is not introducing any user visible problem since Frame Engine
+CDM2 port is used just by the second QDMA block and we currently enable
+just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.
+
+Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
+support for EN7581 SoC")
+
+Reported-by: ChihWei Cheng <chihwei.cheng@airoha.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Message-ID: <20241015-airoha-eth-cdm2-fixes-v1-1-9dc6993286c3@kernel.org>
+Signed-off-by: Andrew Lunn <andrew@lunn.ch>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -1369,7 +1369,8 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_GDM_MISC_CFG,
+ 		      GDM2_RDM_ACK_WAIT_PREF_MASK |
+ 		      GDM2_CHN_VLD_MODE_MASK);
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, 15);
++	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
++		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
+ 
+ 	/* init fragment and assemble Force Port */
+ 	/* NPU Core-3, NPU Bridge Channel-3 */

target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch

@@ -0,0 +1,102 @@
+From 0c7469ee718e1dd929f52bfb142a7f6fb68f0765 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 16 Dec 2024 18:47:33 +0100
+Subject: [PATCH] net: airoha: Fix error path in airoha_probe()
+
+Do not run napi_disable() if airoha_hw_init() fails since Tx/Rx napi
+has not been started yet. In order to fix the issue, introduce
+airoha_qdma_stop_napi routine and remove napi_disable in
+airoha_hw_cleanup().
+
+Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC")
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/20241216-airoha_probe-error-path-fix-v2-1-6b10e04e9a5c@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 33 ++++++++++++++++------
+ 1 file changed, 25 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2139,17 +2139,14 @@ static void airoha_hw_cleanup(struct air
+ 		if (!qdma->q_rx[i].ndesc)
+ 			continue;
+ 
+-		napi_disable(&qdma->q_rx[i].napi);
+ 		netif_napi_del(&qdma->q_rx[i].napi);
+ 		airoha_qdma_cleanup_rx_queue(&qdma->q_rx[i]);
+ 		if (qdma->q_rx[i].page_pool)
+ 			page_pool_destroy(qdma->q_rx[i].page_pool);
+ 	}
+ 
+-	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++) {
+-		napi_disable(&qdma->q_tx_irq[i].napi);
++	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++)
+ 		netif_napi_del(&qdma->q_tx_irq[i].napi);
+-	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++) {
+ 		if (!qdma->q_tx[i].ndesc)
+@@ -2174,6 +2171,21 @@ static void airoha_qdma_start_napi(struc
+ 	}
+ }
+ 
++static void airoha_qdma_stop_napi(struct airoha_qdma *qdma)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++)
++		napi_disable(&qdma->q_tx_irq[i].napi);
++
++	for (i = 0; i < ARRAY_SIZE(qdma->q_rx); i++) {
++		if (!qdma->q_rx[i].ndesc)
++			continue;
++
++		napi_disable(&qdma->q_rx[i].napi);
++	}
++}
++
+ static void airoha_update_hw_stats(struct airoha_gdm_port *port)
+ {
+ 	struct airoha_eth *eth = port->qdma->eth;
+@@ -2731,7 +2743,7 @@ static int airoha_probe(struct platform_
+ 
+ 	err = airoha_hw_init(pdev, eth);
+ 	if (err)
+-		goto error;
++		goto error_hw_cleanup;
+ 
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_qdma_start_napi(&eth->qdma[i]);
+@@ -2746,13 +2758,16 @@ static int airoha_probe(struct platform_
+ 		err = airoha_alloc_gdm_port(eth, np);
+ 		if (err) {
+ 			of_node_put(np);
+-			goto error;
++			goto error_napi_stop;
+ 		}
+ 	}
+ 
+ 	return 0;
+ 
+-error:
++error_napi_stop:
++	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
++		airoha_qdma_stop_napi(&eth->qdma[i]);
++error_hw_cleanup:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_hw_cleanup(&eth->qdma[i]);
+ 
+@@ -2773,8 +2788,10 @@ static void airoha_remove(struct platfor
+ 	struct airoha_eth *eth = platform_get_drvdata(pdev);
+ 	int i;
+ 
+-	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
++	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) {
++		airoha_qdma_stop_napi(&eth->qdma[i]);
+ 		airoha_hw_cleanup(&eth->qdma[i]);
++	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(eth->ports); i++) {
+ 		struct airoha_gdm_port *port = eth->ports[i];

target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch

@@ -0,0 +1,27 @@
+From 5f795590380476f1c9b7ed0ac945c9b0269dc23a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 3 Jan 2025 13:17:02 +0100
+Subject: [PATCH 1/4] net: airoha: Enable Tx drop capability for each Tx DMA
+ ring
+
+This is a preliminary patch in order to enable hw Qdisc offloading.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -1790,6 +1790,10 @@ static int airoha_qdma_init_tx_queue(str
+ 		WRITE_ONCE(q->desc[i].ctrl, cpu_to_le32(val));
+ 	}
+ 
++	/* xmit ring drop default setting */
++	airoha_qdma_set(qdma, REG_TX_RING_BLOCKING(qid),
++			TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK);
++
+ 	airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);
+ 	airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,
+ 			FIELD_PREP(TX_RING_CPU_IDX_MASK, q->head));

target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch

@@ -0,0 +1,86 @@
+From 2b288b81560b94958cd68bbe54673e55a1730c95 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 3 Jan 2025 13:17:03 +0100
+Subject: [PATCH 2/4] net: airoha: Introduce ndo_select_queue callback
+
+Airoha EN7581 SoC supports 32 Tx DMA rings used to feed packets to QoS
+channels. Each channels supports 8 QoS queues where the user can apply
+QoS scheduling policies. In a similar way, the user can configure hw
+rate shaping for each QoS channel.
+Introduce ndo_select_queue callback in order to select the tx queue
+based on QoS channel and QoS queue. In particular, for dsa device select
+QoS channel according to the dsa user port index, rely on port id
+otherwise. Select QoS queue based on the skb priority.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 30 ++++++++++++++++++++--
+ 1 file changed, 28 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -23,6 +23,8 @@
+ #define AIROHA_MAX_NUM_XSI_RSTS		5
+ #define AIROHA_MAX_MTU			2000
+ #define AIROHA_MAX_PACKET_SIZE		2048
++#define AIROHA_NUM_QOS_CHANNELS		4
++#define AIROHA_NUM_QOS_QUEUES		8
+ #define AIROHA_NUM_TX_RING		32
+ #define AIROHA_NUM_RX_RING		32
+ #define AIROHA_FE_MC_MAX_VLAN_TABLE	64
+@@ -2422,21 +2424,44 @@ static void airoha_dev_get_stats64(struc
+ 	} while (u64_stats_fetch_retry(&port->stats.syncp, start));
+ }
+ 
++static u16 airoha_dev_select_queue(struct net_device *dev, struct sk_buff *skb,
++				   struct net_device *sb_dev)
++{
++	struct airoha_gdm_port *port = netdev_priv(dev);
++	int queue, channel;
++
++	/* For dsa device select QoS channel according to the dsa user port
++	 * index, rely on port id otherwise. Select QoS queue based on the
++	 * skb priority.
++	 */
++	channel = netdev_uses_dsa(dev) ? skb_get_queue_mapping(skb) : port->id;
++	channel = channel % AIROHA_NUM_QOS_CHANNELS;
++	queue = (skb->priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */
++	queue = channel * AIROHA_NUM_QOS_QUEUES + queue;
++
++	return queue < dev->num_tx_queues ? queue : 0;
++}
++
+ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,
+ 				   struct net_device *dev)
+ {
+ 	struct skb_shared_info *sinfo = skb_shinfo(skb);
+ 	struct airoha_gdm_port *port = netdev_priv(dev);
+-	u32 msg0 = 0, msg1, len = skb_headlen(skb);
+-	int i, qid = skb_get_queue_mapping(skb);
++	u32 msg0, msg1, len = skb_headlen(skb);
+ 	struct airoha_qdma *qdma = port->qdma;
+ 	u32 nr_frags = 1 + sinfo->nr_frags;
+ 	struct netdev_queue *txq;
+ 	struct airoha_queue *q;
+ 	void *data = skb->data;
++	int i, qid;
+ 	u16 index;
+ 	u8 fport;
+ 
++	qid = skb_get_queue_mapping(skb) % ARRAY_SIZE(qdma->q_tx);
++	msg0 = FIELD_PREP(QDMA_ETH_TXMSG_CHAN_MASK,
++			  qid / AIROHA_NUM_QOS_QUEUES) |
++	       FIELD_PREP(QDMA_ETH_TXMSG_QUEUE_MASK,
++			  qid % AIROHA_NUM_QOS_QUEUES);
+ 	if (skb->ip_summed == CHECKSUM_PARTIAL)
+ 		msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TCO_MASK, 1) |
+ 			FIELD_PREP(QDMA_ETH_TXMSG_UCO_MASK, 1) |
+@@ -2610,6 +2635,7 @@ static const struct net_device_ops airoh
+ 	.ndo_init		= airoha_dev_init,
+ 	.ndo_open		= airoha_dev_open,
+ 	.ndo_stop		= airoha_dev_stop,
++	.ndo_select_queue	= airoha_dev_select_queue,
+ 	.ndo_start_xmit		= airoha_dev_xmit,
+ 	.ndo_get_stats64        = airoha_dev_get_stats64,
+ 	.ndo_set_mac_address	= airoha_dev_set_macaddr,

target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch

@@ -0,0 +1,292 @@
+From 20bf7d07c956e5c7a22d3076c599cbb7a6054917 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 3 Jan 2025 13:17:04 +0100
+Subject: [PATCH 3/4] net: airoha: Add sched ETS offload support
+
+Introduce support for ETS Qdisc offload available on the Airoha EN7581
+ethernet controller. In order to be effective, ETS Qdisc must configured
+as leaf of a HTB Qdisc (HTB Qdisc offload will be added in the following
+patch). ETS Qdisc available on EN7581 ethernet controller supports at
+most 8 concurrent bands (QoS queues). We can enable an ETS Qdisc for
+each available QoS channel.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 196 ++++++++++++++++++++-
+ 1 file changed, 195 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -15,6 +15,7 @@
+ #include <linux/u64_stats_sync.h>
+ #include <net/dsa.h>
+ #include <net/page_pool/helpers.h>
++#include <net/pkt_cls.h>
+ #include <uapi/linux/ppp_defs.h>
+ 
+ #define AIROHA_MAX_NUM_GDM_PORTS	1
+@@ -543,9 +544,24 @@
+ #define INGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)
+ #define INGRESS_FAST_TICK_MASK		GENMASK(15, 0)
+ 
++#define REG_QUEUE_CLOSE_CFG(_n)		(0x00a0 + ((_n) & 0xfc))
++#define TXQ_DISABLE_CHAN_QUEUE_MASK(_n, _m)	BIT((_m) + (((_n) & 0x3) << 3))
++
+ #define REG_TXQ_DIS_CFG_BASE(_n)	((_n) ? 0x20a0 : 0x00a0)
+ #define REG_TXQ_DIS_CFG(_n, _m)		(REG_TXQ_DIS_CFG_BASE((_n)) + (_m) << 2)
+ 
++#define REG_CNTR_CFG(_n)		(0x0400 + ((_n) << 3))
++#define CNTR_EN_MASK			BIT(31)
++#define CNTR_ALL_CHAN_EN_MASK		BIT(30)
++#define CNTR_ALL_QUEUE_EN_MASK		BIT(29)
++#define CNTR_ALL_DSCP_RING_EN_MASK	BIT(28)
++#define CNTR_SRC_MASK			GENMASK(27, 24)
++#define CNTR_DSCP_RING_MASK		GENMASK(20, 16)
++#define CNTR_CHAN_MASK			GENMASK(7, 3)
++#define CNTR_QUEUE_MASK			GENMASK(2, 0)
++
++#define REG_CNTR_VAL(_n)		(0x0404 + ((_n) << 3))
++
+ #define REG_LMGR_INIT_CFG		0x1000
+ #define LMGR_INIT_START			BIT(31)
+ #define LMGR_SRAM_MODE_MASK		BIT(30)
+@@ -571,9 +587,19 @@
+ #define TWRR_WEIGHT_SCALE_MASK		BIT(31)
+ #define TWRR_WEIGHT_BASE_MASK		BIT(3)
+ 
++#define REG_TXWRR_WEIGHT_CFG		0x1024
++#define TWRR_RW_CMD_MASK		BIT(31)
++#define TWRR_RW_CMD_DONE		BIT(30)
++#define TWRR_CHAN_IDX_MASK		GENMASK(23, 19)
++#define TWRR_QUEUE_IDX_MASK		GENMASK(18, 16)
++#define TWRR_VALUE_MASK			GENMASK(15, 0)
++
+ #define REG_PSE_BUF_USAGE_CFG		0x1028
+ #define PSE_BUF_ESTIMATE_EN_MASK	BIT(29)
+ 
++#define REG_CHAN_QOS_MODE(_n)		(0x1040 + ((_n) << 2))
++#define CHAN_QOS_MODE_MASK(_n)		GENMASK(2 + ((_n) << 2), (_n) << 2)
++
+ #define REG_GLB_TRTCM_CFG		0x1080
+ #define GLB_TRTCM_EN_MASK		BIT(31)
+ #define GLB_TRTCM_MODE_MASK		BIT(30)
+@@ -722,6 +748,17 @@ enum {
+ 	FE_PSE_PORT_DROP = 0xf,
+ };
+ 
++enum tx_sched_mode {
++	TC_SCH_WRR8,
++	TC_SCH_SP,
++	TC_SCH_WRR7,
++	TC_SCH_WRR6,
++	TC_SCH_WRR5,
++	TC_SCH_WRR4,
++	TC_SCH_WRR3,
++	TC_SCH_WRR2,
++};
++
+ struct airoha_queue_entry {
+ 	union {
+ 		void *buf;
+@@ -812,6 +849,10 @@ struct airoha_gdm_port {
+ 	int id;
+ 
+ 	struct airoha_hw_stats stats;
++
++	/* qos stats counters */
++	u64 cpu_tx_packets;
++	u64 fwd_tx_packets;
+ };
+ 
+ struct airoha_eth {
+@@ -1962,6 +2003,27 @@ static void airoha_qdma_init_qos(struct
+ 			FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));
+ }
+ 
++static void airoha_qdma_init_qos_stats(struct airoha_qdma *qdma)
++{
++	int i;
++
++	for (i = 0; i < AIROHA_NUM_QOS_CHANNELS; i++) {
++		/* Tx-cpu transferred count */
++		airoha_qdma_wr(qdma, REG_CNTR_VAL(i << 1), 0);
++		airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
++			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
++			       CNTR_ALL_DSCP_RING_EN_MASK |
++			       FIELD_PREP(CNTR_CHAN_MASK, i));
++		/* Tx-fwd transferred count */
++		airoha_qdma_wr(qdma, REG_CNTR_VAL((i << 1) + 1), 0);
++		airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
++			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
++			       CNTR_ALL_DSCP_RING_EN_MASK |
++			       FIELD_PREP(CNTR_SRC_MASK, 1) |
++			       FIELD_PREP(CNTR_CHAN_MASK, i));
++	}
++}
++
+ static int airoha_qdma_hw_init(struct airoha_qdma *qdma)
+ {
+ 	int i;
+@@ -2012,6 +2074,7 @@ static int airoha_qdma_hw_init(struct ai
+ 
+ 	airoha_qdma_set(qdma, REG_TXQ_CNGST_CFG,
+ 			TXQ_CNGST_DROP_EN | TXQ_CNGST_DEI_DROP_EN);
++	airoha_qdma_init_qos_stats(qdma);
+ 
+ 	return 0;
+ }
+@@ -2631,6 +2694,135 @@ airoha_ethtool_get_rmon_stats(struct net
+ 	} while (u64_stats_fetch_retry(&port->stats.syncp, start));
+ }
+ 
++static int airoha_qdma_set_chan_tx_sched(struct airoha_gdm_port *port,
++					 int channel, enum tx_sched_mode mode,
++					 const u16 *weights, u8 n_weights)
++{
++	int i;
++
++	for (i = 0; i < AIROHA_NUM_TX_RING; i++)
++		airoha_qdma_clear(port->qdma, REG_QUEUE_CLOSE_CFG(channel),
++				  TXQ_DISABLE_CHAN_QUEUE_MASK(channel, i));
++
++	for (i = 0; i < n_weights; i++) {
++		u32 status;
++		int err;
++
++		airoha_qdma_wr(port->qdma, REG_TXWRR_WEIGHT_CFG,
++			       TWRR_RW_CMD_MASK |
++			       FIELD_PREP(TWRR_CHAN_IDX_MASK, channel) |
++			       FIELD_PREP(TWRR_QUEUE_IDX_MASK, i) |
++			       FIELD_PREP(TWRR_VALUE_MASK, weights[i]));
++		err = read_poll_timeout(airoha_qdma_rr, status,
++					status & TWRR_RW_CMD_DONE,
++					USEC_PER_MSEC, 10 * USEC_PER_MSEC,
++					true, port->qdma,
++					REG_TXWRR_WEIGHT_CFG);
++		if (err)
++			return err;
++	}
++
++	airoha_qdma_rmw(port->qdma, REG_CHAN_QOS_MODE(channel >> 3),
++			CHAN_QOS_MODE_MASK(channel),
++			mode << __ffs(CHAN_QOS_MODE_MASK(channel)));
++
++	return 0;
++}
++
++static int airoha_qdma_set_tx_prio_sched(struct airoha_gdm_port *port,
++					 int channel)
++{
++	static const u16 w[AIROHA_NUM_QOS_QUEUES] = {};
++
++	return airoha_qdma_set_chan_tx_sched(port, channel, TC_SCH_SP, w,
++					     ARRAY_SIZE(w));
++}
++
++static int airoha_qdma_set_tx_ets_sched(struct airoha_gdm_port *port,
++					int channel,
++					struct tc_ets_qopt_offload *opt)
++{
++	struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
++	enum tx_sched_mode mode = TC_SCH_SP;
++	u16 w[AIROHA_NUM_QOS_QUEUES] = {};
++	int i, nstrict = 0;
++
++	if (p->bands > AIROHA_NUM_QOS_QUEUES)
++		return -EINVAL;
++
++	for (i = 0; i < p->bands; i++) {
++		if (!p->quanta[i])
++			nstrict++;
++	}
++
++	/* this configuration is not supported by the hw */
++	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)
++		return -EINVAL;
++
++	for (i = 0; i < p->bands - nstrict; i++)
++		w[i] = p->weights[nstrict + i];
++
++	if (!nstrict)
++		mode = TC_SCH_WRR8;
++	else if (nstrict < AIROHA_NUM_QOS_QUEUES - 1)
++		mode = nstrict + 1;
++
++	return airoha_qdma_set_chan_tx_sched(port, channel, mode, w,
++					     ARRAY_SIZE(w));
++}
++
++static int airoha_qdma_get_tx_ets_stats(struct airoha_gdm_port *port,
++					int channel,
++					struct tc_ets_qopt_offload *opt)
++{
++	u64 cpu_tx_packets = airoha_qdma_rr(port->qdma,
++					    REG_CNTR_VAL(channel << 1));
++	u64 fwd_tx_packets = airoha_qdma_rr(port->qdma,
++					    REG_CNTR_VAL((channel << 1) + 1));
++	u64 tx_packets = (cpu_tx_packets - port->cpu_tx_packets) +
++			 (fwd_tx_packets - port->fwd_tx_packets);
++	_bstats_update(opt->stats.bstats, 0, tx_packets);
++
++	port->cpu_tx_packets = cpu_tx_packets;
++	port->fwd_tx_packets = fwd_tx_packets;
++
++	return 0;
++}
++
++static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
++				     struct tc_ets_qopt_offload *opt)
++{
++	int channel = TC_H_MAJ(opt->handle) >> 16;
++
++	if (opt->parent == TC_H_ROOT)
++		return -EINVAL;
++
++	switch (opt->command) {
++	case TC_ETS_REPLACE:
++		return airoha_qdma_set_tx_ets_sched(port, channel, opt);
++	case TC_ETS_DESTROY:
++		/* PRIO is default qdisc scheduler */
++		return airoha_qdma_set_tx_prio_sched(port, channel);
++	case TC_ETS_STATS:
++		return airoha_qdma_get_tx_ets_stats(port, channel, opt);
++	default:
++		return -EOPNOTSUPP;
++	}
++}
++
++static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
++			       void *type_data)
++{
++	struct airoha_gdm_port *port = netdev_priv(dev);
++
++	switch (type) {
++	case TC_SETUP_QDISC_ETS:
++		return airoha_tc_setup_qdisc_ets(port, type_data);
++	default:
++		return -EOPNOTSUPP;
++	}
++}
++
+ static const struct net_device_ops airoha_netdev_ops = {
+ 	.ndo_init		= airoha_dev_init,
+ 	.ndo_open		= airoha_dev_open,
+@@ -2639,6 +2831,7 @@ static const struct net_device_ops airoh
+ 	.ndo_start_xmit		= airoha_dev_xmit,
+ 	.ndo_get_stats64        = airoha_dev_get_stats64,
+ 	.ndo_set_mac_address	= airoha_dev_set_macaddr,
++	.ndo_setup_tc		= airoha_dev_tc_setup,
+ };
+ 
+ static const struct ethtool_ops airoha_ethtool_ops = {
+@@ -2688,7 +2881,8 @@ static int airoha_alloc_gdm_port(struct
+ 	dev->watchdog_timeo = 5 * HZ;
+ 	dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
+ 			   NETIF_F_TSO6 | NETIF_F_IPV6_CSUM |
+-			   NETIF_F_SG | NETIF_F_TSO;
++			   NETIF_F_SG | NETIF_F_TSO |
++			   NETIF_F_HW_TC;
+ 	dev->features |= dev->hw_features;
+ 	dev->dev.of_node = np;
+ 	dev->irq = qdma->irq;

target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch

@@ -0,0 +1,371 @@
+From ef1ca9271313b4ea7b03de69576aacef1e78f381 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 3 Jan 2025 13:17:05 +0100
+Subject: [PATCH 4/4] net: airoha: Add sched HTB offload support
+
+Introduce support for HTB Qdisc offload available in the Airoha EN7581
+ethernet controller. EN7581 can offload only one level of HTB leafs.
+Each HTB leaf represents a QoS channel supported by EN7581 SoC.
+The typical use-case is creating a HTB leaf for QoS channel to rate
+limit the egress traffic and attach an ETS Qdisc to each HTB leaf in
+order to enforce traffic prioritization.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 288 ++++++++++++++++++++-
+ 1 file changed, 287 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -28,6 +28,8 @@
+ #define AIROHA_NUM_QOS_QUEUES		8
+ #define AIROHA_NUM_TX_RING		32
+ #define AIROHA_NUM_RX_RING		32
++#define AIROHA_NUM_NETDEV_TX_RINGS	(AIROHA_NUM_TX_RING + \
++					 AIROHA_NUM_QOS_CHANNELS)
+ #define AIROHA_FE_MC_MAX_VLAN_TABLE	64
+ #define AIROHA_FE_MC_MAX_VLAN_PORT	16
+ #define AIROHA_NUM_TX_IRQ		2
+@@ -43,6 +45,9 @@
+ #define PSE_RSV_PAGES			128
+ #define PSE_QUEUE_RSV_PAGES		64
+ 
++#define QDMA_METER_IDX(_n)		((_n) & 0xff)
++#define QDMA_METER_GROUP(_n)		(((_n) >> 8) & 0x3)
++
+ /* FE */
+ #define PSE_BASE			0x0100
+ #define CSR_IFC_BASE			0x0200
+@@ -583,6 +588,17 @@
+ #define EGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)
+ #define EGRESS_FAST_TICK_MASK		GENMASK(15, 0)
+ 
++#define TRTCM_PARAM_RW_MASK		BIT(31)
++#define TRTCM_PARAM_RW_DONE_MASK	BIT(30)
++#define TRTCM_PARAM_TYPE_MASK		GENMASK(29, 28)
++#define TRTCM_METER_GROUP_MASK		GENMASK(27, 26)
++#define TRTCM_PARAM_INDEX_MASK		GENMASK(23, 17)
++#define TRTCM_PARAM_RATE_TYPE_MASK	BIT(16)
++
++#define REG_TRTCM_CFG_PARAM(_n)		((_n) + 0x4)
++#define REG_TRTCM_DATA_LOW(_n)		((_n) + 0x8)
++#define REG_TRTCM_DATA_HIGH(_n)		((_n) + 0xc)
++
+ #define REG_TXWRR_MODE_CFG		0x1020
+ #define TWRR_WEIGHT_SCALE_MASK		BIT(31)
+ #define TWRR_WEIGHT_BASE_MASK		BIT(3)
+@@ -759,6 +775,29 @@ enum tx_sched_mode {
+ 	TC_SCH_WRR2,
+ };
+ 
++enum trtcm_param_type {
++	TRTCM_MISC_MODE, /* meter_en, pps_mode, tick_sel */
++	TRTCM_TOKEN_RATE_MODE,
++	TRTCM_BUCKETSIZE_SHIFT_MODE,
++	TRTCM_BUCKET_COUNTER_MODE,
++};
++
++enum trtcm_mode_type {
++	TRTCM_COMMIT_MODE,
++	TRTCM_PEAK_MODE,
++};
++
++enum trtcm_param {
++	TRTCM_TICK_SEL = BIT(0),
++	TRTCM_PKT_MODE = BIT(1),
++	TRTCM_METER_MODE = BIT(2),
++};
++
++#define MIN_TOKEN_SIZE				4096
++#define MAX_TOKEN_SIZE_OFFSET			17
++#define TRTCM_TOKEN_RATE_MASK			GENMASK(23, 6)
++#define TRTCM_TOKEN_RATE_FRACTION_MASK		GENMASK(5, 0)
++
+ struct airoha_queue_entry {
+ 	union {
+ 		void *buf;
+@@ -850,6 +889,8 @@ struct airoha_gdm_port {
+ 
+ 	struct airoha_hw_stats stats;
+ 
++	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);
++
+ 	/* qos stats counters */
+ 	u64 cpu_tx_packets;
+ 	u64 fwd_tx_packets;
+@@ -2810,6 +2851,243 @@ static int airoha_tc_setup_qdisc_ets(str
+ 	}
+ }
+ 
++static int airoha_qdma_get_trtcm_param(struct airoha_qdma *qdma, int channel,
++				       u32 addr, enum trtcm_param_type param,
++				       enum trtcm_mode_type mode,
++				       u32 *val_low, u32 *val_high)
++{
++	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);
++	u32 val, config = FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |
++			  FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |
++			  FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |
++			  FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);
++
++	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
++	if (read_poll_timeout(airoha_qdma_rr, val,
++			      val & TRTCM_PARAM_RW_DONE_MASK,
++			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,
++			      qdma, REG_TRTCM_CFG_PARAM(addr)))
++		return -ETIMEDOUT;
++
++	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));
++	if (val_high)
++		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));
++
++	return 0;
++}
++
++static int airoha_qdma_set_trtcm_param(struct airoha_qdma *qdma, int channel,
++				       u32 addr, enum trtcm_param_type param,
++				       enum trtcm_mode_type mode, u32 val)
++{
++	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);
++	u32 config = TRTCM_PARAM_RW_MASK |
++		     FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |
++		     FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |
++		     FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |
++		     FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);
++
++	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);
++	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
++
++	return read_poll_timeout(airoha_qdma_rr, val,
++				 val & TRTCM_PARAM_RW_DONE_MASK,
++				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,
++				 qdma, REG_TRTCM_CFG_PARAM(addr));
++}
++
++static int airoha_qdma_set_trtcm_config(struct airoha_qdma *qdma, int channel,
++					u32 addr, enum trtcm_mode_type mode,
++					bool enable, u32 enable_mask)
++{
++	u32 val;
++
++	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					mode, &val, NULL))
++		return -EINVAL;
++
++	val = enable ? val | enable_mask : val & ~enable_mask;
++
++	return airoha_qdma_set_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					   mode, val);
++}
++
++static int airoha_qdma_set_trtcm_token_bucket(struct airoha_qdma *qdma,
++					      int channel, u32 addr,
++					      enum trtcm_mode_type mode,
++					      u32 rate_val, u32 bucket_size)
++{
++	u32 val, config, tick, unit, rate, rate_frac;
++	int err;
++
++	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					mode, &config, NULL))
++		return -EINVAL;
++
++	val = airoha_qdma_rr(qdma, addr);
++	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);
++	if (config & TRTCM_TICK_SEL)
++		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);
++	if (!tick)
++		return -EINVAL;
++
++	unit = (config & TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;
++	if (!unit)
++		return -EINVAL;
++
++	rate = rate_val / unit;
++	rate_frac = rate_val % unit;
++	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;
++	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |
++	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);
++
++	err = airoha_qdma_set_trtcm_param(qdma, channel, addr,
++					  TRTCM_TOKEN_RATE_MODE, mode, rate);
++	if (err)
++		return err;
++
++	val = max_t(u32, bucket_size, MIN_TOKEN_SIZE);
++	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);
++
++	return airoha_qdma_set_trtcm_param(qdma, channel, addr,
++					   TRTCM_BUCKETSIZE_SHIFT_MODE,
++					   mode, val);
++}
++
++static int airoha_qdma_set_tx_rate_limit(struct airoha_gdm_port *port,
++					 int channel, u32 rate,
++					 u32 bucket_size)
++{
++	int i, err;
++
++	for (i = 0; i <= TRTCM_PEAK_MODE; i++) {
++		err = airoha_qdma_set_trtcm_config(port->qdma, channel,
++						   REG_EGRESS_TRTCM_CFG, i,
++						   !!rate, TRTCM_METER_MODE);
++		if (err)
++			return err;
++
++		err = airoha_qdma_set_trtcm_token_bucket(port->qdma, channel,
++							 REG_EGRESS_TRTCM_CFG,
++							 i, rate, bucket_size);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++static int airoha_tc_htb_alloc_leaf_queue(struct airoha_gdm_port *port,
++					  struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++	u32 rate = div_u64(opt->rate, 1000) << 3; /* kbps */
++	struct net_device *dev = port->dev;
++	int num_tx_queues = dev->real_num_tx_queues;
++	int err;
++
++	if (opt->parent_classid != TC_HTB_CLASSID_ROOT) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid parent classid");
++		return -EINVAL;
++	}
++
++	err = airoha_qdma_set_tx_rate_limit(port, channel, rate, opt->quantum);
++	if (err) {
++		NL_SET_ERR_MSG_MOD(opt->extack,
++				   "failed configuring htb offload");
++		return err;
++	}
++
++	if (opt->command == TC_HTB_NODE_MODIFY)
++		return 0;
++
++	err = netif_set_real_num_tx_queues(dev, num_tx_queues + 1);
++	if (err) {
++		airoha_qdma_set_tx_rate_limit(port, channel, 0, opt->quantum);
++		NL_SET_ERR_MSG_MOD(opt->extack,
++				   "failed setting real_num_tx_queues");
++		return err;
++	}
++
++	set_bit(channel, port->qos_sq_bmap);
++	opt->qid = AIROHA_NUM_TX_RING + channel;
++
++	return 0;
++}
++
++static void airoha_tc_remove_htb_queue(struct airoha_gdm_port *port, int queue)
++{
++	struct net_device *dev = port->dev;
++
++	netif_set_real_num_tx_queues(dev, dev->real_num_tx_queues - 1);
++	airoha_qdma_set_tx_rate_limit(port, queue + 1, 0, 0);
++	clear_bit(queue, port->qos_sq_bmap);
++}
++
++static int airoha_tc_htb_delete_leaf_queue(struct airoha_gdm_port *port,
++					   struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++
++	if (!test_bit(channel, port->qos_sq_bmap)) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
++		return -EINVAL;
++	}
++
++	airoha_tc_remove_htb_queue(port, channel);
++
++	return 0;
++}
++
++static int airoha_tc_htb_destroy(struct airoha_gdm_port *port)
++{
++	int q;
++
++	for_each_set_bit(q, port->qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)
++		airoha_tc_remove_htb_queue(port, q);
++
++	return 0;
++}
++
++static int airoha_tc_get_htb_get_leaf_queue(struct airoha_gdm_port *port,
++					    struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++
++	if (!test_bit(channel, port->qos_sq_bmap)) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
++		return -EINVAL;
++	}
++
++	opt->qid = channel;
++
++	return 0;
++}
++
++static int airoha_tc_setup_qdisc_htb(struct airoha_gdm_port *port,
++				     struct tc_htb_qopt_offload *opt)
++{
++	switch (opt->command) {
++	case TC_HTB_CREATE:
++		break;
++	case TC_HTB_DESTROY:
++		return airoha_tc_htb_destroy(port);
++	case TC_HTB_NODE_MODIFY:
++	case TC_HTB_LEAF_ALLOC_QUEUE:
++		return airoha_tc_htb_alloc_leaf_queue(port, opt);
++	case TC_HTB_LEAF_DEL:
++	case TC_HTB_LEAF_DEL_LAST:
++	case TC_HTB_LEAF_DEL_LAST_FORCE:
++		return airoha_tc_htb_delete_leaf_queue(port, opt);
++	case TC_HTB_LEAF_QUERY_QUEUE:
++		return airoha_tc_get_htb_get_leaf_queue(port, opt);
++	default:
++		return -EOPNOTSUPP;
++	}
++
++	return 0;
++}
++
+ static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
+ 			       void *type_data)
+ {
+@@ -2818,6 +3096,8 @@ static int airoha_dev_tc_setup(struct ne
+ 	switch (type) {
+ 	case TC_SETUP_QDISC_ETS:
+ 		return airoha_tc_setup_qdisc_ets(port, type_data);
++	case TC_SETUP_QDISC_HTB:
++		return airoha_tc_setup_qdisc_htb(port, type_data);
+ 	default:
+ 		return -EOPNOTSUPP;
+ 	}
+@@ -2868,7 +3148,8 @@ static int airoha_alloc_gdm_port(struct
+ 	}
+ 
+ 	dev = devm_alloc_etherdev_mqs(eth->dev, sizeof(*port),
+-				      AIROHA_NUM_TX_RING, AIROHA_NUM_RX_RING);
++				      AIROHA_NUM_NETDEV_TX_RINGS,
++				      AIROHA_NUM_RX_RING);
+ 	if (!dev) {
+ 		dev_err(eth->dev, "alloc_etherdev failed\n");
+ 		return -ENOMEM;
+@@ -2888,6 +3169,11 @@ static int airoha_alloc_gdm_port(struct
+ 	dev->irq = qdma->irq;
+ 	SET_NETDEV_DEV(dev, eth->dev);
+ 
++	/* reserve hw queues for HTB offloading */
++	err = netif_set_real_num_tx_queues(dev, AIROHA_NUM_TX_RING);
++	if (err)
++		return err;
++
+ 	err = of_get_ethdev_address(np, dev);
+ 	if (err) {
+ 		if (err == -EPROBE_DEFER)

target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch

@@ -0,0 +1,232 @@
+From 84cf9e541cccb8cb698518a9897942e8c78f1d83 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Thu, 9 Jan 2025 14:12:58 +0100
+Subject: [PATCH] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
+
+Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
+frequency scaling with SMC APIs and register a generic "cpufreq-dt"
+device.
+
+All CPU share the same frequency and can't be controlled independently.
+CPU frequency is controlled by the attached PM domain.
+
+Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
+driver is needed with OPP v2 nodes declared in DTS.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/Kconfig.arm          |   8 ++
+ drivers/cpufreq/Makefile             |   1 +
+ drivers/cpufreq/airoha-cpufreq.c     | 152 +++++++++++++++++++++++++++
+ drivers/cpufreq/cpufreq-dt-platdev.c |   2 +
+ 4 files changed, 163 insertions(+)
+ create mode 100644 drivers/cpufreq/airoha-cpufreq.c
+
+--- a/drivers/cpufreq/Kconfig.arm
++++ b/drivers/cpufreq/Kconfig.arm
+@@ -41,6 +41,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called sun50i-cpufreq-nvmem.
+ 
++config ARM_AIROHA_SOC_CPUFREQ
++	tristate "Airoha EN7581 SoC CPUFreq support"
++	depends on ARCH_AIROHA || COMPILE_TEST
++	select PM_OPP
++	default ARCH_AIROHA
++	help
++	  This adds the CPUFreq driver for Airoha EN7581 SoCs.
++
+ config ARM_APPLE_SOC_CPUFREQ
+ 	tristate "Apple Silicon SoC CPUFreq support"
+ 	depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
+--- a/drivers/cpufreq/Makefile
++++ b/drivers/cpufreq/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY)	+
+ 
+ ##################################################################################
+ # ARM SoC drivers
++obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ)	+= airoha-cpufreq.o
+ obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ)	+= apple-soc-cpufreq.o
+ obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ)	+= armada-37xx-cpufreq.o
+ obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ)	+= armada-8k-cpufreq.o
+--- /dev/null
++++ b/drivers/cpufreq/airoha-cpufreq.c
+@@ -0,0 +1,166 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/bitfield.h>
++#include <linux/cpufreq.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
++#include <linux/slab.h>
++
++#include "cpufreq-dt.h"
++
++struct airoha_cpufreq_priv {
++	int opp_token;
++	struct device **virt_devs;
++	struct platform_device *cpufreq_dt;
++};
++
++static struct platform_device *cpufreq_pdev;
++
++/* NOP function to disable OPP from setting clock */
++static int airoha_cpufreq_config_clks_nop(struct device *dev,
++					  struct opp_table *opp_table,
++					  struct dev_pm_opp *old_opp,
++					  struct dev_pm_opp *opp,
++					  void *data, bool scaling_down)
++{
++	return 0;
++}
++
++static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
++static const char * const airoha_cpufreq_pd_names[] = { "perf", NULL };
++
++static int airoha_cpufreq_probe(struct platform_device *pdev)
++{
++	struct dev_pm_opp_config config = {
++		.clk_names = airoha_cpufreq_clk_names,
++		.config_clks = airoha_cpufreq_config_clks_nop,
++		.genpd_names = airoha_cpufreq_pd_names,
++	};
++	struct platform_device *cpufreq_dt;
++	struct airoha_cpufreq_priv *priv;
++	struct device *dev = &pdev->dev;
++	struct device **virt_devs = NULL;
++	struct device *cpu_dev;
++	int ret;
++
++	/* CPUs refer to the same OPP table */
++	cpu_dev = get_cpu_device(0);
++	if (!cpu_dev)
++		return -ENODEV;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	/* Set OPP table conf with NOP config_clks */
++	priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
++	if (priv->opp_token < 0)
++		return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
++
++	/* Set Attached PM for OPP ACTIVE */
++	if (virt_devs) {
++		const char * const *name = airoha_cpufreq_pd_names;
++		int i, j;
++
++		for (i = 0; *name; i++, name++) {
++			ret = pm_runtime_resume_and_get(virt_devs[i]);
++			if (ret) {
++				dev_err(cpu_dev, "failed to resume %s: %d\n",
++					*name, ret);
++
++				/* Rollback previous PM runtime calls */
++				name = config.genpd_names;
++				for (j = 0; *name && j < i; j++, name++)
++					pm_runtime_put(virt_devs[j]);
++
++				goto err_register_cpufreq;
++			}
++		}
++		priv->virt_devs = virt_devs;
++	}
++
++	cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
++	ret = PTR_ERR_OR_ZERO(cpufreq_dt);
++	if (ret) {
++		dev_err(dev, "failed to create cpufreq-dt device: %d\n", ret);
++		goto err_register_cpufreq;
++	}
++
++	priv->cpufreq_dt = cpufreq_dt;
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++
++err_register_cpufreq:
++	dev_pm_opp_clear_config(priv->opp_token);
++
++	return ret;
++}
++
++static void airoha_cpufreq_remove(struct platform_device *pdev)
++{
++	struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
++	const char * const *name = airoha_cpufreq_pd_names;
++	int i;
++
++	platform_device_unregister(priv->cpufreq_dt);
++
++	dev_pm_opp_clear_config(priv->opp_token);
++
++	for (i = 0; *name; i++, name++)
++		pm_runtime_put(priv->virt_devs[i]);
++}
++
++static struct platform_driver airoha_cpufreq_driver = {
++	.probe = airoha_cpufreq_probe,
++	.remove_new = airoha_cpufreq_remove,
++	.driver = {
++		.name = "airoha-cpufreq",
++	},
++};
++
++static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
++	{ .compatible = "airoha,en7581" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list);
++
++static int __init airoha_cpufreq_init(void)
++{
++	struct device_node *np = of_find_node_by_path("/");
++	const struct of_device_id *match;
++	int ret;
++
++	if (!np)
++		return -ENODEV;
++
++	match = of_match_node(airoha_cpufreq_match_list, np);
++	of_node_put(np);
++	if (!match)
++		return -ENODEV;
++
++	ret = platform_driver_register(&airoha_cpufreq_driver);
++	if (unlikely(ret < 0))
++		return ret;
++
++	cpufreq_pdev = platform_device_register_data(NULL, "airoha-cpufreq",
++						     -1, match, sizeof(*match));
++	ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
++	if (ret)
++		platform_driver_unregister(&airoha_cpufreq_driver);
++
++	return ret;
++}
++module_init(airoha_cpufreq_init);
++
++static void __exit airoha_cpufreq_exit(void)
++{
++	platform_device_unregister(cpufreq_pdev);
++	platform_driver_unregister(&airoha_cpufreq_driver);
++}
++module_exit(airoha_cpufreq_exit);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
++MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
++MODULE_LICENSE("GPL");
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -103,6 +103,8 @@ static const struct of_device_id allowli
+  * platforms using "operating-points-v2" property.
+  */
+ static const struct of_device_id blocklist[] __initconst = {
++	{ .compatible = "airoha,en7581", },
++
+ 	{ .compatible = "allwinner,sun50i-h6", },
+ 
+ 	{ .compatible = "apple,arm-platform", },

target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch

@@ -0,0 +1,53 @@
+From b56e4d660a9688ff83f5cbdc6e3ea063352d0d79 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Sun, 12 Jan 2025 19:32:45 +0100
+Subject: [PATCH] net: airoha: Enforce ETS Qdisc priomap
+
+EN7581 SoC supports fixed QoS band priority where WRR queues have lowest
+priorities with respect to SP ones.
+E.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn
+
+Enforce ETS Qdisc priomap according to the hw capabilities.
+
+Suggested-by: Davide Caratti <dcaratti@redhat.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Davide Caratti <dcaratti@redhat.com>
+Link: https://patch.msgid.link/20250112-airoha_ets_priomap-v1-1-fb616de159ba@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 17 +++++++++++++++--
+ 1 file changed, 15 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2786,7 +2786,7 @@ static int airoha_qdma_set_tx_ets_sched(
+ 	struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
+ 	enum tx_sched_mode mode = TC_SCH_SP;
+ 	u16 w[AIROHA_NUM_QOS_QUEUES] = {};
+-	int i, nstrict = 0;
++	int i, nstrict = 0, nwrr, qidx;
+ 
+ 	if (p->bands > AIROHA_NUM_QOS_QUEUES)
+ 		return -EINVAL;
+@@ -2800,7 +2800,20 @@ static int airoha_qdma_set_tx_ets_sched(
+ 	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)
+ 		return -EINVAL;
+ 
+-	for (i = 0; i < p->bands - nstrict; i++)
++	/* EN7581 SoC supports fixed QoS band priority where WRR queues have
++	 * lowest priorities with respect to SP ones.
++	 * e.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn
++	 */
++	nwrr = p->bands - nstrict;
++	qidx = nstrict && nwrr ? nstrict : 0;
++	for (i = 1; i <= p->bands; i++) {
++		if (p->priomap[i % AIROHA_NUM_QOS_QUEUES] != qidx)
++			return -EINVAL;
++
++		qidx = i == nwrr ? 0 : qidx + 1;
++	}
++
++	for (i = 0; i < nwrr; i++)
+ 		w[i] = p->weights[nstrict + i];
+ 
+ 	if (!nstrict)

target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch

@@ -0,0 +1,196 @@
+From 82e703dd438b71432cc0ccbb90925d1e32dd014a Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Thu, 9 Jan 2025 14:12:57 +0100
+Subject: [PATCH] pmdomain: airoha: Add Airoha CPU PM Domain support
+
+Add Airoha CPU PM Domain support to control frequency and power of CPU
+present on Airoha EN7581 SoC.
+
+Frequency and power can be controlled with the use of the SMC command by
+passing the performance state. The driver also expose a read-only clock
+that expose the current CPU frequency with SMC command.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250109131313.32317-1-ansuelsmth@gmail.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+---
+ drivers/pmdomain/mediatek/Kconfig             |  12 ++
+ drivers/pmdomain/mediatek/Makefile            |   1 +
+ .../pmdomain/mediatek/airoha-cpu-pmdomain.c   | 144 ++++++++++++++++++
+ 3 files changed, 157 insertions(+)
+ create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
+
+--- a/drivers/soc/mediatek/Kconfig
++++ b/drivers/soc/mediatek/Kconfig
+@@ -2,6 +2,17 @@
+ #
+ # MediaTek SoC drivers
+ #
++config AIROHA_CPU_PM_DOMAIN
++	tristate "Airoha CPU power domain"
++	default ARCH_AIROHA
++	depends on PM
++	select PM_GENERIC_DOMAINS
++	help
++	  Say y here to enable CPU power domain support for Airoha SoC.
++
++	  CPU frequency and power is controlled by ATF with SMC command to
++	  set performance states.
++
+ menu "MediaTek SoC drivers"
+ 	depends on ARCH_MEDIATEK || COMPILE_TEST
+ 
+--- a/drivers/pmdomain/mediatek/Makefile
++++ b/drivers/pmdomain/mediatek/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ obj-$(CONFIG_MTK_SCPSYS)		+= mtk-scpsys.o
+ obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) 	+= mtk-pm-domains.o
++obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) 	+= airoha-cpu-pmdomain.o
+--- /dev/null
++++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
+@@ -0,0 +1,144 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/arm-smccc.h>
++#include <linux/bitfield.h>
++#include <linux/clk-provider.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/pm_domain.h>
++#include <linux/slab.h>
++
++#define AIROHA_SIP_AVS_HANDLE			0x82000301
++#define AIROHA_AVS_OP_BASE			0xddddddd0
++#define AIROHA_AVS_OP_MASK			GENMASK(1, 0)
++#define AIROHA_AVS_OP_FREQ_DYN_ADJ		(AIROHA_AVS_OP_BASE | \
++						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
++#define AIROHA_AVS_OP_GET_FREQ			(AIROHA_AVS_OP_BASE | \
++						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
++
++struct airoha_cpu_pmdomain_priv {
++	struct clk_hw hw;
++	struct generic_pm_domain pd;
++};
++
++static long airoha_cpu_pmdomain_clk_round(struct clk_hw *hw, unsigned long rate,
++					  unsigned long *parent_rate)
++{
++	return rate;
++}
++
++static unsigned long airoha_cpu_pmdomain_clk_get(struct clk_hw *hw,
++						 unsigned long parent_rate)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
++			     0, 0, 0, 0, 0, 0, &res);
++
++	/* SMCCC returns freq in MHz */
++	return (int)(res.a0 * 1000 * 1000);
++}
++
++/* Airoha CPU clk SMCC is always enabled */
++static int airoha_cpu_pmdomain_clk_is_enabled(struct clk_hw *hw)
++{
++	return true;
++}
++
++static const struct clk_ops airoha_cpu_pmdomain_clk_ops = {
++	.recalc_rate = airoha_cpu_pmdomain_clk_get,
++	.is_enabled = airoha_cpu_pmdomain_clk_is_enabled,
++	.round_rate = airoha_cpu_pmdomain_clk_round,
++};
++
++static int airoha_cpu_pmdomain_set_performance_state(struct generic_pm_domain *domain,
++						     unsigned int state)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_FREQ_DYN_ADJ,
++			     0, state, 0, 0, 0, 0, &res);
++
++	/* SMC signal correct apply by unsetting BIT 0 */
++	return res.a0 & BIT(0) ? -EINVAL : 0;
++}
++
++static int airoha_cpu_pmdomain_probe(struct platform_device *pdev)
++{
++	struct airoha_cpu_pmdomain_priv *priv;
++	struct device *dev = &pdev->dev;
++	const struct clk_init_data init = {
++		.name = "cpu",
++		.ops = &airoha_cpu_pmdomain_clk_ops,
++		/* Clock with no set_rate, can't cache */
++		.flags = CLK_GET_RATE_NOCACHE,
++	};
++	struct generic_pm_domain *pd;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	/* Init and register a get-only clk for Cpufreq */
++	priv->hw.init = &init;
++	ret = devm_clk_hw_register(dev, &priv->hw);
++	if (ret)
++		return ret;
++
++	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
++					  &priv->hw);
++	if (ret)
++		return ret;
++
++	/* Init and register a PD for CPU */
++	pd = &priv->pd;
++	pd->name = "cpu_pd";
++	pd->flags = GENPD_FLAG_ALWAYS_ON;
++	pd->set_performance_state = airoha_cpu_pmdomain_set_performance_state;
++
++	ret = pm_genpd_init(pd, NULL, false);
++	if (ret)
++		return ret;
++
++	ret = of_genpd_add_provider_simple(dev->of_node, pd);
++	if (ret)
++		goto err_add_provider;
++
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++
++err_add_provider:
++	pm_genpd_remove(pd);
++
++	return ret;
++}
++
++static void airoha_cpu_pmdomain_remove(struct platform_device *pdev)
++{
++	struct airoha_cpu_pmdomain_priv *priv = platform_get_drvdata(pdev);
++
++	of_genpd_del_provider(pdev->dev.of_node);
++	pm_genpd_remove(&priv->pd);
++}
++
++static const struct of_device_id airoha_cpu_pmdomain_of_match[] = {
++	{ .compatible = "airoha,en7581-cpufreq" },
++	{ },
++};
++MODULE_DEVICE_TABLE(of, airoha_cpu_pmdomain_of_match);
++
++static struct platform_driver airoha_cpu_pmdomain_driver = {
++	.probe = airoha_cpu_pmdomain_probe,
++	.remove_new = airoha_cpu_pmdomain_remove,
++	.driver = {
++		.name = "airoha-cpu-pmdomain",
++		.of_match_table = airoha_cpu_pmdomain_of_match,
++	},
++};
++module_platform_driver(airoha_cpu_pmdomain_driver);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
++MODULE_DESCRIPTION("CPU PM domain driver for Airoha SoCs");
++MODULE_LICENSE("GPL");

target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch

@@ -0,0 +1,83 @@
+From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:02 +0100
+Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
+ numbers
+
+Airoha EN7581 SoC have additional clock compared to EN7523 but current
+driver permits to only support up to EN7523 clock numbers.
+
+To handle this, rework the clock handling and permit to declare the
+clocks number in match_data and alloca clk_data based on the compatible
+match_data.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/clk-en7523.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -75,6 +75,7 @@ struct en_rst_data {
+ };
+ 
+ struct en_clk_soc_data {
++	u32 num_clocks;
+ 	const struct clk_ops pcie_ops;
+ 	int (*hw_init)(struct platform_device *pdev,
+ 		       struct clk_hw_onecell_data *clk_data);
+@@ -504,8 +505,6 @@ static void en7523_register_clocks(struc
+ 	u32 rate;
+ 	int i;
+ 
+-	clk_data->num = EN7523_NUM_CLOCKS;
+-
+ 	for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {
+ 		const struct en_clk_desc *desc = &en7523_base_clks[i];
+ 		u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
+@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
+ 
+ 	hw = en7523_register_pcie_clk(dev, base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+ 
+ static int en7523_reset_update(struct reset_controller_dev *rcdev,
+@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
+ 	struct clk_hw_onecell_data *clk_data;
+ 	int r;
+ 
++	soc_data = device_get_match_data(&pdev->dev);
++
+ 	clk_data = devm_kzalloc(&pdev->dev,
+-				struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
++				struct_size(clk_data, hws, soc_data->num_clocks),
+ 				GFP_KERNEL);
+ 	if (!clk_data)
+ 		return -ENOMEM;
+ 
+-	soc_data = device_get_match_data(&pdev->dev);
++	clk_data->num = soc_data->num_clocks;
+ 	r = soc_data->hw_init(pdev, clk_data);
+ 	if (r)
+ 		return r;
+@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
+ }
+ 
+ static const struct en_clk_soc_data en7523_data = {
++	.num_clocks = ARRAY_SIZE(en7523_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7523_pci_is_enabled,
+ 		.prepare = en7523_pci_prepare,
+@@ -726,6 +726,8 @@ static const struct en_clk_soc_data en75
+ };
+ 
+ static const struct en_clk_soc_data en7581_data = {
++	/* We increment num_clocks by 1 to account for additional PCIe clock */
++	.num_clocks = ARRAY_SIZE(en7581_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7581_pci_is_enabled,
+ 		.enable = en7581_pci_enable,

target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch

@@ -0,0 +1,26 @@
+From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:03 +0100
+Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
+
+Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
+should not be placed here. Value is derived internally in the user
+driver.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,6 +12,4 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+ 
+-#define EN7523_NUM_CLOCKS	8
+-
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */

target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch

@@ -0,0 +1,25 @@
+From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:04 +0100
+Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
+
+Add ID for eMMC for EN7581. This is to control clock selection of eMMC
+between 200MHz and 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Acked-by: Conor Dooley <conor.dooley@microchip.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,4 +12,6 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+ 
++#define EN7581_CLK_EMMC		8
++
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */

target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch

@@ -0,0 +1,41 @@
+From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 14 Jan 2025 00:10:05 +0100
+Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
+
+Add clock for eMMC for EN7581. This is used to give info of the current
+eMMC source clock and to switch it from 200MHz or 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/clk-en7523.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -91,6 +91,7 @@ static const u32 emi7581_base[] = { 5400
+ static const u32 bus7581_base[] = { 600000000, 540000000 };
+ static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
+ static const u32 crypto_base[] = { 540000000, 480000000 };
++static const u32 emmc7581_base[] = { 200000000, 150000000 };
+ 
+ static const struct en_clk_desc en7523_base_clks[] = {
+ 	{
+@@ -281,6 +282,15 @@ static const struct en_clk_desc en7581_b
+ 		.base_shift = 0,
+ 		.base_values = crypto_base,
+ 		.n_base_values = ARRAY_SIZE(crypto_base),
++	}, {
++		.id = EN7581_CLK_EMMC,
++		.name = "emmc",
++
++		.base_reg = REG_CRYPTO_CLKSRC2,
++		.base_bits = 1,
++		.base_shift = 12,
++		.base_values = emmc7581_base,
++		.n_base_values = ARRAY_SIZE(emmc7581_base),
+ 	}
+ };
+ 

target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch

@@ -1,247 +0,0 @@
-From 5296da64f77ef6c809b715cdecf308977a08acb9 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 16 Oct 2024 18:00:57 +0200
-Subject: [PATCH] cpufreq: airoha: Add EN7581 Cpufreq SMC driver
-
-Add simple Cpufreq driver for Airoha EN7581 SoC that control CPU
-frequency scaling with SMC APIs.
-
-All CPU share the same frequency and can't be controlled independently.
-Current shared CPU frequency is returned by the related SMC command.
-
-Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
-driver is needed with OPP v2 nodes declared in DTS.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/cpufreq/Kconfig.arm          |   8 ++
- drivers/cpufreq/Makefile             |   1 +
- drivers/cpufreq/airoha-cpufreq.c     | 183 +++++++++++++++++++++++++++
- drivers/cpufreq/cpufreq-dt-platdev.c |   2 +
- 4 files changed, 194 insertions(+)
- create mode 100644 drivers/cpufreq/airoha-cpufreq.c
-
---- a/drivers/cpufreq/Kconfig.arm
-+++ b/drivers/cpufreq/Kconfig.arm
-@@ -41,6 +41,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called sun50i-cpufreq-nvmem.
- 
-+config ARM_AIROHA_SOC_CPUFREQ
-+	tristate "Airoha EN7581 SoC CPUFreq support"
-+	depends on ARCH_AIROHA || COMPILE_TEST
-+	select PM_OPP
-+	default ARCH_AIROHA
-+	help
-+	  This adds the CPUFreq driver for Airoha EN7581 SoCs.
-+
- config ARM_APPLE_SOC_CPUFREQ
- 	tristate "Apple Silicon SoC CPUFreq support"
- 	depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
---- a/drivers/cpufreq/Makefile
-+++ b/drivers/cpufreq/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY)	+
- 
- ##################################################################################
- # ARM SoC drivers
-+obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ)	+= airoha-cpufreq.o
- obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ)	+= apple-soc-cpufreq.o
- obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ)	+= armada-37xx-cpufreq.o
- obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ)	+= armada-8k-cpufreq.o
---- /dev/null
-+++ b/drivers/cpufreq/airoha-cpufreq.c
-@@ -0,0 +1,183 @@
-+// SPDX-License-Identifier: GPL-2.0
-+
-+#include <linux/cpufreq.h>
-+#include <linux/module.h>
-+#include <linux/arm-smccc.h>
-+
-+#define AIROHA_SIP_AVS_HANDLE			0x82000301
-+#define AIROHA_AVS_OP_BASE			0xddddddd0
-+#define AIROHA_AVS_OP_MASK			GENMASK(1, 0)
-+#define AIROHA_AVS_OP_FREQ_DYN_ADJ		(AIROHA_AVS_OP_BASE | \
-+						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
-+#define AIROHA_AVS_OP_GET_FREQ			(AIROHA_AVS_OP_BASE | \
-+						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
-+
-+struct airoha_cpufreq_priv {
-+	struct list_head list;
-+
-+	cpumask_var_t cpus;
-+	struct device *cpu_dev;
-+	struct cpufreq_frequency_table *freq_table;
-+};
-+
-+static LIST_HEAD(priv_list);
-+
-+static unsigned int airoha_cpufreq_get(unsigned int cpu)
-+{
-+	const struct arm_smccc_1_2_regs args = {
-+		.a0 = AIROHA_SIP_AVS_HANDLE,
-+		.a1 = AIROHA_AVS_OP_GET_FREQ,
-+	};
-+	struct arm_smccc_1_2_regs res;
-+
-+	arm_smccc_1_2_smc(&args, &res);
-+
-+	return (int)(res.a0 * 1000);
-+}
-+
-+static int airoha_cpufreq_set_target(struct cpufreq_policy *policy, unsigned int index)
-+{
-+	const struct arm_smccc_1_2_regs args = {
-+		.a0 = AIROHA_SIP_AVS_HANDLE,
-+		.a1 = AIROHA_AVS_OP_FREQ_DYN_ADJ,
-+		.a3 = index,
-+	};
-+	struct arm_smccc_1_2_regs res;
-+
-+	arm_smccc_1_2_smc(&args, &res);
-+
-+	/* SMC signal correct apply by unsetting BIT 0 */
-+	return res.a0 & BIT(0) ? -EINVAL : 0;
-+}
-+
-+static struct airoha_cpufreq_priv *airoha_cpufreq_find_data(int cpu)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+
-+	list_for_each_entry(priv, &priv_list, list) {
-+		if (cpumask_test_cpu(cpu, priv->cpus))
-+			return priv;
-+	}
-+
-+	return NULL;
-+}
-+
-+static int airoha_cpufreq_init(struct cpufreq_policy *policy)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+	struct device *cpu_dev;
-+
-+	priv = airoha_cpufreq_find_data(policy->cpu);
-+	if (!priv)
-+		return -ENODEV;
-+
-+	cpu_dev = priv->cpu_dev;
-+	cpumask_copy(policy->cpus, priv->cpus);
-+	policy->driver_data = priv;
-+	policy->freq_table = priv->freq_table;
-+
-+	return 0;
-+}
-+
-+static struct cpufreq_driver airoha_cpufreq_driver = {
-+	.flags		= CPUFREQ_NEED_INITIAL_FREQ_CHECK |
-+			  CPUFREQ_IS_COOLING_DEV,
-+	.verify		= cpufreq_generic_frequency_table_verify,
-+	.target_index	= airoha_cpufreq_set_target,
-+	.get		= airoha_cpufreq_get,
-+	.init		= airoha_cpufreq_init,
-+	.attr		= cpufreq_generic_attr,
-+	.name		= "airoha-cpufreq",
-+};
-+
-+static int airoha_cpufreq_driver_init_cpu(int cpu)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+	struct device *cpu_dev;
-+	int ret;
-+
-+	cpu_dev = get_cpu_device(cpu);
-+	if (!cpu_dev)
-+		return -EPROBE_DEFER;
-+
-+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	if (!zalloc_cpumask_var(&priv->cpus, GFP_KERNEL))
-+		return -ENOMEM;
-+
-+	cpumask_set_cpu(cpu, priv->cpus);
-+	priv->cpu_dev = cpu_dev;
-+
-+	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, priv->cpus);
-+	if (ret)
-+		goto err;
-+
-+	ret = dev_pm_opp_of_cpumask_add_table(priv->cpus);
-+	if (ret)
-+		goto err;
-+
-+	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &priv->freq_table);
-+	if (ret)
-+		goto err;
-+
-+	list_add(&priv->list, &priv_list);
-+
-+	return 0;
-+
-+err:
-+	dev_pm_opp_of_cpumask_remove_table(priv->cpus);
-+	free_cpumask_var(priv->cpus);
-+
-+	return ret;
-+}
-+
-+static void airoha_cpufreq_release(void)
-+{
-+	struct airoha_cpufreq_priv *priv, *tmp;
-+
-+	list_for_each_entry_safe(priv, tmp, &priv_list, list) {
-+		dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &priv->freq_table);
-+		dev_pm_opp_of_cpumask_remove_table(priv->cpus);
-+		free_cpumask_var(priv->cpus);
-+		list_del(&priv->list);
-+		kfree(priv);
-+	}
-+}
-+
-+static int __init airoha_cpufreq_driver_probe(void)
-+{
-+	int cpu, ret;
-+
-+	if (!of_machine_is_compatible("airoha,en7581"))
-+		return -ENODEV;
-+
-+	for_each_possible_cpu(cpu) {
-+		ret = airoha_cpufreq_driver_init_cpu(cpu);
-+		if (ret)
-+			goto err;
-+	}
-+
-+	ret = cpufreq_register_driver(&airoha_cpufreq_driver);
-+	if (ret)
-+		goto err;
-+
-+	return 0;
-+
-+err:
-+	airoha_cpufreq_release();
-+	return ret;
-+}
-+module_init(airoha_cpufreq_driver_probe);
-+
-+static void __exit airoha_cpufreq_driver_remove(void)
-+{
-+	cpufreq_unregister_driver(&airoha_cpufreq_driver);
-+	airoha_cpufreq_release();
-+}
-+module_exit(airoha_cpufreq_driver_remove);
-+
-+MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
-+MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
-+MODULE_LICENSE("GPL");
---- a/drivers/cpufreq/cpufreq-dt-platdev.c
-+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -103,6 +103,8 @@ static const struct of_device_id allowli
-  * platforms using "operating-points-v2" property.
-  */
- static const struct of_device_id blocklist[] __initconst = {
-+	{ .compatible = "airoha,en7581", },
-+
- 	{ .compatible = "allwinner,sun50i-h6", },
- 
- 	{ .compatible = "apple,arm-platform", },

target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch

@@ -40,7 +40,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/drivers/thermal/thermal_of.c
 +++ b/drivers/thermal/thermal_of.c
-@@ -245,7 +245,7 @@ static void thermal_of_parameters_init(s
+@@ -246,7 +246,7 @@ static void thermal_of_parameters_init(s
  {
  	int coef[2];
  	int ncoef = ARRAY_SIZE(coef);
@@ -49,7 +49,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  
  	tzp->no_hwmon = true;
  
-@@ -257,14 +257,11 @@ static void thermal_of_parameters_init(s
+@@ -258,14 +258,11 @@ static void thermal_of_parameters_init(s
  	 * thermal zone. Thus, we are considering only the first two
  	 * values as slope and offset.
  	 */
@@ -67,7 +67,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  }
  
  static struct device_node *thermal_of_zone_get_by_name(struct thermal_zone_device *tz)
-@@ -458,10 +455,15 @@ static void thermal_of_zone_unregister(s
+@@ -459,10 +456,15 @@ static void thermal_of_zone_unregister(s
   * zone properties and registers new thermal zone with those
   * properties.
   *
@@ -83,7 +83,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
   *
   * Return: a valid thermal zone structure pointer on success.
   * 	- EINVAL: if the device tree thermal description is malformed
-@@ -469,11 +471,11 @@ static void thermal_of_zone_unregister(s
+@@ -470,11 +472,11 @@ static void thermal_of_zone_unregister(s
   *	- Other negative errors are returned by the underlying called functions
   */
  static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
@@ -97,7 +97,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	struct thermal_zone_device_ops *of_ops;
  	struct device_node *np;
  	int delay, pdelay;
-@@ -508,7 +510,7 @@ static struct thermal_zone_device *therm
+@@ -509,7 +511,7 @@ static struct thermal_zone_device *therm
  		goto out_kfree_trips;
  	}
  
@@ -106,7 +106,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  
  	of_ops->bind = thermal_of_bind;
  	of_ops->unbind = thermal_of_unbind;
-@@ -516,7 +518,7 @@ static struct thermal_zone_device *therm
+@@ -517,7 +519,7 @@ static struct thermal_zone_device *therm
  	mask = GENMASK_ULL((ntrips) - 1, 0);
  
  	tz = thermal_zone_device_register_with_trips(np->name, trips, ntrips,
@@ -115,7 +115,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  						     pdelay, delay);
  	if (IS_ERR(tz)) {
  		ret = PTR_ERR(tz);
-@@ -571,6 +573,7 @@ static int devm_thermal_of_zone_match(st
+@@ -572,6 +574,7 @@ static int devm_thermal_of_zone_match(st
  struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int sensor_id, void *data,
  							  const struct thermal_zone_device_ops *ops)
  {
@@ -123,7 +123,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	struct thermal_zone_device **ptr, *tzd;
  
  	ptr = devres_alloc(devm_thermal_of_zone_release, sizeof(*ptr),
-@@ -578,7 +581,7 @@ struct thermal_zone_device *devm_thermal
+@@ -579,7 +582,7 @@ struct thermal_zone_device *devm_thermal
  	if (!ptr)
  		return ERR_PTR(-ENOMEM);
  
@@ -132,7 +132,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	if (IS_ERR(tzd)) {
  		devres_free(ptr);
  		return tzd;
-@@ -592,6 +595,46 @@ struct thermal_zone_device *devm_thermal
+@@ -593,6 +596,46 @@ struct thermal_zone_device *devm_thermal
  EXPORT_SYMBOL_GPL(devm_thermal_of_zone_register);
  
  /**

target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch

@@ -0,0 +1,104 @@
+From patchwork Tue Jan  7 22:26:28 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
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+X-Patchwork-Submitter: Lorenzo Bianconi <lorenzo@kernel.org>
+X-Patchwork-Id: 13929634
+X-Patchwork-Delegate: kuba@kernel.org
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+	by smtp.subspace.kernel.org (Postfix) with ESMTPS id A82271A3035
+	for <netdev@vger.kernel.org>; Tue,  7 Jan 2025 22:27:02 +0000 (UTC)
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+	 ADsdcP6QPwokg==
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Tue, 07 Jan 2025 23:26:28 +0100
+Subject: [PATCH net-next] net: airoha: Fix channel configuration for ETS
+ Qdisc
+Precedence: bulk
+X-Mailing-List: netdev@vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe@vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe@vger.kernel.org>
+MIME-Version: 1.0
+Message-Id: <20250107-airoha-ets-fix-chan-v1-1-97f66ed3a068@kernel.org>
+X-B4-Tracking: v=1; b=H4sIABOqfWcC/x2MSwqAMAwFryJZG6ifVvAq4qLUaLNRaUSE0rsbX
+ Q5v3mQQSkwCY5Uh0c3Cx67Q1BWE6PeNkBdlaE1rTWMG9JyO6JEuwZUf/CSkzobgw+AW14M+z0S
+ 6/dVpLuUFNrlCSGUAAAA=
+X-Change-ID: 20250107-airoha-ets-fix-chan-e35ccac76d64
+To: Felix Fietkau <nbd@nbd.name>, Sean Wang <sean.wang@mediatek.com>,
+ Mark Lee <Mark-MC.Lee@mediatek.com>, Andrew Lunn <andrew+netdev@lunn.ch>,
+ "David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>,
+ Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
+ Matthias Brugger <matthias.bgg@gmail.com>,
+ AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Cc: linux-arm-kernel@lists.infradead.org,
+ linux-mediatek@lists.infradead.org, netdev@vger.kernel.org,
+ Lorenzo Bianconi <lorenzo@kernel.org>
+X-Mailer: b4 0.14.2
+X-Patchwork-Delegate: kuba@kernel.org
+
+Limit ETS QoS channel to AIROHA_NUM_QOS_CHANNELS in
+airoha_tc_setup_qdisc_ets() in order to align the configured channel to
+the value set in airoha_dev_select_queue().
+
+Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support")
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+
+---
+base-commit: a1942da8a38717ddd9b4c132f59e1657c85c1432
+change-id: 20250107-airoha-ets-fix-chan-e35ccac76d64
+
+Best regards,
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2846,11 +2846,14 @@ static int airoha_qdma_get_tx_ets_stats(
+ static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
+ 				     struct tc_ets_qopt_offload *opt)
+ {
+-	int channel = TC_H_MAJ(opt->handle) >> 16;
++	int channel;
+ 
+ 	if (opt->parent == TC_H_ROOT)
+ 		return -EINVAL;
+ 
++	channel = TC_H_MAJ(opt->handle) >> 16;
++	channel = channel % AIROHA_NUM_QOS_CHANNELS;
++
+ 	switch (opt->command) {
+ 	case TC_ETS_REPLACE:
+ 		return airoha_qdma_set_tx_ets_sched(port, channel, opt);

target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch

@@ -12,9 +12,9 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/include/linux/spinlock.h
 +++ b/include/linux/spinlock.h
-@@ -515,6 +515,10 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, ra
- 		    raw_spin_lock_irq(_T->lock),
- 		    raw_spin_unlock_irq(_T->lock))
+@@ -519,6 +519,10 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, ra
+ 
+ DEFINE_LOCK_GUARD_1_COND(raw_spinlock_irq, _try, raw_spin_trylock_irq(_T->lock))
  
 +DEFINE_LOCK_GUARD_1(raw_spinlock_bh, raw_spinlock_t,
 +		    raw_spin_lock_bh(_T->lock),
@@ -23,9 +23,9 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t,
  		    raw_spin_lock_irqsave(_T->lock, _T->flags),
  		    raw_spin_unlock_irqrestore(_T->lock, _T->flags),
-@@ -528,6 +532,10 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlo
- 		    spin_lock_irq(_T->lock),
- 		    spin_unlock_irq(_T->lock))
+@@ -540,6 +544,10 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlo
+ DEFINE_LOCK_GUARD_1_COND(spinlock_irq, _try,
+ 			 spin_trylock_irq(_T->lock))
  
 +DEFINE_LOCK_GUARD_1(spinlock_bh, spinlock_t,
 +		    spin_lock_bh(_T->lock),

target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch

@@ -0,0 +1,58 @@
+From 0e7a622da17da0042294860cdb7a2fac091d25b1 Mon Sep 17 00:00:00 2001
+Message-ID: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 8 Jan 2025 10:50:40 +0100
+Subject: [PATCH 1/6] PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Replace clk_bulk_prepare() and clk_bulk_enable() with
+clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-1-21ac939a3b9b@kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 14 +++-----------
+ 1 file changed, 3 insertions(+), 11 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -907,12 +907,6 @@ static int mtk_pcie_en7581_power_up(stru
+ 	pm_runtime_enable(dev);
+ 	pm_runtime_get_sync(dev);
+ 
+-	err = clk_bulk_prepare(pcie->num_clks, pcie->clks);
+-	if (err) {
+-		dev_err(dev, "failed to prepare clock\n");
+-		goto err_clk_prepare;
+-	}
+-
+ 	val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) |
+ 	      FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) |
+ 	      FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) |
+@@ -925,17 +919,15 @@ static int mtk_pcie_en7581_power_up(stru
+ 	      FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf);
+ 	writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG);
+ 
+-	err = clk_bulk_enable(pcie->num_clks, pcie->clks);
++	err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks);
+ 	if (err) {
+ 		dev_err(dev, "failed to prepare clock\n");
+-		goto err_clk_enable;
++		goto err_clk_prepare_enable;
+ 	}
+ 
+ 	return 0;
+ 
+-err_clk_enable:
+-	clk_bulk_unprepare(pcie->num_clks, pcie->clks);
+-err_clk_prepare:
++err_clk_prepare_enable:
+ 	pm_runtime_put_sync(dev);
+ 	pm_runtime_disable(dev);
+ 	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);

target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch

@@ -0,0 +1,89 @@
+From e4c7dfd953f7618f0ccb70d87c1629634f306fab Mon Sep 17 00:00:00 2001
+Message-ID: <e4c7dfd953f7618f0ccb70d87c1629634f306fab.1736960708.git.lorenzo@kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 8 Jan 2025 10:50:41 +0100
+Subject: [PATCH 2/6] PCI: mediatek-gen3: Move reset/assert callbacks in
+ .power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In order to make the code more readable, the reset_control_bulk_assert()
+function for PHY reset lines is moved to make it pair with
+reset_control_bulk_deassert() in mtk_pcie_power_up() and
+mtk_pcie_en7581_power_up(). The same change is done for
+reset_control_assert() used to assert MAC reset line.
+
+Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to
+complete PCIe reset on MediaTek controller.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-2-21ac939a3b9b@kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 28 +++++++++++++--------
+ 1 file changed, 18 insertions(+), 10 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -120,6 +120,8 @@
+ 
+ #define MAX_NUM_PHY_RESETS		3
+ 
++#define PCIE_MTK_RESET_TIME_US		10
++
+ /* Time in ms needed to complete PCIe reset on EN7581 SoC */
+ #define PCIE_EN7581_RESET_TIME_MS	100
+ 
+@@ -875,9 +877,14 @@ static int mtk_pcie_en7581_power_up(stru
+ 	u32 val;
+ 
+ 	/*
+-	 * Wait for the time needed to complete the bulk assert in
+-	 * mtk_pcie_setup for EN7581 SoC.
++	 * The controller may have been left out of reset by the bootloader
++	 * so make sure that we get a clean start by asserting resets here.
+ 	 */
++	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
++				  pcie->phy_resets);
++	reset_control_assert(pcie->mac_reset);
++
++	/* Wait for the time needed to complete the reset lines assert. */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	err = phy_init(pcie->phy);
+@@ -944,6 +951,15 @@ static int mtk_pcie_power_up(struct mtk_
+ 	struct device *dev = pcie->dev;
+ 	int err;
+ 
++	/*
++	 * The controller may have been left out of reset by the bootloader
++	 * so make sure that we get a clean start by asserting resets here.
++	 */
++	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
++				  pcie->phy_resets);
++	reset_control_assert(pcie->mac_reset);
++	usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US);
++
+ 	/* PHY power on and enable pipe clock */
+ 	err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+ 	if (err) {
+@@ -1016,14 +1032,6 @@ static int mtk_pcie_setup(struct mtk_gen
+ 	 * counter since the bulk is shared.
+ 	 */
+ 	reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+-	/*
+-	 * The controller may have been left out of reset by the bootloader
+-	 * so make sure that we get a clean start by asserting resets here.
+-	 */
+-	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+-
+-	reset_control_assert(pcie->mac_reset);
+-	usleep_range(10, 20);
+ 
+ 	/* Don't touch the hardware registers before power up */
+ 	err = pcie->soc->power_up(pcie);

target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch

@@ -0,0 +1,38 @@
+From 0c9d2d2ef0d916b490a9222ed20ff4616fca876d Mon Sep 17 00:00:00 2001
+Message-ID: <0c9d2d2ef0d916b490a9222ed20ff4616fca876d.1736960708.git.lorenzo@kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 8 Jan 2025 10:50:42 +0100
+Subject: [PATCH 3/6] PCI: mediatek-gen3: Add comment about initialization
+ order in mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add a comment in mtk_pcie_en7581_power_up() to clarify, unlike the other
+MediaTek Gen3 controllers, the Airoha EN7581 requires PHY initialization
+and power-on before PHY reset deassert.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-3-21ac939a3b9b@kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -887,6 +887,10 @@ static int mtk_pcie_en7581_power_up(stru
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
++	/*
++	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
++	 * requires PHY initialization and power-on before PHY reset deassert.
++	 */
+ 	err = phy_init(pcie->phy);
+ 	if (err) {
+ 		dev_err(dev, "failed to initialize PHY\n");

target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch

@@ -0,0 +1,62 @@
+From 90d4e466c9ea2010f33880a36317a8486ccbe082 Mon Sep 17 00:00:00 2001
+Message-ID: <90d4e466c9ea2010f33880a36317a8486ccbe082.1736960708.git.lorenzo@kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 8 Jan 2025 10:50:43 +0100
+Subject: [PATCH 4/6] PCI: mediatek-gen3: Move reset delay in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
+causing occasional PCIe link down issues. In order to overcome the
+problem, PCIe block is reset using REG_PCI_CONTROL (0x88) and
+REG_RESET_CONTROL (0x834) registers available in the clock module
+running clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up().
+
+In order to make the code more readable, move the wait for the time
+needed to complete the PCIe reset from en7581_pci_enable() to
+mtk_pcie_en7581_power_up().
+
+Reduce reset timeout from 250ms to the standard PCIE_T_PVPERL_MS value
+(100ms) since it has no impact on the driver behavior.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-4-21ac939a3b9b@kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+Acked-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/clk-en7523.c                    | 1 -
+ drivers/pci/controller/pcie-mediatek-gen3.c | 7 +++++++
+ 2 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -489,7 +489,6 @@ static int en7581_pci_enable(struct clk_
+ 	       REG_PCI_CONTROL_PERSTOUT;
+ 	val = readl(np_base + REG_PCI_CONTROL);
+ 	writel(val | mask, np_base + REG_PCI_CONTROL);
+-	msleep(250);
+ 
+ 	return 0;
+ }
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -936,6 +936,13 @@ static int mtk_pcie_en7581_power_up(stru
+ 		goto err_clk_prepare_enable;
+ 	}
+ 
++	/*
++	 * Airoha EN7581 performs PCIe reset via clk callbacks since it has a
++	 * hw issue with PCIE_PE_RSTB signal. Add wait for the time needed to
++	 * complete the PCIe reset.
++	 */
++	msleep(PCIE_T_PVPERL_MS);
++
+ 	return 0;
+ 
+ err_clk_prepare_enable:

target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch

@@ -0,0 +1,44 @@
+From c98bee18d0a094e37100c85effe5e161418f8644 Mon Sep 17 00:00:00 2001
+Message-ID: <c98bee18d0a094e37100c85effe5e161418f8644.1736960708.git.lorenzo@kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 8 Jan 2025 10:50:44 +0100
+Subject: [PATCH 5/6] PCI: mediatek-gen3: Rely on msleep() in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Since mtk_pcie_en7581_power_up() runs in non-atomic context, rely on
+msleep() routine instead of mdelay().
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-5-21ac939a3b9b@kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -885,7 +885,7 @@ static int mtk_pcie_en7581_power_up(stru
+ 	reset_control_assert(pcie->mac_reset);
+ 
+ 	/* Wait for the time needed to complete the reset lines assert. */
+-	mdelay(PCIE_EN7581_RESET_TIME_MS);
++	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+@@ -913,7 +913,7 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 * Wait for the time needed to complete the bulk de-assert above.
+ 	 * This time is specific for EN7581 SoC.
+ 	 */
+-	mdelay(PCIE_EN7581_RESET_TIME_MS);
++	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	pm_runtime_enable(dev);
+ 	pm_runtime_get_sync(dev);

target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch

@@ -0,0 +1,131 @@
+From 491cb9c5084790aafa02e843349492c284373231 Mon Sep 17 00:00:00 2001
+Message-ID: <491cb9c5084790aafa02e843349492c284373231.1736960708.git.lorenzo@kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Thu, 9 Jan 2025 00:30:45 +0100
+Subject: [PATCH 6/6] PCI: mediatek-gen3: Avoid PCIe resetting via PERST# for
+ Airoha EN7581 SoC
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Airoha EN7581 has a hw bug asserting/releasing PERST# signal causing
+occasional PCIe link down issues. In order to overcome the problem,
+PERST# signal is not asserted/released during device probe or
+suspend/resume phase and the PCIe block is reset using
+en7523_reset_assert() and en7581_pci_enable().
+
+Introduce flags field in the mtk_gen3_pcie_pdata struct in order to
+specify per-SoC capabilities.
+
+Link: https://lore.kernel.org/r/20250109-pcie-en7581-rst-fix-v4-1-4a45c89fb143@kernel.org
+Tested-by: Hui Ma <hui.ma@airoha.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 59 ++++++++++++++-------
+ 1 file changed, 41 insertions(+), 18 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -127,10 +127,18 @@
+ 
+ struct mtk_gen3_pcie;
+ 
++enum mtk_gen3_pcie_flags {
++	SKIP_PCIE_RSTB	= BIT(0), /* Skip PERST# assertion during device
++				   * probing or suspend/resume phase to
++				   * avoid hw bugs/issues.
++				   */
++};
++
+ /**
+  * struct mtk_gen3_pcie_pdata - differentiate between host generations
+  * @power_up: pcie power_up callback
+  * @phy_resets: phy reset lines SoC data.
++ * @flags: pcie device flags.
+  */
+ struct mtk_gen3_pcie_pdata {
+ 	int (*power_up)(struct mtk_gen3_pcie *pcie);
+@@ -138,6 +146,7 @@ struct mtk_gen3_pcie_pdata {
+ 		const char *id[MAX_NUM_PHY_RESETS];
+ 		int num_resets;
+ 	} phy_resets;
++	u32 flags;
+ };
+ 
+ /**
+@@ -404,22 +413,33 @@ static int mtk_pcie_startup_port(struct
+ 	val |= PCIE_DISABLE_DVFSRC_VLT_REQ;
+ 	writel_relaxed(val, pcie->base + PCIE_MISC_CTRL_REG);
+ 
+-	/* Assert all reset signals */
+-	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+-	val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB;
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
+-
+ 	/*
+-	 * Described in PCIe CEM specification sections 2.2 (PERST# Signal)
+-	 * and 2.2.1 (Initial Power-Up (G3 to S0)).
+-	 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
+-	 * for the power and clock to become stable.
++	 * Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
++	 * causing occasional PCIe link down. In order to overcome the issue,
++	 * PCIE_RSTB signals are not asserted/released at this stage and the
++	 * PCIe block is reset using en7523_reset_assert() and
++	 * en7581_pci_enable().
+ 	 */
+-	msleep(100);
+-
+-	/* De-assert reset signals */
+-	val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	if (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {
++		/* Assert all reset signals */
++		val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
++		val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |
++		       PCIE_PE_RSTB;
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++
++		/*
++		 * Described in PCIe CEM specification revision 6.0.
++		 *
++		 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
++		 * for the power and clock to become stable.
++		 */
++		msleep(PCIE_T_PVPERL_MS);
++
++		/* De-assert reset signals */
++		val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |
++			 PCIE_PE_RSTB);
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	}
+ 
+ 	/* Check if the link is up or not */
+ 	err = readl_poll_timeout(pcie->base + PCIE_LINK_STATUS_REG, val,
+@@ -1178,10 +1198,12 @@ static int mtk_pcie_suspend_noirq(struct
+ 		return err;
+ 	}
+ 
+-	/* Pull down the PERST# pin */
+-	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+-	val |= PCIE_PE_RSTB;
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	if (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {
++		/* Assert the PERST# pin */
++		val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
++		val |= PCIE_PE_RSTB;
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	}
+ 
+ 	dev_dbg(pcie->dev, "entered L2 states successfully");
+ 
+@@ -1232,6 +1254,7 @@ static const struct mtk_gen3_pcie_pdata
+ 		.id[2] = "phy-lane2",
+ 		.num_resets = 3,
+ 	},
++	.flags = SKIP_PCIE_RSTB,
+ };
+ 
+ static const struct of_device_id mtk_pcie_of_match[] = {

target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch

@@ -0,0 +1,81 @@
+From ca4217f3117dceb2d01e179d02031a8758404624 Mon Sep 17 00:00:00 2001
+Message-ID: <ca4217f3117dceb2d01e179d02031a8758404624.1736961235.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Tue, 3 Sep 2024 23:14:02 +0200
+Subject: [PATCH] PCI: mediatek-gen3: Configure PBUS_CSR registers for EN7581
+ SoC
+
+Configure PBus base address and address mask in order to allow the hw
+detecting if a given address is on PCIE0, PCIE1 or PCIE2.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 29 ++++++++++++++++++++-
+ 1 file changed, 28 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -15,6 +15,7 @@
+ #include <linux/irqchip/chained_irq.h>
+ #include <linux/irqdomain.h>
+ #include <linux/kernel.h>
++#include <linux/mfd/syscon.h>
+ #include <linux/module.h>
+ #include <linux/msi.h>
+ #include <linux/of_device.h>
+@@ -24,6 +25,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
++#include <linux/regmap.h>
+ #include <linux/reset.h>
+ 
+ #include "../pci.h"
+@@ -122,6 +124,13 @@
+ 
+ #define PCIE_MTK_RESET_TIME_US		10
+ 
++#define PCIE_EN7581_PBUS_ADDR(_n)	(0x00 + ((_n) << 3))
++#define PCIE_EN7581_PBUS_ADDR_MASK(_n)	(0x04 + ((_n) << 3))
++#define PCIE_EN7581_PBUS_BASE_ADDR(_n)	\
++	((_n) == 2 ? 0x28000000 :	\
++	 (_n) == 1 ? 0x24000000 : 0x20000000)
++#define PCIE_EN7581_PBUS_BASE_ADDR_MASK	GENMASK(31, 26)
++
+ /* Time in ms needed to complete PCIe reset on EN7581 SoC */
+ #define PCIE_EN7581_RESET_TIME_MS	100
+ 
+@@ -893,7 +902,8 @@ static int mtk_pcie_parse_port(struct mt
+ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+-	int err;
++	struct regmap *map;
++	int err, slot;
+ 	u32 val;
+ 
+ 	/*
+@@ -907,6 +917,23 @@ static int mtk_pcie_en7581_power_up(stru
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
++	map = syscon_regmap_lookup_by_compatible("airoha,en7581-pbus-csr");
++	if (IS_ERR(map))
++		return PTR_ERR(map);
++
++	/*
++	 * Configure PBus base address and address mask in order to allow the
++	 * hw detecting if a given address is on PCIE0, PCIE1 or PCIE2.
++	 */
++	slot = of_get_pci_domain_nr(dev->of_node);
++	if (slot < 0)
++		return slot;
++
++	regmap_write(map, PCIE_EN7581_PBUS_ADDR(slot),
++		     PCIE_EN7581_PBUS_BASE_ADDR(slot));
++	regmap_write(map, PCIE_EN7581_PBUS_ADDR_MASK(slot),
++		     PCIE_EN7581_PBUS_BASE_ADDR_MASK);
++
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+ 	 * requires PHY initialization and power-on before PHY reset deassert.

target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch

@@ -0,0 +1,26 @@
+From c4defe43ce17a87e6341d126ba736d9f7ebdc541 Mon Sep 17 00:00:00 2001
+Message-ID: <c4defe43ce17a87e6341d126ba736d9f7ebdc541.1736962769.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 15 Jan 2025 18:36:26 +0100
+Subject: [PATCH] PCI: mediatek-gen3: Remove mac_reset assert leftover for
+ Airoha EN7581 SoC.
+
+Remove a leftover assert for mac_reset line in mtk_pcie_en7581_power_up().
+This is not armful since EN7581 does not requires mac_reset and
+mac_reset is not defined in EN7581 device tree.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -912,7 +912,6 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 */
+ 	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
+ 				  pcie->phy_resets);
+-	reset_control_assert(pcie->mac_reset);
+ 
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	msleep(PCIE_EN7581_RESET_TIME_MS);

target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version

@@ -2,12 +2,15 @@
 
 case "$(board_name)" in
 meraki,mx60|\
-netgear,wndap620|\
-netgear,wndap660|\
 netgear,wndr4700)
 	uci set system.@system[0].compat_version="3.0"
 	uci commit system
 	;;
+netgear,wndap620|\
+netgear,wndap660)
+	uci set system.@system[0].compat_version="2.0"
+	uci commit system
+	;;
 esac
 
 exit 0

target/linux/apm821xx/image/nand.mk

@@ -89,9 +89,6 @@ endef
 TARGET_DEVICES += netgear_wndap660
 
 define Device/netgear_wndr4700
-  DEVICE_COMPAT_VERSION := 3.0
-  DEVICE_COMPAT_MESSAGE := Network swconfig configuration cannot be upgraded to DSA. \
-       Upgrade via sysupgrade mechanism is not possible.
   DEVICE_VENDOR := NETGEAR
   DEVICE_MODEL := Centria N900 WNDR4700
   DEVICE_ALT0_VENDOR := NETGEAR
@@ -123,8 +120,9 @@ define Device/netgear_wndr4700
   NETGEAR_HW_ID := 29763875+128+256
   UBINIZE_OPTS := -E 5
   SUPPORTED_DEVICES += wndr4700
-  DEVICE_COMPAT_VERSION := 2.0
+  DEVICE_COMPAT_VERSION := 3.0
   DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \
+       Network swconfig configuration cannot be upgraded to DSA. \
        Upgrade via sysupgrade mechanism is not possible.
 endef
 TARGET_DEVICES += netgear_wndr4700

target/linux/armsr/README

@@ -49,7 +49,7 @@ With a EDKII or U-Boot binary for the QEMU ARM virtual machines, you can use the
 images in EFI mode:
 
 32-bit:
-gunzip -c bin/targets/armsr/armv7/openwrt-armsr-armv7-generic-ext4-combined.img.gz > openwrt-arm-32.img
+gunzip -c bin/targets/armsr/armv7/openwrt-armsr-armv7-generic-ext4-combined-efi.img.gz > openwrt-arm-32.img
 qemu-system-arm -nographic \
     -cpu cortex-a15 -machine virt \
     -bios bin/targets/armsr/armv7/u-boot-qemu_armv7/u-boot.bin \
@@ -60,7 +60,7 @@ qemu-system-arm -nographic \
     -netdev user,id=testwan -net nic,netdev=testwan
 
 64-bit:
-gunzip -c bin/targets/armsr/armv8/openwrt-armsr-armv8-generic-ext4-combined.img.gz > openwrt-arm-64.img
+gunzip -c bin/targets/armsr/armv8/openwrt-armsr-armv8-generic-ext4-combined-efi.img.gz > openwrt-arm-64.img
 qemu-system-aarch64 -nographic \
     -cpu cortex-a53 -machine virt \
     -bios bin/targets/armsr/armv8/u-boot-qemu_armv8/u-boot.bin \

target/linux/armsr/image/Makefile

@@ -74,18 +74,18 @@ DEVICE_VARS += GRUB2_VARIANT UBOOT
 define Device/efi-default
   IMAGE/rootfs.img := append-rootfs | pad-to $(ROOTFS_PARTSIZE)
   IMAGE/rootfs.img.gz := append-rootfs | pad-to $(ROOTFS_PARTSIZE) | gzip
-  IMAGE/combined.img := grub-config efi | combined efi | grub-install efi | append-metadata
-  IMAGE/combined.img.gz := grub-config efi | combined efi | grub-install efi | gzip | append-metadata
-  IMAGE/combined.vmdk := grub-config efi | combined efi | grub-install efi | qemu-image vmdk
+  IMAGE/combined-efi.img := grub-config efi | combined efi | grub-install efi | append-metadata
+  IMAGE/combined-efi.img.gz := grub-config efi | combined efi | grub-install efi | gzip | append-metadata
+  IMAGE/combined-efi.vmdk := grub-config efi | combined efi | grub-install efi | qemu-image vmdk
  ifeq ($(CONFIG_TARGET_IMAGES_GZIP),y)
     IMAGES-y := rootfs.img.gz
-    IMAGES-y += combined.img.gz
+    IMAGES-y += combined-efi.img.gz
   else
     IMAGES-y := rootfs.img
-    IMAGES-y += combined.img
+    IMAGES-y += combined-efi.img
   endif
   ifeq ($(CONFIG_VMDK_IMAGES),y)
-    IMAGES-y += combined.vmdk
+    IMAGES-y += combined-efi.vmdk
   endif
   KERNEL := kernel-bin
   KERNEL_INSTALL := 1

target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts

@@ -36,6 +36,7 @@
 
 		sim-tray {
 			label = "sim-tray";
+			linux,input-type = <EV_SW>;
 			linux,code = <BTN_1>;
 			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
 			debounce-interval = <60>;
@@ -68,7 +69,7 @@
 		};
 
 		signal-strength-4 {
-			label = "green:signal-strength4";
+			label = "green:signal-strength-4";
 			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
 		};
 

target/linux/ath79/image/Makefile

@@ -4,7 +4,7 @@ include $(INCLUDE_DIR)/image.mk
 KERNEL_LOADADDR = 0x80060000
 
 DEVICE_VARS += LOADER_FLASH_OFFS LOADER_TYPE
-DEVICE_VARS += LOADER_FLASH_MAX LOADER_KERNEL_MAGIC
+DEVICE_VARS += LOADER_FLASH_MAX LOADER_KERNEL_MAGIC LZMA_TEXT_START
 DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID
 DEVICE_VARS += RAS_BOARD RAS_ROOTFS_SIZE RAS_VERSION
 DEVICE_VARS += SEAMA_SIGNATURE SEAMA_MTDBLOCK
@@ -14,6 +14,7 @@ define Build/loader-common
 	$(MAKE) -C lzma-loader \
 		PKG_BUILD_DIR="$@.src" \
 		TARGET_DIR="$(dir $@)" LOADER_NAME="$(notdir $@)" \
+		LZMA_TEXT_START=$(LZMA_TEXT_START) \
 		$(1) compile loader.$(LOADER_TYPE)
 	mv "$@.$(LOADER_TYPE)" "$@"
 	rm -rf $@.src
@@ -74,6 +75,7 @@ define Device/Default
   LOADER_FLASH_MAX :=
   LOADER_FLASH_OFFS :=
   LOADER_TYPE :=
+  LZMA_TEXT_START := 0x81800000
   COMPILE :=
   IMAGES := sysupgrade.bin
   IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | \

target/linux/ath79/image/nand.mk

@@ -313,10 +313,9 @@ define Device/meraki_mr18
   BLOCKSIZE := 128k
   PAGESIZE := 2048
   LOADER_TYPE := bin
+  LZMA_TEXT_START := 0x82800000
   KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | meraki-header MR18
-# Initramfs-build fails due to size issues
-# KERNEL_INITRAMFS := $$(KERNEL)
-  KERNEL_INITRAMFS :=
+  KERNEL_INITRAMFS := $$(KERNEL)
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   SUPPORTED_DEVICES += mr18
 endef
@@ -442,6 +441,10 @@ define Device/zte_mf28x_common
   DEVICE_PACKAGES := kmod-usb2 kmod-ath10k-ct
   BLOCKSIZE := 128k
   PAGESIZE := 2048
+  LOADER_TYPE := bin
+  LZMA_TEXT_START := 0x82800000
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+  KERNEL_INITRAMFS := $$(KERNEL)
   KERNEL_SIZE := 4096k
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
 endef

target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch

@@ -0,0 +1,105 @@
+From: David Bauer <mail@david-bauer.net>
+Date: Tue, 2 Jan 2025 19:22:40 +0100
+Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
+
+According to datasheet, on AR9344 the switch and switch analog need to
+be reset first before initiating a full reset.
+
+Resetting these systems fixes spurious reset hangs on Atheros AR9344
+SoCs.
+
+Link: https://github.com/freifunk-gluon/gluon/issues/2904
+
+Signed-off-by: David Bauer <mail@david-bauer.net>
+
+--- a/drivers/reset/reset-ath79.c
++++ b/drivers/reset/reset-ath79.c
+@@ -12,8 +12,11 @@
+ #include <linux/platform_device.h>
+ #include <linux/reset-controller.h>
+ #include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/of.h>
+ 
+ struct ath79_reset {
++	struct platform_device *pdev;
+ 	struct reset_controller_dev rcdev;
+ 	struct notifier_block restart_nb;
+ 	void __iomem *base;
+@@ -21,16 +24,13 @@ struct ath79_reset {
+ };
+ 
+ #define FULL_CHIP_RESET 24
++#define ETH_SWITCH_RESET 8
++#define ETH_SWITCH_ARESET 12
+ 
+-static int ath79_reset_update(struct reset_controller_dev *rcdev,
++static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
+ 			unsigned long id, bool assert)
+ {
+-	struct ath79_reset *ath79_reset =
+-		container_of(rcdev, struct ath79_reset, rcdev);
+-	unsigned long flags;
+ 	u32 val;
+-
+-	spin_lock_irqsave(&ath79_reset->lock, flags);
+ 	val = readl(ath79_reset->base);
+ 	if (assert)
+ 		val |= BIT(id);
+@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
+ 	writel(val, ath79_reset->base);
+ 	/* Flush cache */
+ 	readl(ath79_reset->base);
++}
++
++static int ath79_reset_update(struct reset_controller_dev *rcdev,
++			unsigned long id, bool assert)
++{
++	struct ath79_reset *ath79_reset =
++		container_of(rcdev, struct ath79_reset, rcdev);
++	unsigned long flags;
++
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++	__ath79_reset_update_unlocked(ath79_reset, id, assert);
+ 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return 0;
+@@ -79,8 +90,28 @@ static int ath79_reset_restart_handler(s
+ {
+ 	struct ath79_reset *ath79_reset =
+ 		container_of(nb, struct ath79_reset, restart_nb);
++	unsigned long flags;
+ 
+-	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++
++	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
++		/**
++		 * AR9344 has been observed to hang on reboot in rare cases.
++		 *
++		 * Datasheet states to reset the ETH switch systems before asserting
++		 * full chip reset. See page 111 of the AR9344 datasheet.
++		 */
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
++		mdelay(1);
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
++		mdelay(1);
++		__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++		mdelay(10);
++	} else {
++		__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++	}
++
++	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return NOTIFY_DONE;
+ }
+@@ -95,6 +126,8 @@ static int ath79_reset_probe(struct plat
+ 	if (!ath79_reset)
+ 		return -ENOMEM;
+ 
++	ath79_reset->pdev = pdev;
++
+ 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
+ 	if (IS_ERR(ath79_reset->base))
+ 		return PTR_ERR(ath79_reset->base);

target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch

@@ -28,7 +28,7 @@ We don't agree with upstream revert so undo it.
  		pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -633,8 +633,11 @@ static int xhci_move_dequeue_past_td(str
+@@ -634,8 +634,11 @@ static int xhci_move_dequeue_past_td(str
  	struct xhci_ring *ep_ring;
  	struct xhci_command *cmd;
  	struct xhci_segment *new_seg;
@@ -40,7 +40,7 @@ We don't agree with upstream revert so undo it.
  	dma_addr_t addr;
  	u64 hw_dequeue;
  	bool cycle_found = false;
-@@ -672,7 +675,27 @@ static int xhci_move_dequeue_past_td(str
+@@ -673,7 +676,27 @@ static int xhci_move_dequeue_past_td(str
  	hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
  	new_seg = ep_ring->deq_seg;
  	new_deq = ep_ring->dequeue;

target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch

@@ -1189,7 +1189,7 @@ Signed-off-by: Alexander Winkowski <dereference23@outlook.com>
  }
 --- a/drivers/usb/core/hub.c
 +++ b/drivers/usb/core/hub.c
-@@ -5710,7 +5710,7 @@ static void port_event(struct usb_hub *h
+@@ -5712,7 +5712,7 @@ static void port_event(struct usb_hub *h
  		port_dev->over_current_count++;
  		port_over_current_notify(port_dev);
  

target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch

@@ -17583,7 +17583,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  	 * For devices with more than one control interface, we assume the
 --- a/sound/usb/quirks.c
 +++ b/sound/usb/quirks.c
-@@ -2247,6 +2247,8 @@ static const struct usb_audio_quirk_flag
+@@ -2249,6 +2249,8 @@ static const struct usb_audio_quirk_flag
  		   QUIRK_FLAG_ALIGN_TRANSFER),
  	DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */
  		   QUIRK_FLAG_ALIGN_TRANSFER),

target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch

@@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1497,6 +1497,109 @@ command_cleanup:
+@@ -1498,6 +1498,109 @@ command_cleanup:
  }
  
  /*
@@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
   * non-error returns are a promise to giveback() the urb later
   * we drop ownership so next owner (or urb unlink) can get it
   */
-@@ -5347,6 +5450,7 @@ static const struct hc_driver xhci_hc_dr
+@@ -5360,6 +5463,7 @@ static const struct hc_driver xhci_hc_dr
  	.endpoint_reset =	xhci_endpoint_reset,
  	.check_bandwidth =	xhci_check_bandwidth,
  	.reset_bandwidth =	xhci_reset_bandwidth,

target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch

@@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -738,9 +738,9 @@ deq_found:
+@@ -739,9 +739,9 @@ deq_found:
  	}
  
  	if ((ep->ep_state & SET_DEQ_PENDING)) {

target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch

@@ -19,7 +19,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1586,7 +1586,7 @@ static void xhci_fixup_endpoint(struct u
+@@ -1587,7 +1587,7 @@ static void xhci_fixup_endpoint(struct u
  		return;
  	}
  	ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index);

target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch

@@ -20,7 +20,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4872,6 +4872,7 @@ static const struct {
+@@ -4873,6 +4873,7 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
@@ -28,7 +28,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  	int ret = 0;
  	bool invalid_bdaddr;
  	size_t i;
-@@ -4900,7 +4901,8 @@ static int hci_dev_setup_sync(struct hci
+@@ -4901,7 +4902,8 @@ static int hci_dev_setup_sync(struct hci
  			 test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
  	if (!ret) {
  		if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) &&

target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch

@@ -52,7 +52,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base);
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1425,8 +1425,9 @@ struct urb_priv {
+@@ -1426,8 +1426,9 @@ struct urb_priv {
   * Each segment table entry is 4*32bits long.  1K seems like an ok size:
   * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
   * meaning 64 ring segments.

target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch

@@ -34,7 +34,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -728,6 +728,15 @@ static int xhci_move_dequeue_past_td(str
+@@ -729,6 +729,15 @@ static int xhci_move_dequeue_past_td(str
  	} while (!cycle_found || !td_last_trb_found);
  
  deq_found:
@@ -52,7 +52,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	addr = xhci_trb_virt_to_dma(new_seg, new_deq);
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1663,6 +1663,9 @@ struct xhci_hcd {
+@@ -1664,6 +1664,9 @@ struct xhci_hcd {
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
  

target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch

@@ -100,7 +100,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1665,6 +1665,7 @@ struct xhci_hcd {
+@@ -1666,6 +1666,7 @@ struct xhci_hcd {
  
  /* Downstream VLI fixes */
  #define XHCI_AVOID_DQ_ON_LINK	BIT_ULL(56)

target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch

@@ -75,7 +75,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -3674,6 +3674,48 @@ static int xhci_align_td(struct xhci_hcd
+@@ -3714,6 +3714,48 @@ static int xhci_align_td(struct xhci_hcd
  	return 1;
  }
  
@@ -124,7 +124,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  /* This is very similar to what ehci-q.c qtd_fill() does */
  int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
  		struct urb *urb, int slot_id, unsigned int ep_index)
-@@ -3830,6 +3872,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3870,6 +3912,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
  	}
  
  	check_trb_math(urb, enqd_len);
@@ -133,7 +133,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
  			start_cycle, start_trb);
  	return 0;
-@@ -3979,6 +4023,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -4019,6 +4063,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
  			/* Event on completion */
  			field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
  
@@ -144,7 +144,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	return 0;
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1666,6 +1666,7 @@ struct xhci_hcd {
+@@ -1667,6 +1667,7 @@ struct xhci_hcd {
  /* Downstream VLI fixes */
  #define XHCI_AVOID_DQ_ON_LINK	BIT_ULL(56)
  #define XHCI_VLI_SS_BULK_OUT_BUG	BIT_ULL(57)

target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch

@@ -333,7 +333,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  /* Global Debug LSP MUX Select */
  #define DWC3_GDBGLSPMUX_ENDBC		BIT(15)	/* Host only */
  #define DWC3_GDBGLSPMUX_HOSTSELECT(n)	((n) & 0x3fff)
-@@ -1062,6 +1065,7 @@ struct dwc3_scratchpad_array {
+@@ -1067,6 +1070,7 @@ struct dwc3_scratchpad_array {
   * @tx_max_burst_prd: max periodic ESS transmit burst size
   * @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
   * @clear_stall_protocol: endpoint number that requires a delayed status phase
@@ -341,7 +341,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
   * @hsphy_interface: "utmi" or "ulpi"
   * @connected: true when we're connected to a host, false otherwise
   * @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1299,6 +1303,7 @@ struct dwc3 {
+@@ -1304,6 +1308,7 @@ struct dwc3 {
  	u8			tx_max_burst_prd;
  	u8			tx_fifo_resize_max_num;
  	u8			clear_stall_protocol;

target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch

@@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST	BIT(10)
  
  /* Global Status Register */
-@@ -1117,10 +1118,12 @@ struct dwc3_scratchpad_array {
+@@ -1122,10 +1123,12 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -62,7 +62,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
   * @tx_de_emphasis: Tx de-emphasis value
   *	0	- -6dB de-emphasis
-@@ -1347,6 +1350,7 @@ struct dwc3 {
+@@ -1352,6 +1355,7 @@ struct dwc3 {
  	unsigned		ulpi_ext_vbus_drv:1;
  	unsigned		parkmode_disable_ss_quirk:1;
  	unsigned		parkmode_disable_hs_quirk:1;

target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch

@@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4872,7 +4872,8 @@ static const struct {
+@@ -4873,7 +4873,8 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {

target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch

@@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/mm/vmscan.c
 +++ b/mm/vmscan.c
-@@ -4716,7 +4716,7 @@ void lru_gen_look_around(struct page_vma
+@@ -4723,7 +4723,7 @@ void lru_gen_look_around(struct page_vma
  		if (!folio)
  			continue;
  

target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch

@@ -57,7 +57,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  #define DWC3_GUCTL1_PARKMODE_DISABLE_SS		BIT(17)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_HS		BIT(16)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS	BIT(15)
-@@ -1118,6 +1120,8 @@ struct dwc3_scratchpad_array {
+@@ -1123,6 +1125,8 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -66,7 +66,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
   * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
   *			Superspeed instances.
   * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
-@@ -1348,6 +1352,8 @@ struct dwc3 {
+@@ -1353,6 +1357,8 @@ struct dwc3 {
  	unsigned		dis_tx_ipgap_linecheck_quirk:1;
  	unsigned		resume_hs_terminations:1;
  	unsigned		ulpi_ext_vbus_drv:1;

target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch

@@ -28,7 +28,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -505,6 +505,19 @@ void xhci_ring_ep_doorbell(struct xhci_h
+@@ -506,6 +506,19 @@ void xhci_ring_ep_doorbell(struct xhci_h
  
  	trace_xhci_ring_ep_doorbell(slot_id, DB_VALUE(ep_index, stream_id));
  

target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch

@@ -35,7 +35,7 @@ it on BCM4708 family.
  /* called during probe() after chip reset completes */
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -161,6 +161,49 @@ int xhci_start(struct xhci_hcd *xhci)
+@@ -162,6 +162,49 @@ int xhci_start(struct xhci_hcd *xhci)
  	return ret;
  }
  
@@ -85,7 +85,7 @@ it on BCM4708 family.
  /*
   * Reset a halted HC.
   *
-@@ -480,6 +523,15 @@ static int xhci_run_finished(struct xhci
+@@ -481,6 +524,15 @@ static int xhci_run_finished(struct xhci
  		return -ENODEV;
  	}
  
@@ -103,7 +103,7 @@ it on BCM4708 family.
  	if (xhci->quirks & XHCI_NEC_HOST)
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1661,6 +1661,7 @@ struct xhci_hcd {
+@@ -1662,6 +1662,7 @@ struct xhci_hcd {
  #define XHCI_WRITE_64_HI_LO	BIT_ULL(47)
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)

target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch

@@ -1,260 +0,0 @@
-From patchwork Tue Dec 24 10:36:45 2024
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 8bit
-X-Patchwork-Submitter: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?=
- <noltari@gmail.com>
-X-Patchwork-Id: 2027352
-Return-Path: 
- <linux-gpio+bounces-14196-incoming=patchwork.ozlabs.org@vger.kernel.org>
-X-Original-To: incoming@patchwork.ozlabs.org
-Delivered-To: patchwork-incoming@legolas.ozlabs.org
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-From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari@gmail.com>
-To: linus.walleij@linaro.org,
-	kylehendrydev@gmail.com,
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-Subject: [PATCH v2] pinctrl: bcm63268: add gpio function
-Date: Tue, 24 Dec 2024 11:36:45 +0100
-Message-Id: <20241224103645.1709996-1-noltari@gmail.com>
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-MIME-Version: 1.0
-
-From: Kyle Hendry <kylehendrydev@gmail.com>
-
-There is no guarantee that the bootloader will leave the pin configuration
-in a known default state, so pinctrl needs to be explicitly set in some
-cases. This patch adds a gpio function for drivers that need it, i.e.
-gpio-leds.
-
-Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
----
- drivers/pinctrl/bcm/pinctrl-bcm63268.c | 71 +++++++++++++++++++++++++-
- 1 file changed, 70 insertions(+), 1 deletion(-)
-
---- a/drivers/pinctrl/bcm/pinctrl-bcm63268.c
-+++ b/drivers/pinctrl/bcm/pinctrl-bcm63268.c
-@@ -34,6 +34,7 @@
- #define  BCM63268_BASEMODE_VDSL_PHY_3	BIT(9) /* GPIOs 26/27 */
- 
- enum bcm63268_pinctrl_reg {
-+	BCM63268_NONE,
- 	BCM63268_LEDCTRL,
- 	BCM63268_MODE,
- 	BCM63268_CTRL,
-@@ -242,6 +243,61 @@ static struct pingroup bcm63268_groups[]
- 	BCM_PIN_GROUP(vdsl_phy3_grp),
- };
- 
-+static const char * const gpio_groups[] = {
-+	"gpio0",
-+	"gpio1",
-+	"gpio2",
-+	"gpio3",
-+	"gpio4",
-+	"gpio5",
-+	"gpio6",
-+	"gpio7",
-+	"gpio8",
-+	"gpio9",
-+	"gpio10",
-+	"gpio11",
-+	"gpio12",
-+	"gpio13",
-+	"gpio14",
-+	"gpio15",
-+	"gpio16",
-+	"gpio17",
-+	"gpio18",
-+	"gpio19",
-+	"gpio20",
-+	"gpio21",
-+	"gpio22",
-+	"gpio23",
-+	"gpio24",
-+	"gpio25",
-+	"gpio26",
-+	"gpio27",
-+	"gpio28",
-+	"gpio29",
-+	"gpio30",
-+	"gpio31",
-+	"gpio32",
-+	"gpio33",
-+	"gpio34",
-+	"gpio35",
-+	"gpio36",
-+	"gpio37",
-+	"gpio38",
-+	"gpio39",
-+	"gpio40",
-+	"gpio41",
-+	"gpio42",
-+	"gpio43",
-+	"gpio44",
-+	"gpio45",
-+	"gpio46",
-+	"gpio47",
-+	"gpio48",
-+	"gpio49",
-+	"gpio50",
-+	"gpio51",
-+};
-+
- static const char * const led_groups[] = {
- 	"gpio0",
- 	"gpio1",
-@@ -394,6 +450,14 @@ static const char * const vdsl_phy_overr
- 	"vdsl_phy_override_3_grp",
- };
- 
-+#define BCM63268_GPIO_FUN(n)				\
-+	{						\
-+		.name = #n,				\
-+		.groups = n##_groups,			\
-+		.num_groups = ARRAY_SIZE(n##_groups),	\
-+		.reg = BCM63268_NONE,			\
-+	}
-+
- #define BCM63268_LED_FUN(n)				\
- 	{						\
- 		.name = #n,				\
-@@ -428,6 +492,7 @@ static const char * const vdsl_phy_overr
- 	}
- 
- static const struct bcm63268_function bcm63268_funcs[] = {
-+	BCM63268_GPIO_FUN(gpio),
- 	BCM63268_LED_FUN(led),
- 	BCM63268_MODE_FUN(serial_led_clk),
- 	BCM63268_MODE_FUN(serial_led_data),
-@@ -542,6 +607,9 @@ static int bcm63268_pinctrl_set_mux(stru
- 		bcm63268_set_gpio(pc, pg->pins[i]);
- 
- 	switch (f->reg) {
-+	case BCM63268_NONE:
-+		reg = 0;
-+		break;
- 	case BCM63268_LEDCTRL:
- 		reg = BCM63268_LED_REG;
- 		mask = BIT(pg->pins[0]);
-@@ -567,7 +635,8 @@ static int bcm63268_pinctrl_set_mux(stru
- 		return -EINVAL;
- 	}
- 
--	regmap_update_bits(pc->regs, reg, mask, val);
-+	if (reg)
-+		regmap_update_bits(pc->regs, reg, mask, val);
- 
- 	return 0;
- }

target/linux/d1/base-files/etc/board.d/02_network

@@ -8,6 +8,10 @@
 board_config_update
 
 case "$(board_name)" in
+sipeed,lichee-rv-dock |\
+widora,mangopi-mq-pro)
+	ucidef_set_interface_lan "wlan0"
+	;;
 *)
 	ucidef_set_interface_lan 'eth0'
 	;;

target/linux/d1/image/Makefile

@@ -65,7 +65,7 @@ define Device/sipeed_lichee-rv-dock
   DEVICE_MODEL := LicheePi RV (dock)
   DEVICE_DTS := allwinner/sun20i-d1-lichee-rv-dock
   SUPPORTED_DEVICES += lichee_rv_dock
-  DEVICE_PACKAGES += kmod-rtl8723bs
+  DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls
   UBOOT := lichee_rv_dock
 endef
 TARGET_DEVICES += sipeed_lichee-rv-dock
@@ -76,7 +76,7 @@ define Device/widora_mangopi-mq-pro
   DEVICE_MODEL := MQ Pro
   DEVICE_DTS := allwinner/sun20i-d1-mangopi-mq-pro
   SUPPORTED_DEVICES += mangopi_mq_pro
-  DEVICE_PACKAGES += kmod-rtl8723bs
+  DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls
   UBOOT := mangopi_mq_pro
 endef
 TARGET_DEVICES += widora_mangopi-mq-pro

target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch

@@ -32,7 +32,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -4481,13 +4481,7 @@ static inline void ____napi_schedule(str
+@@ -4483,13 +4483,7 @@ static inline void ____napi_schedule(str
  		 */
  		thread = READ_ONCE(napi->thread);
  		if (thread) {
@@ -47,7 +47,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  			wake_up_process(thread);
  			return;
  		}
-@@ -6643,8 +6637,6 @@ static int napi_poll(struct napi_struct
+@@ -6645,8 +6639,6 @@ static int napi_poll(struct napi_struct
  
  static int napi_thread_wait(struct napi_struct *napi)
  {
@@ -56,7 +56,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	set_current_state(TASK_INTERRUPTIBLE);
  
  	while (!kthread_should_stop()) {
-@@ -6653,15 +6645,13 @@ static int napi_thread_wait(struct napi_
+@@ -6655,15 +6647,13 @@ static int napi_thread_wait(struct napi_
  		 * Testing SCHED bit is not enough because SCHED bit might be
  		 * set by some other busy poll thread or by napi_disable().
  		 */

target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch

@@ -108,7 +108,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  static inline void rps_lock_irqsave(struct softnet_data *sd,
  				    unsigned long *flags)
  {
-@@ -4449,6 +4475,7 @@ EXPORT_SYMBOL(__dev_direct_xmit);
+@@ -4451,6 +4477,7 @@ EXPORT_SYMBOL(__dev_direct_xmit);
  /*************************************************************************
   *			Receiver routines
   *************************************************************************/
@@ -116,7 +116,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  
  int netdev_max_backlog __read_mostly = 1000;
  EXPORT_SYMBOL(netdev_max_backlog);
-@@ -4481,12 +4508,16 @@ static inline void ____napi_schedule(str
+@@ -4483,12 +4510,16 @@ static inline void ____napi_schedule(str
  		 */
  		thread = READ_ONCE(napi->thread);
  		if (thread) {
@@ -133,7 +133,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	list_add_tail(&napi->poll_list, &sd->poll_list);
  	WRITE_ONCE(napi->list_owner, smp_processor_id());
  	/* If not called from net_rx_action()
-@@ -4732,6 +4763,11 @@ static void napi_schedule_rps(struct sof
+@@ -4734,6 +4765,11 @@ static void napi_schedule_rps(struct sof
  
  #ifdef CONFIG_RPS
  	if (sd != mysd) {
@@ -145,7 +145,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  		sd->rps_ipi_next = mysd->rps_ipi_list;
  		mysd->rps_ipi_list = sd;
  
-@@ -5955,7 +5991,7 @@ static void net_rps_action_and_irq_enabl
+@@ -5957,7 +5993,7 @@ static void net_rps_action_and_irq_enabl
  #ifdef CONFIG_RPS
  	struct softnet_data *remsd = sd->rps_ipi_list;
  
@@ -154,7 +154,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  		sd->rps_ipi_list = NULL;
  
  		local_irq_enable();
-@@ -5970,7 +6006,7 @@ static void net_rps_action_and_irq_enabl
+@@ -5972,7 +6008,7 @@ static void net_rps_action_and_irq_enabl
  static bool sd_has_rps_ipi_waiting(struct softnet_data *sd)
  {
  #ifdef CONFIG_RPS
@@ -163,7 +163,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  #else
  	return false;
  #endif
-@@ -6014,7 +6050,7 @@ static int process_backlog(struct napi_s
+@@ -6016,7 +6052,7 @@ static int process_backlog(struct napi_s
  			 * We can use a plain write instead of clear_bit(),
  			 * and we dont need an smp_mb() memory barrier.
  			 */
@@ -172,7 +172,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  			again = false;
  		} else {
  			skb_queue_splice_tail_init(&sd->input_pkt_queue,
-@@ -6680,43 +6716,48 @@ static void skb_defer_free_flush(struct
+@@ -6682,43 +6718,48 @@ static void skb_defer_free_flush(struct
  	}
  }
  
@@ -250,7 +250,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	return 0;
  }
  
-@@ -11297,7 +11338,7 @@ static int dev_cpu_dead(unsigned int old
+@@ -11299,7 +11340,7 @@ static int dev_cpu_dead(unsigned int old
  
  		list_del_init(&napi->poll_list);
  		if (napi->poll == process_backlog)
@@ -259,7 +259,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  		else
  			____napi_schedule(sd, napi);
  	}
-@@ -11305,12 +11346,14 @@ static int dev_cpu_dead(unsigned int old
+@@ -11307,12 +11348,14 @@ static int dev_cpu_dead(unsigned int old
  	raise_softirq_irqoff(NET_TX_SOFTIRQ);
  	local_irq_enable();
  
@@ -278,7 +278,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  
  	/* Process offline CPU's input_pkt_queue */
  	while ((skb = __skb_dequeue(&oldsd->process_queue))) {
-@@ -11573,6 +11616,38 @@ static struct pernet_operations __net_in
+@@ -11575,6 +11618,38 @@ static struct pernet_operations __net_in
   *
   */
  
@@ -317,7 +317,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  /*
   *       This is called single threaded during boot, so no need
   *       to take the rtnl semaphore.
-@@ -11623,7 +11698,10 @@ static int __init net_dev_init(void)
+@@ -11625,7 +11700,10 @@ static int __init net_dev_init(void)
  		init_gro_hash(&sd->backlog);
  		sd->backlog.poll = process_backlog;
  		sd->backlog.weight = weight_p;

target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch

@@ -82,7 +82,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  		spin_unlock_irq(&sd->input_pkt_queue.lock);
  	else if (!IS_ENABLED(CONFIG_PREEMPT_RT))
  		local_irq_enable();
-@@ -4782,6 +4782,23 @@ static void napi_schedule_rps(struct sof
+@@ -4784,6 +4784,23 @@ static void napi_schedule_rps(struct sof
  	__napi_schedule_irqoff(&mysd->backlog);
  }