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sunxi: fix cpufreq driver on h618

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2024-03-04 20:28:36 +08:00
parent c58a66a9d8
commit 6842cc89e6
4 changed files with 56 additions and 23 deletions
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4
package/emortal/cpufreq/files/cpufreq.uci
View File

@@ -59,9 +59,9 @@ case "$DISTRIB_TARGET" in
if echo "$CPU_FREQS" | grep -q "1800000"; then
# H6
uci_write_config 0 schedutil "888000" "$CPU_MAX_FREQ"
elif echo "$CPU_FREQS" | grep -q "1512000"; then
elif echo "$CPU_FREQS" | grep -q "1416000"; then
# H616/8
uci_write_config 0 schedutil "936000" "1512000"
uci_write_config 0 schedutil "936000" "$CPU_MAX_FREQ"
elif echo "$CPU_FREQS" | grep -q "1296000"; then
# H5
uci_write_config 0 ondemand "$CPU_MIN_FREQ" "1296000" 10 50

3
target/linux/sunxi/patches-6.1/117-cpufreq-dt-platdev-Blocklist-allwinnerh616-SoC.patch
View File

@@ -38,11 +38,12 @@ Signed-off-by: Martin Botka <martin.botka@somainline.org>
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -102,6 +102,7 @@ static const struct of_device_id allowli
@@ -102,6 +102,8 @@ static const struct of_device_id allowli
*/
static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "allwinner,sun50i-h6", },
+ { .compatible = "allwinner,sun50i-h616", },
+ { .compatible = "allwinner,sun50i-h618", },
{ .compatible = "arm,vexpress", },

5
target/linux/sunxi/patches-6.1/118-cpufreq-sun50i-Add-H616-support.patch
View File

@@ -263,7 +263,7 @@ Signed-off-by: Martin Botka <martin.botka@somainline.org>
kfree(opp_tokens);
@@ -159,8 +252,18 @@ static struct platform_driver sun50i_cpu
@@ -159,8 +252,19 @@ static struct platform_driver sun50i_cpu
},
};
@@ -280,10 +280,11 @@ Signed-off-by: Martin Botka <martin.botka@somainline.org>
- { .compatible = "allwinner,sun50i-h6" },
+ { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data },
+ { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data },
+ { .compatible = "allwinner,sun50i-h618", .data = &sun50i_h616_data },
{}
};
MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
@@ -196,8 +299,8 @@ static int __init sun50i_cpufreq_init(vo
@@ -196,8 +300,8 @@ static int __init sun50i_cpufreq_init(vo
return ret;
sun50i_cpufreq_pdev =

67
target/linux/sunxi/patches-6.1/119-arm64-dts-allwinner-h616-Add-CPU-Operating-Performance-Po.patch
View File

@@ -41,7 +41,7 @@ Signed-off-by: Martin Botka <martin.botka@somainline.org>
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
@@ -0,0 +1,98 @@
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2023 Martin Botka <martin@somainline.org>
+
@@ -53,74 +53,105 @@ Signed-off-by: Martin Botka <martin.botka@somainline.org>
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <900000 900000 900000>;
+ opp-microvolt-speed0 = <900000>;
+ opp-microvolt-speed1 = <900000>;
+ opp-microvolt-speed2 = <900000>;
+ opp-microvolt-speed3 = <900000>;
+ opp-microvolt-speed4 = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1f>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000 900000 900000>;
+ opp-microvolt-speed1 = <900000>;
+ opp-microvolt-speed4 = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x12>;
+ };
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <900000 900000 900000>;
+ opp-microvolt-speed0 = <900000>;
+ opp-microvolt-speed2 = <900000>;
+ opp-microvolt-speed3 = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0xd>;
+ };
+
+ opp-792000000 {
+ opp-hz = /bits/ 64 <792000000>;
+ opp-microvolt = <900000 900000 940000>;
+ opp-microvolt-speed1 = <900000>;
+ opp-microvolt-speed4 = <940000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x12>;
+ };
+
+ opp-936000000 {
+ opp-hz = /bits/ 64 <936000000>;
+ opp-microvolt = <900000 900000 900000>;
+ opp-microvolt-speed0 = <900000>;
+ opp-microvolt-speed2 = <900000>;
+ opp-microvolt-speed3 = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0xd>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <950000 940000 1020000>;
+ opp-microvolt-speed0 = <950000>;
+ opp-microvolt-speed1 = <940000>;
+ opp-microvolt-speed2 = <950000>;
+ opp-microvolt-speed3 = <950000>;
+ opp-microvolt-speed4 = <1020000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1f>;
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1000000 1000000 1000000>;
+ opp-microvolt-speed0 = <1000000>;
+ opp-microvolt-speed2 = <1000000>;
+ opp-microvolt-speed3 = <1000000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0xd>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1050000 1020000 1100000>;
+ opp-microvolt-speed0 = <1050000>;
+ opp-microvolt-speed1 = <1020000>;
+ opp-microvolt-speed2 = <1050000>;
+ opp-microvolt-speed3 = <1050000>;
+ opp-microvolt-speed4 = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1f>;
+ };
+
+ opp-1320000000 {
+ opp-hz = /bits/ 64 <1320000000>;
+ opp-microvolt = <1100000 1100000 1100000>;
+ opp-microvolt-speed0 = <1100000>;
+ opp-microvolt-speed2 = <1100000>;
+ opp-microvolt-speed3 = <1100000>;
+ opp-microvolt-speed4 = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1d>;
+ };
+
+ opp-1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1100000 1100000 1100000>;
+ opp-microvolt-speed0 = <1100000>;
+ opp-microvolt-speed2 = <1100000>;
+ opp-microvolt-speed3 = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0xd>;
+ };
+
+ opp-1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1100000 1100000 1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1100000 1100000 1200000>;
+ opp-microvolt-speed1 = <1100000>;
+ opp-microvolt-speed3 = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0xa>;
+ };
+ };
+};