ImmortalWrt v24.10.0: adjust config defaults

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>

feeds.conf.default

@@ -1,4 +1,4 @@
-src-git packages https://github.com/immortalwrt/packages.git^efa79691d91cfe6b65eba34ce7092d9924a26aaf
-src-git luci https://github.com/immortalwrt/luci.git^e678778cb3ea53a4b945b8acbc85730897a4ba2b
+src-git packages https://github.com/immortalwrt/packages.git^4d9500cb61a224d88c71cf795af2e367235b3ac0
+src-git luci https://github.com/immortalwrt/luci.git^c60cfb5754a72d1ec93041fb8ef69c05695b51f5
 src-git routing https://github.com/openwrt/routing.git^e87b55c6a642947ad7e24cd5054a637df63d5dbe
 src-git telephony https://github.com/openwrt/telephony.git^fd605af7143165a2490681ec1752f259873b9147

include/version.mk

@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc4)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r32779-d475f4e4007b)
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r32824-6a73dae98c9c)
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.immortalwrt.org/releases/24.10.0-rc4)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.immortalwrt.org/releases/24.10.0)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),ImmortalWrt)

package/base-files/image-config.in

@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.immortalwrt.org/releases/24.10.0-rc4"
+		default "https://downloads.immortalwrt.org/releases/24.10.0"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:

package/kernel/lantiq/vrx518_tc/Makefile

@@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=vrx518_tc
 PKG_VERSION:=1.5.12.4
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 PKG_BASE_NAME:=vrx518_tc_drv
 
 UGW_VERSION=8.5.2.10

package/kernel/lantiq/vrx518_tc/patches/100-compat.patch

@@ -166,7 +166,7 @@
  
 -	return (skb->DW0 >> 3) & 0xF;
 +// 	return (skb->DW0 >> 3) & 0xF;
-+	return 1;
++	return 0;	/* We use only one connection for now, so return the first connection id */
  }
  
  static int atm_get_qid_by_vcc(struct net_device *dev, struct sk_buff *skb,

package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch

@@ -0,0 +1,144 @@
+Extra ATM traffic classes requires atm_qos struct extension and a set of
+new defines. What itself requires atm.h updates both in the kernel and
+in the toolchain. On another hand we do not have any real users of these
+traffic classes.
+
+In absence of real user there are no benefits to support this
+functionality. There is only the burden of maintenance of extra patches
+all around the building framework. So just drop these extra QoS traffic
+classes in order to facilitate maintenance and avoid side effects like
+breaking compatibility with existing userspace tools like linux-atm.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+--
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -463,34 +463,9 @@ static void set_qsb(struct atm_priv *pri
+ 	/* Weighted Fair Queueing Factor (WFQF) */
+ 	switch (qos->txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		/*  real time queue gets weighted fair queueing bypass  */
+ 		q_parm_tbl.bit.wfqf = 0;
+ 		break;
+-	case ATM_VBR_NRT:
+-	case ATM_UBR_PLUS:
+-		/*  WFQF calculation here is based on virtual cell rates,
+-		      to reduce granularity for high rates
+-		*/
+-		/*  WFQF is maximum cell rate / garenteed cell rate */
+-		/*  wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX /
+-			requested_minimum_peak_cell_rate
+-		*/
+-		if (qos->txtp.min_pcr == 0)
+-			q_parm_tbl.bit.wfqf = QSB_WFQ_NONUBR_MAX;
+-		else {
+-			tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX /
+-				qos->txtp.min_pcr;
+-			if (tmp == 0)
+-				q_parm_tbl.bit.wfqf = 1;
+-			else if (tmp > QSB_WFQ_NONUBR_MAX)
+-				q_parm_tbl.bit.wfqf
+-					= QSB_WFQ_NONUBR_MAX;
+-			else
+-				q_parm_tbl.bit.wfqf = tmp;
+-		}
+-		break;
+-
+ 	case ATM_UBR:
+ 	default:
+ 		q_parm_tbl.bit.wfqf = QSB_WFQ_UBR_BYPASS;
+@@ -498,42 +473,9 @@ static void set_qsb(struct atm_priv *pri
+ 	}
+ 
+ 	/* Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 */
+-	if (qos->txtp.traffic_class == ATM_VBR_RT ||
+-		qos->txtp.traffic_class == ATM_VBR_NRT) {
+-		if (qos->txtp.scr == 0) {
+-			/* disable shaper */
+-			q_vbr_parm_tbl.bit.taus = 0;
+-			q_vbr_parm_tbl.bit.ts = 0;
+-		} else {
+-			/* Cell Loss Priority  (CLP) */
+-			if ((vcc->atm_options & ATM_ATMOPT_CLP))
+-				/* CLP1 */
+-				q_parm_tbl.bit.vbr = 1;
+-			else
+-				/* CLP0 */
+-				q_parm_tbl.bit.vbr = 0;
+-			/* Rate Shaper Parameter (TS) and
+-			    Burst Tolerance Parameter for SCR (tauS)
+-			*/
+-			tmp = ((qsb_clk * param->qsb_tstep) >> 5) /
+-					qos->txtp.scr + 1;
+-			q_vbr_parm_tbl.bit.ts
+-				= tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
+-			tmp = (qos->txtp.mbs - 1) *
+-				(q_vbr_parm_tbl.bit.ts -
+-					q_parm_tbl.bit.tp) / 64;
+-			if (tmp == 0)
+-				q_vbr_parm_tbl.bit.taus = 1;
+-			else if (tmp > QSB_TAUS_MAX)
+-				q_vbr_parm_tbl.bit.taus
+-					= QSB_TAUS_MAX;
+-			else
+-				q_vbr_parm_tbl.bit.taus = tmp;
+-		}
+-	} else {
+-		q_vbr_parm_tbl.bit.taus = 0;
+-		q_vbr_parm_tbl.bit.ts = 0;
+-	}
++	/* NB: shaper disabled since there no user interface to activate it */
++	q_vbr_parm_tbl.bit.taus = 0;
++	q_vbr_parm_tbl.bit.ts = 0;
+ 
+ 	/* Queue Parameter Table (QPT) */
+ 	tc_w32(QSB_QPT_SET_MASK, QSB_RTM);
+@@ -1064,15 +1006,6 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/* check bandwidth */
+ 	if ((vcc->qos.txtp.traffic_class == ATM_CBR &&
+ 		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_RT &&
+-		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_NRT &&
+-		vcc->qos.txtp.scr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS &&
+-		vcc->qos.txtp.min_pcr >
+ 			(port->tx_max_cell_rate - port->tx_used_cell_rate))) {
+ 		tc_dbg(priv->tc_priv, MSG_INIT, "exceed TX line rate\n");
+ 		return -EINVAL;
+@@ -1128,15 +1061,8 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/*  reserve bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate += vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate += vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate += vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* update atm_vcc structure */
+@@ -1222,15 +1148,8 @@ static void ppe_close(struct atm_vcc *vc
+ 	/* release bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate -= vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* idle for a while to let parallel operation finish */

package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch

@@ -3,7 +3,7 @@ This replaces it by a basic working implementation.
 
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -603,7 +603,11 @@ static void atm_aca_init(struct atm_priv
+@@ -545,7 +545,11 @@ static void atm_aca_init(struct atm_priv
  	cfg = &priv->tc_priv->cfg;
  
  	txin = &param.aca_txin;
@@ -15,7 +15,7 @@ This replaces it by a basic working implementation.
  	txin->hd_size_in_dw = cfg->txin.soc_desc_dwsz;
  	txin->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_IN_PD_LIST_BASE);
  	txin->pd_desc_num = __ACA_TX_IN_PD_LIST_NUM;
-@@ -625,7 +629,11 @@ static void atm_aca_init(struct atm_priv
+@@ -567,7 +571,11 @@ static void atm_aca_init(struct atm_priv
  		txin->soc_cmlt_cnt_addr);
  
  	txout = &param.aca_txout;
@@ -27,7 +27,7 @@ This replaces it by a basic working implementation.
  	txout->hd_size_in_dw = cfg->txout.soc_desc_dwsz;
  	txout->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_OUT_PD_LIST_BASE);
  	txout->pd_desc_num = __ACA_TX_OUT_PD_LIST_NUM;
-@@ -647,7 +655,11 @@ static void atm_aca_init(struct atm_priv
+@@ -589,7 +597,11 @@ static void atm_aca_init(struct atm_priv
  		txout->soc_cmlt_cnt_addr);
  
  	rxout = &param.aca_rxout;
@@ -39,7 +39,7 @@ This replaces it by a basic working implementation.
  	rxout->hd_size_in_dw = cfg->rxout.soc_desc_dwsz;
  	rxout->pd_desc_base = SB_XBAR_ADDR(__ACA_RX_OUT_PD_LIST_BASE);
  	rxout->pd_desc_num = __ACA_RX_OUT_PD_LIST_NUM;
-@@ -669,7 +681,11 @@ static void atm_aca_init(struct atm_priv
+@@ -611,7 +623,11 @@ static void atm_aca_init(struct atm_priv
  		rxout->soc_cmlt_cnt_addr);
  
  	rxin = &param.aca_rxin;
@@ -51,7 +51,7 @@ This replaces it by a basic working implementation.
  	rxin->hd_size_in_dw = cfg->rxin.soc_desc_dwsz;
  	rxin->pd_desc_base = SB_XBAR_ADDR(__RX_IN_PD_DES_LIST_BASE);
  	rxin->pd_desc_num = __ACA_RX_IN_PD_LIST_NUM;
-@@ -1261,7 +1277,7 @@ static int ppe_ioctl(struct atm_dev *dev
+@@ -1180,7 +1196,7 @@ static int ppe_ioctl(struct atm_dev *dev
  static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb)
  {
  	int ret, qid, mpoa_pt, mpoa_type, vid;
@@ -60,7 +60,7 @@ This replaces it by a basic working implementation.
  	struct atm_priv *priv;
  
  	if (!vcc) {
-@@ -1327,12 +1343,14 @@ static int ppe_send(struct atm_vcc *vcc,
+@@ -1246,12 +1262,14 @@ static int ppe_send(struct atm_vcc *vcc,
  	tc_dbg(priv->tc_priv, MSG_TX, "vid: 0x%x, qid: 0x%x\n",
  			vid, qid);
  
@@ -855,12 +855,12 @@ This replaces it by a basic working implementation.
 -			continue;
 +
 +		// this seems to be a pointer to a DS PKT buffer
-+		phyaddr = desc->data_ptr + desc->byte_off;
++		phyaddr = desc->data_ptr;
 +		ptr = plat_mem_virt(phyaddr);
-+
 +		len = desc->data_len;
 +
-+		dma_sync_single_range_for_cpu(pdev, phyaddr, 0, len, DMA_FROM_DEVICE);
++		dma_sync_single_for_cpu(pdev, phyaddr, desc->byte_off + len,
++					DMA_FROM_DEVICE);
 +
 +		skb = netdev_alloc_skb(g_plat_priv->netdev, len);
 +		if (unlikely(!skb)) {
@@ -871,7 +871,7 @@ This replaces it by a basic working implementation.
 -		ring_idx_inc(rxout, idx);
 +
 +		dst = skb_put(skb, len);
-+		memcpy(dst, ptr, len);
++		memcpy(dst, ptr + desc->byte_off, len);
 +
 +		priv->tc_ops.recv(g_plat_priv->netdev, skb);
 +

package/kernel/lantiq/vrx518_tc/patches/202-napi.patch

@@ -296,7 +296,7 @@
  	priv->tc_ops.umt_start = plat_umt_start;
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -3650,7 +3650,7 @@ static void atm_aca_ring_config_init(str
+@@ -3569,7 +3569,7 @@ static void atm_aca_ring_config_init(str
  static int atm_ring_init(struct atm_priv *priv)
  {
  	atm_aca_ring_config_init(priv);
@@ -305,7 +305,7 @@
  }
  
  static int atm_init(struct tc_priv *tcpriv, u32 ep_id)
-@@ -4020,7 +4020,7 @@ void atm_tc_unload(void)
+@@ -3939,7 +3939,7 @@ void atm_tc_unload(void)
  	/* unregister device */
  	if (priv->tc_priv->tc_ops.dev_unreg != NULL)
  		priv->tc_priv->tc_ops.dev_unreg(NULL,

package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch

@@ -1,6 +1,6 @@
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -746,7 +746,8 @@ static void atm_aca_init(struct atm_priv
+@@ -688,7 +688,8 @@ static void atm_aca_init(struct atm_priv
  		ACA_TXOUT_EN | ACA_RXIN_EN | ACA_RXOUT_EN, 1);
  }
  
@@ -10,7 +10,7 @@
  {
  	struct tm nowtm;
  	char tmbuf[64];
-@@ -765,7 +766,8 @@ static int print_datetime(char *buffer,
+@@ -707,7 +708,8 @@ static int print_datetime(char *buffer,
  			nowtm.tm_hour,
  			nowtm.tm_min,
  			nowtm.tm_sec);
@@ -20,7 +20,7 @@
  
  	return 0;
  }
-@@ -967,7 +969,7 @@ void show_atm_pvc(struct seq_file *seq,
+@@ -909,7 +911,7 @@ void show_atm_pvc(struct seq_file *seq,
  	char buf[64];
  
  	seq_printf(seq, "\tNet device: %s\n", pvc->dev->name);

package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch

@@ -0,0 +1,75 @@
+From: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+Date: Fri, 10 Jan 2025 00:57:27 +0000
+Subject: [PATCH] vrx518_tc: atm_tc: fix crash on subif_reg absence
+
+VRX518 (sw_plat) platform does not provid the subif_reg/subif_unreg ops
+in the same time ATM TC layer unconditionally calls them, what leads to
+the kernel crash on the atm_hook_mpoa_setup hook invocation from the ATM
+stack:
+
+  vrx518_tc:mpoa_setup_sync : sync: conn: 0, vpi: 0, vci: 35, mpoa_type: 0, mpoa_mode: 0
+  Unable to handle kernel NULL pointer dereference at virtual address 00000000
+
+Subif registration is optional and PTM TC do this only when the
+corresponding ops are defined. Do the same for ATM TC and call
+subif_reg/subif_unreg only if they are not NULL.
+
+While at it, move subif related data preparation under the 'if' block
+in order to group and isolate that aux code.
+
+Run tested with FRITZ!Box 7530.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+---
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -1158,8 +1158,9 @@ static void ppe_close(struct atm_vcc *vc
+ 		validate_oam_htu_entry(priv, 0);
+ 	spin_unlock_bh(&priv->atm_lock);
+ 
+-	priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
+-					priv->conn[cid].subif_id, 0);
++	if (priv->tc_priv->tc_ops.subif_unreg)
++		priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
++						  priv->conn[cid].subif_id, 0);
+ 				
+ 	memset(conn, 0, sizeof(*conn));
+ 
+@@ -2710,24 +2711,26 @@ static void mpoa_setup_sync(struct atm_p
+ 	struct wtx_queue_config_t tx_qcfg;
+ 	struct uni_cell_header *cell_header;
+ 	struct atm_vcc *vcc;
+-	struct net_device *dev;
+-	char dev_name[32];
+ 
+ 	tc_dbg(priv->tc_priv, MSG_INIT,
+ 		"sync: conn: %d, vpi: %d, vci: %d, mpoa_type: %d, mpoa_mode: %d\n",
+ 		conn, priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci,
+ 		priv->conn[conn].mpoa_type, priv->conn[conn].mpoa_mode);
+ 
+-	dev = priv->conn[conn].dev;
++	if (priv->tc_priv->tc_ops.subif_reg) {
++		struct net_device *dev;
++		char dev_name[32];
++
++		dev = priv->conn[conn].dev;
++		if (!dev)
++			sprintf(dev_name, "atm_%d%d",
++				priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+ 
+-	if (!dev)
+-		sprintf(dev_name, "atm_%d%d",
+-			priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+-
+-	priv->tc_priv->tc_ops.subif_reg(dev, (!dev) ? dev_name : dev->name,
+-				&priv->conn[conn].subif_id, 0);
+-	tc_dbg(priv->tc_priv, MSG_INIT,
+-		"conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++		priv->tc_priv->tc_ops.subif_reg(dev, !dev ? dev_name : dev->name,
++						&priv->conn[conn].subif_id, 0);
++		tc_dbg(priv->tc_priv, MSG_INIT,
++		       "conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++	}
+ 	vcc = priv->conn[conn].vcc;
+ 
+ 	/*  set htu entry   */

package/kernel/linux/modules/usb.mk

@@ -1738,7 +1738,7 @@ $(eval $(call KernelPackage,usbip-server))
 
 define KernelPackage/usb-chipidea
   TITLE:=Host and device support for Chipidea controllers
-  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles
+  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles +kmod-phy-ath79-usb
   KCONFIG:= \
 	CONFIG_EXTCON \
 	CONFIG_USB_CHIPIDEA \

package/libs/mbedtls/Config.in

@@ -143,7 +143,7 @@ comment "Build Options - unselect features to reduce binary size"
 config MBEDTLS_AESCE_C
 	bool "MBEDTLS_AESCE_C"
 	default y
-	depends on aarch64 && !TARGET_bcm27xx
+	depends on aarch64 && !TARGET_bcm27xx_bcm2710 && !TARGET_bcm27xx_bcm2711
 
 config MBEDTLS_CIPHER_MODE_OFB
 	bool "MBEDTLS_CIPHER_MODE_OFB"
@@ -196,6 +196,16 @@ config MBEDTLS_DEPRECATED_WARNING
 	bool "MBEDTLS_DEPRECATED_WARNING"
 	default n
 
+config MBEDTLS_SHA256_USE_ARMV8_A_CRYPTO_IF_PRESENT
+	bool "MBEDTLS_SHA256_USE_ARMV8_A_CRYPTO_IF_PRESENT"
+	default y
+	depends on aarch64 && !TARGET_bcm27xx_bcm2710 && !TARGET_bcm27xx_bcm2711
+
+config MBEDTLS_SHA512_USE_A64_CRYPTO_IF_PRESENT
+	bool "MBEDTLS_SHA512_USE_A64_CRYPTO_IF_PRESENT"
+	default y
+	depends on aarch64 && !TARGET_bcm27xx_bcm2710 && !TARGET_bcm27xx_bcm2711
+
 config MBEDTLS_SSL_PROTO_TLS1_2
 	bool "MBEDTLS_SSL_PROTO_TLS1_2"
 	default y

package/libs/mbedtls/Makefile

@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=mbedtls
 PKG_VERSION:=3.6.2
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
@@ -79,6 +79,8 @@ MBEDTLS_BUILD_OPTS= \
   CONFIG_MBEDTLS_VERSION_FEATURES \
   CONFIG_MBEDTLS_PSA_CRYPTO_CLIENT \
   CONFIG_MBEDTLS_DEPRECATED_WARNING \
+  CONFIG_MBEDTLS_SHA256_USE_ARMV8_A_CRYPTO_IF_PRESENT \
+  CONFIG_MBEDTLS_SHA512_USE_A64_CRYPTO_IF_PRESENT \
   CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 \
   CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 \
   CONFIG_MBEDTLS_SSL_TLS1_3_COMPATIBILITY_MODE
@@ -132,9 +134,6 @@ CSR generation (gen_key, cert_req)
 endef
 
 TARGET_CFLAGS := $(filter-out -O%,$(TARGET_CFLAGS))
-ifneq ($(CONFIG_MBEDTLS_AESCE_C),)
-  TARGET_CFLAGS := $(filter-out -march=%,$(TARGET_CFLAGS)) -march=armv8-a+crypto
-endif
 
 CMAKE_OPTIONS += \
 	-DCMAKE_POSITION_INDEPENDENT_CODE=ON \

package/libs/wolfssl/Makefile

@@ -8,12 +8,15 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.7.2-stable
+PKG_VERSION:=5.7.6
+PKG_REAL_VERSION:=$(PKG_VERSION)-stable
 PKG_RELEASE:=1
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
-PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
+PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
+PKG_HASH:=52b1e439e30d1ed8162a16308a8525a862183b67aa30373b11166ecbab000d63
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)
 
 PKG_FIXUP:=libtool libtool-abiver
 PKG_INSTALL:=1
@@ -40,7 +43,7 @@ PKG_CONFIG_DEPENDS:=\
 	CONFIG_WOLFSSL_HAS_TLSV13 \
 	CONFIG_WOLFSSL_HAS_WPAS
 
-PKG_ABI_VERSION:=$(patsubst %-stable,%,$(PKG_VERSION)).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
+PKG_ABI_VERSION:=$(PKG_VERSION).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
 
 PKG_CONFIG_DEPENDS+=\
 	CONFIG_PACKAGE_libwolfssl-benchmark \

package/libs/wolfssl/patches/100-disable-hardening-check.patch

@@ -1,6 +1,6 @@
 --- a/wolfssl/wolfcrypt/settings.h
 +++ b/wolfssl/wolfcrypt/settings.h
-@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
+@@ -3722,7 +3722,7 @@ extern void uITRON4_free(void *p) ;
  
  /* warning for not using harden build options (default with ./configure) */
  /* do not warn if big integer support is disabled */

package/network/config/netifd/files/etc/init.d/network

@@ -30,7 +30,6 @@ reload_service() {
 
 	init_switch
 	ubus call network reload || rv=1
-	[ -x /sbin/wifi ] && /sbin/wifi reload_legacy
 	return $rv
 }
 

package/network/services/dnsmasq/Makefile

@@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=dnsmasq
 PKG_UPSTREAM_VERSION:=2.90
 PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
 PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/

package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch

@@ -0,0 +1,98 @@
+From 8ce27433f8b2e17c557cb55e4f16941d309deeac Mon Sep 17 00:00:00 2001
+From: Simon Kelley <simon@thekelleys.org.uk>
+Date: Fri, 17 Jan 2025 17:49:29 +0000
+Subject: [PATCH] Handle DS queries to auth zones.
+Origin: upstream, v2.91test8
+
+When dnsmasq is configured to act as an authoritative server and has
+an authoritative zone configured, and recieves a query for
+that zone _as_forwarder_ it answers the query directly rather
+than forwarding it. This doesn't affect the answer, but it
+saves dnsmasq forwarding the query to the recusor upstream,
+whch then bounces it back to dnsmasq in auth mode. The
+exception should be when the query is for the root of zone, for a DS
+RR. The answer to that has to come from the parent, via the
+recursor, and will typically be a proof-of-nonexistence since
+dnsmasq doesn't support signed zones. This patch suppresses
+local answers and forces forwarding to the upstream recursor
+for such queries. It stops breakage when a DNSSEC validating
+client makes queries to dnsmasq acting as forwarder for a zone
+for which it is authoritative.
+
+[ukleinek: drop changes to CHANGELOG to prevent conflicts]
+---
+ src/forward.c | 52 +++++++++++++++++++++++++++++++++++++--------------
+ 1 file changed, 38 insertions(+), 14 deletions(-)
+
+--- a/src/forward.c
++++ b/src/forward.c
+@@ -1744,15 +1744,27 @@ void receive_query(struct listener *list
+ #endif
+ 
+ #ifdef HAVE_AUTH
+-      /* find queries for zones we're authoritative for, and answer them directly */
++      /* Find queries for zones we're authoritative for, and answer them directly.
++	 The exception to this is DS queries for the zone route. They
++	 have to come from the parent zone. Since dnsmasq's auth server
++	 can't do DNSSEC, the zone will be unsigned, and anything using
++	 dnsmasq as a forwarder and doing validation will be expecting to
++	 see the proof of non-existence from the parent. */
+       if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 	for (zone = daemon->auth_zones; zone; zone = zone->next)
+-	  if (in_zone(zone, daemon->namebuff, NULL))
+-	    {
+-	      auth_dns = 1;
+-	      local_auth = 1;
+-	      break;
+-	    }
++	  {
++	    char *cut;
++	    
++	    if (in_zone(zone, daemon->namebuff, &cut))
++	      {
++		if (type != T_DS || cut)
++		  {
++		    auth_dns = 1;
++		    local_auth = 1;
++		  }
++		break;
++	      }
++	  }
+ #endif
+       
+ #ifdef HAVE_LOOP
+@@ -2268,15 +2280,27 @@ unsigned char *tcp_request(int confd, ti
+ 				   &peer_addr, auth_dns ? "auth" : "query", qtype);
+ 	      
+ #ifdef HAVE_AUTH
+-	      /* find queries for zones we're authoritative for, and answer them directly */
++	      /* Find queries for zones we're authoritative for, and answer them directly.
++		 The exception to this is DS queries for the zone route. They
++		 have to come from the parent zone. Since dnsmasq's auth server
++		 can't do DNSSEC, the zone will be unsigned, and anything using
++		 dnsmasq as a forwarder and doing validation will be expecting to
++		 see the proof of non-existence from the parent. */
+ 	      if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 		for (zone = daemon->auth_zones; zone; zone = zone->next)
+-		  if (in_zone(zone, daemon->namebuff, NULL))
+-		    {
+-		      auth_dns = 1;
+-		      local_auth = 1;
+-		      break;
+-		    }
++		  {
++		    char *cut;
++		    
++		    if (in_zone(zone, daemon->namebuff, &cut))
++		      {
++			if (qtype != T_DS || cut)
++			  {
++			    auth_dns = 1;
++			    local_auth = 1;
++			  }
++			break;
++		      }
++		  }
+ #endif
+ 	    }
+ 	}

package/network/services/unetd/files/unetd.sh

@@ -82,11 +82,10 @@ proto_unet_setup() {
 
 proto_unet_teardown() {
 	local config="$1"
-	local iface="$2"
 
 	local device
 	json_get_vars device
-	device="${device:-$iface}"
+	device="${device:-$config}"
 
 	json_init
 	json_add_string name "$device"

target/linux/airoha/an7581/config-6.6

@@ -1,4 +1,5 @@
 CONFIG_64BIT=y
+CONFIG_AIROHA_CPU_PM_DOMAIN=y
 CONFIG_AIROHA_THERMAL=y
 CONFIG_AIROHA_WATCHDOG=y
 CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
@@ -495,6 +496,8 @@ CONFIG_RATIONAL=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RELOCATABLE=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RFS_ACCEL=y

target/linux/airoha/dts/an7581-evb-emmc.dts

@@ -100,8 +100,9 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "state_uhs";
 	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
 	status = "okay";
 
 	#address-cells = <1>;

target/linux/airoha/dts/an7581.dtsi

@@ -81,7 +81,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -95,7 +95,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -109,7 +109,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -123,7 +123,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -332,6 +332,21 @@
 		};
 	};
 
+	clk25m: oscillator {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+		clock-output-names = "clkxtal";
+	};
+
+	vmmc_3v3: regulator-vmmc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -535,13 +550,15 @@
 		};
 
 		mmc0: mmc@1fa0e000 {
-			compatible = "airoha,an7581-mmc";
+			compatible = "mediatek,mt7622-mmc";
 			reg = <0x0 0x1fa0e000 0x0 0x1000>,
 			      <0x0 0x1fa0c000 0x0 0x60>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&scuclk EN7581_CLK_EMMC>;
-			clock-names = "source";			bus-width = <4>;
+			clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
+			clock-names = "source", "hclk";
+			bus-width = <4>;
 			max-frequency = <52000000>;
+			vmmc-supply = <&vmmc_3v3>;
 			disable-wp;
 			cap-mmc-highspeed;
 			non-removable;

target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch

@@ -1,7 +1,7 @@
-From fa27cb99b297a1a9c0a5824afe5a670e424fff61 Mon Sep 17 00:00:00 2001
+From 84cf9e541cccb8cb698518a9897942e8c78f1d83 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 16 Oct 2024 18:00:57 +0200
-Subject: [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
+Date: Thu, 9 Jan 2025 14:12:58 +0100
+Subject: [PATCH] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
 
 Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
 frequency scaling with SMC APIs and register a generic "cpufreq-dt"
@@ -14,29 +14,8 @@ Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
 driver is needed with OPP v2 nodes declared in DTS.
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
 ---
-Changes v9:
-- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
-Changes v8:
-- Split in dedicated PM domain driver
-Changes v7:
-- No changes
-Changes v6:
-- Improve Kconfig depends logic
-- Select PM (PM_GENERIC_DOMAINS depends on it)
-- Drop (int) cast for 
-Changes v5:
-- Rename cpu_pd to perf for power domain name
-- Use remove instead of remove_new
-Changes v4:
-- Rework to clk-only + PM set_performance_state implementation
-Changes v3:
-- Adapt to new cpufreq-dt APIs
-- Register cpufreq-dt instead of custom freq driver
-Changes v2:
-- Fix kernel bot error with missing slab.h and bitfield.h header
-- Limit COMPILE_TEST to ARM64 due to smcc 1.2
-
  drivers/cpufreq/Kconfig.arm          |   8 ++
  drivers/cpufreq/Makefile             |   1 +
  drivers/cpufreq/airoha-cpufreq.c     | 152 +++++++++++++++++++++++++++
@@ -104,11 +83,15 @@ Changes v2:
 +}
 +
 +static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
-+static const char * const airoha_cpufreq_genpd_names[] = { "cpu_pd", NULL };
++static const char * const airoha_cpufreq_pd_names[] = { "perf", NULL };
 +
 +static int airoha_cpufreq_probe(struct platform_device *pdev)
 +{
-+	struct dev_pm_opp_config config = { };
++	struct dev_pm_opp_config config = {
++		.clk_names = airoha_cpufreq_clk_names,
++		.config_clks = airoha_cpufreq_config_clks_nop,
++		.genpd_names = airoha_cpufreq_pd_names,
++	};
 +	struct platform_device *cpufreq_dt;
 +	struct airoha_cpufreq_priv *priv;
 +	struct device *dev = &pdev->dev;
@@ -125,18 +108,14 @@ Changes v2:
 +	if (!priv)
 +		return -ENOMEM;
 +
-+	config.clk_names = airoha_cpufreq_clk_names;
-+	config.config_clks = airoha_cpufreq_config_clks_nop;
-+	config.genpd_names = airoha_cpufreq_genpd_names;
-+	config.virt_devs = &virt_devs;
-+
++	/* Set OPP table conf with NOP config_clks */
 +	priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
 +	if (priv->opp_token < 0)
 +		return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
 +
 +	/* Set Attached PM for OPP ACTIVE */
 +	if (virt_devs) {
-+		const char * const *name = airoha_cpufreq_genpd_names;
++		const char * const *name = airoha_cpufreq_pd_names;
 +		int i, j;
 +
 +		for (i = 0; *name; i++, name++) {
@@ -177,7 +156,7 @@ Changes v2:
 +static void airoha_cpufreq_remove(struct platform_device *pdev)
 +{
 +	struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
-+	const char * const *name = airoha_cpufreq_genpd_names;
++	const char * const *name = airoha_cpufreq_pd_names;
 +	int i;
 +
 +	platform_device_unregister(priv->cpufreq_dt);

target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch

@@ -1,7 +1,7 @@
-From 76e4e6ce9aaae897f80e375345bf0095e1b09ff2 Mon Sep 17 00:00:00 2001
+From 82e703dd438b71432cc0ccbb90925d1e32dd014a Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Sat, 4 Jan 2025 19:03:09 +0100
-Subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
+Date: Thu, 9 Jan 2025 14:12:57 +0100
+Subject: [PATCH] pmdomain: airoha: Add Airoha CPU PM Domain support
 
 Add Airoha CPU PM Domain support to control frequency and power of CPU
 present on Airoha EN7581 SoC.
@@ -11,25 +11,21 @@ passing the performance state. The driver also expose a read-only clock
 that expose the current CPU frequency with SMC command.
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250109131313.32317-1-ansuelsmth@gmail.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
 ---
-Changes v9:
-- Fix compile error targetting wrong branch (remove_new change)
-Changes v8:
-- Add this patch
-- Use SMC invoke instead of 1.2
-
- drivers/pmdomain/mediatek/Kconfig             |  11 ++
+ drivers/pmdomain/mediatek/Kconfig             |  12 ++
  drivers/pmdomain/mediatek/Makefile            |   1 +
  .../pmdomain/mediatek/airoha-cpu-pmdomain.c   | 144 ++++++++++++++++++
- 3 files changed, 156 insertions(+)
+ 3 files changed, 157 insertions(+)
  create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
 
 --- a/drivers/soc/mediatek/Kconfig
 +++ b/drivers/soc/mediatek/Kconfig
-@@ -72,6 +72,17 @@ config MTK_SCPSYS_PM_DOMAINS
- 	  Control Processor System (SCPSYS) has several power management related
- 	  tasks in the system.
- 
+@@ -2,6 +2,17 @@
+ #
+ # MediaTek SoC drivers
+ #
 +config AIROHA_CPU_PM_DOMAIN
 +	tristate "Airoha CPU power domain"
 +	default ARCH_AIROHA
@@ -41,9 +37,9 @@ Changes v8:
 +	  CPU frequency and power is controlled by ATF with SMC command to
 +	  set performance states.
 +
- config MTK_MMSYS
- 	tristate "MediaTek MMSYS Support"
- 	default ARCH_MEDIATEK
+ menu "MediaTek SoC drivers"
+ 	depends on ARCH_MEDIATEK || COMPILE_TEST
+ 
 --- a/drivers/pmdomain/mediatek/Makefile
 +++ b/drivers/pmdomain/mediatek/Makefile
 @@ -1,3 +1,4 @@
@@ -53,7 +49,7 @@ Changes v8:
 +obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) 	+= airoha-cpu-pmdomain.o
 --- /dev/null
 +++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
-@@ -0,0 +1,145 @@
+@@ -0,0 +1,144 @@
 +// SPDX-License-Identifier: GPL-2.0
 +
 +#include <linux/arm-smccc.h>
@@ -123,9 +119,13 @@ Changes v8:
 +{
 +	struct airoha_cpu_pmdomain_priv *priv;
 +	struct device *dev = &pdev->dev;
-+	struct clk_init_data init = { };
++	const struct clk_init_data init = {
++		.name = "cpu",
++		.ops = &airoha_cpu_pmdomain_clk_ops,
++		/* Clock with no set_rate, can't cache */
++		.flags = CLK_GET_RATE_NOCACHE,
++	};
 +	struct generic_pm_domain *pd;
-+	struct clk_hw *hw;
 +	int ret;
 +
 +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -133,18 +133,13 @@ Changes v8:
 +		return -ENOMEM;
 +
 +	/* Init and register a get-only clk for Cpufreq */
-+	init.name = "cpu";
-+	init.ops = &airoha_cpu_pmdomain_clk_ops;
-+	/* Clock with no set_rate, can't cache */
-+	init.flags = CLK_GET_RATE_NOCACHE;
-+
-+	hw = &priv->hw;
-+	hw->init = &init;
-+	ret = devm_clk_hw_register(dev, hw);
++	priv->hw.init = &init;
++	ret = devm_clk_hw_register(dev, &priv->hw);
 +	if (ret)
 +		return ret;
 +
-+	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
++	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
++					  &priv->hw);
 +	if (ret)
 +		return ret;
 +

target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch

@@ -1,6 +1,6 @@
-From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
+From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 18 Dec 2024 10:03:45 +0100
+Date: Tue, 14 Jan 2025 00:10:02 +0100
 Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
  numbers
 
@@ -12,6 +12,8 @@ clocks number in match_data and alloca clk_data based on the compatible
 match_data.
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 ---
  drivers/clk/clk-en7523.c | 14 ++++++++------
  1 file changed, 8 insertions(+), 6 deletions(-)
@@ -44,7 +46,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  }
  
  static int en7523_reset_update(struct reset_controller_dev *rcdev,
-@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
+@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
  	struct clk_hw_onecell_data *clk_data;
  	int r;
  
@@ -58,12 +60,11 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  		return -ENOMEM;
  
 -	soc_data = device_get_match_data(&pdev->dev);
++	clk_data->num = soc_data->num_clocks;
  	r = soc_data->hw_init(pdev, clk_data);
  	if (r)
  		return r;
- 
-+	clk_data->num = soc_data->num_clocks;
- 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
  }
  
  static const struct en_clk_soc_data en7523_data = {

target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch

@@ -1,6 +1,6 @@
-From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
+From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Thu, 19 Dec 2024 13:13:37 +0100
+Date: Tue, 14 Jan 2025 00:10:03 +0100
 Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
 
 Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
@@ -8,6 +8,9 @@ should not be placed here. Value is derived internally in the user
 driver.
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 ---
  include/dt-bindings/clock/en7523-clk.h | 2 --
  1 file changed, 2 deletions(-)

target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch

@@ -1,6 +1,6 @@
-From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
+From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 11 Dec 2024 12:22:37 +0100
+Date: Tue, 14 Jan 2025 00:10:04 +0100
 Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
 
 Add ID for eMMC for EN7581. This is to control clock selection of eMMC
@@ -8,6 +8,8 @@ between 200MHz and 150MHz.
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 Acked-by: Conor Dooley <conor.dooley@microchip.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 ---
  include/dt-bindings/clock/en7523-clk.h | 2 ++
  1 file changed, 2 insertions(+)

target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch

@@ -1,12 +1,14 @@
-From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
+From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 11 Dec 2024 12:22:38 +0100
+Date: Tue, 14 Jan 2025 00:10:05 +0100
 Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
 
 Add clock for eMMC for EN7581. This is used to give info of the current
 eMMC source clock and to switch it from 200MHz or 150MHz.
 
 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 ---
  drivers/clk/clk-en7523.c | 10 ++++++++++
  1 file changed, 10 insertions(+)

target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch

@@ -1,136 +0,0 @@
-From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 11 Dec 2024 11:27:10 +0100
-Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
-
-Add support for AN7581 MMC Host. The MMC Host controller is based on
-mt7622 with the difference of not having regulator supply and state_uhs
-pins and hclk clock.
-
-Some minor fixes are applied to check if the state_uhs pins are defined
-and make hclk optional for the new airoha compatible.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
- 1 file changed, 46 insertions(+), 9 deletions(-)
-
---- a/drivers/mmc/host/mtk-sd.c
-+++ b/drivers/mmc/host/mtk-sd.c
-@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
- 	.stop_clk_fix = true,
- };
- 
-+static const struct mtk_mmc_compatible an7581_compat = {
-+	.clk_div_bits = 12,
-+	.recheck_sdio_irq = true,
-+	.hs400_tune = false,
-+	.pad_tune_reg = MSDC_PAD_TUNE0,
-+	.async_fifo = true,
-+	.data_tune = true,
-+	.busy_check = true,
-+	.stop_clk_fix = true,
-+	.enhance_rx = true,
-+	.support_64g = false,
-+};
-+
- static const struct of_device_id msdc_of_ids[] = {
- 	{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
- 	{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
-@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
- 	{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
- 	{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
- 	{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
--
-+	{ .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
- 	{}
- };
- MODULE_DEVICE_TABLE(of, msdc_of_ids);
-@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
- 	struct msdc_host *host = mmc_priv(mmc);
- 	int ret;
- 
-+	/* Skip setting supply if not supported */
-+	if (!mmc->supply.vqmmc)
-+		return 0;
-+
- 	if (!IS_ERR(mmc->supply.vqmmc)) {
- 		if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
- 		    ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
-@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
- 				dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
- 			}
- 
--			pinctrl_select_state(host->pinctrl, host->pins_uhs);
-+			/* Skip setting uhs pins if not supported */
-+			if (host->pins_uhs)
-+				pinctrl_select_state(host->pinctrl, host->pins_uhs);
- 		} else {
- 			dev_pm_clear_wake_irq(host->dev);
- 		}
-@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
- 
- 	msdc_set_buswidth(host, ios->bus_width);
- 
-+	/* Skip regulator if not supported */
-+	if (!mmc->supply.vmmc)
-+		goto skip_regulator;
-+
- 	/* Suspend/Resume will do power off/on */
- 	switch (ios->power_mode) {
- 	case MMC_POWER_UP:
-@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
- 		break;
- 	}
- 
-+skip_regulator:
- 	if (host->mclk != ios->clock || host->timing != ios->timing)
- 		msdc_set_mclk(host, ios->timing, ios->clock);
- }
-@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
- 	if (IS_ERR(host->src_clk))
- 		return PTR_ERR(host->src_clk);
- 
--	host->h_clk = devm_clk_get(&pdev->dev, "hclk");
--	if (IS_ERR(host->h_clk))
--		return PTR_ERR(host->h_clk);
-+	/* AN7581 SoC doesn't have hclk */
-+	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
-+		host->h_clk = devm_clk_get(&pdev->dev, "hclk");
-+		if (IS_ERR(host->h_clk))
-+			return PTR_ERR(host->h_clk);
-+	}
- 
- 	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
- 	if (IS_ERR(host->bus_clk))
-@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
- 		return PTR_ERR(host->pins_default);
- 	}
- 
--	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
--	if (IS_ERR(host->pins_uhs)) {
--		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
--		return PTR_ERR(host->pins_uhs);
-+	/* AN7581 doesn't have state_uhs pins */
-+	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
-+		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
-+		if (IS_ERR(host->pins_uhs)) {
-+			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-+			return PTR_ERR(host->pins_uhs);
-+		}
- 	}
- 
- 	/* Support for SDIO eint irq ? */
-@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
- 		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
- 		goto release_clk;
- 	}
-+
-+	/* AN7581 without regulator require tune to OCR values */
-+	if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
-+	    !mmc->ocr_avail)
-+		mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
-+
- 	msdc_init_hw(host);
- 
- 	if (mmc->caps2 & MMC_CAP2_CQE) {

target/linux/apm821xx/image/nand.mk

@@ -89,9 +89,6 @@ endef
 TARGET_DEVICES += netgear_wndap660
 
 define Device/netgear_wndr4700
-  DEVICE_COMPAT_VERSION := 3.0
-  DEVICE_COMPAT_MESSAGE := Network swconfig configuration cannot be upgraded to DSA. \
-       Upgrade via sysupgrade mechanism is not possible.
   DEVICE_VENDOR := NETGEAR
   DEVICE_MODEL := Centria N900 WNDR4700
   DEVICE_ALT0_VENDOR := NETGEAR
@@ -123,8 +120,9 @@ define Device/netgear_wndr4700
   NETGEAR_HW_ID := 29763875+128+256
   UBINIZE_OPTS := -E 5
   SUPPORTED_DEVICES += wndr4700
-  DEVICE_COMPAT_VERSION := 2.0
+  DEVICE_COMPAT_VERSION := 3.0
   DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \
+       Network swconfig configuration cannot be upgraded to DSA. \
        Upgrade via sysupgrade mechanism is not possible.
 endef
 TARGET_DEVICES += netgear_wndr4700

target/linux/ath79/image/nand.mk

@@ -318,6 +318,7 @@ define Device/meraki_mr18
   KERNEL_INITRAMFS := $$(KERNEL)
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   SUPPORTED_DEVICES += mr18
+  DEFAULT := n
 endef
 TARGET_DEVICES += meraki_mr18
 

target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts

@@ -68,6 +68,8 @@
 	status = "okay";
 
 	led-controller@1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		compatible = "sercomm,msp430-leds";
 		reg = <1>;
 		spi-max-frequency = <500000>;

target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch

@@ -1,104 +0,0 @@
-From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Sat, 22 Apr 2023 03:26:01 +0100
-Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
-
-Setup Link Down Power Saving Mode according the DTS property
-just like for RTL821x 1GE PHYs.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -82,6 +82,10 @@
- 
- #define RTL822X_VND2_GANLPAR				0xa414
- 
-+#define RTL8221B_PHYCR1				0xa430
-+#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
-+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
-+
- #define RTL8366RB_POWER_SAVE			0x15
- #define RTL8366RB_POWER_SAVE_ON			BIT(12)
- 
-@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
- 	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
- }
- 
-+static int rtl822x_aldps_probe(struct phy_device *phydev)
-+{
-+	struct device *dev = &phydev->mdio.dev;
-+	int val;
-+
-+	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
-+	if (val < 0)
-+		return val;
-+
-+	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
-+		val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
-+	else
-+		val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
-+
-+	phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
-+
-+	return rtl822x_probe(phydev);
-+}
-+
- static int rtlgen_resume(struct phy_device *phydev)
- {
- 	int ret = genphy_resume(phydev);
-@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc838),
- 		.name           = "RTL8226-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_aldps_probe,
- 		.soft_reset     = genphy_soft_reset,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc848),
- 		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_aldps_probe,
- 		.soft_reset     = genphy_soft_reset,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.config_init    = rtl822xb_config_init,
- 		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
-@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
- 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
- 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.config_init    = rtl822xb_config_init,
- 		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,

target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch

@@ -0,0 +1,42 @@
+From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sat, 22 Apr 2023 03:26:01 +0100
+Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
+
+Setup Link Down Power Saving Mode according the DTS property
+just like for RTL821x 1GE PHYs.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -82,6 +82,10 @@
+ 
+ #define RTL822X_VND2_GANLPAR				0xa414
+ 
++#define RTL8221B_PHYCR1				0xa430
++#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
++#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
++
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
+ 	if (ret < 0)
+ 		return ret;
+ 
++	if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
++		ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
++				 RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
++	else
++		ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
++				   RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
++	if (ret < 0)
++		return ret;
++
+ 	/* Disable SGMII AN */
+ 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
+ 	if (ret < 0)

target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch

@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {

target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch

@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
-@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
-@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
-@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,

target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch

@@ -0,0 +1,27 @@
+From 1addfb042a9d27788a0fb2c2935045b56fd8560e Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 23 Jan 2025 03:25:29 +0000
+Subject: [PATCH] net: phy: realtek: mark existing MMDs as present
+
+When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
+versions of the PHY fail to report the MMDs present on the PHY.
+Mark MMDs PMAPMD, PCS and AN which are always existing according to
+the datasheet as present to fix that.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
+ 	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+ 			 phydev->supported);
+ 
++	phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
++				        MDIO_DEVS_AN;
++
+ 	return genphy_c45_pma_read_abilities(phydev);
+ }
+ 

target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch

@@ -0,0 +1,58 @@
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 30 Jan 2025 05:33:12 +0000
+Subject: [PATCH] net: phy: realtek: work around broken SerDes
+
+For still unknown reasons the SerDes init sequence may sometimes
+time out because a self-clearing bit never clears, indicating the
+PHY has entered an unrecoverable error state.
+
+Work-around the issue by triggering a hardware reset and retry the
+setup sequence while warning the user that this has happened.
+This is really more of a work-around than a fix, and should be
+replaced by a better actual fix in future (hopefully).
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
+ 	return 0;
+ }
+ 
++static int rtl822xb_config_init_war(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822xb_config_init(phydev);
++
++	if (ret == -ETIMEDOUT) {
++		phydev_warn(phydev, "SerDes setup timed out, retrying\n");
++		phy_device_reset(phydev, 1);
++		phy_device_reset(phydev, 0);
++		ret = rtl822xb_config_init(phydev);
++	}
++
++	return ret;
++}
++
+ static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+ 				      phy_interface_t iface)
+ {
+@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
+ 		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
+-		.config_init    = rtl822xb_config_init,
++		.config_init    = rtl822xb_config_init_war,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
+@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
+ 		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
+-		.config_init    = rtl822xb_config_init,
++		.config_init    = rtl822xb_config_init_war,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,

target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch

@@ -0,0 +1,27 @@
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 30 Jan 2025 05:38:31 +0000
+Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
+
+RealTek's PHYs by default also listen on MDIO address 0 which is defined
+as broadcast address. This can lead to problems if there is an actual PHY
+(such as MT7981 built-in PHY) present at this address, as accessing that
+PHY may then confuse the RealTek PHY.
+
+Disabled listening on the MDIO broadcast address to avoid such problems.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
+ 			     phydev->host_interfaces) ||
+ 		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
+ 
++	/* disable listening on MDIO broadcast address (0) */
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, 0xa430, BIT(13));
++	if (ret < 0)
++		return ret;
++
+ 	/* fill in possible interfaces */
+ 	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
+ 		     has_2500);

target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch

@@ -1,43 +0,0 @@
-From: John Crispin <blogic@openwrt.org>
-Date: Fri, 3 Aug 2012 10:27:25 +0200
-Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
---- a/include/uapi/linux/atm.h
-+++ b/include/uapi/linux/atm.h
-@@ -131,8 +131,14 @@
- #define ATM_ABR		4
- #define ATM_ANYCLASS	5		/* compatible with everything */
- 
-+#define ATM_VBR_NRT     ATM_VBR
-+#define ATM_VBR_RT      6
-+#define ATM_UBR_PLUS    7
-+#define ATM_GFR         8
-+
- #define ATM_MAX_PCR	-1		/* maximum available PCR */
- 
-+
- struct atm_trafprm {
- 	unsigned char	traffic_class;	/* traffic class (ATM_UBR, ...) */
- 	int		max_pcr;	/* maximum PCR in cells per second */
-@@ -155,6 +161,9 @@ struct atm_trafprm {
- 	unsigned int adtf      :10;     /* ACR Decrease Time Factor (10-bit) */
- 	unsigned int cdf       :3;      /* Cutoff Decrease Factor (3-bit) */
-         unsigned int spare     :9;      /* spare bits */ 
-+	int		scr;		/* sustained rate in cells per second */
-+	int		mbs;		/* maximum burst size (MBS) in cells */
-+	int		cdv;		/* Cell delay variation */
- };
- 
- struct atm_qos {
---- a/net/atm/proc.c
-+++ b/net/atm/proc.c
-@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
- static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
- {
- 	static const char *const class_name[] = {
--		"off", "UBR", "CBR", "VBR", "ABR"};
-+		"off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
- 	static const char *const aal_name[] = {
- 		"---",	"1",	"2",	"3/4",	/*  0- 3 */
- 		"???",	"5",	"???",	"???",	/*  4- 7 */

target/linux/ipq806x/base-files/etc/board.d/02_network

@@ -89,12 +89,12 @@ ipq806x_setup_macs()
 		linksys,ea7500-v1)
 			hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
 			ucidef_set_interface_macaddr "lan" "$hw_mac_addr"
-			ucidef_set_interface_macaddr "wan" "$hw_mac_addr"
+			ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 1)"
 		;;
 		linksys,ea8500)
 			hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
 			ucidef_set_interface_macaddr "lan" "$hw_mac_addr"
-			ucidef_set_interface_macaddr "wan" "$hw_mac_addr"
+			ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 1)"
 		;;
 		linksys,e8350-v1 |\
 		zyxel,nbg6817)
@@ -111,7 +111,7 @@ ipq806x_setup_macs()
 			hw_mac_addr=$(mtd_get_mac_ascii hwconfig HW.LAN.MAC.Address)
 			ucidef_set_interface_macaddr "lan" "$hw_mac_addr"
 			hw_mac_addr=$(mtd_get_mac_ascii hwconfig HW.WAN.MAC.Address)
-			ucidef_set_interface_macaddr "wan" "$hw_mac_addr"
+			ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 1)"
 		;;
 	esac
 }

target/linux/mediatek/dts/mt7622-netgear-wax206.dts

@@ -13,6 +13,7 @@
 
 	aliases {
 		ethernet0 = &gmac0;
+		label-mac-device = &gmac0;
 		led-boot = &led_power_r;
 		led-failsafe = &led_power_r;
 		led-running = &led_power_g;
@@ -84,6 +85,7 @@
 			default-state = "off";
 			gpios = <&pio 85 GPIO_ACTIVE_LOW>;
 			label = "wifin:green";
+			linux,default-trigger = "phy0tpt";
 		};
 
 		wifin_blue {
@@ -96,6 +98,7 @@
 			default-state = "off";
 			gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
 			label = "wifia:green";
+			linux,default-trigger = "phy1tpt";
 		};
 
 		wifia_blue {

target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts

@@ -133,8 +133,8 @@
 		reg = <0>;
 
 		spi-max-frequency = <52000000>;
-		spi-tx-buswidth = <4>;
-		spi-rx-buswidth = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 
 		spi-cal-enable;
 		spi-cal-mode = "read-data";

target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts

@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy AP3000 Outdoor v1";
-	compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &wifi;
@@ -42,18 +42,19 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status_green: led@0 {
+		led_status_green: led-0 {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
 		};
 
-		led_status_red: led_1 {
+		led_status_red: led-1 {
 			function = LED_FUNCTION_POWER;
 			color = <LED_COLOR_ID_RED>;
 			gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
+
 	gpio_export {
 		compatible = "gpio-export";
 		#size-cells = <0>;
@@ -89,7 +90,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac1: mac@1 {
@@ -148,6 +148,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -163,6 +164,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -174,25 +176,23 @@
 						#nvmem-cell-cells = <1>;
 					};
 				};
-
 			};
 
-			partition@3C0000 {
+			partition@3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition@580000 {
+			partition@5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};
 	};
 };
 
-
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {

target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts

@@ -6,7 +6,7 @@
 
 / {
 	model = "Cudy M3000 v1";
-	compatible = "cudy,m3000-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,m3000-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
@@ -77,7 +77,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac@0 {
@@ -105,19 +104,17 @@
 	rtl8221b_phy: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c45";
 		reg = <1>;
-
-		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
-
-		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&pio>;
 	};
 };
 
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
-
 	status = "okay";
 
 	spi_nand: spi_nand@0 {
@@ -127,18 +124,18 @@
 		reg = <0>;
 
 		spi-max-frequency = <52000000>;
-		spi-tx-buswidth = <4>;
-		spi-rx-buswidth = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+
+		mediatek,nmbm;
+		mediatek,bmt-max-ratio = <1>;
+		mediatek,bmt-max-reserved-blocks = <64>;
 
 		partitions {
 			compatible = "fixed-partitions";
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			mediatek,nmbm;
-			mediatek,bmt-max-ratio = <1>;
-			mediatek,bmt-max-reserved-blocks = <64>;
-
 			partition@0 {
 				label = "BL2";
 				reg = <0x0000000 0x0100000>;
@@ -177,6 +174,7 @@
 			partition@3c0000 {
 				label = "FIP";
 				reg = <0x03c0000 0x0200000>;
+				read-only;
 			};
 
 			partition@5c0000 {

target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dtsi

@@ -1,16 +1,18 @@
 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
 
 /dts-v1/;
+
 #include <dt-bindings/leds/common.h>
+
 #include "mt7981.dtsi"
 
 / {
 	aliases {
 		label-mac-device = &gmac1;
-		led-boot = &led_status;
-		led-failsafe = &led_status;
-		led-running = &led_status;
-		led-upgrade = &led_status;
+		led-boot = &led_sys_red;
+		led-failsafe = &led_sys_red;
+		led-running = &led_sys_white;
+		led-upgrade = &led_sys_white;
 		serial0 = &uart0;
 	};
 
@@ -29,8 +31,8 @@
 
 		mode {
 			label = "mode";
-			linux,input-type = <EV_SW>;
 			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
 			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
 			debounce-interval = <60>;
 		};
@@ -39,36 +41,40 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led_0 {
+		led_sys_red: led-0 {
 			function = LED_FUNCTION_POWER;
 			color = <LED_COLOR_ID_RED>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_1 {
+		led_sys_white: led-1 {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
-
 	};
 
 	usb_vbus: regulator-usb {
 		compatible = "regulator-fixed";
-
 		regulator-name = "usb-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
-
 		gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 	};
 };
 
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac@0 {
@@ -92,26 +98,17 @@
 
 &mdio_bus {
 	phy1: phy@1 {
-		reg = <1>;
 		compatible = "ethernet-phy-ieee802.3-c45";
-		phy-mode = "2500base-x";
-		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
-		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		reg = <1>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&pio>;
 		realtek,aldps-enable;
 	};
 };
 
-&pio {
-	spi0_flash_pins: spi0-pins {
-		mux {
-			function = "spi";
-			groups = "spi0", "spi0_wp_hold";
-		};
-	};
-};
-
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
@@ -122,6 +119,7 @@
 		#size-cells = <1>;
 		compatible = "spi-nand";
 		reg = <0>;
+
 		spi-max-frequency = <52000000>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
@@ -147,6 +145,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -162,6 +161,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -173,7 +173,6 @@
 						#nvmem-cell-cells = <1>;
 					};
 				};
-
 			};
 
 			partition@3c0000 {
@@ -190,16 +189,22 @@
 	};
 };
 
-&uart0 {
-	status = "okay";
+&pio {
+	spi0_flash_pins: spi0-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+	};
 };
 
 &usb_phy {
 	status = "okay";
 };
 
-&watchdog {
+&xhci {
 	status = "okay";
+	vbus-supply = <&usb_vbus>;
 };
 
 &wifi {
@@ -207,8 +212,3 @@
 	nvmem-cells = <&eeprom_factory_0>;
 	nvmem-cell-names = "eeprom";
 };
-
-&xhci {
-	status = "okay";
-	vbus-supply = <&usb_vbus>;
-};

target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts

@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy WR3000S v1";
-	compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,wr3000s-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
@@ -42,33 +42,32 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led@0 {
+		led_status: led-status {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
 
-
-		led_internet {
+		led-internet {
 			function = LED_FUNCTION_WAN_ONLINE;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wps {
+		led-wps {
 			function = LED_FUNCTION_WPS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wlan2g {
+		led-wlan2g {
 			function = LED_FUNCTION_WLAN_2GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
-		led_wlan5g {
+		led-wlan5g {
 			function = LED_FUNCTION_WLAN_5GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
@@ -88,7 +87,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac@0 {
@@ -165,6 +163,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -180,6 +179,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -193,15 +193,15 @@
 				};
 			};
 
-			partition@3C0000 {
+			partition@3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition@580000 {
+			partition@5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};

target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch

@@ -0,0 +1,33 @@
+From 4c4baed29b168e9bf39545a945a9523ea280cb44 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sat, 1 Feb 2025 04:24:17 +0000
+Subject: [PATCH 1/2] Revert "arm64: dts: mediatek: fix t-phy unit name"
+
+This reverts commit 963c3b0c47ec29b4c49c9f45965cd066f419d17f.
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi  | 2 +-
+ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -908,7 +908,7 @@
+ 		status = "disabled";
+ 	};
+ 
+-	sata_phy: t-phy {
++	sata_phy: t-phy@1a243000 {
+ 		compatible = "mediatek,mt7622-tphy",
+ 			     "mediatek,generic-tphy-v1";
+ 		#address-cells = <2>;
+--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+@@ -428,7 +428,7 @@
+ 			};
+ 		};
+ 
+-		pcie_phy: t-phy {
++		pcie_phy: t-phy@11c00000 {
+ 			compatible = "mediatek,mt7986-tphy",
+ 				     "mediatek,generic-tphy-v2";
+ 			ranges;

target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch

@@ -0,0 +1,33 @@
+From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Fri, 28 Jun 2024 12:55:40 +0200
+Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
+ node
+
+Sata node reference the pciesys with the property mediatek,phy-node
+and that is used as a syscon to access the pciesys regs.
+
+Readd the syscon compatible to pciesys node to restore correct
+functionality of the SATA interface.
+
+Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
+Reported-by: Frank Wunderlich <frank-w@public-files.de>
+Co-developed-by: Frank Wunderlich <frank-w@public-files.de>
+Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Cc: stable@vger.kernel.org
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -798,7 +798,7 @@
+ 	};
+ 
+ 	pciesys: clock-controller@1a100800 {
+-		compatible = "mediatek,mt7622-pciesys";
++		compatible = "mediatek,mt7622-pciesys", "syscon";
+ 		reg = <0 0x1a100800 0 0x1000>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;

target/linux/mediatek/patches-6.6/790-net-phy-realtek-add-led-link-select-for-RTL8221.patch

@@ -77,7 +77,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
-@@ -911,7 +956,7 @@ static int rtl822xb_config_init(struct p
+@@ -925,7 +970,7 @@ static int rtl822xb_config_init(struct p
  	if (ret < 0)
  		return ret;
  
@@ -85,4 +85,4 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
 +	return rtl8221b_config_led(phydev);
  }
  
- static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+ static int rtl822xb_config_init_war(struct phy_device *phydev)

target/linux/octeon/image/Makefile

@@ -92,6 +92,7 @@ define Device/ubnt_unifi-usg
   DEVICE_PACKAGES += kmod-gpio-button-hotplug kmod-leds-gpio
   DEVICE_DTS := cn5020_ubnt_usg
   KERNEL += | append-dtb-to-elf
+  SUPPORTED_DEVICES += ubnt,usg
 endef
 TARGET_DEVICES += ubnt_unifi-usg
 

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts

@@ -137,6 +137,27 @@
 		reg = <28>;
 		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 		reset-deassert-us = <10000>;
+		
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led@0 {
+				reg = <0>;
+				color = <LED_COLOR_ID_YELLOW>;
+				function = LED_FUNCTION_WAN;
+				default-state = "keep";
+				active-low;
+			};
+
+			led@2 {
+				reg = <2>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_WAN;
+				default-state = "keep";
+				active-low;
+			};
+		};
 	};
 };
 

target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds

@@ -16,7 +16,8 @@ asus,rt-ax89x)
 	ucidef_set_led_netdev "sfp" "SFP" "white:sfp" "10g-sfp"
 	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
 	;;
-dynalink,dl-wrx36)
+dynalink,dl-wrx36|\
+spectrum,sax1v1k)
 	ucidef_set_led_netdev "wan-port-link-green" "WAN-PORT-LINK-GREEN" "90000.mdio-1:1c:green:wan" "wan" "link_2500"
 	ucidef_set_led_netdev "wan-port-link-yellow" "WAN-PORT-LINK-YELLOW" "90000.mdio-1:1c:yellow:wan" "wan" "tx rx link_10 link_100 link_1000"
 	;;

target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts

@@ -64,19 +64,6 @@
 	label = "dsa";
 };
 
-&gmac1 {
-	status = "okay";
-	label = "lan1";
-	phy-handle = <&ethphy4>;
-
-	nvmem-cells = <&macaddr_eeprom>;
-	nvmem-cell-names = "mac-address";
-};
-
-&ethphy4 {
-	/delete-property/ interrupts;
-};
-
 &switch0 {
 	ports {
 		port@0 {
@@ -98,6 +85,11 @@
 			status = "okay";
 			label = "lan2";
 		};
+
+                port@4 {
+                        status = "okay";
+                        label = "lan1";
+                };
 	};
 };
 

target/linux/ramips/dts/rt3883.dtsi

@@ -51,7 +51,7 @@
 			compatible = "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
-			clocks = <&sysc 5>;
+			clocks = <&sysc 4>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
@@ -61,7 +61,7 @@
 			compatible = "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
-			clocks = <&sysc 6>;
+			clocks = <&sysc 5>;
 
 			resets = <&sysc 8>;
 			reset-names = "wdt";
@@ -93,7 +93,7 @@
 			compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0x500 0x100>;
 
-			clocks = <&sysc 7>;
+			clocks = <&sysc 6>;
 
 			resets = <&sysc 12>;
 
@@ -187,7 +187,7 @@
 			compatible = "ralink,rt2880-i2c";
 			reg = <0x900 0x100>;
 
-			clocks = <&sysc 8>;
+			clocks = <&sysc 7>;
 
 			resets = <&sysc 16>;
 			reset-names = "i2c";
@@ -205,7 +205,7 @@
 			compatible = "ralink,rt3883-i2s";
 			reg = <0xa00 0x100>;
 
-			clocks = <&sysc 9>;
+			clocks = <&sysc 8>;
 
 			resets = <&sysc 17>;
 			reset-names = "i2s";
@@ -229,7 +229,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			clocks = <&sysc 10>;
+			clocks = <&sysc 9>;
 
 			resets = <&sysc 18>;
 			reset-names = "spi";
@@ -246,7 +246,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			clocks = <&sysc 11>;
+			clocks = <&sysc 10>;
 
 			resets = <&sysc 18>;
 			reset-names = "spi";
@@ -261,7 +261,7 @@
 			compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
-			clocks = <&sysc 12>;
+			clocks = <&sysc 11>;
 
 			resets = <&sysc 19>;
 
@@ -343,7 +343,7 @@
 		#size-cells = <0>;
 		reg = <0x10100000 0x10000>;
 
-		clocks = <&sysc 13>;
+		clocks = <&sysc 12>;
 
 		resets = <&sysc 21>;
 		reset-names = "fe";
@@ -463,7 +463,7 @@
 		compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 0x40000>;
 
-		clocks = <&sysc 14>;
+		clocks = <&sysc 13>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;

target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom

@@ -34,12 +34,12 @@ case "$FIRMWARE" in
 		wan_mac=$(jboot_config_read -m -i $(find_mtd_part "config") -o 0xE000)
 		wifi_mac=$(macaddr_add "$wan_mac" 1)
 		jboot_eeprom_extract "config" 0xE000
-		caldata_patch_mac $wifi_mac 0x4
+		caldata_patch_data "${wifi_mac//:/}" 0x4
 		;;
 	dovado,tiny-ac)
 		wifi_mac=$(mtd_get_mac_ascii u-boot-env INIC_MAC_ADDR)
 		caldata_extract "factory" 0x0 0x200
-		caldata_patch_mac $wifi_mac 0x4
+		caldata_patch_data "${wifi_mac//:/}" 0x4
 		;;
 	*)
 		caldata_die "Please define mtd-eeprom in $board DTS file!"

target/linux/ramips/patches-6.6/003-v6.14-clk-ralink-mtmips-remove-duplicated-xtal-clock-for-Ralink.patch

@@ -0,0 +1,28 @@
+From 830d8062d25581cf0beaa334486eea06834044da Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Wed, 8 Jan 2025 10:36:36 +0100
+Subject: [PATCH] clk: ralink: mtmips: remove duplicated 'xtal' clock for
+ Ralink SoC RT3883
+
+Ralink SoC RT3883 has already 'xtal' defined as a base clock so there is no
+need to redefine it again in fixed clocks section. Hence, remove the duplicate
+one from there.
+
+Fixes: d34db686a3d7 ("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs")
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20250108093636.265033-1-sergio.paracuellos@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/ralink/clk-mtmips.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/clk/ralink/clk-mtmips.c
++++ b/drivers/clk/ralink/clk-mtmips.c
+@@ -266,7 +266,6 @@ err_clk_unreg:
+ 	}
+ 
+ static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
+-	CLK_FIXED("xtal", NULL, 40000000),
+ 	CLK_FIXED("periph", "xtal", 40000000)
+ };
+ 

target/linux/ramips/patches-6.6/100-mips-ralink-update-CPU-clock-index.patch

@@ -0,0 +1,58 @@
+From ef57412d070fe663a66a5473ffc708bd89671259 Mon Sep 17 00:00:00 2001
+From: Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+Date: Sun, 2 Feb 2025 17:10:14 +0800
+Subject: [PATCH] mips: ralink: update CPU clock index
+
+Some clock indexes have been reorganized in commit d34db686a3d7
+("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs").
+Update CPU clock index to match the clock driver changes.
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+Co-authored-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
+---
+ arch/mips/ralink/clk.c | 11 ++---------
+ 1 file changed, 2 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/ralink/clk.c
++++ b/arch/mips/ralink/clk.c
+@@ -19,27 +19,22 @@
+ 
+ static const char *clk_cpu(int *idx)
+ {
++	*idx = 1;
++
+ 	switch (ralink_soc) {
+ 	case RT2880_SOC:
+-		*idx = 0;
+ 		return "ralink,rt2880-sysc";
+ 	case RT3883_SOC:
+-		*idx = 0;
+ 		return "ralink,rt3883-sysc";
+ 	case RT305X_SOC_RT3050:
+-		*idx = 0;
+ 		return "ralink,rt3050-sysc";
+ 	case RT305X_SOC_RT3052:
+-		*idx = 0;
+ 		return "ralink,rt3052-sysc";
+ 	case RT305X_SOC_RT3350:
+-		*idx = 1;
+ 		return "ralink,rt3350-sysc";
+ 	case RT305X_SOC_RT3352:
+-		*idx = 1;
+ 		return "ralink,rt3352-sysc";
+ 	case RT305X_SOC_RT5350:
+-		*idx = 1;
+ 		return "ralink,rt5350-sysc";
+ 	case MT762X_SOC_MT7620A:
+ 		*idx = 2;
+@@ -48,10 +43,8 @@ static const char *clk_cpu(int *idx)
+ 		*idx = 2;
+ 		return "ralink,mt7620-sysc";
+ 	case MT762X_SOC_MT7628AN:
+-		*idx = 1;
+ 		return "ralink,mt7628-sysc";
+ 	case MT762X_SOC_MT7688:
+-		*idx = 1;
+ 		return "ralink,mt7688-sysc";
+ 	default:
+ 		*idx = -1;

target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch

@@ -0,0 +1,105 @@
+From: Shiji Yang <yangshiji66@outlook.com>
+Date: Wed, 1 Jan 2025 13:30:11 +0800
+Subject: [PATCH] pinctrl: mtmips: allow mux SDXC pins for mt76x8
+
+This is a hack to supprot two types of mt76x8 SDXC pinmaps:
+
+a) Use ethernet phy pins as SDXC IO.
+
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
+b) Use I2S/I2C/GPIO0/UART1 pins as SDXC IO.
+
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "i2s", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+---
+ drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 24 ++++++++++++++++++++++-
+ 1 file changed, 22 insertions(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
+@@ -1,10 +1,13 @@
+ // SPDX-License-Identifier: GPL-2.0-only
+ 
++#include <asm/mach-ralink/ralink_regs.h>
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/of.h>
+ #include "pinctrl-mtmips.h"
+ 
++#define SYSC_REG_AGPIO_CFG		0x3c
++
+ #define MT76X8_GPIO_MODE_MASK		0x3
+ 
+ #define MT76X8_GPIO_MODE_P4LED_KN	58
+@@ -26,6 +29,7 @@
+ #define MT76X8_GPIO_MODE_I2C		20
+ #define MT76X8_GPIO_MODE_REFCLK		18
+ #define MT76X8_GPIO_MODE_PERST		16
++#define MT76X8_GPIO_MODE_ESD		15
+ #define MT76X8_GPIO_MODE_WDT		14
+ #define MT76X8_GPIO_MODE_SPI		12
+ #define MT76X8_GPIO_MODE_SDMODE		10
+@@ -74,6 +78,12 @@ static struct mtmips_pmx_func refclk_grp
+ static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
+ static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
+ static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
++/*
++ * "esd" (Ethernet SDXC) group supports two mode:
++ * "gpio" - SDXC mux to I2S/I2C/GPIO0/UART1 pins with "gpio" mode
++ * "iot"  - SDXC mux to EPHY pins, eth p1-p4 pad must be set to "digital"
++ */
++static struct mtmips_pmx_func esd_grp[] = { FUNC("iot", 0, 47, 1) };
+ 
+ static struct mtmips_pmx_func sd_mode_grp[] = {
+ 	FUNC("jtag", 3, 22, 8),
+@@ -216,6 +226,7 @@ static struct mtmips_pmx_group mt76x8_pi
+ 	GRP("perst", perst_grp, 1, MT76X8_GPIO_MODE_PERST),
+ 	GRP("wdt", wdt_grp, 1, MT76X8_GPIO_MODE_WDT),
+ 	GRP("spi", spi_grp, 1, MT76X8_GPIO_MODE_SPI),
++	GRP("esd", esd_grp, 1, MT76X8_GPIO_MODE_ESD),
+ 	GRP_G("sdmode", sd_mode_grp, MT76X8_GPIO_MODE_MASK,
+ 				1, MT76X8_GPIO_MODE_SDMODE),
+ 	GRP_G("uart0", uart0_grp, MT76X8_GPIO_MODE_MASK,
+@@ -257,7 +268,18 @@ static struct mtmips_pmx_group mt76x8_pi
+ 
+ static int mt76x8_pinctrl_probe(struct platform_device *pdev)
+ {
+-	return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
++	int ret;
++
++	ret = mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
++	if (ret)
++		return ret;
++
++	if (of_property_present(pdev->dev.of_node, "ephy-analog"))
++		rt_sysc_m32(0xf << 17, 0, SYSC_REG_AGPIO_CFG);
++	else if (of_property_present(pdev->dev.of_node, "ephy-digital"))
++		rt_sysc_m32(0xf << 17, 0xf << 17, SYSC_REG_AGPIO_CFG);
++
++	return ret;
+ }
+ 
+ static const struct of_device_id mt76x8_pinctrl_match[] = {

target/linux/realtek/image/rtl838x.mk

@@ -124,7 +124,7 @@ define Device/hpe_1920-8g-poe-180w
   DEVICE_MODEL := 1920-8G-PoE+ 180W (JG922A)
   DEVICE_PACKAGES += realtek-poe
   H3C_DEVICE_ID := 0x00010025
-  SUPPORTED_DEVICES += hpe_1920-8g-poe
+  SUPPORTED_DEVICES += hpe,1920-8g-poe
 endef
 TARGET_DEVICES += hpe_1920-8g-poe-180w
 

target/linux/rockchip/patches-6.6/034-21-v6.8-drm-sched-Add-drm_sched_wqueue_-helpers.patch

@@ -92,7 +92,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
  
 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
 +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
-@@ -4652,7 +4652,7 @@ bool amdgpu_device_has_job_running(struc
+@@ -4615,7 +4615,7 @@ bool amdgpu_device_has_job_running(struc
  	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  		struct amdgpu_ring *ring = adev->rings[i];
  
@@ -101,7 +101,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
  			continue;
  
  		spin_lock(&ring->sched.job_list_lock);
-@@ -4794,7 +4794,7 @@ int amdgpu_device_pre_asic_reset(struct
+@@ -4757,7 +4757,7 @@ int amdgpu_device_pre_asic_reset(struct
  	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  		struct amdgpu_ring *ring = adev->rings[i];
  
@@ -110,7 +110,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
  			continue;
  
  		/* Clear job fence from fence drv to avoid force_completion
-@@ -5338,7 +5338,7 @@ int amdgpu_device_gpu_recover(struct amd
+@@ -5297,7 +5297,7 @@ int amdgpu_device_gpu_recover(struct amd
  		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  			struct amdgpu_ring *ring = tmp_adev->rings[i];
  
@@ -119,7 +119,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
  				continue;
  
  			drm_sched_stop(&ring->sched, job ? &job->base : NULL);
-@@ -5413,7 +5413,7 @@ skip_hw_reset:
+@@ -5372,7 +5372,7 @@ skip_hw_reset:
  		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  			struct amdgpu_ring *ring = tmp_adev->rings[i];
  
@@ -128,7 +128,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
  				continue;
  
  			drm_sched_start(&ring->sched, true);
-@@ -5739,7 +5739,7 @@ pci_ers_result_t amdgpu_pci_error_detect
+@@ -5698,7 +5698,7 @@ pci_ers_result_t amdgpu_pci_error_detect
  		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  			struct amdgpu_ring *ring = adev->rings[i];
  
@@ -137,7 +137,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
  				continue;
  
  			drm_sched_stop(&ring->sched, NULL);
-@@ -5867,7 +5867,7 @@ void amdgpu_pci_resume(struct pci_dev *p
+@@ -5826,7 +5826,7 @@ void amdgpu_pci_resume(struct pci_dev *p
  	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  		struct amdgpu_ring *ring = adev->rings[i];
  

target/linux/rockchip/patches-6.6/106-arm64-dts-rockchip-change-eth-phy-mode-to-rgmii-id-f.patch

@@ -0,0 +1,29 @@
+From bc9111d1b82684123e6c48817c04d0f8a08669bf Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Sun, 19 Jan 2025 16:24:10 +0800
+Subject: [PATCH] arm64: dts: rockchip: change eth phy mode to rgmii-id for
+ orangepi r1 plus lts
+
+In general the delay should be added by the PHY instead of the MAC,
+and this improves network stability on some boards which seem to
+need different delay.
+
+Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
+Cc: stable@vger.kernel.org # 6.6+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
+@@ -16,8 +16,7 @@
+ 
+ &gmac2io {
+ 	phy-handle = <&yt8531c>;
+-	tx_delay = <0x19>;
+-	rx_delay = <0x05>;
++	phy-mode = "rgmii-id";
+ 
+ 	mdio {
+ 		/delete-node/ ethernet-phy@1;

target/linux/rockchip/patches-6.6/602-net-ethernet-r8169-add-devname-configuration-from-OF.patch

@@ -8,7 +8,7 @@
  #include <linux/tcp.h>
  #include <linux/interrupt.h>
  #include <linux/dma-mapping.h>
-@@ -5355,6 +5356,7 @@ static int rtl_init_one(struct pci_dev *
+@@ -5381,6 +5382,7 @@ static int rtl_init_one(struct pci_dev *
  	int jumbo_max, region, rc;
  	enum mac_version chipset;
  	struct net_device *dev;
@@ -16,7 +16,7 @@
  	u32 txconfig;
  	u16 xid;
  
-@@ -5362,6 +5364,9 @@ static int rtl_init_one(struct pci_dev *
+@@ -5388,6 +5390,9 @@ static int rtl_init_one(struct pci_dev *
  	if (!dev)
  		return -ENOMEM;
  

target/linux/rockchip/patches-6.6/610-arm64-rockchip-add-OF-node-for-eth.patch

@@ -64,7 +64,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  
 --- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
 +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
-@@ -31,6 +31,7 @@
+@@ -30,6 +30,7 @@
  			motorcomm,keep-pll-enabled;
  			motorcomm,rx-clk-drv-microamp = <5020>;
  			motorcomm,rx-data-drv-microamp = <5020>;
@@ -72,7 +72,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  
  			pinctrl-0 = <&eth_phy_reset_pin>;
  			pinctrl-names = "default";
-@@ -40,3 +41,7 @@
+@@ -39,3 +40,7 @@
  		};
  	};
  };

target/linux/rockchip/patches-6.6/806-arm64-dts-rockchip-enable-dmc-for-rk3328-boards.patch

@@ -97,7 +97,7 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
 +
  &gmac2io {
  	phy-handle = <&yt8531c>;
- 	tx_delay = <0x19>;
+ 	phy-mode = "rgmii-id";
 --- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
 +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
 @@ -134,6 +134,64 @@

target/linux/stm32/stm32mp1/config-6.6

@@ -423,6 +423,7 @@ CONFIG_SGL_ALLOC=y
 CONFIG_SG_POOL=y
 CONFIG_SMP=y
 CONFIG_SMP_ON_UP=y
+CONFIG_SMSC_PHY=y
 CONFIG_SOCK_RX_QUEUE_MAPPING=y
 CONFIG_SOC_BUS=y
 CONFIG_SOFTIRQ_ON_OWN_STACK=y

target/linux/x86/image/64.mk

@@ -3,7 +3,8 @@ define Device/generic
   DEVICE_MODEL := x86/64
   DEVICE_PACKAGES += \
 	kmod-amazon-ena kmod-amd-xgbe kmod-bnx2 kmod-e1000 \
-	kmod-dwmac-intel kmod-forcedeth kmod-fs-vfat kmod-tg3
+	kmod-dwmac-intel kmod-forcedeth kmod-fs-vfat kmod-tg3 \
+	kmod-drm-i915
   GRUB2_VARIANT := generic
 endef
 TARGET_DEVICES += generic

target/linux/x86/image/generic.mk

@@ -3,7 +3,7 @@ define Device/generic
   DEVICE_MODEL := x86
   DEVICE_PACKAGES += kmod-3c59x kmod-e100 kmod-e1000 kmod-natsemi \
 	kmod-ne2k-pci kmod-pcnet32 kmod-sis900 kmod-tg3 kmod-via-rhine \
-	kmod-via-velocity kmod-forcedeth kmod-fs-vfat
+	kmod-via-velocity kmod-forcedeth kmod-fs-vfat kmod-drm-i915
   GRUB2_VARIANT := generic
 endef
 TARGET_DEVICES += generic

target/linux/x86/image/legacy.mk

@@ -3,7 +3,8 @@ define Device/generic
   DEVICE_MODEL := x86/legacy
   DEVICE_PACKAGES += kmod-3c59x kmod-e100 kmod-e1000 \
 	kmod-natsemi kmod-ne2k-pci kmod-pcnet32 kmod-sis900 \
-	kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth
+	kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth \
+	kmod-drm-i915
   GRUB2_VARIANT := legacy
 endef
 TARGET_DEVICES += generic

version

@@ -1 +1 @@
-r32779-d475f4e4007b
+r32824-6a73dae98c9c

version.date

@@ -1 +1 @@
-1737707208
+1738744361